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Computer Computer Architecture Architecture CST 250 CST 250 Assembly Language Lesson No. 14 Prepared by:Omar Hirzallah

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Computer Architecture CST 250. Assembly Language Lesson No. 14 Prepared by:Omar Hirzallah. Contents. ALU Operations (Single & Two Operand) Assembly Language (Case Study) Instruction Types Introduction to Programming With Assembly Addressing Modes Arithmetic Instructions - PowerPoint PPT Presentation

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Page 1: Computer Architecture CST 250

Computer ArchitectureComputer ArchitectureCST 250CST 250

Assembly LanguageLesson No. 14

Prepared by:Omar Hirzallah

Page 2: Computer Architecture CST 250

Contents

• ALU Operations (Single & Two Operand)

• Assembly Language (Case Study)

• Instruction Types

• Introduction to Programming With Assembly

• Addressing Modes

• Arithmetic Instructions

• Logical Instructions (Bit Masking)

Page 3: Computer Architecture CST 250

ALU Operation

• Operations involves only a single operand:– Such as the accumulator, or read a work from the memory. e.g.

inc dx ; increase the value of dx by 1

• Operation involves two operands:– Such as the accumulator and data word from the memory. e.g.

add ax, bx ; add the contents of bx into ax

Page 4: Computer Architecture CST 250

Single operand operationClear: all the bits of the operand are cleared to

zero. 0 [ A ]

Complement ( invert), all bits are changed to their opposite logic level. [ X¯ ] [ x ]

Increment: the operand is increased by one. [ x +1 ] [ x ]

Decrement: the operand is decreased by one. [ x - 1 ] [ x ]

Page 5: Computer Architecture CST 250

• Shift: – The bits of the operand are shifted to left or right one place and the

empty bit is replace with 0. – In Memory the bit that is shifted out of the operand is not lost;

instead it is shifted into the carry flag bit.

1 0 0 1 1 1 0 1 Before shift

0 0 1 1 1 0 1 0 After shift1

Cf

Page 6: Computer Architecture CST 250

• Rotate: – It is modified shift operation in which the C flag

becomes a part of the circulating shift register along with the operand.

1 0 0 1 1 1 0 1

0 1 0 0 1 1 1 0

0

1

Before ROR

After Rotate Right

Page 7: Computer Architecture CST 250

Two operand ALU Operation

• Add:– The ALU produces the binary sum of two

operands:• One of the operands comes from the accumulator.• The other from the memory.• The result is placed in the accumulator.• If the addition produces a carry, the C flag is set to

1 otherwise C=0.

[ A ] + [ M ] [ A ]

Page 8: Computer Architecture CST 250

• Logical AND:– The corresponding bits of two operands are ANDed, the

result is placed in the accumulator.

[ A ] . [ M ] [ A]

1 0 1 1 0 1 0 1

0 1 1 0 0 0 0 1

0 0 1 0 0 0 0 1

Original contents of A

Operand from Memory M

Result of [ A] . [ M] in A

Page 9: Computer Architecture CST 250

• Logical OR:– The corresponding bits of two operands are ORed, the

result is placed in the accumulator.

[ A ] OR [ M ] [ A]

1 0 1 1 0 1 0 1

0 1 1 0 0 0 0 1

1 1 1 1 0 1 0 1

Original contents of A

Operand from Memory M

Result of [ A] OR [ M] in A

Page 10: Computer Architecture CST 250

• Subtract:– The ALU subtracts one operand (in Memory) from another

one in the accumulator or a register) – Most Micro Processors use the 2’s complement .– Status register will be affected.

[ A ] – [ M ] [ A ]

• Compare:– It is the same as subtraction operation, but the result will

not be stored in the accumulator A.– This operation will affect the status register of the flags

based on the result;

Page 11: Computer Architecture CST 250

Assembly language

( case of study Intel processor)

Page 12: Computer Architecture CST 250

General format of assembly instruction

[ Label] Operation [ Operand ] [; Comment]

Example:

L1: cmp bx,cx ; compare bx with cx

Add ax,25

Inc bx

Page 13: Computer Architecture CST 250

Operand types

• Registers: AX,BX,CX,DX,AL,AH,BL,BH,…..etc

• Segment Registers: DS,ES,SS, and only as second operand: CS.

• Memory: variable, [ Memory address]

• Immediate: 5, 4Fh, 10000101b

Page 14: Computer Architecture CST 250

Case of study (CPU Registers )           

  

ax                                   ah al  

bx                                   bh bl  

cx                                   ch cl  

dx                                   dh dl  

015 15 87 0

16 bit form 8 bit form Data Registers

SP    

BP  

SI  

DI  

CS    

DS  

SS  

ES  

Flags           Of   If   Sf Zf           Cf

IP  

Pointer & Index Register

Segment Register

Page 15: Computer Architecture CST 250

Instruction types1. Data transfer instructions:

They move data from one register/memory location to another.

2. Arithmetic instructions:

They perform arithmetical operations.

3. Logical instructions:

They perform logical operations.

4. Control transfer instructions:

They modify the program execution sequence.

5. Input/output (I/O) instructions:

They transfer information between external peripherals and system components ( CPU/Memory)

6. Processor control instructions:

They control processor operation.

Page 16: Computer Architecture CST 250

Introduction to programming with Assembly language

Page 17: Computer Architecture CST 250

Example of : Data transfer Instruction

• Mov

Mov destination, source

ax   0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0

cx   0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0

dx   1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1dx  

dx   1 1 1 1 1 1 1 1 0 0 0 0 0 0 1 1

dx   0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1

mov ax, 2 ;

mov dx,ffffh;

mov dl,3 ;

mov dx,3;

mov cx, ax ;

Page 18: Computer Architecture CST 250

ALU Operation [ A ]

Flags

Example of : Arithmetic instruction

Add register1, register2

Page 19: Computer Architecture CST 250

Example of CPU control Instruction:

• The “No operation instruction” (NOP): It does nothing. It is used for filling the space to insert anyadditional instruction in future.

• The “Halt Instruction” (HLT): It is called wait , or break instruction to stop the processor.

Page 20: Computer Architecture CST 250

Addressing Modes

A. Basic Addressing Modes

1. Implied Addressing.

2. Register “Accumulator” Addressing.

3. Immediate Addressing.

4. Direct Addressing

B. Advanced Addressing Modes

1. Index Addressing.

2. Register relative Addressing.

3. Indirect Addressing.

Page 21: Computer Architecture CST 250

ADDRESSING MODES:

Register Addressing

•The source and destination are registers•Source / Destination must be of equal sizeFor Example MOV AX,BX MOV AL,BL

MOV DX, SI

Implied Addressing

• No address is necessary, the location is implied by the instruction NOP No operation HLT Halt

Page 22: Computer Architecture CST 250

Direct Addressing

• data required is stored in memory• MOV AX,[1234h] Move data from a memory location to register AX, 1234h is a displacement within the data segment DS registerFor Example MOV AX,[x] Move the contents of DS:x from

memory to register AX MOV [x],AX Move the contents of register AX

to memory location DS:x

Immediate Addressing

• Load a value to a register, the required data is an integral part of the instructionFor Example MOV AX,1234h MOV AX,5

MOV AX, x

Page 23: Computer Architecture CST 250

Index Addressing• Use the Base Register (BX or BP) plus the index registers (SI or DI)For ExampleMOV AX,[BX+DI] move to AX the value pointed by DS:BX+DIMOV [BX+SI],AX move AX to memory location DS:BX+SI

Register Relative

• The data location is described relative to the current locationFor ExampleMOV AX,[BX+1234h] move to AX the value pointed by DS:BX+1234hIndirect Addressing

• The contents of a register is used as an address (Displacement is put in a register)For Example MOV AX,[BX] move to AX the value pointed by DS:BX MOV [BX],AX move the contents of AX to the memory

location of DS:BX

Page 24: Computer Architecture CST 250

Implied addressing

No address is required.

Register( Accumulator ) addressing Involves only internal registers or accumulator and no external RAM .

 

8086/8088 

 

HLT / NOP 

Others 

 

TAX ; [ A ] [ X ]

 

8086/8088 

 

MOV bx , cx  

Others 

 

Page 25: Computer Architecture CST 250

Immediate addressing [ operand is presented in the instruction it self]

The number or data to be moved or operated; is in the memory location immediately following the Inst. op code .

Direct addressing The op code followed by a 1 or 2 byte memory address where the data to be found. [ operand is in memory ]

 

8086/8088 

 

MOV AL , 37 ; 37 [ AL ]

 

Others 

 

LDAA #$dd ; $dd [ A ]

 

8086/8088 

 

MOV BL , [ 0100 ] ;[ M 0100 ] [ BL ]

 

Others 

 

LDA , (aaaa) ; [aaaa] [ A ]

Page 26: Computer Architecture CST 250

Revision

NOP

MOV BX, CX

MOV AL,65

MOV BL, [ 0200 ]

MOV AX, [BX]

Implied Addressing

Register Addressing

Immediate Addressing

Direct Addressing

Indirect Addressing

Page 27: Computer Architecture CST 250

Register Relative addressing Uses two numbers to be added together, to determine the address of the source.

 

8086/8088 

 

MOV AL,[ BX + 0100 ] ; [BX] = 03 , ; [ M=0103 ] = E3 [AL]

0100 13

0101 ?

0102 ?

0103 E3

0104 FA

0105 ?

   

   

Memory M

Page 28: Computer Architecture CST 250

Assembly language( case of study Intel processor)

Topics:

• Arithmetic instructions sample.• Bit manipulation/masking (Logical

instructions)

Page 29: Computer Architecture CST 250

Arithmetic instructions sample

add : Adds two operands.

inc: To increment a register by one.

dec: To decrement a register by one.

sub: Subtracts two operands.

Mul: Multiplication of two operands.

Div: Division of two operands.

Page 30: Computer Architecture CST 250

Mov ax,5 ;

add ax,3 ;

Inc ax ;

Dec ax ;

Sub ax,6 ;

Mov cx,8 ;

Add ax,cx ;

Sub ax,cx ;

Arithmetic instructions

samples: add , inc , dec ,& sub

Page 31: Computer Architecture CST 250

Example 1. Multiply 4 by 3 :

Mov al,4

Mov bl,3

Mul bl ; ax = al*bl = 12It stores the result in ax register, overwriting the previous contents of ax.Mul Inst. Takes a single operand and the al (ax) register is implicitly used for the second operand.

Example 2. Divide 4 by 2 :

Mov ax,4

Mov cl,2

Div cl

The div Instruction takes a single operand as does the mul inst., with the second operand always being stored in ax register, and the al (ax) register is implicitly used for the second operand.

Page 32: Computer Architecture CST 250

In class Exercises What errors are presented in the following instructions?

Write a program to evaluate the arithmetic expression

5 +(6 - 2) ; leaving the the result in ax using:

one register.

Two register. & Three register

Mov ax 3d

Mov 23,ax

Mov ch,cx

Mov ax,1h

Add 2,cx

Add 3,6

Inc ax,2

Mov ax 3d; comma missing after ax

Mov 23,ax ; Destination operand must be register or variable

Mov ch ,cx ; cannot move 16-bit register to 8 bit register

Mov ax,1h ;ok

Add 2,cx ; Destination operand must be register or variable

Add 3,6 ; Destination operand must be register or variable

Inc ax,2 ; only one operand required by inc

Page 33: Computer Architecture CST 250

The solution

Write a program to evaluate the arithmetic expression

5 +(6 - 2) ; leaving the the result in ax using:

one register.

Mov ax,6

sub ax,2

Add ax,5

Two register.

Mov ax,6

Mov bx,2

Sub ax,bx

Add ax,5

Three register

Mov ax,6

Mov bx,2

Mov cx,5

Sub ax,bx

Add ax,cx

Page 34: Computer Architecture CST 250

BIT MASKING (Logical Instructions)

AX x x x x x x x x x x x x x x x x

MASK 1 1 1 1 1 1 1 1 1 1 0 1 1 1 0 1

Clear ANDingSet ORingChange XORingClear without AND XORing

Q: Write the Assembly instructions to clear the bit # 1 and bit # 5 of AX register.Solution: The value of each bit of AX register is unknown, so we can denote the unknown value in AX register by x.

AX x x x x x x x x x x 0 x x x 0 xBy ANDing the above two, the AX will be

So, the Assembly instruction will be:

AND AX, FFDDh

Page 35: Computer Architecture CST 250

AX x x x x x x x x x x x x x x x x

MASK 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0

Q: Write the Assembly instructions to clear AX register without ANDSolution: The answer could be any one from the following two instructions.

MOV AX,0XOR AX,AX

NOTE: If the value of a particular bit is not known, then we cannot clear that bit without AND, e.g. Clear bit#3,5 of BL without AND. (IMPOSSIBLE)

AX x x x x x x x x x x x x 1 1 x x

By XORing the above two, the AX will be

So, the Assembly instruction will be:

XOR AX, 000Ch

Q: Write the Assembly instructions to change the bit # 2,3 of AX register.Solution: The value of each bit of AX register is unknown, so we can denote the unknown value in AX register by x.

Page 36: Computer Architecture CST 250

BX x x x x x x x x x x x x x x x x

MASK 0 0 0 0 0 0 0 1 0 1 0 1 1 1 0 0

BX x x x x x x x 1 x 1 x 1 1 1 x x

By ORing the above two, the BX will be

So, the Assembly instruction will be:

OR BX, 015Ch

Q: Write the Assembly instructions to set the bits # 2,3,4,6 & 8 of BX register.Solution: The value of each bit of BX register is unknown, so we can denote the unknown value in BX register by x.