Computer Architecture (CS-213)

Main Objectives

• A Simple Computer Architecture • Instruction Set Architecture • Storage Resources • Instruction formats • Instruction Specifications • Single Cycle Hardwired Control & Isuues • Multiple cycle Hardwired Control

A Simple Computer Architecture • A portion of input to the processor consists of sequence of

instructions • Instructions are usually stored in memory which is either RAM

or ROM • It is necessary to provide the address of the instruction placed

in memory. • The address comes from a register called Program Counter

(PC). • PC has the logic of a counter and capability of parallel load. • Executing an instruction means activating the necessary

sequence of micro-operations in the datapath required to perform the operation specified by the instruction.

Instruction Set Architecture

• Program is a set of instructions that specifies the operation to be performed.

• An instruction is a collection of bits that instructs the computer to perform a specific operation.

• Collection of instructions is called an instruction set. • The thorough description of instruction set is called an

instruction set architecture (ISA). • ISA is the way how a programmer sees the computer.

Instruction Set Architecture

• There are three main components to an Instruction set architecture Storage resources Instruction formats Instruction specifications

Storage resources

• The architecture includes two memories one for storage of information and the other for storage of data.

• These memories can be different or same memories. • The diagram below shows the resources of storage seen by

the programmer

Instruction formats

• Instruction is made up of various fields. • Operation code (usually called opcode) is a field which

specifies which operation is to be performed on the data. • The number of bits representing the opcode are dependent

upon how many insructions we want to make. • ‘m’ opcode bit can allow maximum of 2 instructions to be

made. • Operands field specify the data or its location on which the

operation is performed.

Instruction formats

• For the simple computer following three formats are illustrated.

Register

Immediate

Jump & Branch

Instruction Specifications

• Instruction specifications describe each of different instruction that can be used.

• Mnemonics are used to represent opcode field symbolically. • Other fields such as operands are also represented

symbolically. • Assembler is used to convert this symbolic language to binary

code (Machine Level) • A computer operation is defined by instruction in program

memory while a micro-operation is the operation performed in datapath using control word. A computer operation can have more than one micro-operations.

Instruction Specifications

Instruction Specifications

Single Cycle Hardwired Control

Instruction Decoder

Instruction Decoder

Sample Instructions

Example

• Write Assembly Level code for 83-(2+3) • Consider • R3 contains 248. location 248 in data memory contains 2,

location 249 contains 83, and the result is to be placed in location 250,

Single Cycle Computer Issues

• It cannot perform complex functions e.g. Multiplication • It requires two distinct memories • Limited clock frequency based on longer worst case delay path The path I figure is 17ns which limits clock frequency to 58.8 MHz

Multiple Cycle Hardwired Control

• One Instruction can take more than one clock cycle. • One memory for both data and instructions. • Since one instruction remains for more than one clock cycles,

Instruction Register (IR) is used to store instruction. • Register file has invisible registers to store the temporary data

that is generated while executing longer instructions in which one instruction can have more than one microoperations.

• Register address logic is used to create the 4-bit address of register from the 3-bit address provided with the instruction.

Multiple Cycle Hardwired Control

Modified Control Word

Sequential Control Design

ASM Chart

State Table for Two Cycle Operation

Load Register Indirect (LDI) Instruction

ASM Chart

Instruction

ASM Chart for Shift Multiple

Instruction

State Table of Instructions (more than two Instruction Cycle)

State Table of Instructions (more than two Instruction Cycle)