complex interlaced infrastructure - onboard testing: how much real scale testing should be needed?...

Complex interlaced infrastructure - onboard testing: how much real scale

testing should be needed?11th UIC ERTMS Conference, Istanbula 1-3 April 2014

Current situation: Positive messages

ERTMS will be the worldwide standard for

rail signaling for the next decades

1

UIC ERTMS Atlas 2012

ERTMS will be deployed in European core and

comprehensive corridors

2

ERTMS Specifications are stable enough and

properly managed by ERA

3

Laboratory Validation&

Operational scenarios

• Baseline 2 (2.3.0.d) is an stable version in successful commercial operation in many European and non-European countries (Spain, Italy, Switzerland, The Netherlands, China….)

• Baseline 3 has been already published into the TSI (3.3.0) and it includes some added functionality (braking curves, crossing level, limited supervision…) as well as bugs debugging.

• Baseline 2 (2.3.0.d) is an stable version in successful commercial operation in many European and non-European countries (Spain, Italy, Switzerland, The Netherlands, China….)

• Baseline 3 has been already published into the TSI(3.3.0) and it includes some added functionality (braking curves, crossing level, limited supervision…) as well as bugs debugging.

• Increase market scale

ERTMS costs are too high

1

Too long process to place in service

2

Main pending challenges: time and money

√

√

• Increase competition (multiple suppliers)

• Very high deployment costs (tests on track)

Increase system complexity

Operational and train-track integration tests on lab:• Reduce time• Reduce cost• Increase system reliability • Advance “last minute

problems” (always appeared in the signaling world).

ERTMS works!!!ERTMS reliability and punctuality in Madrid-Barcelona HSLKms between incidences

* L2 started in October 2011** Line was extended in L1 up to Barcelona*** Line was extended in L1 up to French border

Series1

0

5000

10000

15000

20000

25000

30000

35000Level 1

Level 2

Cumula-tive L1

Level 1 2006 2007 2008 2009 2010** 2011 2012***2013 2014 Level 2 2011* 2012 2013 2014

Punctuality (delay <5’)

Series1

95.00%

96.00%

97.00%

98.00%

99.00%

100.00%

Level 1Level 2

Level 1 2006 2007 2008 2009 2010 2011 2012 2013

2014

Level 2 2011 2012 2013 2014

5

SYSTEM AUTHORITY AND INTEROPERABILITY (IOP) TESTS Within the new European frame where the operators and infrastructure are separated, it

is essential the existence of a System Authority to manage the solution of interoperability problems.

MFOM has played this role in the Spanish ERTMS projects.

The group led by MFOM (ADIF, RENFE, CEDEX and INECO) has created the validation procedure that allows the opening of railway lines with full warranties of interoperability.

Independent Assesment

OPERATORINFRASTRUCTURE MANAGER

NATIONAL AUTHORITY:

Ministry of Fomento (Public Works)

3. How to solve interoperability problems before placing in service a new line?

IOP TESTSOperational and train –track integration TESTS

• Speed supervision and braking curves• Level transitions• Mode changes • TSR Managing• Managing of MA timers • Odometry• Track conditions• Train Interface unit• ATO and preset speed• DMI• National Functions• Maximum Speed for exploitation with free route ahead• Degraded situations (loss of comunications, balise group lost, etc)• EoA override• RBC Handover

Integration Tests. Main Tested Functionality



GSM-R

ETCSETCSonboardonboard

Fin de cantón

ETCSembarcado

Eurobalizas(fijas)

(Op

ciona

l)

Enclavamiento

Centro de Radio Bloqueo

ETCSOnboard

Unit

Eurobalises(Fix)

End of section

Radio BlockCentre (RBC)

Interlocking

To achieve full interoperability two options are possible:

1. Performing INT tests once the whole system is installed on the track.

2. Advance interoperability issues by performing INT tests in a lab and after solving the problems appeared, running INT tests on track.

This is the selected way in Spanish Projects

• CEDEX Rail Interoperability Lab is the first laboratory in the world accredited for certifying ERTMS components and for testing ERTMS lines.

• The laboratory was created in 1999. It is has been the pioneer on testing ETCS components and subsystems and it has tested equipment's from almost all ERTMS worldwide suppliers.

• The laboratory has actively participated in the process of placing in service ERTMS in the Spanish High Speed and Conventional Lines (Madrid commuter lines).

• The laboratory has designed, together with Adif, Renfe and the Ministry of Fomento, the set of INT tests (around 200 tests) which really guarantee full interoperability.


Background• Components specification,

including functional tests specification – Subset-076

• Tests defined for the whole lifecycle (almost)

• Components specification• No functional tests for key

components (RBC)• ETCS Language too flexible: lack

of procedures to validate ETCS trackside implementations


On-board subsystem

Trackside subsystem

Possible solutions IN THE MID-LONG TERM:

• Develop functional test specifications for the (generic) RBC.• Develop procedures for verification of the trackside ETCS engineering from

the design phase (project specific).• Insist on the operational harmonization, keeping in mind the strong

relationship among operational rules, ETCS functionality and ETCS language syntax.

IN THE SHORT TERM:• Bring the final project specific integration/interoperability tests into the

laboratory to perform Operational and Train-Track integration tests with real ETCS components (ETCS OBU and/or RBC)


4. Testing the line in the laboratory.

The real track data and configuration is introduced into the real Radio Block Center (RBC)………

Track layout, switches, signals, track circuits...


And the real RBC is connected to the laboratory


The real train data are introduced into the real On Board Unit (EVC)…..

Braking capacity, brakes activation, train interface unit (odometry, pantograph, main switch)…..


And the real On Board Unit is connected to the laboratory

Real RBC Dimetronic Madrid – Levante Line

Real EVC ALSTOM

Simulators with real project data for:• Interlockings• Train dynamics,• Train odometry• Track circuits and switches• Routes.• Balise telegrams…….


RBC and OBU are integrated and tested in the lab connected to all the simulators reproducing: a) the real train dynamics and b) track circuits occupancy, interlocking selected routes and balise telegrams.

USE OF COMMON FORMATS AND

INTERFACES


ETCS N1+N2 ETCS N1

ETCS N1+N2 ETCS N1

Trans to L1

Cond. Trans (L2-L1-L0)

Trans to L1 + radio session

Trans to L0

Radio cancel

EID

EID1

Radio session


Route Map Controller (RMC)(passive)

Route Map Controller (RMC)(active)

Define signal aspectsDefine points position

CHAMARTIN (SS-112)

Peri

ph

Ada p

ERTMS/ETCS ON-BOARD EQUIPMENT

DMILTM BTM

EVC

TDS CMS SSS TIS

DIS

TMSLSC

REPORT

REFE

REN

CE T

EST

FACI

LITY

EQU

IPM

ENT

UN

DER

TES

T

JRS

SMS RMS LMS BTS

SCS RCS LCS

EL-A

BCS

EB-A

TDA-A CMD-A ODO-A TIU-A JRI-A

LER

LSE AET

TIUTDA RTMSTMIJRIODOCMD

TCP-IPRadio

IXL(CITEF)

RBCInvensys-Siemens

RBCThales

Track Occupation

Signal aspectsPoint pos.

Routes’ dialogTrack occupation

ATOCHA (SS-112)

SS-094Architecture

ALSTOM EVC

EVC Adaptor

Network Simulator

ERSAIsdn isdnTest Layout for independent

RBC / EVC integration tests

TCL

Map to SS-111 Architecture


ETCS N1+N2 ETCS N1

ETCS N1+N2 ETCS N1

Trans to L1



Trans to L0

Radio cancel

EID

EID1

Radio session


Route Map Controller (RMC) ATOCHA & CHAMARTIN SS-112 unified

Peri

ph

Ada p

ERTMS/ETCS ON-BOARD EQUIPMENT

DMILTM BTM

EVC

TDS CMS SSS TIS

DIS

TMSLSC

REPORT

REFE

REN

CE T

EST

FACI

LITY

EQU

IPM

ENT

UN

DER

TES

T

JRS

SMS RMS LMS BTS

SCS RCS LCS

EL-A

BCS

EB-A

TDA-A CMD-A ODO-A TIU-A JRI-A

LER

LSE AET

TIUTDA RTMSTMIJRIODOCMD

RBCThales

IXL(CITEF)

RBCInvensys-Siemens

Routes’ dialogTrack occupation

SS-094Architecture

ALSTOM EVC

EVC Adaptor

TCP-IPRadio

PABXRDSI

RDSI

RDSI

RDSI

NetworkSimulator

ERSA

Invensys / ThalesHO Com. channel

Test Layout for handover tests between RBCs

ISDN-IP


Track layout: Project data in unified format (SS-112). Madrid-Valencia line: Horcajada station

TRACK / LAB COMPARISON:LABORATORY VALIDATION

TRAFFIC SIMULATORERTMS L2 LABORATORY


Laboratory Validation

CEDEX ERTMS lab has been previously validated by comparison between the simulated and the real

results. This validation it is needed to guarantee a full confidence in the lab

results and to assure a correct signaling system behavior during the

commercial exploitation.

SB SRPT SR

FS TRFS

D_LRBG D_LRBGL_DOUBTOVERSB SR

PT SR

TR

Distance

Sp

ee

d

FS

MRSPBraking Curve

L_DOUBTUNDERSB SR

PT SR

FS TRFS


PT SR

TR

Distance

Sp

ee

d

FS

MRSPBraking Curve

L_DOUBTUNDERSB SR

PT SR

FS TRFS


PT SR

TR

Distance

Sp

ee

d

FS

MRSPBraking Curve

L_DOUBTUNDER

VRUPCA

637 - 640

SES PCA

713 - 716

E4

E2

E1

E3

S1/1 S2/1

S1/3 S2/3

S1/2 S2/2

S1/4 S2/4

E4

E2

E1

E3

640

638

637

639

716

714

713

715

E4

E2

E1

E3

S1/1 S2/1

S1/3 S2/3

S1/2 S2/2

S1/4 S2/4

FS SR FS

VLD VRUPCA

637 - 640

SES PCA

713 - 716

E4

E2

E1

E3

S1/1 S2/1

S1/3 S2/3

S1/2 S2/2

S1/4 S2/4

E4

E2

E1

E3

640

638

637

639

716

714

713

715

E4

E2

E1

E3

S1/1 S2/1

S1/3 S2/3

S1/2 S2/2

S1/4 S2/4

FS SR FS

VRUPCA

637 - 640

SES PCA

713 - 716

E4

E2

E1

E3

S1/1 S2/1

S1/3 S2/3

S1/2 S2/2

S1/4 S2/4

E4

E2

E1

E3

640

638

637

639

716

714

713

715

E4

E2

E1

E3

S1/1 S2/1

S1/3 S2/3

S1/2 S2/2

S1/4 S2/4

FS SR FS

VLD VRUPCA

637 - 640

SES PCA

713 - 716

E4

E2

E1

E3

S1/1 S2/1

S1/3 S2/3

S1/2 S2/2

S1/4 S2/4

E4

E2

E1

E3

640

638

637

639

716

714

713

715

E4

E2

E1

E3

S1/1 S2/1

S1/3 S2/3

S1/2 S2/2

S1/4 S2/4

FS SR FS

VRUPCA

637 - 640

SES PCA

713 - 716

E4

E2

E1

E3

S1/1 S2/1

S1/3 S2/3

S1/2 S2/2

S1/4 S2/4

E4

E2

E1

E3

640

638

637

639

716

714

713

715

E4

E2

E1

E3

S1/1 S2/1

S1/3 S2/3

S1/2 S2/2

S1/4 S2/4

FS SR FS

VLD VRUPCA

637 - 640

SES PCA

713 - 716

E4

E2

E1

E3

S1/1 S2/1

S1/3 S2/3

S1/2 S2/2

S1/4 S2/4

E4

E2

E1

E3

640

638

637

639

716

714

713

715

E4

E2

E1

E3

S1/1 S2/1

S1/3 S2/3

S1/2 S2/2

S1/4 S2/4

FS SR FS

VRUPCA

637 - 640

SES PCA

713 - 716

E4

E2

E1

E3

S1/1 S2/1

S1/3 S2/3

S1/2 S2/2

S1/4 S2/4

E4

E2

E1

E3

640

638

637

639

716

714

713

715

E4

E2

E1

E3

S1/1 S2/1

S1/3 S2/3

S1/2 S2/2

S1/4 S2/4

FS SR FS

VLD VRUPCA

637 - 640

SES PCA

713 - 716

E4

E2

E1

E3

S1/1 S2/1

S1/3 S2/3

S1/2 S2/2

S1/4 S2/4

E4

E2

E1

E3

640

638

637

639

716

714

713

715

E4

E2

E1

E3

S1/1 S2/1

S1/3 S2/3

S1/2 S2/2

S1/4 S2/4

FS SR FS

DEFINITION OF THE OPERATIONAL SCENARIO FOR LABORATORY VALIDATION

Trip between Valdemoro y Villarubia stationsTrackside: Dimetronic / Onboard: Siemens


Laboratory validation

Permitted Speed

0

50

100

150

200

250

300

40000 45000 50000 55000 60000 65000 70000 75000 80000 85000 90000

DTeórica (m)

Vper

miti

ca (k

m/h

)

Permitted Speed Vía

Permitted Speed Lab

COMPARISON OF THE CALCULATION OF PERMITTED SPEEDS (L1)



X(i)X(i)

D_L

RB

G(m

)

X(i)X(i)

D_L

RB

G(m

)

X(i)X(i)

D_L

RB

G(m

)

COMPARISON OF THE ESTIMATION OF TRAVELLED DISTANCES



COMPARISON OF BRAKING CURVES: TRACK; LABORATORY & LIF & ERA MODELS





Atocha

Nuevos Ministerios

Level 2 Laboratory validation operational scenario for the commuter lines of Madrid:

Train starting at the Balise Group 8102 (associated to signal S2/6M). Track free until signal S32 (Balise Group 8102) that will take free aspect when train

approaches. Once S32 shows green aspect the signaling system will allocate track free until Atocha Atocha entry signal E6 shows non proceed aspect

DEFINITION OF THE OPERATIONAL SCENARIO FOR LABORATORY VALIDATIONValidation trip in LEVEL 2

Trip between Nuevos Ministerios and Atocha commuter stationsTrackside: Thales / Onboard: Alstom

Atocha



Braking Curve

Spee

d

Distance

Permitted Speed Track

Permitted Speed Lab

BG Track

BG Lab

Track MA

Lab MA

P24 Lab

P24 Track

P136 Lab

P136 Track

Validation trip in LEVEL 2

EVC CertificationPlacing in serviceProject data

basesAssesment &

Maintenace

RIL

Energy LaboratoryCEDEX-CIEMAT

EurocabLaboratory

Level 2 tests2.3.0 “d” MigrationTrain-track

integration testsOperational tests Remote

connections

Eurobalise certification

Antenna/BTM Certification

Euroloop Certification

Eurobalise Assesment

Energy storagePower electronicsNew sources of

energyManagement of

energetic resources

Traffic SimulationLaboratory

5. CEDEX Rail Interoperability Lab .

Eurobalise and BTM

Laboratory

RIL

Energy LaboratoryCEDEX-CIEMAT

EurocabLaboratory

Traffic SimulationLaboratory

Eurobalise and BTM

Laboratory


• European Test campaigns

• Alstom• Ansaldo• Bombardier• Dimetronic• Siemens• VUZ (Chech

Republic)*• CAF*

Level 1:• Ansaldo• Thales• Dimetronic• AlstomLevel 2:• Thales• Dimetronic• General Electric*• Ansaldo* • CAF*InfrabelEuropean Cross tests

• European Test campaigns

• Alstom• Ansaldo• Bombardier• Siemens• Thales• Digitek• Beijing Microunion• Hitachi

• Kyosan (Japan)• Shingwooeng (Korea)• CARS (China Academy of

Railways Science)• Beijing Hollysysy (China)• Beijing Jioda Signal• Beijing Railway Signal• Lanxin (China)• Casco (China)• CAF*

EUROBALISE LABORATORY

European Test Specifications (SS 085) were debugged at CEDEX lab (2004)

EUROLOOP LABORATORY

CEDEX Euroloop lab is the first independent lab performing these tests

TEST LAY-OUT TO TEST THE LEVEL 2 ON THE

COMMUTER LINES OF MADRID

(MINISTRY OF FOMENTO)

ALSTOM EVC

DIMETRONIC / SIEMENS RBC

THALES RBC

TRAFFIC SIMULATION LABORATORY

ETCS N1+N2 ETCS N1

ETCS N1+N2 ETCS N1

Trans to L1



Trans to L0

Radio cancel

EID

EID1

Radio session

European Cross Tests are being run at CEDEX lab

EUROCAB LABORATORY

Eurocab lab for certifying EVCs against european specifications. CEDEX is the leader

of the European Group creating these specifications (SS076)


RBC-EVC connection

according to S-111

EVC B2 Siemens B2 MER MEC B2 CAF

Signalling B3 MER MEC

Line Track data in

SS112 and OTCs linked to the

line

RBC

Lab DLR Multitel-Italcertifer

Cedex Multitel

L1 Infrabel line

(L36-36N)

N/A

N/A (Track data

directly loaded in the EVC lab)

01/09/13 31/10/13

01/01/14 28/02/14

01/04/14 30/05/14 2014 (TBC)

L2 ADIF line (Madrid-Valencia)

Siemens (formerly Invensys)

Cedex 01/01/14 28/02/14 N/A

01/06/14 31/07/14 2014 (TBC)

L2 ProRail line (Betuwe

line)

Alstom Alstom

01/11/13 31/12/13

01/03/14 30/04/14 N/A 2014 (TBC)

L2 RFI line (Milano-Bologna)

Ansaldo

RFI N/A 01/05/14 30/06/14

01/08/14 30/09/14

2014 (TBC)

EUG CROSS TEST BETWEEN COMMERCIAL PROJECTSUsing remote connection between EBC and EVC for level 2

CONCLUSIONS

6. Conclusions.

1. At the time being, ERTMS reliability and punctuality in Spain is very high, it is really comparable with the mature national systems previously installed in HSL(LZB,TVM).

2. By following the proposed test procedure, the whole ERTMS line functionality is tested in advance.

3. All interoperability problems appeared between the track subsystem supplier and the On board subsystem supplier are previously solved.

4. In all Spanish ERTMS lines, once the integration tests have been successfully completed, not any important interoperability issue has appeared during the commercial exploitation.

4. CEDEX lab has already performed these tests in all Spanish ERTMS lines. It is the European first Reference lab (and therefore the first lab in the world) in this area and it has tested ERTMS equipments from almost all the world suppliers.

5. Before placing in service any new line, integration tests will be also run on track, but these tests will be strongly supported by the integration tests at lab. This is the way of avoiding any “last minute” problems.

Testing real projects signalling system at the Railway Interoperability Laboratory (LIF) of CEDEX

THANKS A LOT FOR YOUR KIND ATTENTIONCEDEX Rail Interoperability Laboratory

Madrid, April [email protected]@cedex.es

CEDEX ( Studies and Research Center of the Ministry of Public Works and Transport-Fomento)

mailto:[email protected]

mailto:[email protected]

complex interlaced infrastructure - onboard testing: how much real scale testing should be needed?...

Documents

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uic ertms atlas

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th uic ertms conference

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stable version