compal la-8241p qcl00 qcl20 rev 1.0
DESCRIPTION
compaq la 8241pTRANSCRIPT
1bios.ru
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Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P 1.0
1 56Wednesday, February 01, 2012
2012/01/17 2013/01/16
Compal Electronics, Inc.
Cover Page
Schematic Document
QCL00_QCL20
PCB NO :
BOM P/N :
MODEL NAME :
LA-8241P
4619GP31L21
Inspron A5 & Vostro 3560 (Intel Chief River)
Rev: 1.0
Discrete AMD Thames-XT
Ivy Bridge(rPGA) + Panther Point(mainstream)
2012-02-01
@ : Nopop ComponentCONN@ : Connector ComponentKB930@ : ENE KB930 Implemented
KB9012@ : ENE KB9012 Implemented
EXP@ : Express Card Implemented
ConfigBOM P/NMB Type
VOS@ : Only for VostroINS@ : Only for InspironUMA@ : Only for UMA
SE@ : Seymour M2
4619GP31L01
46@ : for 46 level CH@ : Chelsea M2
FFS@ : Only for Free Fall Sensor
X76@ : VRAM Group
4619GQ31L01
4619GQ31L21Inspiron DISInspiron UMAVostro DIS
Dell / Compal ConfidentialVostro UMA
GCLK@ : Green CLK implementedAMP@ : External Amplifier implementedKBBL@ : Keyboard Back Light implemented
DIS@ : Only for Discrete
TH@ : Thames-XT
1bios.ru
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Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P 1.0
2 56Wednesday, February 01, 2012
2012/01/17 2013/01/16
Compal Electronics, Inc.
Block Diagram
Project Code : QCL00 / QCL20
File Name : LA-8241P
Compal Confidential
Daughter board
35W QCAMD
DDR3
DDR3VRAM * 4
64M*16
RTL8105E (10/100)
Port 2
Express Card
34mm Slot
P.28
Card ReaderRTS5139
Daughter board
3 in 1 Socket
Finger Print
Port 10
Port 8
USB 3.0 Conn. 2 -( USB Charger )
Daughter board
Digital Mic.
4MB
DashboardButton x3
page 32
LVDS
CRT
CRT Conn.
SPI
PS/2
35W DC rPGA 988 8GB Max
Thames-XT /
P.34~39
PEG 3.0 x16
VRAM * 4
64M*16
64bit
64bit
page 11,12
BANK 0, 1, 2, 3, 4 ,5 ,6 ,7 DDRIII-DIMM X2
1.5V DDR3 1333 MHz
Half
P.32( Full )Mini Card-2 (mSATA)
P.32
USB 3.0 Conn. 1
( Half )
Digital Camera
Mini Card-1 (WLAN)
Port 12
Port 4
Port 3,4
P.22
P.32
rPGA 988
LPC Bus
page 24
page 25
ENE KBC
KB9012 /
KB930
Int.KBDpage 25
Touch Padpage 26
SPI ROM
Daughter board
USB2.0Port 0,1
FFS
P.25Fan Control
P.13
P.25
RTC CKT.
Power On/Off CKT.
DC/DC Interface CKT.P.27
Port 0
24-26 W
LVDS Conn.
HDMI Conn.
Port 2SATA ODD Conn.
P.29
Audio CodecCX20672
Mic. Jack
Headphone Jack
Amplifier
HD Audio
Port 1,2
USB 3.0 Conn. 3
P.33
USB 3.0
Port 2,3
PCI-E x1
Mini Card-1
WLAN / BT4.0
100MHz 100MHz
5GB/s
DMI x4FDI x8
P.32 P.32
Port 3 Port 1
SPI
Ethernet
RTL8111F (10/100/1000)
RJ45
2.7GT/s
ProcessorIvy Bridge
Intel
PCH HM77
P.5~10
Panther PointIntel
P.29
SPI ROMP.13
P.41
P.40
HDMI
P.22
P.23
P13~20
P.22
P.30
Dual ChannelMemory Bus (DDR3)
SATA HDD Conn.P.29
CPU XDP
Conn. P.6
33MHz
SATA3.0
BGA 989 Balls
only for Vostro 3560
USB2.0
Port 11 USB 3.0 Conn. 4
SPI
P.13
SPI ROM
2MB
128K
reserved for KB930
Port 1
Port 5 Daughter board
Daughter board
P.32
P.32
Daughter board
Chelsea Pro
Int. Speaker R/LTPA3113D2 P.31
1bios.ru
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Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
1.0
3 56Wednesday, February 01, 2012
2012/01/17 2013/01/16
Compal Electronics, Inc.
Block Diagram
LA-8241P M/B
LED/B
Project Code : QCL00 / QCL20
File Name : LA-8241P
Compal Confidential
LS-8244P (Ins)
80 pin
10 pin
JBTB1
FFC
Lid (Vostro)
Led1
Touch Pad
LCD Panel
Wire
Camera4 pin
4 pin
JCR2
4 pin
JPWR
10 pin
JCR1JLED
8 pin
JFC
26 pin
JEXP
10 pin-Hot Bar
LS-8242P (Ins) IO/B
SW1
Led2 Led3 Led4
Led1
4 pin-Hot Bar
8 pin-Hot Bar
SW1 SW2 SW3
Led1 Led2 Led3
8 pinFFC
4 pinFFC
LS-8245P (Ins)
LED/B
LS-8241P (Ins) LED/B
JTP
4 pin
JLVDS
40 pin
TP Led (Vos)
Lid (Inspiron)
Bottom Side
Top Side
Card Reader/B
Express Card
LS-8243P (Ins)
Finger Print/B
LS-8252P (Vos)
LS-8251P (Vos)
LS-8253P (Vos)
LS-8254P (Vos)
6 pin
JFP
LS-8255P (Vos)
L R
40 pin
(Inspiron)
(Vostro)
Led2
TP Led (Ins)
4 pinFFC
4 pinFFC
(Vostro)1
26
LS-8256P (Vos)
4 pin-Hot Bar
4 pin-Hot Bar
1bios.ru
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Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P 1.0
4 56Wednesday, February 01, 2012
2012/01/17 2013/01/16
Compal Electronics, Inc.
Notes List
Symbol Note :
: means Digital Ground
: means Analog Ground
MINI2
EC_SMB_CK2
SOURCE
KB9012
MINI1 BATT SODIMM
SMBUS Control Table
PCH_SML1CLKPCH_SML1DATA
PCH
EC_SMB_DA2
EC_SMB_CK1EC_SMB_DA1
KB9012
MEM_SMBCLK
V
MEM_SMBDATA V
USB conn.4
MINI CARD-1 (WLAN)
NC
8
9
NC
10
USB conn.3
11
2
3
1
4
USB PORT#
0
DESTINATION
6
5
7
12
13
PCH
USB conn.2 - Power Share
ODD
HDD
SATA5
SATA4
SATA3
SATA2
SATA1
DESTINATION
SATA0
SATA
Express Card
Lane 7
Lane 8 None
None
Lane 5
Lane 6
MINI CARD-1 (WLAN)
PCI EXPRESS
Lane 1
DESTINATION
Lane 2
Lane 3
Lane 4
10/100/1G LAN
None
None
NC
Express Card
Camera
NC
None
None
CLKOUT_PCIE7 None
None
CLKOUT_PCIE6
CLKOUT_PCIE4
CLKOUT_PCIE5
CLKOUT_PCIE1
CLKOUT_PCIE2
CLKOUT_PCIE3
CLKOUT_PCIE0
DESTINATIONDIFFERENTIAL
CLK
CLKOUT_PEG_B
FLEX CLOCKS DESTINATION
CLKOUTFLEX1
CLKOUTFLEX2
CLKOUTFLEX3
CLKOUTFLEX0
None
MINI CARD-1 WLAN
Express Card
10/100/1G LAN
None
None
Card Reader
PCH_LOOPBACK
EC LPC
PCI0
CLKOUT
None
PCI1
PCI2
PCI3
DESTINATION
None
None
PCI4
None
NC
Finger Print
USB conn.1
SSD
None
NoneNone
None
0.3
0.1
1.0
0.2
BOARD ID Table
Board ID
0
1
2
3
4
5
6
7
PCB Revision
0.1
Vcc 3.3V +/- 5%
100K +/- 5%RaBoard ID Rb V min
0
1
2
3
0 0 V
0.168 V
0.375 V 0.503 V
0.819 V
0.362 V
0.621 V
AD_BID V typAD_BID VAD_BID max
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
3.300 V
0 V 0.155 V
4
5
6
7 NC
0.634 V
0.958 V
1.650 V
1.359 V
1.372 V
1.851 V 2.200 V
3.300 V
1.838 V
1.185 V
0.945 V
Board ID Table for AD channel
0x00-0x0C
EC AD3
0x0D-0x1C
0x1D-0x30
0x31-0x49
0x4A-0x69
0x6A-0x8E
0x8F-0xBB
0xBC-0xFF
8.2K +/- 5%
2.433 V
2.420 V
0.250 V
None
None
Express Card
Thermal Sensor FFS VGA
V
V
XDP
PCH V
Charger
PCH_SML0DATAPCH_SML0CLK PCH
V V
Link
VGA Thermal Sensor
V
0.2
0.3
1.0QCL00 QCL20
V
V
0.2
0.3
1.0
QCL01
1bios.ru
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B B
A A
FDI_CTX_PRX_N1
FDI_CTX_PRX_N4
FDI_CTX_PRX_N6
FDI_CTX_PRX_P1
FDI_CTX_PRX_P6
FDI_FSYNC0
FDI_CTX_PRX_N0
FDI_CTX_PRX_N2FDI_CTX_PRX_N3
FDI_CTX_PRX_N5
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P2FDI_CTX_PRX_P3FDI_CTX_PRX_P4FDI_CTX_PRX_P5
FDI_CTX_PRX_P7
FDI_LSYNC0FDI_LSYNC1
FDI_FSYNC1
FDI_INT
PEG_COMP
+EDP_COM
PEG_GTX_C_HRX_N5PEG_GTX_C_HRX_N6PEG_GTX_C_HRX_N7
PEG_GTX_C_HRX_P0PEG_GTX_C_HRX_P1PEG_GTX_C_HRX_P2PEG_GTX_C_HRX_P3PEG_GTX_C_HRX_P4PEG_GTX_C_HRX_P5PEG_GTX_C_HRX_P6PEG_GTX_C_HRX_P7
PEG_HTX_GRX_N0
PEG_HTX_GRX_N2
PEG_HTX_GRX_N4PEG_HTX_GRX_N3
PEG_HTX_GRX_N1
PEG_HTX_GRX_N5PEG_HTX_GRX_N6PEG_HTX_GRX_N7
PEG_HTX_GRX_P0
PEG_HTX_GRX_P2
PEG_HTX_GRX_P4
PEG_HTX_GRX_P1
PEG_HTX_GRX_P3
PEG_HTX_GRX_P6PEG_HTX_GRX_P5
PEG_HTX_GRX_P7
PEG_GTX_C_HRX_N0
PEG_GTX_C_HRX_N2
PEG_GTX_C_HRX_N4PEG_GTX_C_HRX_N3
PEG_GTX_C_HRX_N1
DMI_CTX_PRX_P0<15>
DMI_CRX_PTX_P0<15>
DMI_CTX_PRX_N1<15>
DMI_CRX_PTX_N1<15>
DMI_CTX_PRX_P3<15>
DMI_CRX_PTX_P3<15>
DMI_CTX_PRX_P2<15>
DMI_CTX_PRX_N0<15>
DMI_CRX_PTX_N3<15>
DMI_CRX_PTX_P2<15>
DMI_CTX_PRX_N3<15>
DMI_CTX_PRX_P1<15>
DMI_CRX_PTX_N0<15>
DMI_CRX_PTX_N2<15>
DMI_CRX_PTX_P1<15>
DMI_CTX_PRX_N2<15>
FDI_CTX_PRX_N0<15>FDI_CTX_PRX_N1<15>FDI_CTX_PRX_N2<15>FDI_CTX_PRX_N3<15>FDI_CTX_PRX_N4<15>FDI_CTX_PRX_N5<15>FDI_CTX_PRX_N6<15>FDI_CTX_PRX_N7<15>
FDI_CTX_PRX_P0<15>FDI_CTX_PRX_P1<15>FDI_CTX_PRX_P2<15>FDI_CTX_PRX_P3<15>FDI_CTX_PRX_P4<15>FDI_CTX_PRX_P5<15>FDI_CTX_PRX_P6<15>FDI_CTX_PRX_P7<15>
FDI_FSYNC0<15>FDI_FSYNC1<15>
FDI_INT<15>
FDI_LSYNC0<15>FDI_LSYNC1<15>
PEG_HTX_C_GRX_P0 <34>PEG_HTX_C_GRX_P1 <34>PEG_HTX_C_GRX_P2 <34>PEG_HTX_C_GRX_P3 <34>PEG_HTX_C_GRX_P4 <34>PEG_HTX_C_GRX_P5 <34>
PEG_HTX_C_GRX_P7 <34>PEG_HTX_C_GRX_P6 <34>
PEG_HTX_C_GRX_N0 <34>PEG_HTX_C_GRX_N1 <34>
PEG_HTX_C_GRX_N3 <34>PEG_HTX_C_GRX_N2 <34>
PEG_HTX_C_GRX_N6 <34>PEG_HTX_C_GRX_N7 <34>
PEG_HTX_C_GRX_N5 <34>PEG_HTX_C_GRX_N4 <34>
PEG_GTX_C_HRX_N0 <34>PEG_GTX_C_HRX_N1 <34>PEG_GTX_C_HRX_N2 <34>PEG_GTX_C_HRX_N3 <34>PEG_GTX_C_HRX_N4 <34>PEG_GTX_C_HRX_N5 <34>PEG_GTX_C_HRX_N6 <34>PEG_GTX_C_HRX_N7 <34>
PEG_GTX_C_HRX_P2 <34>PEG_GTX_C_HRX_P1 <34>PEG_GTX_C_HRX_P0 <34>
PEG_GTX_C_HRX_P5 <34>PEG_GTX_C_HRX_P4 <34>PEG_GTX_C_HRX_P3 <34>
PEG_GTX_C_HRX_P7 <34>PEG_GTX_C_HRX_P6 <34>
+VCCP
+VCCP
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P 1.0
5 56Wednesday, February 01, 2012
2012/01/17 2013/01/16
Compal Electronics, Inc.
PROCESSOR(1/6) DMI,FDI,PEG
PEG_ICOMPI and RCOMPO signals should be shorted and routed
with - max length = 500 mils - typical impedance = 43 mohms
PEG_ICOMPO signals should be routed with - max length = 500 mils
- typical impedance = 14.5 mohms
CC10 220nF_0402_16V7KDIS@1 2
PCI EXPRESS* - GRAPHICS
DMI
Intel(R) FDI
eDP
JCPU1A
Sandy Bridge_rPGA_Rev1p0CONN@
DMI_RX#[0]B27
DMI_RX#[1]B25
DMI_RX#[2]A25
DMI_RX#[3]B24
DMI_RX[0]B28
DMI_RX[1]B26
DMI_RX[2]A24
DMI_RX[3]B23
DMI_TX#[0]G21
DMI_TX#[1]E22
DMI_TX#[2]F21
DMI_TX#[3]D21
DMI_TX[0]G22
DMI_TX[1]D22
DMI_TX[3]C21
DMI_TX[2]F20
FDI0_TX#[0]A21
FDI0_TX#[1]H19
FDI0_TX#[2]E19
FDI0_TX#[3]F18
FDI1_TX#[0]B21
FDI1_TX#[1]C20
FDI1_TX#[2]D18
FDI1_TX#[3]E17
FDI0_TX[0]A22
FDI0_TX[1]G19
FDI0_TX[2]E20
FDI0_TX[3]G18
FDI1_TX[0]B20
FDI1_TX[1]C19
FDI1_TX[2]D19
FDI1_TX[3]F17
FDI0_FSYNCJ18
FDI1_FSYNCJ17
FDI_INTH20
FDI0_LSYNCJ19
FDI1_LSYNCH17
PEG_ICOMPIJ22
PEG_ICOMPOJ21
PEG_RCOMPOH22
PEG_RX#[0]K33
PEG_RX#[1]M35
PEG_RX#[2]L34
PEG_RX#[3]J35
PEG_RX#[4]J32
PEG_RX#[5]H34
PEG_RX#[6]H31
PEG_RX#[7]G33
PEG_RX#[8]G30
PEG_RX#[9]F35
PEG_RX#[10]E34
PEG_RX#[11]E32
PEG_RX#[12]D33
PEG_RX#[13]D31
PEG_RX#[14]B33
PEG_RX#[15]C32
PEG_RX[0]J33
PEG_RX[1]L35
PEG_RX[2]K34
PEG_RX[3]H35
PEG_RX[4]H32
PEG_RX[5]G34
PEG_RX[6]G31
PEG_RX[7]F33
PEG_RX[8]F30
PEG_RX[9]E35
PEG_RX[10]E33
PEG_RX[11]F32
PEG_RX[12]D34
PEG_RX[13]E31
PEG_RX[14]C33
PEG_RX[15]B32
PEG_TX#[0]M29
PEG_TX#[1]M32
PEG_TX#[2]M31
PEG_TX#[3]L32
PEG_TX#[4]L29
PEG_TX#[5]K31
PEG_TX#[6]K28
PEG_TX#[7]J30
PEG_TX#[8]J28
PEG_TX#[9]H29
PEG_TX#[10]G27
PEG_TX#[11]E29
PEG_TX#[12]F27
PEG_TX#[13]D28
PEG_TX#[14]F26
PEG_TX#[15]E25
PEG_TX[0]M28
PEG_TX[1]M33
PEG_TX[2]M30
PEG_TX[3]L31
PEG_TX[4]L28
PEG_TX[5]K30
PEG_TX[6]K27
PEG_TX[7]J29
PEG_TX[8]J27
PEG_TX[9]H28
PEG_TX[10]G28
PEG_TX[11]E28
PEG_TX[12]F28
PEG_TX[13]D27
PEG_TX[14]E26
PEG_TX[15]D25
eDP_AUXC15
eDP_AUX#D15
eDP_TX[0]C17
eDP_TX[1]F16
eDP_TX[2]C16
eDP_TX[3]G15
eDP_TX#[0]C18
eDP_TX#[1]E16
eDP_TX#[2]D16
eDP_TX#[3]F15
eDP_COMPIOA18
eDP_HPDB16
eDP_ICOMPOA17
CC25 220nF_0402_16V7KDIS@1 2
CC28 220nF_0402_16V7KDIS@1 2
CC27 220nF_0402_16V7KDIS@1 2
RC2
24.9_0402_1%
12
CC16 220nF_0402_16V7KDIS@1 2
RC36 24.9_0402_1%
1 2
CC11 220nF_0402_16V7KDIS@1 2
CC31 220nF_0402_16V7KDIS@1 2
CC15 220nF_0402_16V7KDIS@1 2
CC13 220nF_0402_16V7KDIS@1 2
CC30 220nF_0402_16V7KDIS@1 2
CC14 220nF_0402_16V7KDIS@1 2
VSS
JCPU1I
Sandy Bridge_rPGA_Rev1p0CONN@
VSS161T35
VSS162T34
VSS163T33
VSS164T32
VSS165T31
VSS166T30
VSS167T29
VSS168T28
VSS169T27
VSS170T26
VSS171P9
VSS172P8
VSS173P6
VSS174P5
VSS175P3
VSS176P2
VSS177N35
VSS178N34
VSS179N33
VSS180N32
VSS181N31
VSS182N30
VSS183N29
VSS184N28
VSS185N27
VSS186N26
VSS187M34
VSS188L33
VSS189L30
VSS190L27
VSS191L9
VSS192L8
VSS193L6
VSS194L5
VSS195L4
VSS196L3
VSS197L2
VSS198L1
VSS199K35
VSS200K32
VSS201K29
VSS202K26
VSS203J34
VSS204J31
VSS205H33
VSS206H30
VSS207H27
VSS208H24
VSS209H21
VSS210H18
VSS211H15
VSS212H13
VSS213H10
VSS214H9
VSS215H8
VSS216H7
VSS217H6
VSS218H5
VSS219H4
VSS220H3
VSS221H2
VSS222H1
VSS223G35
VSS224G32
VSS225G29
VSS226G26
VSS227G23
VSS228G20
VSS229G17
VSS230G11
VSS231F34
VSS232F31
VSS233F29
VSS234F22
VSS235F19
VSS236E30
VSS237E27
VSS238E24
VSS239E21
VSS240E18
VSS241E15
VSS242E13
VSS243E10
VSS244E9
VSS245E8
VSS246E7
VSS247E6
VSS248E5
VSS249E4
VSS250E3
VSS251E2
VSS252E1
VSS253D35
VSS254D32
VSS255D29
VSS256D26
VSS257D20
VSS258D17
VSS259C34
VSS260C31
VSS261C28
VSS262C27
VSS263C25
VSS264C23
VSS265C10
VSS266C1
VSS267B22
VSS268B19
VSS269B17
VSS270B15
VSS271B13
VSS272B11
VSS273B9
VSS274B8
VSS275B7
VSS276B5
VSS277B3
VSS278B2
VSS279A35
VSS280A32
VSS281A29
VSS282A26
VSS283A23
VSS284A20
VSS285A3
CC32 220nF_0402_16V7KDIS@1 2
RC158 10K_0402_5%
@
12
CC9 220nF_0402_16V7KDIS@1 2
CC12 220nF_0402_16V7KDIS@1 2
CC26 220nF_0402_16V7KDIS@1 2
CC29 220nF_0402_16V7KDIS@1 2
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
XDP_BPM#3XDP_BPM#4
XDP_BPM#0
XDP_BPM#2
XDP_BPM#5XDP_BPM#6XDP_BPM#7
XDP_BPM#1
XDP_DBRESET#
XDP_TDIXDP_TDO
XDP_TCK_R
XDP_TRST#_R
XDP_TMS_R
XDP_TDI_R
XDP_PREQ#
BUFO_CPU_RST#
XDP_TDO
XDP_DBRESET#
XDP_RST#_R
XDP_PRDY#_R
CLK_CPU_ITP#
XDP_HOOK2
XDP_TRST#_R
XDP_PREQ#_R
XDP_DBRESET#
XDP_TCK_R
CLK_CPU_ITP
XDP_TDO
XDP_TDIXDP_TMS_R
H_CPUPWRGD_XDP
SYS_PWROK_XDP
H_CPUPWRGDCFD_PWRBTN#_XDP
XDP_BPM#3
XDP_BPM#4
XDP_BPM#0
XDP_BPM#2
XDP_BPM#5
XDP_BPM#6XDP_BPM#7
XDP_BPM#1
H_CPUPWRGD_R
VDDPWRGOOD
RUN_ON_CPU1.5VS3#
PLT_RST#
XDP_TCK1
CFG10_RCFG11_R
XDP_BPM#4XDP_BPM#5XDP_BPM#6XDP_BPM#7
VDDPWRGOOD
XDP_BPM#7_R
XDP_TDI_R
XDP_TRST#
BUF_CPU_RST#
SM_RCOMP1
CLK_CPU_DMI#_R
SM_RCOMP0
XDP_TMS
VDDPWRGOOD_R
SM_RCOMP2
H_THERMTRIP#
BUF_CPU_RST#
XDP_PREQ#
XDP_BPM#5_R
XDP_TCK
XDP_BPM#2_R
XDP_DBRESET#_R
CLK_CPU_DMI_R
H_PM_SYNC_R
H_CPUPWRGD_R
XDP_PRDY#
XDP_BPM#4_R
XDP_BPM#1_R
XDP_TDO_R
H_DRAMRST#
XDP_BPM#0_R
H_CATERR#
XDP_BPM#6_R
XDP_BPM#3_R
H_PROCHOT#_R
SYS_PWROK_XDP
XDP_PRDY#_RXDP_PREQ#_R
XDP_TCK_RXDP_TMS_RXDP_TRST#_R
CLK_CPU_DPLL_RCLK_CPU_DPLL#_R
D_PWG
H_CPUPWRGD_R
H_SNB_IVB#<17>
H_THERMTRIP#<17>
H_CPUPWRGD<17>
H_PROCHOT#<24,44>
H_DRAMRST# <7>
CLK_CPU_DMI# <14>CLK_CPU_DMI <14>
PCH_SMBCLK<11,12,14,28,29,32>PCH_SMBDATA<11,12,14,28,29,32>
CLK_CPU_ITP# <14>PBTN_OUT#<15,24>CLK_CPU_ITP <14>
VGATE<15,50>
XDP_DBRESET# <15>
PM_DRAM_PWRGD<15>
PLT_RST#<16,24,28,32>
PCH_JTAG_TCK<13>
PCH_JTAG_TDO <13>
PCH_JTAG_TDI <13>PCH_JTAG_TMS <13>
H_PECI<17,24>
CFG11<8>CFG10<8>
CFG0<8>
CFG14 <8>CFG15 <8>
CFG13 <8>CFG12 <8>
RUN_ON_CPU1.5VS3#<10,27>
H_PM_SYNC<15>
SYS_PWROK<15>
PCH_PWROK<15,24>
+VCCP
+VCCP
+VCCP
+3VS
+VCCP +VCCP
+1.5V_CPU_VDDQ
+3VALW
+3V_PCH+3VS
+3V_PCH
+VCCP+3VALW
+VCCP
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P 1.0
6 56Wednesday, February 01, 2012
2012/01/17 2013/01/16
Compal Electronics, Inc.
PROCESSOR(2/6) PM,XDP,CLK
The resistor
for HOOK2 should be
placed such that the
stub is very small
on CFG0 net
PU/PD for JTAG signals
DDR3 Compensation Signals
RC8
CRB 1.1K
CHECK LIST 0.7 --> 4.75K
INTEL recommand 1.1K
PDG 0.71 rev -->200
Place near JXDP1
Remove DPLL Ref clock (for eDP only)
RC67 0_0402_5%@1 2
CC
63
0.1
U_
04
02
_1
6V
7K
1
2
RC300_0402_5% @
1 2
RC66 0_0402_5%@1 2
RC11 0_0402_1%@1 2
RC33
43_0402_1%1 2
RC560_0402_1%@1 2
RC230_0402_5% @1 2
RC490_0402_1%
@
1 2
RC32
75_0402_5%
12
RC4410K_0402_5%1 2
RC121 0_0402_5%@1 2
RC68 0_0402_5%@1 2
RC4651_0402_5% 1 2
RC530_0402_1%
@
1 2
RC34
0_0402_5%
@
12
RC4
200_0402_1%
1 2
RC39 1K_0402_1%1 2
RC125 0_0402_1%@1 2
CC64
10P_0402_50V8J
@1 2
T1PAD~D @
RC38 0_0402_1%@1 2
CC
34
0.1
U_
04
02
_1
6V
7K
1
2
JXDP1
SAMTE_BSH-030-01-L-D-ACONN@
GND01
OBSFN_A03
OBSFN_A15
GND27
OBSDATA_A09
OBSDATA_A111
GND413
OBSDATA_A215
OBSDATA_A317
GND619
OBSFN_B021
OBSFN_B123
GND825
OBSDATA_B027
OBSDATA_B129
GND1031
OBSDATA_B233
OBSDATA_B335
GND1237
PWRGOOD/HOOK039
HOOK141
VCC_OBS_AB43
HOOK245
HOOK347
GND1449
SDA51
SCL53
TCK155
TCK057
GND1659
GND12
OBSFN_C04
OBSFN_C16
GND38
OBSDATA_C010
OBSDATA_C112
GND514
OBSDATA_C216
OBSDATA_C318
GND720
OBSFN_D022
OBSFN_D124
GND926
OBSDATA_D028
OBSDATA_D130
GND1132
OBSDATA_D234
OBSDATA_D336
GND1338
ITPCLK/HOOK440
ITPCLK#/HOOK542
VCC_OBS_CD44
RESET#/HOOK646
DBR#/HOOK748
GND1550
TD052
TRST#54
TDI56
TMS58
GND1760
RC61 0_0402_5%@1 2
RC19
39_0402_1%@
12
RC40 1K_0402_1%1 2
RC70 0_0402_5%@1 2
CC
36
0.1
U_
04
02
_1
6V
7K
1
2
RC51 0_0402_1%@1 2
RC28 0_0402_5%@1 2
RC122 0_0402_5%@1 2
CC
35
0.1
U_
04
02
_1
6V
7K
1
2
RC150_0402_5% @ 12
RC8
200_0402_1%
12
RC260_0402_1% @1 2
RC5825.5_0402_1%1 2
RC5451_0402_5% 1 2
RC57
130_0402_1%~D1 2
RC31 0_0402_5%@1 2
RC60200_0402_1%1 2
RC71 0_0402_5%@1 2
RC123 0_0402_1%@1 2
G
D
S
QC1SSM3K7002F_SC59-3
@
2
13
UC1
74AHC1G09GW TSSOP 5P
B1
A2
GND3
Y4
VCC5
RC59 0_0402_5%@1 2
RC130_0402_5% @ 12
RC421K_0402_5% 1 2
RC241K_0402_5% @1 2
RC69 0_0402_5%@1 2
RC4551_0402_5% 1 2
RC29 0_0402_5%@1 2
RC65 0_0402_5%@1 2
CC
33
0.1
U_
04
02
_1
6V
7K
1
2
RC62 0_0402_5%@1 2RC63 0_0402_5%@1 2
RC5251_0402_5% 1 2
RC27
1K_0402_5%
@
12
RC37 0_0402_1%@1 2
RC128
0_
04
02
_5
% @
12
RC610K_0402_5%
@
12
RC41
56_0402_1%
1 2
RC4362_0402_5%
12
RC64 0_0402_5%@1 2
RC25 1K_0402_5%@1 2
RC1270_0402_1%
@
12
RC124 0_0402_1%@1 2
RC50 0_0402_1%@1 2
UC2
SN74LVC1G07DCKR_SC70-5~D
NC1
A2
GND3
Y4
VCC5
RC4751_0402_5% @1 2
RC221K_0402_5% @1 2
CLOCKS
MISC
THERMAL
PWR MANAGEMENT
DDR3
MISC
JTAG & BPM
JCPU1B
Sandy Bridge_rPGA_Rev1p0CONN@
SM_RCOMP[1]A5
SM_RCOMP[2]A4
SM_DRAMRST#R8
SM_RCOMP[0]AK1
BCLK#A27
BCLKA28
DPLL_REF_CLK#A15
DPLL_REF_CLKA16
CATERR#AL33
PECIAN33
PROCHOT#AL32
THERMTRIP#AN32
SM_DRAMPWROKV8
RESET#AR33
PRDY#AP29
PREQ#AP27
TCKAR26
TMSAR27
TRST#AP30
TDIAR28
TDOAP26
DBR#AL35
BPM#[0]AT28
BPM#[1]AR29
BPM#[2]AR30
BPM#[3]AT30
BPM#[4]AP32
BPM#[5]AR31
BPM#[6]AT31
BPM#[7]AR32
PM_SYNCAM34
SKTOCC#AN34
PROC_SELECT#C26
UNCOREPWRGOODAP33
RC4851_0402_5% 1 2
RC55140_0402_1%1 2
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D63DDR_A_D62
DDR_A_D8
DDR_A_D3DDR_A_D4
DDR_A_D7
DDR_A_D5DDR_A_D6
DDR_A_D59DDR_A_D58DDR_A_D57DDR_A_D56
DDR_A_D47DDR_A_D46
DDR_A_D42DDR_A_D43
DDR_A_D34
DDR_A_D39
DDR_A_D44DDR_A_D45
DDR_A_D35
DDR_A_D41DDR_A_D40
DDR_A_D38
DDR_A_D36DDR_A_D37
DDR_A_D32DDR_A_D33
DDR_A_D61DDR_A_D60
DDR_A_D2DDR_A_D1DDR_A_D0
DDR_A_D55DDR_A_D54
DDR_A_D51
DDR_A_D48
DDR_A_D50DDR_A_D49
DDR_A_D52DDR_A_D53
DDR_A_D31
DDR_A_D14DDR_A_D15
DDR_A_D25DDR_A_D24
DDR_A_D26DDR_A_D27
DDR_A_D30
DDR_A_D9
DDR_A_D13DDR_A_D12
DDR_A_D10DDR_A_D11
DDR_A_D29DDR_A_D28
DDR_A_D19DDR_A_D20
DDR_A_D16
DDR_A_D21
DDR_A_D17
DDR_A_D22
DDR_A_D18
DDR_A_D23
M_CLK_DDR0M_CLK_DDR#0DDR_CKE0_DIMMA
M_CLK_DDR1M_CLK_DDR#1DDR_CKE1_DIMMA
DDR_A_MA15
DDR_A_DQS0
DDR_A_DQS2DDR_A_DQS1
DDR_A_DQS6DDR_A_DQS5DDR_A_DQS4DDR_A_DQS3
DDR_A_DQS7
DDR_A_DQS#7
DDR_A_DQS#0
DDR_A_DQS#2
DDR_A_DQS#5
DDR_A_DQS#3
DDR_A_DQS#1
DDR_A_DQS#4
DDR_A_DQS#6
DDR_A_MA0
DDR_A_MA14
DDR_A_MA5DDR_A_MA4
DDR_A_MA1DDR_A_MA2DDR_A_MA3
DDR_A_MA9
DDR_A_MA7DDR_A_MA6
DDR_A_MA12DDR_A_MA13
DDR_A_MA8
DDR_A_MA11DDR_A_MA10
DDR_CS0_DIMMA#DDR_CS1_DIMMA#
M_ODT0M_ODT1
DDR_B_D33
DDR_B_D14
DDR_B_D42
DDR_B_D59
DDR_B_D63
DDR_B_D43
DDR_B_D55
DDR_B_D53
DDR_B_D29
DDR_B_D24
DDR_B_D34
DDR_B_D4
DDR_B_D26
DDR_B_D13
DDR_B_D10
DDR_B_D21
DDR_B_D11
DDR_B_D57
DDR_B_D44
DDR_B_D0
DDR_B_D7
DDR_B_D46
DDR_B_D3
DDR_B_D15
DDR_B_D27
DDR_B_D30
DDR_B_D35
DDR_B_D40
DDR_B_D49
DDR_B_D23
DDR_B_D25
DDR_B_D19
DDR_B_D37
DDR_B_D48
DDR_B_D36
DDR_B_D18
DDR_B_D8
DDR_B_D47
DDR_B_D9
DDR_B_D60
DDR_B_D50
DDR_B_D62
DDR_B_D52
DDR_B_D2
DDR_B_D51
DDR_B_D56
DDR_B_D39
DDR_B_D22
DDR_B_D28
DDR_B_D6
DDR_B_D45
DDR_B_D17
DDR_B_D58
DDR_B_D61
DDR_B_D31
DDR_B_D54
DDR_B_D1
DDR_B_D41
DDR_B_D5
DDR_B_D12
DDR_B_D20
DDR_B_D38
DDR_B_D32
DDR_B_D16
M_CLK_DDR2
DDR_CKE2_DIMMB
M_CLK_DDR3M_CLK_DDR#3DDR_CKE3_DIMMB
DDR_B_MA15
DDR_B_DQS#7
DDR_B_DQS#5DDR_B_DQS#6
DDR_B_DQS7
DDR_B_DQS5DDR_B_DQS6
DDR_B_MA13DDR_B_MA14
M_CLK_DDR#2
DDR_CS2_DIMMB#DDR_CS3_DIMMB#
M_ODT2M_ODT3
DDR3_DRAMRST#_R
DRAMRST_CNTRL
H_DRAMRST#
DDR_B_MA11
DDR_B_MA5
DDR_B_DQS#4
DDR_B_DQS2
DDR_B_MA10
DDR_B_MA6
DDR_B_MA4
DDR_B_DQS#1
DDR_B_MA2
DDR_B_DQS#3
DDR_B_MA9
DDR_B_MA3
DDR_B_DQS1
DDR_B_MA1
DDR_B_DQS3
DDR_B_MA8
DDR_B_DQS0
DDR_B_MA12
DDR_B_MA0
DDR_B_DQS4
DDR_B_DQS#2
DDR_B_DQS#0
DDR_B_MA7
DDR_A_D[0..63]<11>
DDR_A_BS0<11>DDR_A_BS1<11>DDR_A_BS2<11>
DDR_A_WE#<11>DDR_A_RAS#<11>DDR_A_CAS#<11>
M_CLK_DDR0 <11>M_CLK_DDR#0 <11>DDR_CKE0_DIMMA <11>
M_CLK_DDR1 <11>M_CLK_DDR#1 <11>DDR_CKE1_DIMMA <11>
DDR_CS0_DIMMA# <11>DDR_CS1_DIMMA# <11>
M_ODT0 <11>M_ODT1 <11>
DDR_A_DQS#[0..7] <11>
DDR_A_DQS[0..7] <11>
DDR_A_MA[0..15] <11>
DDR_B_BS0<12>DDR_B_BS1<12>DDR_B_BS2<12>
DDR_B_D[0..63]<12>
DDR_B_WE#<12>DDR_B_RAS#<12>DDR_B_CAS#<12>
DDR_CS3_DIMMB# <12>
DDR_B_DQS[0..7] <12>
DDR_B_DQS#[0..7] <12>
M_CLK_DDR2 <12>M_CLK_DDR#2 <12>DDR_CKE2_DIMMB <12>
M_CLK_DDR3 <12>
DDR_CS2_DIMMB# <12>
M_ODT3 <12>M_ODT2 <12>
DDR_CKE3_DIMMB <12>M_CLK_DDR#3 <12>
DDR_B_MA[0..15] <12>
DDR3_DRAMRST# <11,12>H_DRAMRST#<6>
DRAMRST_CNTRL_PCH <14>
DRAMRST_CNTRL <11>
+1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P1.0
7 56Wednesday, February 01, 2012
2012/01/17 2013/01/16Compal Electronics, Inc.
PROCESSOR(3/6) DDRIII
DDR SYSTEM MEMORY B
JCPU1D
Sandy Bridge_rPGA_Rev1p0CONN@
SB_BS[0]AA9
SB_BS[1]AA7
SB_BS[2]R6
SB_CAS#AA10
SB_RAS#AB8
SB_WE#AB9
SB_CLK[0]AE2
SB_CLK[1]AE1
SB_CLK#[0]AD2
SB_CLK#[1]AD1
SB_CKE[0]R9
SB_CKE[1]R10
SB_ODT[0]AE4
SB_ODT[1]AD4
SB_DQS[4]AN6
SB_DQS#[4]AN5
SB_DQS[5]AP8
SB_DQS#[5]AP9
SB_DQS[6]AK11
SB_DQS#[6]AK12
SB_DQS[7]AP14
SB_DQS#[7]AP15
SB_DQS[0]C7
SB_DQS#[0]D7
SB_DQS[1]G3
SB_DQS#[1]F3
SB_DQS[2]J6
SB_DQS#[2]K6
SB_DQS[3]M3
SB_DQS#[3]N3
SB_MA[0]AA8
SB_MA[1]T7
SB_MA[2]R7
SB_MA[3]T6
SB_MA[4]T2
SB_MA[5]T4
SB_MA[6]T3
SB_MA[7]R2
SB_MA[8]T5
SB_MA[9]R3
SB_MA[10]AB7
SB_MA[11]R1
SB_MA[12]T1
SB_MA[13]AB10
SB_MA[14]R5
SB_MA[15]R4
SB_DQ[0]C9
SB_DQ[1]A7
SB_DQ[2]D10
SB_DQ[3]C8
SB_DQ[4]A9
SB_DQ[5]A8
SB_DQ[6]D9
SB_DQ[7]D8
SB_DQ[8]G4
SB_DQ[9]F4
SB_DQ[10]F1
SB_DQ[11]G1
SB_DQ[12]G5
SB_DQ[13]F5
SB_DQ[14]F2
SB_DQ[15]G2
SB_DQ[16]J7
SB_DQ[17]J8
SB_DQ[18]K10
SB_DQ[19]K9
SB_DQ[20]J9
SB_DQ[21]J10
SB_DQ[22]K8
SB_DQ[23]K7
SB_DQ[24]M5
SB_DQ[25]N4
SB_DQ[26]N2
SB_DQ[27]N1
SB_DQ[28]M4
SB_DQ[29]N5
SB_DQ[30]M2
SB_DQ[31]M1
SB_DQ[32]AM5
SB_DQ[33]AM6
SB_DQ[34]AR3
SB_DQ[35]AP3
SB_DQ[36]AN3
SB_DQ[37]AN2
SB_DQ[38]AN1
SB_DQ[39]AP2
SB_DQ[40]AP5
SB_DQ[41]AN9
SB_DQ[42]AT5
SB_DQ[43]AT6
SB_DQ[44]AP6
SB_DQ[45]AN8
SB_DQ[46]AR6
SB_DQ[47]AR5
SB_DQ[48]AR9
SB_DQ[49]AJ11
SB_DQ[50]AT8
SB_DQ[51]AT9
SB_DQ[52]AH11
SB_DQ[53]AR8
SB_DQ[54]AJ12
SB_DQ[55]AH12
SB_DQ[56]AT11
SB_DQ[57]AN14
SB_DQ[58]AR14
SB_DQ[59]AT14
SB_DQ[60]AT12
SB_DQ[61]AN15
SB_DQ[62]AR15
SB_DQ[63]AT15
RSVD_TP[11]AB2
RSVD_TP[12]AA2
RSVD_TP[13]T9
RSVD_TP[14]AA1
RSVD_TP[15]AB1
RSVD_TP[16]T10
SB_CS#[0]AD3
SB_CS#[1]AE3
RSVD_TP[17]AD6
RSVD_TP[18]AE6
RSVD_TP[19]AD5
RSVD_TP[20]AE5
RC74 0_0402_5%@1 2
G
DS
QC2
BSS138_SOT23
2
13
RC751K_0402_5%
12
RC774.99K_0402_1%
12
RC76 1K_0402_5% 1 2
CC37.047U_0402_16V7K
1
2
RC72 0_0402_1%@1 2
DDR SYSTEM MEMORY A
JCPU1C
Sandy Bridge_rPGA_Rev1p0CONN@
SA_BS[0]AE10
SA_BS[1]AF10
SA_BS[2]V6
SA_CAS#AE8
SA_RAS#AD9
SA_WE#AF9
SA_CLK[0]AB6
SA_CLK[1]AA5
SA_CLK#[0]AA6
SA_CLK#[1]AB5
SA_CKE[0]V9
SA_CKE[1]V10
SA_CS#[0]AK3
SA_CS#[1]AL3
SA_ODT[0]AH3
SA_ODT[1]AG3
SA_DQS[0]D4
SA_DQS#[0]C4
SA_DQS[1]F6
SA_DQS#[1]G6
SA_DQS[2]K3
SA_DQS#[2]J3
SA_DQS[3]N6
SA_DQS#[3]M6
SA_DQS[4]AL5
SA_DQS#[4]AL6
SA_DQS[5]AM9
SA_DQS#[5]AM8
SA_DQS[6]AR11
SA_DQS#[6]AR12
SA_DQS[7]AM14
SA_DQS#[7]AM15
SA_MA[0]AD10
SA_MA[1]W1
SA_MA[2]W2
SA_MA[3]W7
SA_MA[4]V3
SA_MA[5]V2
SA_MA[6]W3
SA_MA[7]W6
SA_MA[8]V1
SA_MA[9]W5
SA_MA[10]AD8
SA_MA[11]V4
SA_MA[12]W4
SA_MA[13]AF8
SA_MA[14]V5
SA_MA[15]V7
SA_DQ[0]C5
SA_DQ[1]D5
SA_DQ[2]D3
SA_DQ[3]D2
SA_DQ[4]D6
SA_DQ[5]C6
SA_DQ[6]C2
SA_DQ[7]C3
SA_DQ[8]F10
SA_DQ[9]F8
SA_DQ[10]G10
SA_DQ[11]G9
SA_DQ[12]F9
SA_DQ[13]F7
SA_DQ[14]G8
SA_DQ[15]G7
SA_DQ[16]K4
SA_DQ[17]K5
SA_DQ[18]K1
SA_DQ[19]J1
SA_DQ[20]J5
SA_DQ[21]J4
SA_DQ[22]J2
SA_DQ[23]K2
SA_DQ[24]M8
SA_DQ[25]N10
SA_DQ[26]N8
SA_DQ[27]N7
SA_DQ[28]M10
SA_DQ[29]M9
SA_DQ[30]N9
SA_DQ[31]M7
SA_DQ[32]AG6
SA_DQ[33]AG5
SA_DQ[34]AK6
SA_DQ[35]AK5
SA_DQ[36]AH5
SA_DQ[37]AH6
SA_DQ[38]AJ5
SA_DQ[39]AJ6
SA_DQ[40]AJ8
SA_DQ[41]AK8
SA_DQ[42]AJ9
SA_DQ[43]AK9
SA_DQ[44]AH8
SA_DQ[45]AH9
SA_DQ[46]AL9
SA_DQ[47]AL8
SA_DQ[48]AP11
SA_DQ[49]AN11
SA_DQ[50]AL12
SA_DQ[51]AM12
SA_DQ[52]AM11
SA_DQ[53]AL11
SA_DQ[54]AP12
SA_DQ[55]AN12
SA_DQ[56]AJ14
SA_DQ[57]AH14
SA_DQ[58]AL15
SA_DQ[59]AK15
SA_DQ[60]AL14
SA_DQ[61]AK14
SA_DQ[62]AJ15
SA_DQ[63]AH15
RSVD_TP[1]AB4
RSVD_TP[2]AA4
RSVD_TP[4]AB3
RSVD_TP[5]AA3
RSVD_TP[3]W9
RSVD_TP[6]W10
RSVD_TP[7]AG1
RSVD_TP[8]AH1
RSVD_TP[9]AG2
RSVD_TP[10]AH2
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CFG4
CFG6
CFG5
CFG2
CFG7
VCC_VAL_SENSE
VCC_AXG_VAL_SENSEVSS_AXG_VAL_SENSE
CFG10CFG11
CFG13CFG14CFG15CFG16CFG17
CFG12
CFG1CFG2
CFG0
CFG3CFG4CFG5CFG6CFG7CFG8CFG9
+SA_DIMM_VREFDQ+SB_DIMM_VREFDQ
VSS_VAL_SENSE
VSS_VAL_SENSE
VSS_AXG_VAL_SENSE
H_VCCP_SEL
CFG0<6>
CFG10<6>CFG11<6>
CLK_RES_ITP <14>CLK_RES_ITP# <14>
CFG12<6>CFG13<6>CFG14<6>CFG15<6>
+SA_DIMM_VREFDQ
+SB_DIMM_VREFDQ
+VCC_CORE
+VCC_GFXCORE_AXG
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P1.0
8 56Wednesday, February 01, 2012
2012/01/17 2013/01/16Compal Electronics, Inc.
PROCESSOR(4/6) RSVD,CFG
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
PCIE Port Bifurcation Straps
CFG[6:5]
11: (Default) x16 - Device 1 functions 1 and 2 disabled
CFG7
PEG DEFER TRAINING
0: PEG Wait for BIOS for training
1: (Default) PEG Train immediatelyfollowing xxRESETB de assertion
CFG4
Display Port Presence Strap
0 : Enabled; An external Display Port device isconnected to the Embedded Display Port
1 : Disabled; No Physical Display Portattached to Embedded Display Port
CFG Straps for Processor
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
PEG Static Lane Reversal - CFG2 is for the 16x
CFG2
0:Lane Reversed
1:(Default) Normal Operation; Lane #definition matches socket pin map definition
INTEL 12/28 recommand
to add RC120, RC121, RC122, RC123
Please place as close as JCPU1
*
*
*
*
T49PAD~D @
T50 PAD~D@
T7 PAD~D@
T43PAD~D @
T23 PAD~D@
RC811K_0402_1%
@
12
T26PAD~D @
T48 PAD~D@
T2 PAD~D@
T40PAD~D @
T20 PAD~D@
T6 PAD~D@
RC851K_0402_1%
@
12
T47 PAD~D@
T87PAD~D @
T89PAD~D @
T34PAD~D @
T25PAD~D @
T11 PAD~D@
RC9050_0402_1%
@
12
T29 PAD~D@
RC79
50_0402_1%
@
12
T90PAD~D @
T32PAD~D @
T10 PAD~D@
T37PAD~D @
T88PAD~D @
T18 PAD~D@
T35PAD~D @ T36 PAD~D@
T21 PAD~D@
T16 PAD~D@
T86PAD~D @
T13 PAD~D@T12 PAD~D@
T4 PAD~D@
T45PAD~D @
RC861K_0402_1%
@
12
RC80
50_0402_1%
@
12
T8 PAD~D@
T42PAD~D @
T39PAD~D @
RESERVED
JCPU1E
Sandy Bridge_rPGA_Rev1p0CONN@
CFG[0]AK28
CFG[1]AK29
CFG[2]AL26
CFG[3]AL27
CFG[4]AK26
CFG[5]AL29
CFG[6]AL30
CFG[7]AM31
CFG[8]AM32
CFG[9]AM30
CFG[10]AM28
CFG[11]AM26
CFG[12]AN28
CFG[13]AN31
CFG[14]AN26
CFG[15]AM27
CFG[16]AK31
CFG[17]AN29
RSVD34AM33
RSVD35AJ27
RSVD38J16
RSVD42AT34
RSVD39H16
RSVD40G16
RSVD41AR35
RSVD43AT33
RSVD45AR34
RSVD56AT2
RSVD57AT1
RSVD58AR1
RSVD46B34
RSVD47A33
RSVD48A34
RSVD49B35
RSVD50C35
RSVD51AJ32
RSVD52AK32
RSVD30AE7
RSVD31AK2
RSVD28L7
RSVD29AG7
RSVD27J15
RSVD16C30
RSVD15D23
RSVD17A31
RSVD18B30
RSVD20D30
RSVD19B29
RSVD22A30
RSVD21B31
RSVD23C29
RSVD24J20
RSVD37T8
RSVD6B4
RSVD7D1
RSVD8F25
RSVD9F24
RSVD11D24
RSVD12G25
RSVD13G24
RSVD14E23
RSVD32W8
RSVD33AT26
RSVD25B18
RSVD44AP35
RSVD10F23
RSVD5AJ26
VAXG_VAL_SENSEAJ31
VSSAXG_VAL_SENSEAH31
VCC_VAL_SENSEAJ33
VSS_VAL_SENSEAH33
KEYB1
VCC_DIE_SENSEAH27
VCCIO_SELA19
RSVD54AN35
RSVD55AM35
T5 PAD~D@
RC871K_0402_1%
12
T33PAD~D @
T17 PAD~D@
RC781K_0402_1%
12
RC159
10K_0402_5%
12
T19PAD~D @
T3 PAD~D@
T38PAD~D @
T15 PAD~D@
T85PAD~D @
T28PAD~D @T30PAD~D @
T27PAD~D @
T14 PAD~D@
RC91
50_0402_1%
@
12
RC841K_0402_1%
@
12
T46 PAD~D@
T22 PAD~D@
T41PAD~D @
RC891K_0402_1%
@
12
T9 PAD~D@
T24 PAD~D@
T31 PAD~D@
T44PAD~D @
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VSSSENSE_RVCCSENSE_R
H_CPU_SVIDALRT#
H_CPU_SVIDDATH_CPU_SVIDCLK
VCCIO_SENSE <47>
VCCSENSE <50>VSSSENSE <50>
VR_SVID_DAT <50>VR_SVID_CLK <50>VR_SVID_ALRT# <50>
+VCC_CORE
+VCC_CORE
+VCCP
+VCCP
+VCCP
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P1.0
9 56Wednesday, February 01, 2012
2012/01/17 2013/01/16Compal Electronics, Inc.
PROCESSOR(5/6) PWR,BYPASS
8.5A
QC=94A
DC=53A
Place the PU
resistors close to CPURC95 close to CPU
RC99 0_0402_1%@1 2
RC100
100_0402_1%
12
RC97
100_0402_1%
12
RC94 43_0402_1% 1 2
RC96 0_0402_1%@1 2
RC93
75_0402_5%
12
RC92 0_0402_1%@1 2
RC98 0_0402_1%@1 2
RC11110_0402_1%
12
RC108
10_0402_1%12
POWER
CORE SUPPLY
PEG AND DDR
SENSE LINES
SVID
JCPU1F
Sandy Bridge_rPGA_Rev1p0CONN@
VCC_SENSEAJ35
VSS_SENSEAJ34
VIDALERT#AJ29
VIDSCLKAJ30
VIDSOUTAJ28
VSSIO_SENSEA10
VCC1AG35
VCC2AG34
VCC3AG33
VCC4AG32
VCC5AG31
VCC6AG30
VCC7AG29
VCC8AG28
VCC9AG27
VCC10AG26
VCC11AF35
VCC12AF34
VCC13AF33
VCC14AF32
VCC15AF31
VCC16AF30
VCC17AF29
VCC18AF28
VCC19AF27
VCC20AF26
VCC21AD35
VCC22AD34
VCC23AD33
VCC24AD32
VCC25AD31
VCC26AD30
VCC27AD29
VCC28AD28
VCC29AD27
VCC30AD26
VCC31AC35
VCC32AC34
VCC33AC33
VCC34AC32
VCC35AC31
VCC36AC30
VCC37AC29
VCC38AC28
VCC39AC27
VCC40AC26
VCC41AA35
VCC42AA34
VCC43AA33
VCC44AA32
VCC45AA31
VCC46AA30
VCC47AA29
VCC48AA28
VCC49AA27
VCC50AA26
VCC51Y35
VCC52Y34
VCC53Y33
VCC54Y32
VCC55Y31
VCC56Y30
VCC57Y29
VCC58Y28
VCC59Y27
VCC60Y26
VCC61V35
VCC62V34
VCC63V33
VCC64V32
VCC65V31
VCC66V30
VCC67V29
VCC68V28
VCC69V27
VCC70V26
VCC71U35
VCC72U34
VCC73U33
VCC74U32
VCC75U31
VCC76U30
VCC77U29
VCC78U28
VCC79U27
VCC80U26
VCC81R35
VCC82R34
VCC83R33
VCC84R32
VCC85R31
VCC86R30
VCC87R29
VCC88R28
VCC89R27
VCC90R26
VCC91P35
VCC92P34
VCC93P33
VCC94P32
VCC95P31
VCC96P30
VCC97P29
VCC98P28
VCC99P27
VCC100P26
VCCIO1AH13
VCCIO12J11
VCCIO18G12
VCCIO19F14
VCCIO20F13
VCCIO21F12
VCCIO22F11
VCCIO23E14
VCCIO24E12
VCCIO2AH10
VCCIO3AG10
VCCIO4AC10
VCCIO5Y10
VCCIO6U10
VCCIO7P10
VCCIO8L10
VCCIO9J14
VCCIO10J13
VCCIO11J12
VCCIO13H14
VCCIO14H12
VCCIO15H11
VCCIO16G14
VCCIO17G13
VCCIO25E11
VCCIO32C12
VCCIO33C11
VCCIO34B14
VCCIO35B12
VCCIO36A14
VCCIO37A13
VCCIO38A12
VCCIO39A11
VCCIO26D14
VCCIO27D13
VCCIO28D12
VCCIO29D11
VCCIO30C14
VCCIO31C13
VCCIO_SENSEB10
VCCIO40J23
RC95
130_0402_1%~D
12
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RUN_ON_CPU1.5VS3#
+1.8VS_VCCPLL
RUN_ON_CPU1.5VS3
RUN_ON_CPU1.5VS3
+V_SM_VREF_CNT +V_SM_VREF
VCC_AXG_SENSE
VSS_AXG_SENSE
SUSP#<24,27,28,46,47,48>
VCCSA_SENSE <49>
VCCSA_VID1 <49>
VCC_AXG_SENSE <50>
VSS_AXG_SENSE <50>
RUN_ON_CPU1.5VS3# <6,27>CPU1.5V_S3_GATE<24>
VCCSA_VID0 <49>
+VCCSA
+1.5V +1.5V_CPU_VDDQB+_BIAS+3VALW
+1.5V_CPU_VDDQ
+1.5V
+1.8VS
+VCC_GFXCORE_AXG
+1.5V
+1.5V_CPU_VDDQ +1.5V
+VCC_GFXCORE_AXG
+1.5V_CPU_VDDQ
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P1.0
10 56Wednesday, February 01, 2012
2012/01/17 2013/01/16Compal Electronics, Inc.
PROCESSOR(6/6) PWR,VSS
+1.5V_CPU_VDDQ Source
5A
+V_SM_VREF should
have 10 mil trace width
33A
J8 OPEN
6A
1.2A
add CC181 , CC182, 4 caps are all pop. follow checklist 1.0 5/24
RC113
10_0402_1%1 2
RC110
0_0402_5%
@
12
CC
51
10U
_0805_4V
AM
~D
1
2
QC4NTR4503NT1G_SOT23-3~D
@
1
2
3
RC102100K_0402_5%
12
RC112
1K_0402_5%@
12
CC
56
1U
_0402_6.3
V6K
1
2
CC
55
1U
_0402_6.3
V6K
1
2
CC400.1U_0402_10V7K~D
@1
2
RC114
10_0402_1%
1 2
CC
52
10U
_0603_6.3
V6M
@1
2
CC
54
10U
_0805_4V
AM
~D
1
2
+ CC48330U_D2_2VM_R6M~D
1
2
+ CC47330U_D2_2VM_R6M~D
1
2
CC
62
10U
_0805_4V
AM
~D
@1
2
RC106 0_0402_5%@1 2
CC
38
10U
_0805_10V
6K
1
2
VSS
JCPU1H
Sandy Bridge_rPGA_Rev1p0CONN@
VSS1AT35
VSS2AT32
VSS3AT29
VSS4AT27
VSS5AT25
VSS6AT22
VSS7AT19
VSS8AT16
VSS9AT13
VSS10AT10
VSS11AT7
VSS12AT4
VSS13AT3
VSS14AR25
VSS15AR22
VSS16AR19
VSS17AR16
VSS18AR13
VSS19AR10
VSS20AR7
VSS21AR4
VSS22AR2
VSS23AP34
VSS24AP31
VSS25AP28
VSS26AP25
VSS27AP22
VSS28AP19
VSS29AP16
VSS30AP13
VSS31AP10
VSS32AP7
VSS33AP4
VSS34AP1
VSS35AN30
VSS36AN27
VSS37AN25
VSS38AN22
VSS39AN19
VSS40AN16
VSS41AN13
VSS42AN10
VSS43AN7
VSS44AN4
VSS45AM29
VSS46AM25
VSS47AM22
VSS48AM19
VSS49AM16
VSS50AM13
VSS51AM10
VSS52AM7
VSS53AM4
VSS54AM3
VSS55AM2
VSS56AM1
VSS57AL34
VSS58AL31
VSS59AL28
VSS60AL25
VSS61AL22
VSS62AL19
VSS63AL16
VSS64AL13
VSS65AL10
VSS66AL7
VSS67AL4
VSS68AL2
VSS69AK33
VSS70AK30
VSS71AK27
VSS72AK25
VSS73AK22
VSS74AK19
VSS75AK16
VSS76AK13
VSS77AK10
VSS78AK7
VSS79AK4
VSS80AJ25
VSS81AJ22
VSS82AJ19
VSS83AJ16
VSS84AJ13
VSS85AJ10
VSS86AJ7
VSS87AJ4
VSS88AJ3
VSS89AJ2
VSS90AJ1
VSS91AH35
VSS92AH34
VSS93AH32
VSS94AH30
VSS95AH29
VSS96AH28
VSS97AH26
VSS98AH25
VSS99AH22
VSS100AH19
VSS101AH16
VSS102AH7
VSS103AH4
VSS104AG9
VSS105AG8
VSS106AG4
VSS107AF6
VSS108AF5
VSS109AF3
VSS110AF2
VSS111AE35
VSS112AE34
VSS113AE33
VSS114AE32
VSS115AE31
VSS116AE30
VSS117AE29
VSS118AE28
VSS119AE27
VSS120AE26
VSS121AE9
VSS122AD7
VSS123AC9
VSS124AC8
VSS125AC6
VSS126AC5
VSS127AC3
VSS128AC2
VSS129AB35
VSS130AB34
VSS131AB33
VSS132AB32
VSS133AB31
VSS134AB30
VSS135AB29
VSS136AB28
VSS137AB27
VSS138AB26
VSS139Y9
VSS140Y8
VSS141Y6
VSS142Y5
VSS143Y3
VSS144Y2
VSS145W35
VSS146W34
VSS147W33
VSS148W32
VSS149W31
VSS150W30
VSS151W29
VSS152W28
VSS153W27
VSS154W26
VSS155U9
VSS156U8
VSS157U6
VSS158U5
VSS159U3
VSS160U2
CC
41
10U
_0805_4V
AM
~D
1
2
CC
50
10U
_0805_4V
AM
~D
1
2
RC107
0_0402_5%1 2
RC157 100_0402_1%@
1 2
RC104
0_0402_5%
@
1 2
CC
61
10U
_0805_4V
AM
~D
@1
2
POWER
GRAPHICS
DDR3 -1.5V RAILS
SENSE
LINES
1.8V RAIL
SA RAIL
VREF
MISC
JCPU1G
Sandy Bridge_rPGA_Rev1p0CONN@
SM_VREFAL1
VSSAXG_SENSEAK34
VAXG_SENSEAK35
VAXG1AT24
VAXG2AT23
VAXG3AT21
VAXG4AT20
VAXG5AT18
VAXG6AT17
VAXG7AR24
VAXG8AR23
VAXG9AR21
VAXG10AR20
VAXG11AR18
VAXG12AR17
VAXG13AP24
VAXG14AP23
VAXG15AP21
VAXG16AP20
VAXG17AP18
VAXG18AP17
VAXG19AN24
VAXG20AN23
VAXG21AN21
VAXG22AN20
VAXG23AN18
VAXG24AN17
VAXG25AM24
VAXG26AM23
VAXG27AM21
VAXG28AM20
VAXG29AM18
VAXG30AM17
VAXG31AL24
VAXG32AL23
VAXG33AL21
VAXG34AL20
VAXG35AL18
VAXG36AL17
VAXG37AK24
VAXG38AK23
VAXG39AK21
VAXG40AK20
VAXG41AK18
VAXG42AK17
VAXG43AJ24
VAXG44AJ23
VAXG45AJ21
VAXG46AJ20
VAXG47AJ18
VAXG48AJ17
VAXG49AH24
VAXG50AH23
VAXG51AH21
VAXG52AH20
VAXG53AH18
VAXG54AH17
VDDQ11U4
VDDQ12U1
VDDQ13P7
VDDQ14P4
VDDQ15P1
VDDQ1AF7
VDDQ2AF4
VDDQ3AF1
VDDQ4AC7
VDDQ5AC4
VDDQ6AC1
VDDQ7Y7
VDDQ8Y4
VDDQ9Y1
VDDQ10U7
VCCPLL1B6
VCCPLL2A6
VCCSA1M27
VCCSA2M26
VCCSA3L26
VCCSA4J26
VCCSA5J25
VCCSA6J24
VCCSA7H26
VCCSA8H25
VCCSA_SENSEH23
VCCSA_VID1C24
VCCPLL3A2
FC_C22C22
RC126
1K_0402_5%
12
CC59 0.1U_0402_10V7K~D12
+
CC
57
330U
_D
2_2.5
VM
_R
6M
~D
1
2
CC
43
10U
_0805_4V
AM
~D
1
2
QC3AO4728L_SO8~D
4
78
65
123
QC5B
2N7002DW-7-F_SOT363-6
3
5
4
CC
44
10U
_0805_4V
AM
~D
1
2
CC
49
10U
_0805_4V
AM
~D
1
2
CC
45
10U
_0805_4V
AM
~D
1
2
RC129 1K_0402_5%1 2
CC60 0.1U_0402_10V7K~D12
RC
105
330K
_0402_1%
12
RC116
1K_0402_5%@
12
RC101100K_0402_5%
12
CC58 0.1U_0402_10V7K~D12
QC5A2N7002DW-7-F_SOT363-6
61
2
RC109 0_0805_1%@1 2
JP10
PAD-OPEN 4x4m
@
1 2
RC
103
20K
_0402_5%
12
CC
42
10U
_0805_4V
AM
~D
1
2
CC
39
0.1
U_0603_50V
_X
7R
1
2
CC53 0.1U_0402_10V7K~D12
CC
46
10U
_0805_4V
AM
~D
1
2
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+V_DDR_REFA
DDR_A_D0DDR_A_D1
DDR_A_D2DDR_A_D3
DDR_A_D8
DDR_A_D10DDR_A_D11
DDR_A_D18DDR_A_D19
DDR_A_D26DDR_A_D27
DDR_A_D32
DDR_A_D34DDR_A_D35
DDR_A_D40DDR_A_D41
DDR_A_D42DDR_A_D43
DDR_A_D49
DDR_A_D50DDR_A_D51
DDR_A_D56DDR_A_D57
DDR_A_D58DDR_A_D59
DDR_A_MA1DDR_A_MA3
DDR_A_MA5DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA12
DDR_A_MA13
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS4
DDR_A_DQS6
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#4
DDR_A_DQS#6
DDR_A_BS0
DDR_A_BS2
DDR_CS1_DIMMA#
M_CLK_DDR0M_CLK_DDR#0
DDR_CKE0_DIMMA
DDR_A_CAS#DDR_A_WE#
DDR_A_D17
DDR_A_D9
DDR_A_D16
DDR_A_D25DDR_A_D24
DDR_A_D33
DDR_A_D48
DDR_A_D4DDR_A_D5
DDR_A_D6DDR_A_D7
DDR_A_D21
DDR_A_D28DDR_A_D29
DDR_A_D36DDR_A_D37
DDR_A_D45
DDR_A_D46
DDR_A_D52DDR_A_D53
DDR_A_D55
DDR_A_D60DDR_A_D61
DDR_A_D62
DDR_A_MA2DDR_A_MA0
DDR_A_MA4DDR_A_MA6
DDR_A_MA7DDR_A_MA11
DDR_A_MA14
DDR_A_DQS0
DDR_A_DQS3
DDR_A_DQS5
DDR_A_DQS7
DDR_A_DQS#0
DDR_A_DQS#3
DDR_A_DQS#5
DDR_A_DQS#7
DDR_A_BS1
DDR_CS0_DIMMA#
M_CLK_DDR1M_CLK_DDR#1
DDR_CKE1_DIMMA
DDR_A_RAS#
PCH_SMBDATAPCH_SMBCLK
M_ODT0
M_ODT1
DDR3_DRAMRST#
DDR_A_D63
DDR_A_MA15
+VREF_CA
DDR_A_D23
DDR_A_D31
DDR_A_D13
DDR_A_D20
DDR_A_D30
DDR_A_D14DDR_A_D15
DDR_A_D12
DDR_A_D22
DDR_A_D39
DDR_A_D54
DDR_A_D38
DDR_A_D47
DDR_A_D44
DRAMRST_CNTRL
DRAMRST_CNTRL
DDR_A_D[0..63]<7>
DDR_A_DQS[0..7]<7>
DDR_A_DQS#[0..7]<7>
DDR_A_MA[0..15]<7>
DDR_CS1_DIMMA#<7>
DDR_A_CAS#<7>DDR_A_WE#<7>
DDR_A_BS0<7>
M_CLK_DDR#0<7>M_CLK_DDR0<7>
DDR_A_BS2<7>
DDR_CKE0_DIMMA<7> DDR_CKE1_DIMMA <7>
M_CLK_DDR1 <7>M_CLK_DDR#1 <7>
DDR_A_BS1 <7>DDR_A_RAS# <7>
DDR_CS0_DIMMA# <7>M_ODT0 <7>
M_ODT1 <7>
PCH_SMBDATA <6,12,14,28,29,32>PCH_SMBCLK <6,12,14,28,29,32>
DDR3_DRAMRST# <7,12>
DRAMRST_CNTRL<7>
+0.75VS
+1.5V
+1.5V
+1.5V
+V_DDR_REFA
+1.5V
+3VS
+0.75VS
+V_DDR_REFA
+1.5V
+0.75VS
+1.5V
+SB_DIMM_VREFDQ
+SA_DIMM_VREFDQ
+V_DDR_REFB
+V_DDR_REFA
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P 1.0
11 56Wednesday, February 01, 2012
2012/01/17 2013/01/16
Compal Electronics, Inc.
DDRIII DIMMA
Layout Note:Place near JDIMM1
Layout Note:Place near JDIMM1.203,204
All VREF traces should
have 10 mil trace width
M3 Circuit (Processor Generated SO-DIMM VREF_DQ)
M3
CD
22
2.2
U_
06
03
_6
.3V
6K
1
2
G
DS QD2BSS138_NL_SOT23-3
2
13
CD
16
0.1
U_
04
02
_1
6V
7K
1
2
CD
10
10
U_
06
03
_6
.3V
6M
1
2
CD
12
10
U_
06
03
_6
.3V
6M
1
2
RD31K_0402_1%
12
RD11K_0402_1%
12
CD
4
1U
_0
40
2_
6.3
V6
K
1
2
G
DS QD1BSS138_NL_SOT23-3
2
13
CD
2
0.1
U_
04
02
_1
6V
7K
1
2
CD
5
1U
_0
40
2_
6.3
V6
K
1
2
RD51K_0402_1%
12
CD
1
2.2
U_
06
03
_6
.3V
6K
1
2
RD6 10K_0402_5%1 2
CD
19
1U
_0
40
2_
6.3
V6
K
1
2
CD
18
1U
_0
40
2_
6.3
V6
K
1
2
CD
6
1U
_0
40
2_
6.3
V6
K
1
2
CD
7
10
U_
06
03
_6
.3V
6M
1
2
CD
21
0.1
U_
04
02
_1
6V
7K
1
2
JDIMM1
BELLW_80001-5021CONN@
VREF_DQ1
VSS12
VSS23
DQ44
DQ05
DQ56
DQ17
VSS38
VSS49
DQS#010
DM011
DQS012
VSS513
VSS614
DQ215
DQ616
DQ317
DQ718
VSS719
VSS820
DQ821
DQ1222
DQ923
DQ1324
VSS925
VSS1026
DQS#127
DM128
DQS129
RESET#30
VSS1131
VSS1232
DQ1033
DQ1434
DQ1135
DQ1536
VSS1337
VSS1438
DQ1639
DQ2040
DQ1741
DQ2142
VSS1543
VSS1644
DQS#245
DM246
DQS247
VSS1748
VSS1849
DQ2250
DQ1851
DQ2352
DQ1953
VSS1954
VSS2055
DQ2856
DQ2457
DQ2958
DQ2559
VSS2160
VSS2261
DQS#362
DM363
DQS364
VSS2365
VSS2466
DQ2667
DQ3068
DQ2769
DQ3170
VSS2571
VSS2672
A12/BC#83
A1184
A985
A786
VDD587
VDD688
A889
A690
CKE073
CKE174
VDD175
VDD276
NC177
A1578
BA279
A1480
VDD381
VDD482
A591
A492
VDD793
VDD894
A395
A296
A197
A098
VDD999
VDD10100
CK0101
CK1102
CK0#103
CK1#104
VDD11105
VDD12106
A10/AP107
BA1108
BA0109
RAS#110
VDD13111
VDD14112
WE#113
S0#114
CAS#115
ODT0116
VDD15117
VDD16118
A13119
ODT1120
S1#121
NC2122
VDD17123
VDD18124
NCTEST125
VREF_CA126
VSS27127
VSS28128
DQ32129
DQ36130
DQ33131
DQ37132
VSS29133
VSS30134
DQS#4135
DM4136
DQS4137
VSS31138
VSS32139
DQ38140
DQ34141
DQ39142
DQ35143
VSS33144
VSS34145
DQ44146
DQ40147
DQ45148
DQ41149
VSS35150
VSS36151
DQS#5152
DM5153
DQS5154
VSS37155
VSS38156
DQ42157
DQ46158
DQ43159
DQ47160
VSS39161
VSS40162
DQ48163
DQ52164
DQ49165
DQ53166
VSS41167
VSS42168
DQS#6169
DM6170
DQS6171
VSS43172
VSS44173
DQ54174
DQ50175
DQ55176
DQ51177
VSS45178
VSS46179
DQ60180
DQ56181
DQ61182
DQ57183
VSS47184
VSS48185
DQS#7186
DM7187
DQS7188
VSS49189
VSS50190
DQ58191
DQ62192
DQ59193
DQ63194
VSS51195
VSS52196
SA0197
EVENT#198
VDDSPD199
SDA200
SA1201
SCL202
VTT1203
VTT2204
G1205
G2206
CD
13
10
U_
06
03
_6
.3V
6M
@
1
2
CD
8
10
U_
06
03
_6
.3V
6M
1
2
CD
9
10
U_
06
03
_6
.3V
6M
1
2
RD7 10K_0402_5%1 2
CD
20
1U
_0
40
2_
6.3
V6
K
1
2
RD41K_0402_1%
12
CD
15
2.2
U_
06
03
_6
.3V
6K
1
2
CD
3
1U
_0
40
2_
6.3
V6
K
1
2
RD8 0_0402_5%@ 1 2
+
CD
14
33
0U
_S
X_
2V
Y~
D
1
2
RD9 0_0402_5%@ 1 2
CD
17
1U
_0
40
2_
6.3
V6
K
1
2
CD
11
10
U_
06
03
_6
.3V
6M
1
2
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_B_D57
DDR_CKE2_DIMMB
DDR_B_D58DDR_B_D59
DDR_B_D0DDR_B_D1
DDR_B_D2DDR_B_D3
DDR_B_D8
+V_DDR_REFB
DDR_B_D9
DDR_B_DQS#1DDR_B_DQS1
DDR_B_D10DDR_B_D11
DDR_B_D16DDR_B_D17
DDR_B_DQS#2DDR_B_DQS2
DDR_B_D18DDR_B_D19
DDR_B_D24DDR_B_D25
DDR_B_D26
DDR_B_MA15
DDR_B_D61
DDR_B_DQS#7DDR_B_DQS7
PCH_SMBDATAPCH_SMBCLK
DDR_B_D62DDR_B_D63
+VREF_CB
DDR_B_MA7
DDR_B_D52
M_ODT2
DDR_B_MA14
DDR_B_D37DDR_B_D36
DDR_B_MA6
DDR_B_D44
DDR_B_D54
DDR_B_D53
DDR_B_D46
DDR_CKE3_DIMMB
DDR_B_MA4
DDR_B_D45
DDR_B_D38
DDR_B_BS1
DDR_B_D55
DDR_B_D47
M_ODT3
M_CLK_DDR3
DDR_B_RAS#
M_CLK_DDR#3
DDR_B_MA2
DDR_B_DQS#5
DDR_B_MA11
DDR_B_D60
DDR_B_D39
DDR_B_MA0
DDR_B_DQS5
DDR_CS2_DIMMB#
DDR_B_D4DDR_B_D5
DDR_B_DQS#0DDR_B_DQS0
DDR_B_D22
DDR_B_D20
DDR3_DRAMRST#
DDR_B_D23
DDR_B_D21
DDR_B_DQS#3
DDR_B_D14
DDR_B_DQS3
DDR_B_D7DDR_B_D6
DDR_B_D15
DDR_B_D28DDR_B_D29
DDR_B_D30
DDR_B_D12DDR_B_D13
DDR_B_BS2
DDR_B_MA12DDR_B_MA9
DDR_B_MA8DDR_B_MA5
DDR_B_MA3DDR_B_MA1
M_CLK_DDR2M_CLK_DDR#2
DDR_B_MA10DDR_B_BS0
DDR_B_WE#DDR_B_CAS#
DDR_B_MA13DDR_CS3_DIMMB#
DDR_B_D32DDR_B_D33
DDR_B_DQS#4DDR_B_DQS4
DDR_B_D34DDR_B_D35
DDR_B_D40DDR_B_D41
DDR_B_D42DDR_B_D43
DDR_B_D48DDR_B_D49
DDR_B_DQS#6DDR_B_DQS6
DDR_B_D50DDR_B_D51
DDR_B_D56
DDR_B_D31DDR_B_D27
DDR_B_D[0..63]<7>
DDR_B_DQS[0..7]<7>
DDR_B_DQS#[0..7]<7>
DDR_B_MA[0..15]<7>
DDR_CS3_DIMMB#<7>
DDR_B_CAS#<7>DDR_B_WE#<7>
DDR_B_BS0<7>
M_CLK_DDR#2<7>M_CLK_DDR2<7>
DDR_CKE2_DIMMB<7>
DDR_B_BS2<7>
PCH_SMBDATA <6,11,14,28,29,32>PCH_SMBCLK <6,11,14,28,29,32>
M_CLK_DDR#3 <7>
DDR_B_BS1 <7>DDR_B_RAS# <7>
DDR_CS2_DIMMB# <7>M_ODT2 <7>
M_ODT3 <7>
M_CLK_DDR3 <7>
DDR_CKE3_DIMMB <7>
DDR3_DRAMRST# <7,11>
+1.5V
+1.5V
+0.75VS
+1.5V
+V_DDR_REFB
+3VS
+3VS
+1.5V
+V_DDR_REFB
+0.75VS
+1.5V
+1.5V
+0.75VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P 1.0
12 56Wednesday, February 01, 2012
2012/01/17 2013/01/16
Compal Electronics, Inc.
DDRIII DIMMB
Layout Note:Place near JDIMMB.203,204
Layout Note:Place near JDIMMB
All VREF traces should
have 10 mil trace width
Note:Check voltage tolerance of VREF_DQ at the DIMM socket
CD
27
2.2
U_
06
03
_6
.3V
6K
1
2
RD171K_0402_1%
12
CD
29
1U
_0
40
2_
6.3
V6
K
1
2
RD
20
10
K_
04
02
_5
%
12
CD
32
10
U_
06
03
_6
.3V
6M
1
2
CD
31
1U
_0
40
2_
6.3
V6
K
1
2
CD
45
1U
_0
40
2_
6.3
V6
K
1
2
CD
30
1U
_0
40
2_
6.3
V6
K
1
2
CD
37
10
U_
06
03
_6
.3V
6M
1
2
+
CD
39
33
0U
_S
X_
2V
Y~
D
@
1
2
RD161K_0402_1%
12
CD
44
1U
_0
40
2_
6.3
V6
K
1
2
CD
26
0.1
U_
04
02
_1
6V
7K
1
2
CD
28
1U
_0
40
2_
6.3
V6
K
1
2
RD1910K_0402_5%
12
CD
41
0.1
U_
04
02
_1
6V
7K
1
2
RD151K_0402_1%
12
CD
40
2.2
U_
06
03
_6
.3V
6K
1
2
CD
43
1U
_0
40
2_
6.3
V6
K
1
2
RD181K_0402_1%
12
CD
36
10
U_
06
03
_6
.3V
6M
1
2
CD
34
10
U_
06
03
_6
.3V
6M
1
2
CD
42
1U
_0
40
2_
6.3
V6
K
1
2
CD
47
2.2
U_
06
03
_6
.3V
6K
1
2
JDIMM2
BELLW_80001-1021CONN@
VREF_DQ1
VSS3
DQ05
DQ17
VSS9
DM011
VSS13
DQ215
DQ317
VSS19
DQ821
DQ923
VSS25
DQS1#27
DQS129
VSS31
DQ1033
DQ1135
VSS37
DQ1639
VSS2
DQ44
DQ56
VSS8
DQS0#10
DQS012
VSS14
DQ616
DQ718
VSS20
DQ1222
DQ1324
VSS26
DM128
RESET#30
VSS32
DQ1434
DQ1536
VSS38
DQ2040
DQ1741
VSS43
DQS2#45
DQS247
VSS49
DQ1851
DQ1953
VSS55
DQ2457
DQ2559
VSS61
DM363
VSS65
DQ2667
DQ2769
VSS71
CKE073
VDD75
NC77
BA279
VDD81
A12/BC#83
A985
VDD87
A889
A591
VDD93
A395
A197
VDD99
CK0101
CK0#103
VDD105
A10/AP107
BA0109
VDD111
WE#113
CAS#115
VDD117
A13119
S1#121
VDD123
TEST125
VSS127
DQ32129
DQ33131
VSS133
DQS4#135
DQS4137
VSS139
DQ34141
DQ35143
VSS145
DQ40147
DQ41149
VSS151
DM5153
VSS155
DQ42157
DQ43159
VSS161
DQ48163
DQ49165
VSS167
DQS6#169
DQS6171
VSS173
DQ50175
DQ51177
VSS179
DQ56181
DQ57183
VSS185
DM7187
VSS189
DQ58191
DQ59193
VSS195
SA0197
VDDSPD199
DQ2142
VSS44
DM246
VSS48
DQ2250
DQ2352
VSS54
DQ2856
DQ2958
VSS60
DQS3#62
DQS364
VSS66
DQ3068
DQ3170
VSS72
CKE174
VDD76
A1578
A1480
VDD82
A1184
A786
VDD88
A690
A492
VDD94
A296
A098
VDD100
CK1102
CK1#104
VDD106
BA1108
RAS#110
VDD112
S0#114
ODT0116
VDD118
ODT1120
NC122
VDD124
VREF_CA126
VSS128
DQ36130
DQ37132
VSS134
DM4136
VSS138
DQ38140
DQ39142
VSS144
DQ44146
DQ45148
VSS150
DQS5#152
DQS5154
VSS156
DQ46158
DQ47160
VSS162
DQ52164
DQ53166
VSS168
DM6170
VSS172
DQ54174
DQ55176
VSS178
DQ60180
DQ61182
VSS184
DQS7#186
DQS7188
VSS190
DQ62192
DQ63194
VSS196
EVENT#198
SDA200
SA1201
VTT203
GND1205
SCL202
VTT204
GND2206
BOSS1207
BOSS2208C
D4
6
0.1
U_
04
02
_1
6V
7K
1
2
CD
33
10
U_
06
03
_6
.3V
6M
1
2
CD
38
10
U_
06
03
_6
.3V
6M
@
1
2
CD
35
10
U_
06
03
_6
.3V
6M
1
2
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCH_RTCX1
PCH_RTCX2
PCH_RTCX1
PCH_RTCRST#
PCH_SRTCRST#
SM_INTRUDER#
PCH_INTVRMEN
SM_INTRUDER#
HDA_SPKR
PCH_JTAG_TCK
PCH_SATALED#
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
HDA_SYNC
HDA_RST#
HDA_SDIN0
HDA_SDOUT
HDD_DET#_R
PCH_RTCX2
HDA_BIT_CLK
PCH_JTAG_TDO PCH_JTAG_TDIPCH_JTAG_TMS
PCH_JTAG_TCK
PCH_SPI_WP#
PCH_SPI_HOLD#
SATA_PTX_DRX_P0SATA_PTX_DRX_N0
LPC_AD2
LPC_FRAME#
LPC_AD0
LPC_AD3
LPC_AD1
SERIRQ
SATA_PTX_DRX_N2SATA_PTX_DRX_P2
BBS_BIT0_R
SATA_COMP
RBIAS_SATA3
SATA3_COMP
HDA_BIT_CLK
HDA_RST#
HDA_SDOUT
HDA_SDOUT
PCH_SPI_CLK
PCH_SPI_SI
PCH_SPI_SO
PCH_SPI_CS0#
HDA_SYNC
SERIRQ
HDA_SPKR
PCH_INTVRMEN
HDD_DET#
HDA_SDOUT
HDA_SYNC
PCH_SATALED#PCH_INTVRMEN
HDA_BIT_CLK
HDA_SDOUT
HDA_SYNC_R SATA_PTX_DRX_P1SATA_PTX_DRX_N1
PCH_SPI_CS0#_RPCH_SPI_SO_LPCH_SPI_SO
PCH_SPI_CS0#
PCH_SPI_SI_L PCH_SPI_SIPCH_SPI_CLKPCH_SPI_WP#
PCH_SPI_HOLD#PCH_SPI_CLK_L
PCH_SPI_SOPCH_SPI_CLK
PCH_SPI_SI_R
PCH_SPI_CS1#_RPCH_SPI_CS1#
PCH_SPI_SIPCH_SPI_WP#
PCH_SPI_HOLD#PCH_SPI_SO_RPCH_SPI_CLK_R
PCH_SPI_CS1#
HDD_DET#
PCH_RTCX1
HDA_SPKR<30>
HDA_SDIN0<30>
SERIRQ <24>
SATA_PRX_DTX_P0 <29>
SATA_PTX_DRX_N0_C <29>SATA_PTX_DRX_P0_C <29>
SATA_PRX_DTX_N0 <29>
LPC_AD0 <24>LPC_AD1 <24>LPC_AD2 <24>LPC_AD3 <24>
LPC_FRAME# <24>
SATA_PRX_DTX_P2 <29>
SATA_PTX_DRX_N2_C <29>SATA_PTX_DRX_P2_C <29>
SATA_PRX_DTX_N2 <29>
HDA_SDOUT_AUDIO<30>
HDA_RST_AUDIO#<30>
HDA_BITCLK_AUDIO<30>
PCH_SATALED# <32>
ME_EN<24>
PCH_JTAG_TCK<6>
PCH_JTAG_TMS<6>
PCH_JTAG_TDI<6>
PCH_JTAG_TDO<6>
HDA_SYNC_AUDIO<30>
SATA_PRX_DTX_N1 <32>
SATA_PTX_DRX_P1_C <32>SATA_PTX_DRX_N1_C <32>
SATA_PRX_DTX_P1 <32>
HDD_DET# <29>
PCH_RTCX1_R<31>
+RTCVCC
+RTCVCC
+3V_PCH +3V_PCH+3V_PCH
+1.05VS_VCC_SATA
+1.05VS_SATA3
+3V_PCH
+5VS
+3VS
+RTCVCC
+3VS
+3V_PCH
+3V_PCH
+CHGRTC +3VLP
+3VS
+CHGRTC
+RTCBATT
+RTCVCC
+3V_PCH
+3V_PCH
+3V_PCH
+3V_PCH+3V_PCH
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P1.0
13 56Wednesday, February 01, 2012
2012/01/17 2013/01/16Compal Electronics, Inc.
PCH (1/8) SATA,HDA,SPI, LPC
ME CMOS
CMOS
CLP1 & CLP2 place near DIMM
HDD
ODD
keep away hot spot
SPI ROM FOR ME ( 4MByte )
LOW=DefaultHIGH=No Reboot*
HDA_SDOME debug mode , this signal has a weak internal PD
L=>security measures defined in the Flash
Descriptor will be in effect (default)
H=>Flash Descriptor Security will be overridden
H:Integrated VRM enableL:Integrated VRM disable
INTVRMEN
*
HDA_SYNC
This signal has a weak internal pull-down
On Die PLL VR is supplied by
1.5V when smapled high
1.8V when sampled low
Needs to be pulled High for Huron River platfrom
*Low = DisabledHigh = Enabled
W=20milsW=20mils
W=20mils
RTC Battery
Reserve for RF please close to UH1
SA00005AG1L
SA00005AG1L
mSATA
SPI ROM FOR WIN8( 2MByte )
NEC flash issue.
close to YH1
EON EN25Q32B-104HIP_SO8
EON EN25QH16-104HIP_SO8
RH24
100_0402_1%
12
RH40 3.3K_0402_5%1 2
RH7 33_0402_5% 1 2
RH38 3.3K_0402_5%1 2
CH3
18P
_0402_50V
8J
1
2
CH98
0.1
U_0402_16V
7K
1
2
RH37 33_0402_5%12
RH17 1K_0402_5%@ 12
RH39 33_0402_5%12
RH22 49.9_0402_1%1 2
CLRP1SHORT PADS
12
RH5 33_0402_5% 1 2
DH1
BAT54CW_SOT323-3
23
1
RH28 750_0402_1%~D 1 2
RH10 10K_0402_5%12
RH265 33_0402_5%12
CH61U_0603_10V6K
1
2
RH13330K_0402_5%
12
CH418P_0402_50V8J
1
2
UH6
EN25Q32B-104HIP_SO8
CS#1
SO/SIO12
WP#3
GND4
VCC8
HOLD#7
SCLK6
SI/SIO05
CH10 0.01U_0402_16V7K1 2
RH18
200_0402_5%
@
12
UH1
BD82HM77 QPRG C1 BGA 989P PCH
@
RH8 1M_0402_5%1 2
RH30 0_0402_5%
GCLK@
1 2
CH7 0.01U_0402_16V7K1 2
RH14 10K_0402_5%12
RH333.3K_0402_5%
@
12
CH11
0.1
U_0402_16V
7K
1
2
RH23 1K_0402_5%@ 12
G
DS
QH1 BSS138_SOT23
2
13
RH27 33_0402_5%12
CH121U_0603_10V6K
1
2
CH17 0.01U_0402_16V7K1 2
CH99
10P_0402_50V8J@
1
2
RH35 51_0402_5% 1 2
RH1 10M_0402_5%1 2
JP12
JUMP_43X39
11
22
RH16
330K_0402_5%
@ 12
CH1 10P_0402_50V8J
@
12
RH26
100_0402_1%
12
RH266 33_0402_5%12
CH51U_0603_10V6K
1
2
RH264 0_0402_5%1 2
RH19
200_0402_5%
@
12
RH268 0_0402_5%1 2
YH1
32.768KHZ_12.5PF_9H03200019
1 2
RH2633.3K_0402_5%
@
12
RH11 1K_0402_1%1 2
RH21 37.4_0402_1%1 2
RH6 33_0402_5% 1 2
CH9 0.01U_0402_16V7K1 2
RH267 33_0402_5%12
RH34
1K_0402_5%
12
RH15 33_0402_5% 1 2
RH4 20K_0402_5%1 2
CH8 0.01U_0402_16V7K1 2
RH25100_0402_1%
12
CLRP2SHORT PADS
12
CH18 0.01U_0402_16V7K1 2
RH2623.3K_0402_5%
@
12
RH2910K_0402_5%12
UH2
EN25QH16-104HIP_SO8
CS#1
SO2
WP#3
GND4
VCC8
HOLD#7
SCLK6
SI5
RH36 0_0402_5%1 2
RH3 20K_0402_5%1 2
CH2 10P_0402_50V8J
@
12
RH32 1K_0402_5% 12
RH21M_0402_5%
1 2
RH12 10K_0402_5%12
RH9 0_0402_5%@1 2
RTC
IHDA
SATA
LPC
SPI
JTAG
SATA 6G
UH1A
BD82HM77 QPRG C1 BGA 989P PCH
RTCX1A20
RTCX2C20
INTVRMENC17
INTRUDER#K22
HDA_BCLKN34
HDA_SYNCL34
HDA_RST#K34
HDA_SDIN0E34
HDA_SDIN1G34
HDA_SDIN2C34
HDA_SDOA36
SATALED#P3
FWH0 / LAD0C38
FWH1 / LAD1A38
FWH2 / LAD2B37
FWH3 / LAD3C37
LDRQ1# / GPIO23K36
FWH4 / LFRAME#D36
LDRQ0#E36
RTCRST#D20
HDA_SDIN3A34
HDA_DOCK_EN# / GPIO33C36
HDA_DOCK_RST# / GPIO13N32
SRTCRST#G22
SATA0RXNAM3
SATA0RXPAM1
SATA0TXNAP7
SATA0TXPAP5
SATA1RXNAM10
SATA1RXPAM8
SATA1TXNAP11
SATA1TXPAP10
SATA2RXNAD7
SATA2RXPAD5
SATA2TXNAH5
SATA2TXPAH4
SATA3RXNAB8
SATA3RXPAB10
SATA3TXNAF3
SATA3TXPAF1
SATA4RXNY7
SATA4RXPY5
SATA4TXNAD3
SATA4TXPAD1
SATA5RXNY3
SATA5RXPY1
SATA5TXNAB3
SATA5TXPAB1
SATAICOMPIY10
SPI_CLKT3
SPI_CS0#Y14
SPI_CS1#T1
SPI_MOSIV4
SPI_MISOU3
SATA0GP / GPIO21V14
SATA1GP / GPIO19P1
JTAG_TCKJ3
JTAG_TMSH7
JTAG_TDIK5
JTAG_TDOH1
SERIRQV5
SPKRT10
SATAICOMPOY11
SATA3COMPIAB13
SATA3RCOMPOAB12
SATA3RBIASAH1
RH20
200_0402_5%
@
12
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SMBCLK
SMBDATA
XTAL25_OUT
XTAL25_IN
XTAL25_INXTAL25_OUT
SMBCLK
SMBDATA
SML1CLK
SML1DATA
SML0CLK
SML0DATA
DRAMRST_CNTRL_PCH
SML1CLK
SML1DATA
SML0CLK
SML0DATA
XCLK_RCOMP
CLK_PCI_LPBACK
CLK_CPU_DMICLK_CPU_DMI#
CLK_CPU_ITP#
GPIO46
CLK_BCLK_ITPCLK_BCLK_ITP#
CLK_CPU_ITP
GPIO56
DRAMRST_CNTRL_PCH
CLK_BCLK_ITP
CLK_PCH_14M
CLKIN_DOT96CLKIN_DOT96#
CLKIN_DMICLKIN_DMI#
CLKIN_SATACLKIN_SATA#
CLKIN_DMI#CLKIN_DMI
CLKIN_DMI2#CLKIN_DMI2
CLKIN_DOT96CLKIN_DOT96#
CLKIN_SATACLKIN_SATA#
CLK_PCH_14M
SMBCLK
SMBDATA
SML1CLK
SML1DATA
PCIE_PRX_WLANTX_P2PCIE_PRX_WLANTX_N2
PCIE_PTX_WLANRX_P2_CPCIE_PTX_WLANRX_N2_C
PCIE_PTX_LANRX_P1_CPCIE_PTX_LANRX_N1_CPCIE_PRX_LANTX_P1PCIE_PRX_LANTX_N1
PCIE_PRX_EXPTX_P3PCIE_PRX_EXPTX_N3
PCIE_PTX_EXPRX_P3_CPCIE_PTX_EXPRX_N3_C
GPIO26
PCIE_EXP
EXPCLK_REQ#
PCIE_EXP#
GPIO44
PCIE_WLANPCIE_WLAN#
WLAN_CLKREQ#
GPIO25
PCIE_LANPCIE_LAN#
LAN_CLKREQ#
CLKIN_DMI2CLKIN_DMI2#
PEG_A_CLKRQ#
CLK_PEG_VGACLK_PEG_VGA#
SMBALERT#
GPIO45
CLK_PCH_14M
CLK_PCI_LPBACK
CLK_14M_R
CLK_FLEX0
DGPU_PRSNT#
PCH_HOT#
PCH_HOT#
SMBALERT#
CLK_LAN_25M_R
CLK_LAN_25M
XTAL25_IN
PCH_SMLCLK <24>
PCH_SMLDATA <24>
CLK_CPU_DMI# <6>CLK_CPU_DMI <6>
CLK_CPU_ITP#<6>CLK_CPU_ITP<6>
DRAMRST_CNTRL_PCH <7>
CLK_RES_ITP#<8>CLK_RES_ITP<8>
CLK_PCI_LPBACK <16>
PCIE_PRX_WLANTX_N2<32>
PCIE_PTX_WLANRX_N2<32>
PCIE_PRX_WLANTX_P2<32>
PCIE_PTX_WLANRX_P2<32>
PCIE_PRX_LANTX_N1<32>
PCIE_PTX_LANRX_N1<32>
PCIE_PRX_LANTX_P1<32>
PCIE_PTX_LANRX_P1<32>
PCIE_PTX_EXPRX_N3<28>
PCIE_PRX_EXPTX_N3<28>
PCIE_PTX_EXPRX_P3<28>
PCIE_PRX_EXPTX_P3<28>
CLK_PCIE_EXP<28>CLK_PCIE_EXP#<28>
EXPCLK_REQ#<28>
CLK_PCIE_WLAN#<32>CLK_PCIE_WLAN<32>
WLAN_CLKREQ#<32>
CLK_PCIE_LAN#<32>CLK_PCIE_LAN<32>
LAN_CLKREQ#<32>
PCH_SMBCLK <6,11,12,28,29,32>
PCH_SMBDATA <6,11,12,28,29,32>
CLK_PEG_VGA <34>CLK_PEG_VGA# <34>
PEG_A_CLKRQ# <35>
PCH_HOT# <24>
CLK_LAN_25M <32>
LAN_X1<31>
PCH_X1<31>
+3V_PCH
+1.05VS_VCCDIFFCLKN
+3V_PCH
+3V_PCH
+3VS
+3V_PCH
+3V_PCH
+3VS
+3V_PCH
+3VS
+3V_PCH
+3V_PCH
+3V_PCH
+3VS
+3V_PCH
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P1.0
14 56Wednesday, February 01, 2012
2012/01/17 2013/01/16Compal Electronics, Inc.
PCH (2/8) PCIE, SMBUS, CLK
Total device
MEMORY
20090512
add double mosfet prevent
ATI M92 electric leakage
If use extenal CLK gen, please place close to CLK genelse, please place close to PCH
Express Card --->
WLAN (Mini Card 1)--->
10/100/1G LAN --->
10/100/1G LAN --->
Express Card --->
WLAN (Mini Card 1)--->
No support iAMT
Reserve for EMI please close to
UH1
*PCIE REQ power rail:
suspend: 0 3 4 5 6 7
core: 1 2
close to RH270
close to YH2
QH3A
DMN66D0LDW-7_SOT363-6
61
2
RH270 22_0402_5%@ 12
RH94 0_0402_5%@ 12
RH50 2.2K_0402_5%1 2
CH21 0.1U_0402_10V7K~D1 2
CH20 0.1U_0402_10V7K~D1 2
RH92 0_0402_5%12
CH16 0.1U_0402_10V7K~D1 2
RH46 2.2K_0402_5%1 2
RH71
2.2K_0402_5%
12
RH76 0_0402_5%12
CH19 0.1U_0402_10V7K~D1 2
RH59 10K_0402_5%1 2
QH2B
DMN66D0LDW-7_SOT363-6
3
5
4
RH54 10K_0402_5%1 2
CH15 0.1U_0402_10V7K~D1 2
RH64
10K_0402_5%
12
RH65
33_0402_5%
@
12
RH891M_0402_5%12
RH31 0_0402_5%
GCLK@
1 2
YH2
25M
HZ
_20P
F_F
SX
3M
-25.M
20F
DO
OS
C1
OS
C3
GN
D2
GN
D4
RH60 10K_0402_5%1 2PCI-E*
CLOCKS
FLEX CLOCKS
SMBUS
Controller
Link
UH1B
BD82HM77 QPRG C1 BGA 989P PCH
PERN1BG34
PERP1BJ34
PERN2BE34
PERP2BF34
PERN3BG36
PERP3BJ36
PERN4BF36
PERP4BE36
PERN5BG37
PERP5BH37
PERN6BJ38
PERP6BG38
PERN7BG40
PERP7BJ40
PERN8BE38
PERP8BC38
PETN1AV32
PETP1AU32
PETN2BB32
PETP2AY32
PETN3AV34
PETP3AU34
PETN4AY34
PETP4BB34
PETN5AY36
PETP5BB36
PETN6AU36
PETP6AV36
PETN7AY40
PETP7BB40
PETN8AW38
PETP8AY38
CLKOUT_PCIE0NY40
CLKOUT_PCIE0PY39
CLKOUT_PCIE1NAB49
CLKOUT_PCIE1PAB47
CLKOUT_PCIE2NAA48
CLKOUT_PCIE2PAA47
CLKOUT_PCIE3NY37
CLKOUT_PCIE3PY36
CLKOUT_PCIE4NY43
CLKOUT_PCIE4PY45
CLKOUT_PCIE5NV45
CLKOUT_PCIE5PV46
CLKIN_GND1_NBJ30
CLKIN_GND1_PBG30
CLKIN_DMI_NBF18
CLKIN_DMI_PBE18
CLKIN_DOT_96NG24
CLKIN_DOT_96PE24
CLKIN_SATA_NAK7
CLKIN_SATA_PAK5
XTAL25_INV47
XTAL25_OUTV49
REFCLK14INK45
CLKIN_PCILOOPBACKH45
CLKOUT_PEG_A_NAB37
CLKOUT_PEG_A_PAB38
PEG_A_CLKRQ# / GPIO47M10
PCIECLKRQ0# / GPIO73J2
PCIECLKRQ1# / GPIO18M1
PCIECLKRQ2# / GPIO20V10
PCIECLKRQ3# / GPIO25A8
PCIECLKRQ4# / GPIO26L12
PCIECLKRQ5# / GPIO44L14
CLKOUTFLEX0 / GPIO64K43
CLKOUTFLEX1 / GPIO65F47
CLKOUTFLEX2 / GPIO66H47
CLKOUTFLEX3 / GPIO67K49
CLKOUT_DMI_NAV22
CLKOUT_DMI_PAU22
PEG_B_CLKRQ# / GPIO56E6
CLKOUT_PEG_B_PAB40
CLKOUT_PEG_B_NAB42
XCLK_RCOMPY47
CLKOUT_DP_PAM13
CLKOUT_DP_NAM12
CLKOUT_PCIE6NV40
CLKOUT_PCIE6PV42
PCIECLKRQ7# / GPIO46K12
CLKOUT_PCIE7NV38
CLKOUT_PCIE7PV37
CLKOUT_ITPXDP_NAK14
CLKOUT_ITPXDP_PAK13
SMBALERT# / GPIO11E12
SMBCLKH14
SMBDATAC9
SML0ALERT# / GPIO60A12
SML0CLKC8
SML0DATAG12
SML1ALERT# / PCHHOT# / GPIO74C13
SML1CLK / GPIO58E14
SML1DATA / GPIO75M16
CL_CLK1M7
CL_DATA1T11
CL_RST1#P10
PCIECLKRQ6# / GPIO45T13
RH26110K_0402_5%DIS@
12
RH63
33_0402_5%
@
12
RH12522_0402_5%1 2
RH61 10K_0402_5%1 2
RH72
2.2K_0402_5%
12
RH269 10K_0402_5%UMA@
12
RH78
0_0402_5%@1 2
RH66 10K_0402_5%1 2
RH83 10K_0402_5%1 2
RH41 0_0402_5%
GCLK@
1 2
CH28
27P
_0402_50V
8J
1
2
RH52 10K_0402_5%1 2
CH25
22P_0402_50V8J~D
@
1 2
RH75 0_0402_5%12
RH90 10K_0402_5%1 2
RH69 10K_0402_5%12
RH88 10K_0402_5%1 2
RH82
0_0402_5%@1 2
RH91 0_0402_5%12
CH22 0.1U_0402_10V7K~D1 2
RH62 10K_0402_5%1 2
RH67 0_0402_5%1 2
QH3B
DMN66D0LDW-7_SOT363-6
3
5
4
RH68 0_0402_5%1 2
T53 PAD~D@
RH85 90.9_0402_1%1 2
RH81 10K_0402_5%12
RH55 10K_0402_5%1 2
RH84 10K_0402_5%1 2
RH53 1K_0402_5%
1 2
QH2A
DMN66D0LDW-7_SOT363-6
6 1
2
RH77 10K_0402_5%12
RH56 10K_0402_5%1 2
CH27
27P
_0402_50V
8J
1
2
RH57 10K_0402_5%1 2
RH47 2.2K_0402_5% 1 2
T54 PAD~D@
RH58 10K_0402_5%1 2
RH49 2.2K_0402_5% 1 2
CH26
22P_0402_50V8J~D
@
1 2
RH86 10K_0402_5%1 2
RH80 0_0402_5%12
RH79 0_0402_5%12
RH93 0_0402_5%@ 12
RH45 2.2K_0402_5%1 2
RH74 10K_0402_5%12
RH51 2.2K_0402_5%1 2
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DMI_IRCOMP
EC_RSMRST#
GPIO72
AC_PRESENT_R
DMI_CRX_PTX_N1
DMI_CRX_PTX_P0
DMI_CRX_PTX_P3
DMI_CTX_PRX_P0
DMI_CRX_PTX_N2
DMI_CRX_PTX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_N2DMI_CTX_PRX_N3
DMI_CTX_PRX_P3
DMI_CRX_PTX_P2
DMI_CTX_PRX_N1
DMI_CRX_PTX_N0
DMI_CTX_PRX_N0
DMI_CTX_PRX_P1
DMI_CRX_PTX_N3
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC1
FDI_LSYNC0
FDI_CTX_PRX_N0FDI_CTX_PRX_N1FDI_CTX_PRX_N2FDI_CTX_PRX_N3FDI_CTX_PRX_N4FDI_CTX_PRX_N5FDI_CTX_PRX_N6FDI_CTX_PRX_N7
FDI_CTX_PRX_P0FDI_CTX_PRX_P1FDI_CTX_PRX_P2FDI_CTX_PRX_P3FDI_CTX_PRX_P4
FDI_CTX_PRX_P6FDI_CTX_PRX_P7
FDI_CTX_PRX_P5
RI#
XDP_DBRESET#
RBIAS_CPY
SYS_PWROK_R
SUSWARN#
PM_DRAM_PWRGD
PCH_RSMRST#_R
DSWODVREN
WAKE#
PM_CLKRUN#
PM_SLP_S5#
PM_SLP_S4#
PM_SLP_S3#
PM_SLP_SUS#
H_PM_SYNC
SUSCLK
SUSWARN#
CRT_IREF
PCH_ENVDD
DSWODVREN
RI#
PCIE_WAKE#
CTRL_CLK
CTRL_DATA
DSWODVREN
SUS_STAT#
LVDS_IBG
LVDS_DDC_CLK
LVDS_DDC_DATA
PM_CLKRUN#
GPIO72
PM_CLKRUN#
CTRL_CLKCTRL_DATA
LVDS_IBG
PCH_ENVDDENBKL
LVDS_DDC_CLKLVDS_DDC_DATA
ENBKL
LVDS_B0+
LVDS_B1-LVDS_B2-
LVDS_B1+LVDS_B2+
LVDS_B0-
LVDS_A1-LVDS_A2-
LVDS_A0+
LVDS_A2+
LVDS_A0-
LVDS_A1+
LVDS_ACLK-LVDS_ACLK+
LVDS_BCLK-LVDS_BCLK+
SYS_PWROKPCH_PWROK
SYS_PWROK
SUSCLK
HDMI_A2N_VGAHDMI_A2P_VGAHDMI_A1N_VGAHDMI_A1P_VGAHDMI_A0N_VGAHDMI_A0P_VGAHDMI_A3N_VGAHDMI_A3P_VGA
HDMI_DET
PCH_SDVO_CTRLDATA
PCH_SDVO_CTRLCLK
CRT_DDC_DATACRT_DDC_CLK
HSYNCVSYNC
CRT_BCRT_GCRT_R
CRT_B
CRT_G
CRT_R
CRT_DDC_CLK
CRT_DDC_DATA
PCH_RSMRST#_RPCH_DPWROK
AC_PRESENT_R
WAKE#
DMI_CTX_PRX_N0<5>
DMI_CRX_PTX_N2<5>
DMI_CTX_PRX_N1<5>
DMI_CTX_PRX_N3<5>DMI_CTX_PRX_N2<5>
DMI_CTX_PRX_P0<5>DMI_CTX_PRX_P1<5>
DMI_CTX_PRX_P3<5>DMI_CTX_PRX_P2<5>
DMI_CRX_PTX_N3<5>
DMI_CRX_PTX_N1<5>DMI_CRX_PTX_N0<5>
DMI_CRX_PTX_P2<5>DMI_CRX_PTX_P3<5>
DMI_CRX_PTX_P1<5>DMI_CRX_PTX_P0<5>
FDI_CTX_PRX_N0 <5>FDI_CTX_PRX_N1 <5>FDI_CTX_PRX_N2 <5>FDI_CTX_PRX_N3 <5>FDI_CTX_PRX_N4 <5>FDI_CTX_PRX_N5 <5>FDI_CTX_PRX_N6 <5>FDI_CTX_PRX_N7 <5>
FDI_CTX_PRX_P0 <5>FDI_CTX_PRX_P1 <5>FDI_CTX_PRX_P2 <5>FDI_CTX_PRX_P3 <5>FDI_CTX_PRX_P4 <5>FDI_CTX_PRX_P5 <5>FDI_CTX_PRX_P6 <5>FDI_CTX_PRX_P7 <5>
FDI_FSYNC1 <5>
FDI_LSYNC0 <5>
FDI_FSYNC0 <5>
FDI_INT <5>
FDI_LSYNC1 <5>
XDP_DBRESET#<6>
PM_DRAM_PWRGD<6>
EC_RSMRST#<24>
PBTN_OUT#<6,24>
PCIE_WAKE# <24,28,32>
H_PM_SYNC <6>
PM_SLP_S3# <24,28>
PM_SLP_S4# <24>
PM_SLP_S5# <24>
PCH_PWROK<6,24> SUSCLK_R <24>
ENBKL<24>PCH_ENVDD<22>
VGA_PWM<22>
LVDS_DDC_DATA<22>LVDS_DDC_CLK<22>
LVDS_B1-<22>
LVDS_B1+<22>
LVDS_B2-<22>
LVDS_B2+<22>
LVDS_B0+<22>
LVDS_B0-<22>
LVDS_A1-<22>
LVDS_A1+<22>
LVDS_A2-<22>
LVDS_A2+<22>
LVDS_A0-<22>
LVDS_A0+<22>
LVDS_ACLK+<22>LVDS_ACLK-<22>
LVDS_BCLK+<22>LVDS_BCLK-<22>
VGATE<6,50>
PCH_PWROK<6,24>
SYS_PWROK <6>
HDMI_A3N_VGA <23>HDMI_A3P_VGA <23>
HDMI_A2N_VGA <23>HDMI_A2P_VGA <23>
HDMI_A1P_VGA <23>HDMI_A1N_VGA <23>
HDMI_A0P_VGA <23>HDMI_A0N_VGA <23>
HDMI_DET <23>
PCH_SDVO_CTRLDATA <23>PCH_SDVO_CTRLCLK <23>
CRT_R<21>CRT_G<21>CRT_B<21>
CRT_VSYNC<21>CRT_HSYNC<21>
CRT_DDC_DATA<21>CRT_DDC_CLK<21>
ACIN<24,35,43,44>
+1.05VS
+3V_PCH
+3VS
+RTCVCC
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P1.0
15 56Wednesday, February 01, 2012
2012/01/17 2013/01/16
Compal Electronics, Inc.
PCH (3/8) DMI,FDI,PM,GFX,DP
4mil width and placewithin 500mil of the PCH
If not using integratedLAN,signal may be left as NC.
Can be left NC when IAMT isnot support on the platfrom
H:EnableL:Disable
DSWODVREN - On Die DSW VR Enable
*
Compal Electronics, Inc.
Check EC for S3 S4 LED
mDP
HDMI
DMC
Reserve for RF please close to UH1
RH235 150_0402_1%1 2
RH236 150_0402_1%1 2
RH202 33_0402_5%1 2
DMI
FDI
System Power Management
UH1C
BD82HM77 QPRG C1 BGA 989P PCH
DMI0RXNBC24
DMI1RXNBE20
DMI2RXNBG18
DMI3RXNBG20
DMI0RXPBE24
DMI1RXPBC20
DMI2RXPBJ18
DMI3RXPBJ20
DMI0TXNAW24
DMI1TXNAW20
DMI2TXNBB18
DMI3TXNAV18
DMI0TXPAY24
DMI1TXPAY20
DMI2TXPAY18
DMI3TXPAU18
DMI_ZCOMPBJ24
DMI_IRCOMPBG25
FDI_RXN0BJ14
FDI_RXN1AY14
FDI_RXN2BE14
FDI_RXN3BH13
FDI_RXN4BC12
FDI_RXN5BJ12
FDI_RXN6BG10
FDI_RXN7BG9
FDI_RXP0BG14
FDI_RXP1BB14
FDI_RXP2BF14
FDI_RXP3BG13
FDI_RXP4BE12
FDI_RXP5BG12
FDI_RXP6BJ10
FDI_RXP7BH9
FDI_FSYNC0AV12
FDI_FSYNC1BC10
FDI_LSYNC0AV14
FDI_LSYNC1BB10
FDI_INTAW16
PMSYNCHAP14
SLP_SUS#G16
SLP_S3#F4
SLP_S4#H4
SLP_S5# / GPIO63D10
SYS_RESET#K3
SYS_PWROKP12
PWRBTN#E20
RI#A10
WAKE#B9
SUS_STAT# / GPIO61G8
SUSCLK / GPIO62N14
ACPRESENT / GPIO31H20
BATLOW# / GPIO72E10
PWROKL22
CLKRUN# / GPIO32N3
SUSWARN#/SUSPWRDNACK/GPIO30K16
RSMRST#C21
DRAMPWROKB13
SLP_LAN# / GPIO29K14
APWROKL10
DPWROKE22
DMI2RBIASBH21
SLP_A#G10
DSWVRMENA18
SUSACK#C12
RH99 49.9_0402_1%1 2
RH100 750_0402_1%~D1 2
RH118 10K_0402_5%@1 2
CH30
0.1U_0402_16V7K
1
2
RH239 2.2K_0402_5%@1 2
RH106 0_0402_5%1 2
RH137 2.2K_0402_5%1 2
RH107 0_0402_5%12
T57PAD~D
RH238 2.2K_0402_5%@1 2UH3
MC74VHC1G08DFT2G_SC70-5
IN11
IN22
OUT4
VC
C5
GN
D3
RH116 10K_0402_5%1 2
LVDS
Digital Display Interface
CRT
UH1D
BD82HM77 QPRG C1 BGA 989P PCH
L_BKLTCTLP45
L_BKLTENJ47
L_CTRL_CLKT45
L_CTRL_DATAP39
L_DDC_CLKT40
L_DDC_DATAK47
L_VDD_ENM45
LVDSA_CLK#AK39
LVDSA_CLKAK40
LVDSA_DATA#0AN48
LVDSA_DATA#1AM47
LVDSA_DATA#2AK47
LVDSA_DATA#3AJ48
LVDSA_DATA0AN47
LVDSA_DATA1AM49
LVDSA_DATA2AK49
LVDSA_DATA3AJ47
LVDSB_CLK#AF40
LVDSB_CLKAF39
LVDSB_DATA#0AH45
LVDSB_DATA#1AH47
LVDSB_DATA#2AF49
LVDSB_DATA#3AF45
LVDSB_DATA0AH43
DDPB_0NAV42
DDPB_1NAV45
LVD_VREFHAE48
LVD_VREFLAE47
DDPD_2NBF42
DDPD_3NBJ42
DDPB_2NAU48
DDPB_3NAV47
DDPC_0NAY47
DDPC_1NAY43
DDPC_2NBA47
DDPC_3NBB47
DDPD_0NBB43
DDPD_1NBF44
DDPB_0PAV40
DDPB_1PAV46
DDPD_2PBE42
DDPD_3PBG42
DDPB_2PAU47
DDPB_3PAV49
LVDSB_DATA1AH49
LVDSB_DATA2AF47
LVDSB_DATA3AF43
LVD_IBGAF37
LVD_VBGAF36
DDPC_1PAY45
DDPC_0PAY49
DDPC_2PBA48
DDPC_3PBB49
DDPD_0PBB45
DDPD_1PBE44
CRT_BLUEN48
CRT_DDC_CLKT39
CRT_DDC_DATAM40
CRT_GREENP49
CRT_HSYNCM47
CRT_IRTNT42
CRT_REDT49
CRT_VSYNCM49
DAC_IREFT43
SDVO_CTRLCLKP38
SDVO_CTRLDATAM39
DDPC_CTRLCLKP46
DDPC_CTRLDATAP42
DDPD_CTRLCLKM43
DDPD_CTRLDATAM36
DDPB_AUXNAT49
DDPC_AUXNAP47
DDPD_AUXNAT45
DDPB_AUXPAT47
DDPC_AUXPAP49
DDPD_AUXPAT43
DDPB_HPDAT40
DDPC_HPDAT38
DDPD_HPDBH41
SDVO_TVCLKINPAP45
SDVO_TVCLKINNAP43
SDVO_STALLPAM40
SDVO_STALLNAM42
SDVO_INTPAP40
SDVO_INTNAP39
RH108 0_0402_5%1 2
RH104 0_0402_5%1 2
RH135 2.2K_0402_5%1 2
RH117 10K_0402_5%1 2
RH237 150_0402_1%1 2
RH230 33_0402_5%
1 2
RH138 2.2K_0402_5%1 2
RH123 2.37K_0402_1%1 2
RH134 100K_0402_5%1 2
RH103 0_0402_5%
@
1 2
RH234 2.2K_0402_5%1 2
RH233 2.2K_0402_5%1 2
RH122 330K_0402_5%@ 12
RH133 2.2K_0402_5%1 2
DH4
RB751V-40_SOD323-21 2
RH132 100K_0402_5%1 2RH126 10K_0402_5%1 2
RH105 0_0402_5%1 2
RH110 0_0402_5%1 2
RH121 200K_0402_5%1 2
RH136 8.2K_0402_5%@1 2
RH128 0_0402_5%1 2
RH124 10K_0402_5%1 2
RH1151K_0402_0.5%
12
T59 PAD~D
T58 PAD~D
RH119 330K_0402_5%12
CH29
10P_0402_50V8J@
12
RH127 10K_0402_5%1 2
RH120 10K_0402_5%1 2
T56PAD~D
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USBRBIAS
PCH_PLTRST#
PCH_PLTRST#
NV_ALE
PCI_PIRQA#
PCI_PIRQD#PCI_PIRQC#PCI_PIRQB#
CLK_PCI0CLK_PCI1
USB20_N4USB20_P4
USB20_P2USB20_N2
CLK_PCI_LPBACKCLK_PCI_LPC
FFS_INT1
GPIO51
ODD_DA#
DGPU_HOLD_RST#
USB20_N12USB20_P12
CLK_PCI2CLK_PCI3
USB_OC2#
USB_OC0#
USB_OC5#
USB_OC3#
USB_OC1#
USB_OC4#USB_OC4#
USB_OC0#
USB_OC7#
USB_OC3#USB_OC2#USB_OC1#
USB20_N1USB20_P1
PXS_PWRENGPIO52
CLK_PCI4
WL_OFF#
GPIO5
USB_OC5#USB_OC6#
CLK_PCI1
USB_OC7#USB_OC6#
PCI_PIRQD#
DGPU_HOLD_RST#
GPIO52
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQA#
ODD_DA#
GPIO51
WL_OFF#
FFS_INT1PXS_PWREN
USB20_N0USB20_P0
USB3RN1USB3RN2
USB3TN1USB3TN2
USB3RN3
USB3TN3
USB3RP1USB3RP2USB3RP3
USB3TP2USB3TP1
USB3TP3
USB3RN4
USB3RP4
USB3TN4
USB3TP4USB20_P3USB20_N3
USB20_N11USB20_P11
USB20_N10USB20_P10
USB20_N8USB20_P8
GPIO5
GPIO4
GPIO4
USB20_N5USB20_P5
PLT_RST#<6,24,28,32>
USB20_N4 <32>USB20_P4 <32>
USB20_N2 <32>USB20_P2 <32>
CLK_PCI_LPBACK<14>CLK_PCI_LPC<24>
FFS_INT1<29>ODD_DA#<29>
USB20_N12 <22>USB20_P12 <22>
USB_OC0# <33>
USB_OC2# <32>USB_OC3# <32>
USB20_N1 <33>USB20_P1 <33>
PXS_PWREN<36,52>
WL_OFF#<32>
USB20_N0 <33>USB20_P0 <33>
USB3RN1<33>USB3RN2<33>
USB3TN1<33>USB3TN2<33>
USB3RN3<32>
USB3TN3<32>
USB3RP1<33>USB3RP2<33>USB3RP3<32>
USB3TP3<32>USB3TP2<33>USB3TP1<33>
USB3RN4<32>
USB3RP4<32>
USB3TN4<32>
USB3TP4<32>USB20_P3 <32>USB20_N3 <32>
USB20_N11 <28>USB20_P11 <28>
USB20_N10 <32>USB20_P10 <32>
USB20_N8 <32>USB20_P8 <32>
USB_OC1# <33>PCH_PLTRST#<34>
DGPU_HOLD_RST#<34>
USB20_N5 <32>USB20_P5 <32>
+3VS
+1.8VS
+3VS
+3V_PCH
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P 1.0
16 56Wednesday, February 01, 2012
2012/01/17 2013/01/16
Compal Electronics, Inc.
PCH (4/8) PCI, USB, NVRAM
Intel Anti-Theft Techonlogy
*NV_ALE
High=Endabled
Low=Disable(floating)
Mini Card-1 (WLAN)
Within 500 mils
Camera
USB Conn 1
Reserve for RF please close to PCH
USB Conn 2 (with PWR Share)
USB Conn 3
USB Conn 4
Express Card
Card Reader
Finger Print
Mini Card-2 (mSATA)
RH143 22.6_0402_1%1 2
T60PAD~D @
CH101
0.1U_0402_25V6K1 2
RPH2
8.2K_0804_8P4R_5%
18273645
T63PAD~D @
RH144 22_0402_5%12
RPH1
8.2K_0804_8P4R_5%
18273645
T62PAD~D @
RSVD
PCI
USB
UH1E
BD82HM77 QPRG C1 BGA 989P PCH
RSVD23AV5
RSVD1AY7
RSVD2AV7
RSVD3AU3
RSVD4BG4
RSVD5AT10
RSVD6BC8
RSVD7AU2
RSVD8AT4
RSVD17BB5
RSVD18BB3
RSVD19BB7
RSVD20BE8
RSVD21BD4
RSVD22BF6
RSVD9AT3
RSVD10AT1
RSVD11AY3
RSVD12AT5
RSVD13AV3
RSVD14AV1
RSVD15BB1
RSVD16BA3
RSVD25AT8
RSVD24AV10
RSVD26AY5
RSVD27BA2
RSVD28AT12
RSVD29BF3
PIRQA#K40
PIRQB#K38
PIRQC#H38
PIRQD#G38
REQ1# / GPIO50C46
REQ2# / GPIO52C44
REQ3# / GPIO54E40
GNT1# / GPIO51D47
GNT2# / GPIO53E42
GNT3# / GPIO55F46
PIRQE# / GPIO2G42
PIRQF# / GPIO3G40
PIRQG# / GPIO4C42
PIRQH# / GPIO5D44
USBP0NC24
USBP0PA24
USBP1NC25
USBP1PB25
USBP2NC26
USBP2PA26
USBP3NK28
USBP3PH28
USBP4NE28
USBP4PD28
USBP5NC28
USBP5PA28
USBP6NC29
USBP6PB29
USBP7NN28
USBP7PM28
USBP8NL30
USBP8PK30
USBP9NG30
USBP9PE30
USBP10NC30
USBP10PA30
USBP11NL32
USBP11PK32
USBP12NG32
USBP12PE32
USBP13NC32
USBP13PA32
PME#K10
CLKOUT_PCI0H49
CLKOUT_PCI1H43
CLKOUT_PCI2J48
USBRBIAS#C33
USBRBIASB33
OC0# / GPIO59A14
OC1# / GPIO40K20
OC2# / GPIO41B17
OC3# / GPIO42C16
OC4# / GPIO43L16
OC5# / GPIO9A16
OC6# / GPIO10D14
OC7# / GPIO14C14
CLKOUT_PCI4H40
CLKOUT_PCI3K42
PLTRST#C6
TP1BG26
TP2BJ26
TP3BH25
TP6AH38
TP7AH37
TP8AK43
TP9AK45
TP16Y13
TP17K24
TP18L24
TP19AB46
TP20AB45
TP21B21
TP22M20
TP23AY16
TP25BE28
TP26BC30
TP27BE32
TP28BJ32
TP29BC28
TP30BE30
TP31BF32
TP32BG32
TP33AV26
TP34BB26
TP35AU28
TP36AY30
TP37AU26
TP38AY26
TP39AV28
TP40AW30
TP4BJ16
TP5BG16
TP15AM5
TP14AM4
TP13AH12
TP12H3
TP11N30
TP10C18
TP24BG46
RPH5
10K_1206_8P4R_5%
1 82 73 64 5
RH149 0_0402_5%@1 2
RPH4
10K_1206_8P4R_5%
1 82 73 64 5
T61PAD~D @RH145 22_0402_5%
1 2
UH5
SN74AHC1G08DCKR_SC70-5
IN11
IN22
G3
O4
P5
CH31
10P_0402_50V8J@
12
RPH3
8.2K_0804_8P4R_5%
18273645
RH150
10K_0402_5%
@
12
RH139 1K_0402_5%@ 1 2
RH155100K_0402_5%
12
RH14010K_0402_5% 12
RH157
10K_0402_5%@
12
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_THERMTRIP#_C
CRT_DET#
BT_ON#
PCH_GPIO28
PCH_PECI_R
KB_RST#
INIT3_3V#
VGA_PWRGD
PCH_GPIO37
PCH_GPIO37
GPIO1 PCH_GPIO37
CRT_DET
CRT_DET
PCH_GPIO28
PCH_GPIO27
PCH_GPIO27
GPIO35
HDD_DETECT#
KB_RST#
ODD_DETECT#
ODD_EN#
PCH_GPIO22
PCH_GPIO22
EC_SMI#
EC_SMI#
H_THERMTRIP#
NV_CLE
EC_SCI#
ODD_DETECT#
GPIO69
FFS_INT2
NV_CLE
HDD_DETECT#
GPIO35
GPIO49
GPIO49
GPIO1
PCH_GPIO38
PCH_GPIO39
PCH_GPIO38
PCH_GPIO39
ODD_EN#
BT_ON#
GPIO6
GPIO6
GPIO16
GPIO16
PCH_LID_SW_IN#EC_LID_OUT#
PCH_LID_SW_IN#
PCH_GPIO28
VGA_PWRGD
KB_DET#
GATEA20 <24>
H_PECI <6,24>
H_CPUPWRGD <6>
KB_RST# <24>
H_THERMTRIP# <6>
CRT_DET#<21>
EC_SMI#<24>
EC_SCI#<24>
ODD_DETECT#<29>
FFS_INT2<29>
H_SNB_IVB# <6>
HDD_DETECT#<32>
ODD_EN# <29>
BT_ON#<32>
VGA_PWRGD<36,52>
EC_LID_OUT#<24>
KB_DET#<26>
+3V_PCH
+3VS
+3VS
+3VS
+3VS
+3VS
+1.8VS
+3V_PCH
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P 1.0
17 56Wednesday, February 01, 2012
2012/01/17 2013/01/16
Compal Electronics, Inc.
PCH (5/8) GPIO, CPU, MISC
*
This signal has a weak internal pull upOn-Die PLL Voltage Regulator
L:On-Die PLL Voltage Regulator disable
GPIO28
H:On-Die voltage regulator enable
LOW - Tx, Rx terminated
to same voltage
(DC Coupling Mode)
FDI TERMINATION VOLTAGE OVERRIDEPCH_GPIO37
*
High: CRT Plugged
PCH_GPIO28 needs to be connected to XDP_FN8PCH_GPIO35 needs to be connected to XDP_FN9PCH_GPIO15 needs to be connected to XDP_FN16
Please refer to Huron River Debug Board DG 0.5
INIT3_3V
This signal has weak internalPU, can't pull low
Weak internal
PU,Do not pull low
Set to Vcc when HIGH
DMI Termination Voltage
NV_CLESet to Vss when LOW
CLOSE TO THE BRANCHING POINT
RH161 and RH162Follow CRB FAB2 setting
RH159
10K_0402_5%
12
RH1610_0402_5%@1 2
RH173 10K_0402_5%@1 2
RH1662.2K_0402_5%
12
RH24110K_0402_5% 12
RH162390_0402_5%1 2
RH18110K_0402_5% 1 2
RH17010K_0402_5%@1 2
RH168 1K_0402_5%@ 12
RH17210K_0402_5%1 2
RH17810K_0402_5% 1 2
CPU/MISC
NCTF
GPIO
UH1F
BD82HM77 QPRG C1 BGA 989P PCH
GPIO27E16
GPIO28P8
GPIO24 / MEM_LEDE8
GPIO57D6
LAN_PHY_PWR_CTRL / GPIO12C4
VSS_NCTF_1A4
VSS_NCTF_2A44
VSS_NCTF_3A45
VSS_NCTF_4A46
VSS_NCTF_5A5
VSS_NCTF_6A6
VSS_NCTF_7B3
VSS_NCTF_8B47
VSS_NCTF_9BD1
VSS_NCTF_10BD49
VSS_NCTF_11BE1
VSS_NCTF_12BE49
TACH2 / GPIO6H36
TACH0 / GPIO17D40
TACH3 / GPIO7E38
SATA3GP / GPIO37M5
SATA5GP / GPIO49V3
SCLOCK / GPIO22T5
SLOAD / GPIO38N2
SDATAOUT0 / GPIO39M3
SDATAOUT1 / GPIO48V13
PROCPWRGDAY11
RCIN#P5
PECIAU16
THRMTRIP#AY10
GPIO8C10
BMBUSY# / GPIO0T7
GPIO15G2
TACH1 / GPIO1A42
SATA2GP / GPIO36V8
INIT3_3V#T14
STP_PCI# / GPIO34K1
GPIO35K4
SATA4GP / GPIO16U2
VSS_NCTF_32F49
A20GATEP4
TACH4 / GPIO68C40
TACH6 / GPIO70C41
TACH7 / GPIO71A40
TACH5 / GPIO69B41
VSS_NCTF_17BH3
VSS_NCTF_18BH47
VSS_NCTF_19BJ4
VSS_NCTF_20BJ44
VSS_NCTF_21BJ45
VSS_NCTF_22BJ46
VSS_NCTF_23BJ5
VSS_NCTF_24BJ6
VSS_NCTF_25C2
VSS_NCTF_26C48
VSS_NCTF_27D1
VSS_NCTF_28D49
VSS_NCTF_29E1
VSS_NCTF_30E49
VSS_NCTF_31F1
TS_VSS4AK10
TS_VSS3AH10
TS_VSS2AK11
TS_VSS1AH8
NC_1P37
VSS_NCTF_13BF1
VSS_NCTF_14BF49
VSS_NCTF_15BG2
VSS_NCTF_16BG48
DF_TVSAY1
RH17910K_0402_5% 1 2
RH16910K_0402_5%
1 2
RH163
10K_0402_5%
@
12
RH16410K_0402_5% 12
RH18310K_0402_5% 1 2
RH160
10K_0402_5%
1
2
RH17610K_0402_5%1 2
RH24210K_0402_5% 1 2
RH17510K_0402_5% 1 2
RH17710K_0402_5% 1 2
RH2401K_0402_5% 12
RH18410K_0402_5% 1 2
G
D
S
QH4SSM3K7002F_SC59-3
2
13
RH1748.2K_0402_5%1 2
RH171200K_0402_5%
1 2
RH18210K_0402_5% 1 2
RH730_0402_5%1 2
RH18010K_0402_5% 1 2
RH165 1K_0402_5%@
1 2
RH1671K_0402_5% 12
T64 PAD~D@
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.05VS_VCCCORE
+VCCAPLLEXP
+1.05VS_VCC_EXP
+VCCAFDI_VRM
+1.05VS_VCCAPLL_FDI
+VCCADAC
+VCCAFDI_VRM
+VCCA_LVDS
+3V_VCCPSPI
+1.05VS_VCCDPLLEXP
+3VS_VCCA3GBG
+1.05VS_VCCDPLL_FDI
+1.05VS_VCC_DMI_CCI
+VCCTX_LVDS
+VCCP_VCCDMI
+VCCAPLLEXP_R
+3VS_VCC3_3_6
+VCCAFDI_VRM
+1.5VS +VCCAFDI_VRM
+VCCP_VCCDMI
+1.05VS
+1.05VS
+3VS
+1.05VS
+1.05VS
+1.05VS
+3VS
+VCCP
+1.8VS
+VCCPNAND
+3VS
+1.8VS
+3VS
+3V_PCH
+VCCP_VCCDMI
+1.05VS
+1.05VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P 1.0
18 56Wednesday, February 01, 2012
2012/01/17 2013/01/16
Compal Electronics, Inc.
PCH (6/8) PWR
3.3
1.05
1.05
1.05
V_PROC_IO
V5REF
V5REF_Sus
Vcc3_3
VccADAC
VccADPLLA
VccADPLLB
Voltage Rail
VccCore
VccDMI
1.05
5
3.3
0.001
0.001
0.001
0.266
0.001
0.08
0.08
1.3
0.042
5
VoltageS0 Iccmax
Current (A)
1.05
1.05VccIO 2.925
1.05VccASW 1.01
3.3VccSPI 0.02
3.3VccDSW 0.003
1.8 0.19VccpNAND
3.3VccRTC 6 uA
3.3VccSus3_3
3.3 / 1.5VccSusHDA
0.119
0.01
VccVRM 1.8 / 1.5 0.16
1.05VccCLKDMI
VccALVDS 3.3
1.8VccTX_LVDS 0.06
0.001
0.02
PCH Power Rail Table
Place CH53 Near BG6 pin
Place CH40 Near BJ22 pin
Near AP43
0.1uH inductor, 200mA
1mA
1300mA
2925mA
20mA
190mA
20mA
1mA
60mA
VccSSC 1.05 0.095
VccDIFFCLKN 1.05 0.055
RH187 0_0603_5%@ 12
RH243
0_0603_5%@
12
CH
36
1U
_0
40
2_
6.3
V6
K
1
2
CH44
1U_0402_6.3V6K
1
2
CH
38
1U
_0
40
2_
6.3
V6
K
1
2
JP1
PAD-OPEN 4x4m
@
12
CH390.01U_0402_16V7K
1
2
CH
49
1U
_0
40
2_
6.3
V6
K
1
2
RH193 0_0805_5%1 2
CH
33
0.1
U_
04
02
_1
0V
7K
~D
1
2
RH185 0_0805_5%1 2
CH
35
10
U_
08
05
_4
VA
M~
D
1
2
RH194 0_0603_5%@ 12
RH197
0_0603_5%
12
CH
45
10
U_
08
05
_4
VA
M~
D
1
2
LH2
0.1UH_MLF1608DR10KT_10%_1608
12
CH
52
0.1
U_
04
02
_1
0V
7K
~D
1
2
RH195
0_0805_5%
1 2
RH189
0_0805_5%
12
CH3410U_0805_4VAM~D
1
2
CH
48
1U
_0
40
2_
6.3
V6
K
1
2CH
47
1U
_0
40
2_
6.3
V6
K
1
2
CH
42
10
U_
08
05
_4
VA
M~
D
@
1
2
CH1001U_0402_6.3V6K
1
2
CH43
0.1U_0402_10V7K~D
1
2
RH191
0_0805_5%1 2
CH501U_0402_6.3V6K
1
2
CH
37
1U
_0
40
2_
6.3
V6
K
1
2
CH
46
1U
_0
40
2_
6.3
V6
K
1
2
LH3
1UH_LB2012T1R0M_20%~D
@
1 2
POWER
VCC CORE
DMI
VCCIO
CRT
LVDS
FDI
DFT / SPI
HVCMOS
UH1G
BD82HM77 QPRG C1 BGA 989P PCH
VCCCORE[1]AA23
VCCCORE[2]AC23
VCCCORE[3]AD21
VCCCORE[4]AD23
VCCCORE[5]AF21
VCCCORE[6]AF23
VCCCORE[7]AG21
VCCCORE[8]AG23
VCCCORE[9]AG24
VCCCORE[10]AG26
VCCCORE[11]AG27
VCCCORE[12]AG29
VCCCORE[13]AJ23
VCCCORE[14]AJ26
VCCCORE[15]AJ27
VCCDFTERM[4]AJ17
VCCDFTERM[3]AJ16
VCCIO[17]AN21
VCCIO[18]AN26
VCCIO[19]AN27
VCCIO[20]AP21
VCCIO[23]AP26
VCCIO[24]AT24
VCCIO[15]AN16
VCCIO[16]AN17
VCCIO[21]AP23
VCCIO[22]AP24
VCCADACU48
VCCTX_LVDS[1]AM37
VCCTX_LVDS[2]AM38
VCCALVDSAK36
VCCVRM[3]AT16
VCCVRM[2]AP16
VCCAPLLEXPBJ22
VccAFDIPLLBG6
VCCIO[28]AN19
VCCTX_LVDS[4]AP37
VCCTX_LVDS[3]AP36
VSSADACU47
VSSALVDSAK37
VCCIO[27]AP17
VCC3_3[6]V33
VCC3_3[7]V34
VCC3_3[3]BH29
VCCDFTERM[2]AG17
VCCDFTERM[1]AG16
VCCDMI[1]AT20
VCCIO[25]AN33
VCCIO[26]AN34
VCCCORE[16]AJ29
VCCCORE[17]AJ31
VCCSPIV1
VCCCLKDMIAB36
VCCDMI[2]AU20
CH
53
1U
_0
40
2_
6.3
V6
K
@
1
2
RH188
0_0805_5%1 2
LH1
4.7UH_LQM18FN4R7M00D_20%12
RH190
0_0805_5%
1 2
CH541U_0402_6.3V6K
1
2
CH
32
0.0
1U
_0
40
2_
16
V7
K
1
2
RH186 0_0603_5%12
CH400.01U_0402_16V7K
1
2
RH192
0_0805_5%
12
RH196
0_0805_5%1 2
CH41
22U_0805_6.3V6M1
2
CH51
0.1U_0402_10V7K~D
1
2
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+PCH_V5REF_RUN
+PCH_V5REF_SUS
+VCCA_DPLL_L
+1.05VS_VCCA_A_DPL
+1.05VS_VCCUSBCORE
+PCH_V5REF_RUN
+1.05VS_VCC_SATA
+PCH_V5REF_SUS
+VCCA_USBSUS
+3V_VCCPSUS
+VCCA_USBSUS
+3VS_VCCPPCI
+3V_VCCPUSB
+3V_VCCAUBG
+VCCSATAPLL_R
+3V_VCCPSUS_1
+VCCAFDI_VRM
+3VS_VCCPCORE
+1.05VS_SATA3
+1.05VM_VCCASW
+VCCPDSW
+PCH_VCCDSW
+3VS_VCC_CLKF33
+VCCDPLL_CPY
+VCCAPLL_CPY +3VS_VCC_CLKF33
+VCCSUS1
+VCCACLK
+VCCAPLL_CPY_PCH
+VCCRTCEXT
+VCCSST
+1.05VM_VCCSUS
+V_CPU_IO
+VCCAFDI_VRM
+1.05VS_VCCDIFFCLKN
+1.05VS_SSCVCC
+VCCDIFFCLK+1.05VS_VCCA_A_DPL
+1.05VS_VCCA_B_DPL
+1.05VS_VCCAUPLL
+VCCSUSHDA
+VCC3_3_2
+1.05VM_VCCSUS
+VCCSATAPLL
+1.05VS_VCCA_B_DPL
PCH_PWR_EN#<27>
+3VS+5VS
+3V_PCH+5V_PCH
+1.05VS
+1.05VS
+3V_PCH
+3V_PCH
+1.05VS
+3VS
+3VS
+1.05VS
+3V_PCH
+1.05VS
+1.05VS
+3V_PCH
+3VS
+3V_PCH
+1.05VS
+1.05VS
+3V_PCH
+3VS
+1.05VS
+1.05VS
+1.05VS
+VCCP
+RTCVCC
+1.05VS
+VCCAFDI_VRM
+5V_PCH+5VALW
+1.05VS
+1.05VS
+1.05VS
+1.05VS_SATA3
+1.05VS_VCC_SATA+1.05VS_VCCDIFFCLKN
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P 1.0
19 56Wednesday, February 01, 2012
2012/01/17 2013/01/16
Compal Electronics, Inc.
PCH (7/8) PWR
If it support 3.3V audio signals
POP:RH244
Depop RH245 / RH246
If it support 1.5V audio signals
POP:RH245 / RH246
Depop R244
1mA
1mA
1mA
119mA
80mA
80mA
VCC3_3 = 266mA detal waiting for newest spec
VCCDMI = 42mA detal waiting for newest spec
1010mA
3mA
10mA
95mA
55mA
RH223 0_0603_5%12
RH227 0_0603_5%1 2
LH410UH_LBR2012T100M_20%@
1 2
CH
67
0.1
U_
04
02
_1
0V
7K
~D
1
2
CH80
1U_0402_6.3V6K
1
2
CH760.1U_0402_10V7K~D
1
2
RH229 0_0603_5%12
CH
90
0.1
U_
04
02
_1
0V
7K
~D
1
2
CH
59
10
U_
08
05
_1
0V
6K
@ 1
2
CH874.7U_0603_6.3V6K
1
2
CH
65
22
U_
08
05
_6
.3V
6M1
2
CH730.1U_0402_10V7K~D
1
2
RH2010_0603_5%
12
CH821U_0402_6.3V6K
1
2
RH208100_0402_1%
12
CH640.1U_0603_25V7K
1
2
CH
75
1U
_0
40
2_
6.3
V6
K
1
2
RH204
0_0805_5%
@
1 2
CH
83
1U
_0
40
2_
6.3
V6
K
1
2
RH2130_0603_5%
12
CH
57
0.1
U_
04
02
_1
0V
7K
~D
1
2
CH
63
1U
_0
40
2_
6.3
V6
K@
1
2
RH212100_0402_1%
12
CH550.1U_0402_10V7K~D
1
2
RH206 0_0603_5%12
CH561U_0402_6.3V6K
1
2
+
CH
94
22
0U
_B
2_
2.5
VM
_R
35
M~
D
1
2
DH3
RB751S40T1_SOD523-2~D
21
CH8110U_0805_10V6K@
1
2
RH214 0_0805_5%12
RH199 0_0603_5%1 2
RH232
0_0805_5%
1 2
LH610UH_LBR2012T100M_20%@
1 2
G
DS
QH5
AO3419L_SOT23-3
2
13
CH841U_0402_6.3V6K
1
2
CH
97
1U
_0
40
2_
6.3
V6
K
1
2
CH
61
0.1
U_
04
02
_1
0V
7K
~D
1
2
RH207 0_0603_5%1 2
LH510UH_LBR2012T100M_20%
@
1 2
RH217
0_0603_5%
12
RH
20
32
0K
_0
40
2_
5%
12
CH
88
0.1
U_
04
02
_1
0V
7K
~D
1
2
LH810UH_LBR2012T100M_20%
1 2
RH220 0_0603_5%12
RH211 0_0805_5%1 2
CH
70
1U
_0
40
2_
6.3
V6
K
1
2
CH711U_0402_6.3V6K
1
2
CH621U_0402_6.3V6K
@1
2
POWER
SATA
USB
Clock and Miscellaneous
HDA
CPU
RTC
PCI/GPIO/LPC
MISC
UH1J
BD82HM77 QPRG C1 BGA 989P PCH
DCPSUSBYPV12
VCCASW[1]AA19
VCCASW[2]AA21
VCCASW[3]AA24
VCCASW[5]AA27
VCCASW[6]AA29
VCCSUSHDAP32
VCCSUS3_3[6]P24
VCCIO[34]T26
VCCIO[4]AD17
VCCASW[7]AA31
VCCASW[8]AC26
VCCASW[9]AC27
VCCASW[10]AC29
VCCASW[11]AC31
VCCASW[12]AD29
V5REFP34
VCC3_3[4]T34
VCCRTCA22
VCCSUS3_3[10]V24
VCCSUS3_3[9]V23
VCCSUS3_3[8]T24
VCCSUS3_3[7]T23
VCCIO[2]AC16
VCCADPLLBBF47
VCCDIFFCLKN[1]AF33
V5REF_SUSM26
VCCIO[3]AC17
DCPSUS[1]T17
VCCSSCAG33
VCCADPLLABD47
VCCVRM[4]Y49
VCCACLKAD49
DCPRTCN16
VCCASW[4]AA26
VCCDIFFCLKN[2]AF34
VCCIO[7]AF17
DCPSSTV16
VCCIO[5]AF13
VCCASW[22]T21
VCCASW[23]V21
VCCASW[21]T19
VCC3_3[1]AA16
VCC3_3[8]W16
VCCSUS3_3[2]N20
VCCSUS3_3[3]N22
VCCSUS3_3[4]P20
VCCSUS3_3[5]P22
VCCIO[29]N26
VCCIO[30]P26
VCCIO[31]P28
VCCIO[32]T27
V_PROC_IOBJ8
VCCIO[33]T29
VCCDIFFCLKN[3]AG34
VCCASW[13]AD31
VCCASW[14]W21
VCCASW[15]W23
VCCASW[16]W24
VCCASW[17]W26
VCCASW[18]W29
VCCASW[19]W31
VCCASW[20]W33
VCCIO[6]AF14
VCCVRM[1]AF11
VCCIO[12]AH13
VCCIO[13]AH14
VCC3_3[2]AJ2
VCCAPLLSATAAK1
DCPSUS[3]AL24
VCCIO[14]AL29
DCPSUS[4]AN23
VCCSUS3_3[1]AN24
VCCAPLLDMI2BH23
DCPSUS[2]V19
VCCDSW3_3T16
VCC3_3[5]T38
RH218
0_0805_5%
12
CH580.1U_0402_10V7K~D
@
1
2
CH
66
22
U_
08
05
_6
.3V
6M1
2
CH770.1U_0402_10V7K~D
1
2
RH205 0_0603_5%12
CH
96
1U
_0
40
2_
6.3
V6
K
1
2
CH
68
1U
_0
40
2_
6.3
V6
K
1
2
CH
89
0.1
U_
04
02
_1
0V
7K
~D
1
2
CH
91
0.1
U_
04
02
_1
0V
7K
~D
1
2
RH
23
11
50
_0
40
2_
1%
@
12
RH216 0_0603_5%12
CH790.1U_0402_10V7K~D
1
2
CH
69
1U
_0
40
2_
6.3
V6
K
1
2
RH200 0_0603_5%12
CH
74
10
U_
08
05
_1
0V
6K
1
2
RH221
0_0805_5%
@
12
LH710UH_LBR2012T100M_20%
1 2
+
CH
95
22
0U
_B
2_
2.5
VM
_R
35
M~
D
1
2
RH210 0_0603_5%12
RH224 0_0603_5%12
RH198 0_0603_5%@ 12
RH219 0_0603_5%@ 12
CH850.1U_0402_10V7K~D
1
2
CH721U_0603_10V6K
1
2RH2150_0805_5%1 2
CH930.1U_0402_10V7K~D
1
2
CH861U_0402_6.3V6K
@1
2
CH
92
1U
_0
40
2_
6.3
V6
K
1
2
CH781U_0402_6.3V6K
1
2
RH222
0_0805_5%
12
DH2
RB751S40T1_SOD523-2~D
21
CH
60
0.1
U_
04
02
_1
0V
7K
~D
1
2
RH209 0_0603_5%12
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P 1.0
20 56Wednesday, February 01, 2012
2012/01/17 2013/01/16
Compal Electronics, Inc.
PCH (8/8) VSS
UH1H
BD82HM77 QPRG C1 BGA 989P PCH
VSS[1]AA17
VSS[2]AA2
VSS[3]AA3
VSS[5]AA34
VSS[6]AB11
VSS[7]AB14
VSS[8]AB39
VSS[9]AB4
VSS[10]AB43
VSS[11]AB5
VSS[12]AB7
VSS[13]AC19
VSS[14]AC2
VSS[15]AC21
VSS[16]AC24
VSS[17]AC33
VSS[18]AC34
VSS[19]AC48
VSS[20]AD10
VSS[21]AD11
VSS[22]AD12
VSS[23]AD13
VSS[24]AD19
VSS[25]AD24
VSS[26]AD26
VSS[27]AD27
VSS[28]AD33
VSS[29]AD34
VSS[30]AD36
VSS[31]AD37
VSS[33]AD39
VSS[34]AD4
VSS[35]AD40
VSS[36]AD42
VSS[37]AD43
VSS[38]AD45
VSS[39]AD46
VSS[43]AF10
VSS[44]AF12
VSS[46]AD16
VSS[47]AF16
VSS[48]AF19
VSS[49]AF24
VSS[50]AF26
VSS[51]AF27
VSS[52]AF29
VSS[53]AF31
VSS[54]AF38
VSS[55]AF4
VSS[56]AF42
VSS[57]AF46
VSS[59]AF7
VSS[60]AF8
VSS[61]AG19
VSS[62]AG2
VSS[63]AG31
VSS[64]AG48
VSS[65]AH11
VSS[66]AH3
VSS[67]AH36
VSS[68]AH39
VSS[69]AH40
VSS[70]AH42
VSS[71]AH46
VSS[72]AH7
VSS[73]AJ19
VSS[76]AJ33
VSS[77]AJ34
VSS[78]AK12
VSS[79]AK3
VSS[80]AK38
VSS[81]AK4
VSS[82]AK42
VSS[83]AK46
VSS[84]AK8
VSS[85]AL16
VSS[86]AL17
VSS[87]AL19
VSS[88]AL2
VSS[89]AL21
VSS[90]AL23
VSS[91]AL26
VSS[92]AL27
VSS[93]AL31
VSS[96]AL48
VSS[97]AM11
VSS[98]AM14
VSS[99]AM36
VSS[100]AM39
VSS[102]AM45
VSS[103]AM46
VSS[104]AM7
VSS[105]AN2
VSS[106]AN29
VSS[107]AN3
VSS[108]AN31
VSS[109]AP12
VSS[110]AP19
VSS[111]AP28
VSS[112]AP30
VSS[113]AP32
VSS[114]AP38
VSS[116]AP42
VSS[117]AP46
VSS[118]AP8
VSS[119]AR2
VSS[120]AR48
VSS[121]AT11
VSS[122]AT13
VSS[123]AT18
VSS[124]AT22
VSS[125]AT26
VSS[126]AT28
VSS[127]AT30
VSS[128]AT32
VSS[131]AT42
VSS[132]AT46
VSS[133]AT7
VSS[134]AU24
VSS[135]AU30
VSS[136]AV16
VSS[137]AV20
VSS[138]AV24
VSS[139]AV30
VSS[140]AV38
VSS[141]AV4
VSS[142]AV43
VSS[143]AV8
VSS[144]AW14
VSS[145]AW18
VSS[146]AW2
VSS[147]AW22
VSS[148]AW26
VSS[149]AW28
VSS[150]AW32
VSS[151]AW34
VSS[152]AW36
VSS[153]AW40
VSS[154]AW48
VSS[155]AV11
VSS[156]AY12
VSS[157]AY22
VSS[158]AY28
VSS[40]AD8
VSS[42]AE3
VSS[45]AD14
VSS[115]AP4
VSS[0]H5
VSS[58]AF5
VSS[32]AD38
VSS[4]AA33
VSS[74]AJ21
VSS[75]AJ24
VSS[41]AE2
VSS[129]AT34
VSS[130]AT39
VSS[101]AM43
VSS[95]AL34
VSS[94]AL33
UH1I
BD82HM77 QPRG C1 BGA 989P PCH
VSS[159]AY4
VSS[160]AY42
VSS[161]AY46
VSS[162]AY8
VSS[163]B11
VSS[164]B15
VSS[165]B19
VSS[166]B23
VSS[167]B27
VSS[168]B31
VSS[169]B35
VSS[170]B39
VSS[171]B7
VSS[173]BB12
VSS[174]BB16
VSS[175]BB20
VSS[176]BB22
VSS[177]BB24
VSS[178]BB28
VSS[179]BB30
VSS[180]BB38
VSS[181]BB4
VSS[182]BB46
VSS[183]BC14
VSS[184]BC18
VSS[185]BC2
VSS[186]BC22
VSS[187]BC26
VSS[188]BC32
VSS[189]BC34
VSS[190]BC36
VSS[191]BC40
VSS[192]BC42
VSS[193]BC48
VSS[194]BD46
VSS[195]BD5
VSS[196]BE22
VSS[197]BE26
VSS[198]BE40
VSS[199]BF10
VSS[200]BF12
VSS[201]BF16
VSS[202]BF20
VSS[203]BF22
VSS[204]BF24
VSS[205]BF26
VSS[206]BF28
VSS[207]BD3
VSS[208]BF30
VSS[209]BF38
VSS[210]BF40
VSS[211]BF8
VSS[212]BG17
VSS[213]BG21
VSS[214]BG33
VSS[215]BG44
VSS[216]BG8
VSS[217]BH11
VSS[218]BH15
VSS[219]BH17
VSS[220]BH19
VSS[222]BH27
VSS[223]BH31
VSS[224]BH33
VSS[225]BH35
VSS[226]BH39
VSS[227]BH43
VSS[228]BH7
VSS[229]D3
VSS[230]D12
VSS[231]D16
VSS[232]D18
VSS[233]D22
VSS[234]D24
VSS[235]D26
VSS[236]D30
VSS[237]D32
VSS[264]K7
VSS[265]L18
VSS[266]L2
VSS[267]L20
VSS[268]L26
VSS[269]L28
VSS[270]L36
VSS[271]L48
VSS[272]M12
VSS[273]P16
VSS[274]M18
VSS[275]M22
VSS[276]M24
VSS[277]M30
VSS[278]M32
VSS[279]M34
VSS[280]M38
VSS[281]M4
VSS[282]M42
VSS[283]M46
VSS[284]M8
VSS[285]N18
VSS[286]P30
VSS[288]P11
VSS[289]P18
VSS[290]T33
VSS[291]P40
VSS[292]P43
VSS[293]P47
VSS[294]P7
VSS[295]R2
VSS[296]R48
VSS[297]T12
VSS[298]T31
VSS[299]T37
VSS[300]T4
VSS[301]W34
VSS[302]T46
VSS[303]T47
VSS[304]T8
VSS[305]V11
VSS[306]V17
VSS[307]V26
VSS[308]V27
VSS[309]V29
VSS[310]V31
VSS[311]V36
VSS[312]V39
VSS[313]V43
VSS[314]V7
VSS[315]W17
VSS[316]W19
VSS[238]D34
VSS[239]D38
VSS[240]D42
VSS[241]D8
VSS[242]E18
VSS[243]E26
VSS[244]G18
VSS[245]G20
VSS[246]G26
VSS[247]G28
VSS[248]G36
VSS[249]G48
VSS[250]H12
VSS[251]H18
VSS[317]W2
VSS[318]W27
VSS[319]W48
VSS[320]Y12
VSS[321]Y38
VSS[322]Y4
VSS[323]Y42
VSS[324]Y46
VSS[325]Y8
VSS[328]BG29
VSS[329]N24
VSS[330]AJ3
VSS[287]N47
VSS[252]H22
VSS[253]H24
VSS[254]H26
VSS[255]H30
VSS[256]H32
VSS[257]H34
VSS[258]F3
VSS[262]K39
VSS[263]K46
VSS[259]H46
VSS[260]K18
VSS[261]K26
VSS[331]AD47
VSS[333]B43
VSS[334]BE10
VSS[335]BG41
VSS[337]G14
VSS[338]H16
VSS[340]T36
VSS[342]BG22
VSS[343]BG24
VSS[344]C22
VSS[345]AP13
VSS[172]F45
VSS[221]H10
VSS[346]M14
VSS[347]AP3
VSS[348]AP1
VSS[349]BE16
VSS[350]BC16
VSS[351]BG28
VSS[352]BJ28
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
D_CRT_HSYNC HSYNC_LCRT_HSYNC
CRT_VSYNC
CRT_R_L
D_CRT_VSYNC
CRT_R_C
CRT_G_C
CRT_B_L
CRT_R_L
HSYNC_L
CRT_DDC_DATA_C
CRT_DDC_CLK_C
CRT_G_LCRT_G_L
VSYNC_L
CRT_B_L
CRT_DDC_CLK_C
CRT_DDC_DATA_C
VSYNC_L
CRT_B_C
CRT_HSYNCVGA_CRT_HSYNC
CRT_R
CRT_VSYNC
VGA_CRT_R
VGA_CRT_VSYNC
CRT_G
CRT_DDC_CLK
VGA_CRT_G
VGA_CRT_CLK
CRT_B
CRT_DDC_DATA
VGA_CRT_B
VGA_CRT_DATA
CRT_R<15>
CRT_G<15>
CRT_B<15>
CRT_DDC_DATA<15>
CRT_DDC_CLK<15>
CRT_HSYNC<15>
CRT_VSYNC<15>
CRT_DET#<17>
VGA_CRT_G<35>VGA_CRT_R<35>
VGA_CRT_CLK<35>VGA_CRT_DATA<35>
VGA_CRT_VSYNC<35>VGA_CRT_HSYNC<35>
VGA_CRT_B<35>
+3VS +CRT_VCC+3VS +CRT_VCC+3VS
+CRT_VCC
+CRT_VCC
+5VS +CRT_VCC+R_CRT_VCC
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P 1.0
21 56Wednesday, February 01, 2012
2012/01/17 2013/01/16
Compal Electronics, Inc.
VGA / LVDS /camera conn.
C R T
For EMI
W=40mils
W=40mils
From VGA for debug CRT
For EMI
CV
11
10
P_
04
02
_5
0V
8J
12
RV
41
50
_0
40
2_
1%
@
12
DV1
PESD5V0U2BT_SOT23-3
@
2
31
RV225 0_0402_5%@1 2
RV228 0_0402_5%@1 2
CV
61
50
_0
40
2_
1%
12
RV
51
50
_0
40
2_
1%
@
12
G
DS
QV22N7002BKW_SOT323-3
2
13
CV10.1U_0402_16V7K
1
2
RV
82
.2K
_0
40
2_
5%
12
RV226 0_0402_5%@1 2
CV160.1U_0402_16V7K
1 2
RV110_0603_5%1 2
RV100_0603_5%1 2
CV
12
10
0P
_0
40
2_
50
V8
J
1
2
CV
32
2P
_0
40
2_
50
V8
J
12
LV5 0_0603
1 2
RV1
100K_0402_5%
12
UV2774AHCT1G125GW_SOT353-5
A2
Y4O
E#
1G
3P
5
RV229 0_0402_5%@1 2
G
DS
QV12N7002BKW_SOT323-3
2
13
CV
10
10
P_
04
02
_5
0V
8J
12
LV1 0_0603
1 2
CV
15
10
P_
04
02
_5
0V
8J
12
LV6 LQW18AN47NG00D _0603
1 2
FV2
1.1A_6VDC_FUSE
21
LV4 LQW18AN47NG00D _0603
1 2
NC
DV4
BAT1000-7-F_SOT23-3~D
2 13
RV
92
.2K
_0
40
2_
5%1
2
CV130.1U_0402_16V7K
1 2
CV
71
50
_0
40
2_
1%
12
T65PAD~D @
G
G
JCRT
SUYIN_070546HR015M22BZRCONN@
611
17
1228
1339
144
1015
5
1617
RV
72
.2K
_0
40
2_
5%1
2
UV2674AHCT1G125GW_SOT353-5
A2
Y4O
E#
1G
3P
5
RV223 0_0402_5%@1 2
RV20_1206_5%@
12
DV2
PESD5V0U2BT_SOT23-3
@
2
31
LV2 LQW18AN47NG00D _0603
1 2
LV3 0_0603
1 2
RV227 0_0402_5%@1 2
CV
81
50
_0
40
2_
1%
12
RV
31
50
_0
40
2_
1%
@
12
RV
62
.2K
_0
40
2_
5%
12
CV
91
0P
_0
40
2_
50
V8
J
12
RV1210K_0402_5%
1 2
RV224 0_0402_5%@1 2
CV
42
2P
_0
40
2_
50
V8
J
12
CV
14
10
P_
04
02
_5
0V
8J
12
CV
52
2P
_0
40
2_
50
V8
J
12
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+LCDVDD_R
PCH_ENVDD
EC_ENVDD
PWR_SRC_ON
+INV_PWR_SRC_R
MIC_CLK
USB20_P12_RMIC_CLK_R
USB20_N12_RMIC_DATA
BKOFF#
LVDS_BCLK-
LVDS_BCLK+
+LCDVDD_R
MIC_DATA
LVDS_B1+
LVDS_A1-
LVDS_B1-
USB20_N12_R
LVDS_A2+
EDID_CLK_LCD
LVDS_ACLK-
LVDS_B0-
DISPOFF#
USB20_P12_R
LVDS_A0-
MIC_CLK_R
LVDS_A1+
INV_PWM
MIC_CLK_R
+LCDVDD
LVDS_BCLK-
LVDS_B2-
LVDS_A0+
DISPOFF#
LCD_TEST
INV_PWM
LVDS_BCLK+
LVDS_B2+
LVDS_A2-
LVDS_ACLK+
LVDS_B0+
USB20_N12_R
USB20_P12_R
EDID_DATA_LCD
BKOFF#<24>
VGA_PWM<15>
PCH_ENVDD<15>
EC_ENVDD<24>
LVDS_B0+<15>LVDS_B0-<15>
LVDS_A2+<15>
LVDS_A0+<15>
LVDS_A2-<15>
LVDS_ACLK+<15>
LVDS_DDC_CLK<15>
LVDS_A0-<15>
LVDS_A1+<15>LVDS_A1-<15>
LVDS_DDC_DATA<15>
LVDS_ACLK-<15>
LVDS_BCLK+<15>LVDS_BCLK-<15>
LVDS_B2+<15>LVDS_B2-<15>
LVDS_B1+<15>LVDS_B1-<15>
USB20_N12<16>
USB20_P12<16>
MIC_DATA<30>
MIC_CLK<30>
LCD_TEST<24>
EN_INVPWR<24>
CMOS_ON#<24>
+5VALW
+INV_PWR_SRC
+3VS
+LCDVDD
B+
+INV_PWR_SRC
B+ +INV_PWR_SRC
+LCDVDD
+LCDVDD +5VALW
+3VS
+INV_PWR_SRC
+3VS_CAM
+3VS+LCDVDD
+5VS
+3VS_CAM+3VS +3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P 1.0
22 56Wednesday, February 01, 2012
2012/01/17 2013/01/16
Compal Electronics, Inc.
LVDS /camera conn.
LVDS Conn.
Wedcam PWR CTRL
W=60mils
W=60mils
60mil60mil
* Reserved for EMI/ESD/RF
need to close to JLVDS
W=60mils
W=60mils
* Reserved for LCD
sequence tuning
LCD backlight PWR CTRL
LCD PWR CTRL
RV210 0_0402_5%1 2
CV
25
1000P
_0402_50V
7K
1
2
G
D
S
QV5BSS138_SOT23~D
2
13
RV
25
100K
_0402_5%
12
RV26
100K_0402_5%
12
G
D
S
QV3SSM3K7002FU_SC70-3~D
2
13
RV34
100K_0402_5% @
12
G
DS
QV8
SI2301CDS-T1-GE3_SOT23-3
@
2
13
RV14100_0402_1%
12
CV285P_0402_50V8C
@1 2
CV319
1000P
_0402_50V
7K
@
1
2
RV280_0402_5%
12
RV230100K_0402_5%
12
JLVDS
STARC_107K40-000001-G2CONN@
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
2323
2424
2525
2626
2727
2828
2929
3030
3131
3232
3333
3434
3535
3636
3737
3838
3939
4040
G141
G242
G343
G444
G545
G646RV16
10K_0402_5%
12
QV9A
2N
7002D
W-7
-F_S
OT
363-6
@
61
2
CV210.1U_0402_16V7K
1
2
RV310_0402_5%
@
12 CV29
470P_0402_50V7K~D
@1
2
RV32820_0805_1%
@
12
RV1810K_0402_5%
12
QV9B
2N
7002D
W-7
-F_S
OT
363-6
@
3
5
4
DV6
CH751H-40PT_SOD323-2~D
2 1
RV300_0402_5%
12
CV310.1U_0402_16V7K @
1
2
RV13
4.7K_0402_5%
@
12
RV20 0_0402_1%@ 12
RV1547K_0402_5%
12
RV33100K_0402_5%
@
12
DV7
BAT54C-7-F_SOT23-3
2
3
1
S
G
D
QV6
SI3457CDV-T1-E3_TSOP6~D
3
6
24 5
1
CV30680P_0402_50V7K~D
@
1
2
CV260.1U_0603_50V_X7R
1
2
DV8
IP4223CZ6_SO6-6
V I/O1
V I/O3
V I/O6
V I/O4
Ground2
V BUS5
CV22
0.1U_0402_16V7K
1
2
RV231 0_0603_5%
12
CV
19
0.1
U_0402_16V
7K
1
2
CV185P_0402_50V8C @
1 2
G
D
S
QV7SSM3K7002FU_SC70-3~D
2
13
G
D
S
QV4AO3419L_SOT23-3
4.14
2
13
DV5
CH751H-40PT_SOD323-2~D
@
21
CV
23
0.1
U_0402_16V
7K
1
2
RV290_0402_5%
12
RV27 0_0805_5%@
1 2
CV204.7U_0805_10V4Z
1
2
RV208 0_0402_5%1 2
CV275P_0402_50V8C
@1 2
RV19 0_0402_1%@ 12
LV24
DLW21SN900HQ2L_0805_4P~D
@
11
22
33
44
RV1756K_0402_5%
12
RV24 0_0805_5%1 2
CV
24
10U
_0805_10V
6K
1
2
RV209
47K_0402_5%
@
12
CV175P_0402_50V8C
@
1 2
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TMDS_TXCP
TMDS_L_TX0P
TMDS_L_TX1N
TMDS_L_TX1P
TMDS_L_TXCP
TMDS_L_TXCN
TMDS_L_TX2N
TMDS_L_TX2P
TMDS_TXCN
TMDS_TX1P
TMDS_TX1N
TMDS_TX0P
TMDS_TX0N TMDS_L_TX0N
TMDS_TX2P
TMDS_TX2N
DDC_DAT_HDMIDDC_CLK_HDMI
TMDS_L_TX1N
TMDS_L_TX1P
TMDS_L_TX0P
TMDS_L_TX2N
TMDS_L_TX2P
TMDS_L_TX0N
TMDS_L_TXCN
TMDS_L_TXCP
HDMI_HPLUG
DDC_DAT_HDMI
DDC_CLK_HDMI +5V_HDMI_DDC
TMDS_TX1N
TMDS_TX2PTMDS_TX2N
TMDS_TX0P
TMDS_TX1P
TMDS_TXCP
TMDS_TX0N
TMDS_TXCN
TMDS_L_TX1N
TMDS_L_TX1P
TMDS_L_TX0P
TMDS_L_TX2N
TMDS_L_TX2P
TMDS_L_TX0N
TMDS_L_TXCN
TMDS_L_TXCP
HDMI_HPLUG
TMDS_TX2P
TMDS_TX2N
TMDS_TX0P
TMDS_TX1P
TMDS_TX1N
TMDS_TXCP
TMDS_TXCN
TMDS_TX0N
HDMI_A3N_VGA<15>HDMI_A3P_VGA<15>
HDMI_A2N_VGA<15>HDMI_A2P_VGA<15>
HDMI_A1P_VGA<15>HDMI_A1N_VGA<15>
HDMI_A0P_VGA<15>HDMI_A0N_VGA<15>
PCH_SDVO_CTRLCLK<15>
PCH_SDVO_CTRLDATA<15>
HDMI_DET<15>
+VDISPLAY_VCC
+3VS
+3VS
+5VS
+3VS
+3VS
+3VS
+5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P 1.0
HDMI
Custom
23 56Wednesday, February 01, 2012
2012/01/17 2013/01/16Compal Electronics, Inc.
W=40mils
Place close to JHDMI1
20110805 EMI ADD20111024 EMI ADD
CV41 0.1U_0402_10V7K~D12
RV36 0_1206_5%
12
CV42220P_0402_50V8J
1
2
Part Number Description
RO0000002HM HDMI W/Logo:RO0000002HM
ROYALTY HDMI W/LOGO46@
CV358 100P_0402_50V8J@ 1 2
RV54 0_0402_5%@1 2
RV
46
68
0_
04
02
_1
%
12
CV33 0.1U_0402_10V7K~D12
CV354 3.3P_0402_50V8C~D1 2
CV363 100P_0402_50V8J@ 1 2
LV7
WCM-2012HS-900T_4P
11
22
33
44
RV59200K_0402_5%
@
12
RV51
0_0402_1%
@
1 2
CV350 3.3P_0402_50V8C~D1 2
NC
DV9
BAT1000-7-F_SOT23-3~D@
2 13
RV
43
68
0_
04
02
_1
%
12
RV38 0_0402_5%@1 2
G
D
S
QV11
2N7002_SOT23
2
13
CV359 100P_0402_50V8J@ 1 2
RV60 2.2K_0402_5%1 2
QV12BDMN66D0LDW-7_SOT363-6
3
5
4
RV
44
68
0_
04
02
_1
%
12
CV37 0.1U_0402_10V7K~D12
CV364 100P_0402_50V8J@ 1 2
CV355 3.3P_0402_50V8C~D1 2
RV40 0_0402_5%@
1 2
CV32 0.1U_0402_10V7K~D12
RV
45
68
0_
04
02
_1
%
12
CV349 3.3P_0402_50V8C~D1 2
CV351 3.3P_0402_50V8C~D1 2
RV
42
68
0_
04
02
_1
%
12
RV
47
68
0_
04
02
_1
%
12
RV
49
68
0_
04
02
_1
%
12
CV39 0.1U_0402_10V7K~D12
JHDMI
ACON_HMR2U-AK120CCONN@
D2+1
D2_shield2
D2-3
D1+4
D1_shield5
D1-6
D0+7
D0_shield8
D0-9
CK+10
CK_shield11
CK-12
CEC13
Reserved14
SCL15
SDA16
DDC/CEC_GND17
+5V18
HP_DET19
GND20
GND21
GND22
GND23
RV53100K_0402_5%
12
CV360 100P_0402_50V8J@ 1 2
LV10
WCM-2012HS-900T_4P
11
22
33
44
E
B
C
QV13MMBT3904_NL_SOT23-3
2
31
LV8
WCM-2012HS-900T_4P
11
22
33
44
CV356 3.3P_0402_50V8C~D1 2
RV3910K_0402_5%
12
CV35
10
U_
06
03
_6
.3V
6M
1
2
CV352 3.3P_0402_50V8C~D1 2
FV1
1.5A_6V_1206L150PR~D
12
RV
48
68
0_
04
02
_1
%
12
CV36 0.1U_0402_10V7K~D12
CV361 100P_0402_50V8J@ 1 2
RV56
0_0402_1%
@
12
CV
34
0.1
U_
04
02
_1
0V
7K
~D
1
2
RV37 0_0402_5%@1 2
DV11
BAV99-7-F_SOT23-3
@
2 31
RV52 0_0402_5%@1 2
CV40 0.1U_0402_10V7K~D12
DV10RB751V-40GTE-17_SOD323-2~D
@
21
RV55100K_0402_5%
12
RV35 0_0402_5%@1 2
CV357 100P_0402_50V8J@ 1 2
CV353 3.3P_0402_50V8C~D1 2
RV57
150K_0402_5%1 2
CV362 100P_0402_50V8J@ 1 2
RV50 0_0402_5%@1 2
CV38 0.1U_0402_10V7K~D12
RV41 0_0402_5%@1 2
RV58 2.2K_0402_5%1 2
QV12ADMN66D0LDW-7_SOT363-6
61
2
LV9
WCM-2012HS-900T_4P
11
22
33
44
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
KSO[0..16]
KSI[0..7]
ECAGND
ACIN
EC_SMB_DA1_R
EC_SMB_CK1_RTP_DATA
TP_CLK
EC_CRY1
EC_MUTE#
SYSON
KSI1
KSO9
BKOFF#
KSI7
FAN_SPEED1
LPC_AD1
AD_BID0
KSI3
KSO4
+3VALW_EC
+V18R
EC_RSMRST#
KSO8
KSO2
EC_SMI#
FWR#
VR_ON
SUSP#
KSO16
EN_DFAN1
BATT_TEMP
KSI0
KSO1
SERIRQ
EC_RST#
LPC_AD2
ECAGND
KSO14
KB_RST#
ADP_I
KSI4
EC_SCI#
LPC_AD3
VCOUT0
KSO15
KSO10
KSO0
ACOFF
LPC_AD0
LPC_FRAME#
SPI_CLK
KSO13
EC_CRY2
EC_CRY1
KSI2
KSO11
KSO3
FSEL#
KSI6
BEEP#
+EC_VCCA
EC_MUTE_R
KSO12
PM_SLP_S5#_R
TP_CLK
KSI5
KSO7
EC_TX
BATT_CHG_LED#
TP_DATA
KSO6KSO5
PM_SLP_S3#_R
EC_RX
FRD#
PECI_KB930
EC_SMI#
EC_SMB_CK2EC_SMB_DA2
PWR_PWM_LED#CAPS_LED
BATT_LOW_LED#
LID_SW#
PECI_KB9012
EC_SCI#
SA_PGOOD
EC_CRY2
CPU1.5V_S3_GATE
USB_EN#
EC_MUTE#
EC_LID_OUT#
EC_SMB_DA2
EC_SMB_CK2
PM_SLP_S4#PM_SLP_S4#_R
PCH_HOT#_R PCH_HOT#
PCH_HOT#
VR_HOT#
VCOUT1_PHH_PROCHOT#
PM_SLP_S4#_R
ACIN_DEC_ON_RON/OFF_R
ENBKL
H_PECI
PBTN_OUT#
ECAGND
PCH_PWROK
VCOUT1_PH
EC_SMB_DA1_REC_SMB_DA1EC_SMB_CK1 EC_SMB_CK1_R
SA_PGOOD
DASH_LED_PWM
EC_PME#
WL_BT_LED#
GATEA20
PCH_PWROK
VCOUT0 PCH_PWROK
ME_EN
PCH_PWR_EN
EC_PME#
AD_BID0
EC_PME#
KB_LED_PWM
DASH_LED2#
TOUCH_LED#
DASH_LED3#
DASH_LED1#
HDD_S3.5
KSO1
KSO2
FRD#
FWR#
SPI_CLK
FSEL#
VCIN0_PHVCIN0_PH_R
WOL_EN#
PECI_KB930
WLAN_WAKE#
USB_DET#_DELAY
USB_DET#_DELAY
CMOS_ON#
VCIN0_PH_R
PCH_HOT#_R
DASH_SW3
DASH_SW1
HDD_S3.5
KSI[0..7]<25>
KSO[0..16]<25>
LPC_FRAME#<13>
LPC_AD2<13>
LPC_AD0<13>
LPC_AD3<13>
LPC_AD1<13>
SERIRQ<13>
TP_CLK <25>
BEEP# <30>
EC_SMI#<17>
KB_RST#<17>
BATT_TEMP <43,44>
FAN_SPEED1<25>
ADP_I <43,44>
TP_DATA <25>
EC_RSMRST# <15>
SYSON <27,28,48>VR_ON <50>
CLK_PCI_LPC<16>
PCH_SMLDATA<14>
SPI_CLK <26>FSEL# <26>
FWR# <26>
EN_DFAN1 <25>
BATT_CHG_LED# <32>
FRD# <26>
SUSP# <10,27,28,46,47,48>
EC_SCI#<17>
PLT_RST#<6,16,28,32>
H_PECI <6,17>
CAPS_LED <25>
BATT_LOW_LED# <32>
H_PROCHOT#<6,44>
SUSCLK_R<15>
PM_SLP_S3#<15,28>PM_SLP_S5#<15> EC_LID_OUT# <17>
PM_SLP_S4# <15>
BKOFF# <22>
PCH_HOT# <14>
VR_HOT#<50>
EC_ON <25,28>
ON/OFF <25>
PCH_SMLCLK<14>
EC_TX<32>EC_RX<32>
SA_PGOOD <49>
USB_EN# <32,33>
LID_SW# <26,32>
ACIN <15,35,43,44>
PBTN_OUT# <6,15>
VCIN0_PH <43>
VCIN1_PH <43>
EC_MUTE# <30>
EC_SMB_DA1<43,44>EC_SMB_CK1<43,44>
VCOUT0_PH <45>
ACOFF <44>
ENBKL <15>
DASH_LED_PWM<32>
EC_ENVDD <22>
WL_BT_LED# <32>
PCH_PWROK<6,15>
PWR_PWM_LED# <32>
CPU1.5V_S3_GATE <10>
GATEA20<17>
ME_EN <13>
AOAC_ON<32>
PCH_PWR_EN <27>
PS_ID<43>
65W/90W# <43>
IMVP_IMON <50>
EN_INVPWR <22>
LCD_TEST <22>
EAPD <30,31>
PX_MODE <36,52,53>
PCIE_WAKE#<15,28,32>
PWRSHARE_OE# <33>
KB_LED_PWM <26>
CMOS_ON#<22>
EC_SMB_DA2 <35>
EC_SMB_CK2 <35>
TOUCH_LED#<25>
DASH_LED1# <32>
DASH_LED3# <32>
HDD_S3.5 <29>
PWRSHARE_EN_EC#<33>
DASH_LED2# <32>
DASH_SW3<32>
WOL_EN# <32>
WLAN_WAKE# <32>
USB_DET#_DELAY<28>
VCIN0_PH2 <25>
3S_ON <25>
DASH_SW1<32>
130W/90W#<43>ACIN_65W <35>
+3VALW
+3VALW
+3VALW
+3VS
+5VS
+3VS
+3VLP
+3VLP
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P 1.0
EC ENE-KB930/Co-lay 9012
Custom
24 56Wednesday, February 01, 2012
2012/01/17 2013/01/16
20mil
Compal Electronics, Inc.
KB930
KB9012 R4944
R4930
Stuff
Co-lay KB930/KB9012 PECI
Reserved for KB9012
Analog Board ID definition,Please see page 4.
Ra
Rb
Board ID
reserve for KB9012 Rev.A2
RE29 0_0402_5%1 2
CE
15
0.1
U_
04
02
_1
6V
7K
1
2
CE19
47P_0402_50V8J
1
2
RE27 0_0402_5%1 2
RE22 0_0402_5%1 2
RE5
100K_0402_5%
VOS@
LPC & MISC
Int. K/B Matrix
SM Bus
GPIO
GPIO
AD Input
PWM Output
DA Output
PS2 Interface
SPI Device Interface
SPI Flash ROM
GPO
GPI
UE1
KB9012QF-A3_LQFP128_14X14KB9012@
GATEA20/GPIO001
KBRST#/GPIO012
SERIRQ3
LPC_FRAME#4
LPC_AD35
PM_SLP_S3#/GPIO046
LPC_AD27
LPC_AD18
EC
_V
DD
/VC
C9
LPC_AD010
GN
D/G
ND
11
CLK_PCI_EC12
PCIRST#/GPIO0513
PM_SLP_S5#/GPIO0714
EC_SMI#/GPIO0815
GPIO0A16
GPIO0B17
GPIO0C18
GPIO0D19
EC_SCII#/GPIO0E20
GPIO0F21
EC
_V
DD
/VC
C2
2
BEEP#/GPIO1023
GN
D/G
ND
24
EC_INVT_PWM/GPIO1125
GPIO1226
ACOFF/GPIO1327
FAN_SPEED1/GPIO1428
EC_PME#/GPIO1529
EC_TX/GPIO1630
EC_RX/GPIO1731
PCH_PWROK/GPIO1832
EC
_V
DD
/VC
C3
3
SUSP_LED#/GPIO1934
GN
D/G
ND
35
NUM_LED#/GPIO1A36
EC_RST#37
GPIO1D38
KSO0/GPIO2039
KSO1/GPIO2140
KSO2/GPIO2241
KSO3/GPIO2342
KSO4/GPIO2443
KSO5/GPIO2544
KSO6/GPIO2645
KSO7/GPIO2746
KSO8/GPIO2847
KSO9/GPIO2948
KSO10/GPIO2A49
KSO11/GPIO2B50
KSO12/GPIO2C51
KSO13/GPIO2D52
KSO14/GPIO2E53
KSO15/GPIO2F54
KSI0/GPIO3055
KSI1/GPIO3156
KSI2/GPIO3257
KSI3/GPIO3358
KSI4/GPIO3459
KSI5/GPIO3560
KSI6/GPIO3661
KSI7/GPIO3762
BATT_TEMP/GPIO3863
GPIO3964
ADP_I/GPIO3A65
GPIO3B66
EC
_V
DD
/AV
CC
67
DAC_BRIG/GPIO3C68
AG
ND
/AG
ND
69
EN_DFAN1/GPIO3D70
IREF/GPIO3E71
CHGVADJ/GPIO3F72
ENBKL/GPIO4073
PECI_KB930/GPIO4174
GPIO4275
IMON/GPIO4376
EC_SMB_CK1/GPIO4477
EC_SMB_DA1/GPIO4578
EC_SMB_CK2/GPIO4679
EC_SMB_DA2/GPIO4780
KSO16/GPIO4881
KSO17/GPIO4982
EC_MUTE#/GPIO4A83
USB_EN#/GPIO4B84
CAP_INT#/GPIO4C85
EAPD/GPIO4D86
TP_CLK/GPIO4E87
TP_DATA/GPIO4F88
FSTCHG/GPIO5089
BATT_CHG_LED#/GPIO5290
CAPS_LED#/GPIO5391
PWR_LED#/GPIO5492
BATT_LOW_LED#/GPIO5593
GN
D/G
ND
94
SYSON/GPIO5695
EC
_V
DD
/VC
C9
6
CPU1.5V_S3_GATE/GPXIOA0097
WOL_EN/GPXIOA0198
ME_EN/GPXIOA0299
EC_RSMRST#/GPXIOA03100
EC_LID_OUT#/GPXIOA04101
PROCHOT_IN/GPXIOA05102
H_PROCHOT#_EC/GPXIOA06103
VCOUT0_PH/GPXIOA07104
BKOFF#/GPXIOA08105
PBTN_OUT#/GPXIOA09106
PCH_APWROK/GPXIOA10107
SA_PGOOD/GPXIOA11108
VCIN0_PH/GPXIOD00109
AC_IN/GPXIOD01110
EC
_V
DD
01
11
EC_ON/GPXIOD02112
GN
D0
11
3
ON/OFF/GPXIOD03114
LID_SW#/GPXIOD04115
SUSP#/GPXIOD05116
GPXIOD06117
PECI_KB9012/GPXIOD07118
SPIDI/GPIO5B119
SPIDO/GPIO5C120
VR_ON/GPIO57121
XCLKI/GPIO5D122
XCLKO/GPIO5E123
V18R124
EC
_V
DD
/VC
C1
25
SPICLK/GPIO58126
PM_SLP_S4#/GPIO59127
SPICS#/GPIO5A128
CE12
22P_0402_50V8J
@ 1
2
RE16 1K_0402_1%@1 2
RE170_0402_5% @
12
RE62 47K_0402_5%@1 2
RE150_0402_5% KB9012@
12
RE8 47K_0402_5%12
RE31 0_0402_5%1 2
RE1810K_0402_5%12
RE77 100K_0402_5%1 2
CE11 0.1U_0402_16V7K12
LE2
FBMA-L11-160808-800LMT_060312
CE4
0.1U_0402_16V7K
1
2
RE94.7K_0402_5%12
RE80 0_0402_5%1 2
RE3643_0402_1% 12
CE9 100P_0402_50V8J12
RE400_0402_5%
KB9012@12
RE70 10K_0402_5%1 2
CE18 100P_0402_50V8J
12
RE13 2.2K_0402_5%1 2
CE17 20P_0402_50V81 2
CE14
0.1U_0402_16V7K1 2
RE7 0_0402_5%@ 12
RE37 0_0402_5%KB9012@ 12
CE1
0.1U_0402_16V7K
1
2
RE32 10K_0402_5%
@
1 2
RE10_0805_5%
1 2
RE12 0_0402_5%12
RE6 33_0402_5%@12
RE71 10K_0402_5%@1 2
RE40_0402_5%
KB9012@
12
RE19
0_0402_5%12
RE33 0_0402_5%1 2
RE14 0_0402_5%12
RE78 100K_0402_5%1 2
RE39 0_0402_5%1 2
RE25 2.2K_0402_5%1 2
RE340_0402_5% KB9012@12
RE72 0_0402_5%1 2
RE42 0_0402_5%1 2
CE13
22P_0402_50V8J
@1
2
CE6
1000P_0402_50V7K1
2
RE3047K_0402_5%@
12
RE11 2.2K_0402_5%1 2
RE65 0_0402_5%1 2
RE23 43_0402_1%KB930@1 2
RE45 100K_0402_5%12
RE2
0_0402_5%
KB
93
0@
12
CE16
4.7U_0805_10V4Z
1
2
LE1FBMA-L11-160808-800LMT_0603
1 2
YE132.768KHZ_12.5PF_Q13MC14610002
@
OS
C4
OS
C1
NC
3
NC
2
RE26 0_0402_5%1 2
CE1022P_0402_50V8J@
12
RE63 47K_0402_5%@1 2
RE46 10K_0402_5%
1 2
RE24 2.2K_0402_5%1 2
CE5
1000P_0402_50V7K
1
2
RE35 10K_0402_5%@1 2
RE38 0_0402_5%KB930@
12
CE2
0.1U_0402_16V7K
1
2
RE4343_0402_1%KB9012@
1 2
CE8
0.1U_0402_16V7K
1
2
RE67 0_0402_5%1 2
RE61 0_0402_5%1 2
RE760_0402_5%
12
RE556K_0402_5%INS@
12
RE3100K_0402_5%
12
RE
44
0_
04
02
_5
%
12
RE21 10K_0402_5%1 2
RE64 0_0402_5%1 2
CE3
0.1U_0402_16V7K
1
2
RE41 0_0402_5%1 2
UE2
SN74LVC1G06DCKR_SC70-5
Y4
A2
P5
G3
NC
1
CE70.1U_0402_16V7K
1
2
RE28 0_0402_5%1 2
RE104.7K_0402_5%12
RE47100K_0402_5%
12
RE66 0_0402_5%1 2
RE69 0_0402_5%1 2
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TP_CLKTP_DATA
KSO[0..16]
KSI[0..7]
EN_DFAN1
ON/OFFBTN#PWR_LED#
KB_CAPS_PWR
KB_CAPS_PWR-
KSI0
KSI1
KSI4KSI2
KSI3
KSI5
KSI6KSI7
KSO16
KSO2
KSO4
KSO3KSO1
KSO0
KSO8
KSO7KSO6
KSO5
KSO9
KSO10
KSO13
KSO12
KSO11
KSO14
KSO15
+TPLED
ON/OFFBTN#
TP_CLK<24>TP_DATA<24>
EC_ON<24,28>
ON/OFF <24>
51_ON# <43>
KSO[0..16]<24>
KSI[0..7]<24>
FAN_SPEED1<24>
EN_DFAN1<24>
PWR_LED#<32>
CAPS_LED<24>
TOUCH_LED#<24>
VCIN0_PH2<24>
3S_ON <24>DASH_SW2<32>
+3VS
+3VALW
+FAN_POWER+3VS
+5VS
+FAN_POWER
+3VLP
+5VALW
+5VS+5VS
+3VLP
+3VALW
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P 1.0
SW/TP/SCREW
Custom
25 56Wednesday, February 01, 2012
2012/01/17 2013/01/16Compal Electronics, Inc.
Touch pad
Power ON Circuit
ON/OFF switch
Pop only forSSI debug
TOP Side
Bottom Side
INT_KBD Conn.
40mil
40milFAN Control circuit
To POWER/B
Touch Pad LED
HE1 place around FAN area.
JFAN
ACES_85204-0300NCONN@
11
22
33
GND4
GND5
CE23
10
00
P_
04
02
_5
0V
7K
1
2
RE60
240_0402_1%
1 2
RE73390_0402_5%
1 2
A
D2C191KSKT-5A
VOS@
21
CE200.1U_0402_25V6K
1
2
DE5PESD24VS2UT_SOT23-3~D
231
RE51
10K_0402_5%KB930@
12
RE200_0402_5%
VOS@
12
RE48100K_0402_5%
KB930@
12
SW1SMT1-05-A_4P
@
3
2
1
4
56
RE7913.7K_0402_1%
12
CE252.2U_0603_6.3V6K
1 2
UE3
APE8873M SOP 8P
VEN1
VIN2
GND5
GND6
GND8
VO3
VSET4
GND7
RE75100K_0402_5%
12
SW2SMT1-05-A_4P
@
3
2
1
4
56
RE5010K_0402_5%
12
G
D
S
QE1
SSM3K7002F_SC59-3KB930@
2
13
RE7413.7K_0402_1%@
12
CE22
2.2
U_
06
03
_6
.3V
6K
1
2
R6
390_0402_5%
12
G
D
S
QE3SSM3K7002FU_SC70-3~D
2
13
HE1100K_0402_1%_TSM0B104F4251RZ
VOS@
12
DE1
BAV70W_SOT323-3
2
31
A
D1C191KSKT-5AINS@
21
JPWR
ACES_50504-0040N-001CONN@
11
22
G15
G26
33
44
JTP
ACES_50504-0040N-001CONN@
11
22
G15
G26
33
44
RE49100K_0402_5%KB9012@
12
DE2
BAV70W_SOT323-3
2
31
JKB
ACES_51510-03041-001CONN@
11
44
22
55
33
88
77
66
1010
99
1111
1212
1313
1414
1717
1616
1919
2020
1515
2222
2121
1818
2323
2525
2424
2626
2727
2828
2929
3030
GND31
GND32
CE240.01U_0402_16V7K
1
2
DE3
PESD5V0U2BT_SOT23-3
231
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SPI_CLK_R
SPI_CLK_R
FRD# SPI_SO
SPI_FWR#
SPI_FSEL#KB_BL_PWM
LID_SW#
SPI_CLK <24>
FRD#<24>
FWR# <24>
FSEL#<24>
KB_LED_PWM<24>
LID_SW# <24,32>
KB_DET#<17>
+3VALW
+5VS +5VS_KBL
+5VS_KBL
+3VALW
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P 1.0
26 56Wednesday, February 01, 2012
2012/01/17 2013/01/16
Compal Electronics, Inc.
CONN & LID
Screw Hole
Reserve for EMI please close to U15
SPI ROM 128KB
20mils
20mil
Keyboard back light
20mil
Lid Switch
DA80000R900
JKBL
ACES_50519-00401-001CONN@
11
22
GND5
GND6
33
44
H12H_2P8@
1
S
G
D QE2
SI3456BDV-T1-E3 1N TSOP6 W/D
KBBL@3
624
51
RE68
10K_0402_5%
@
1 2
H23H_2P8@
1
H10H_3P7@
1
CE53
22P_0402_50V8J
@
1 2
RE56
33_0402_5%
@
12
RE58100K_0402_5%KBBL@
12
RE53 0_0402_5%KB930@12
FD1FIDUCAL@
1
H8H_3P7@
1
RE52 0_0402_5%KB930@1 2
H1H_3P3X4P3N@
1
H4H_3P5@
1
RE540_0402_5% KB930@12
CE
54
0.1
U_
04
02
_1
6V
7K
INS@1
2
H21H_2P8@
1
H13H_2P8@
1
H3H_3P5@
1
CE550.1U_0402_16V7KINS@
1
2
H19H_2P8@
1
FE10.75A_24V_1812L075-24DR~OK
@
12
H11H_2P8@
1
CE520.1U_0402_16V7KKB930@
1
2
H24H_2P8@
1
FD2FIDUCIAL@
1
G
D
SQE4
SSM3K7002FU_SC70-3~DKBBL@
2
13
H2H_3P3N@
1
RE550_0402_5% KB930@12
RE590_0805_5%
KBBL@
1 2
H6H_3P7@
1
UE5
S-5712ACDL1-M3T1U_SOT23-3
INS@
GN
D1
OUTPUT3
VD
D2
H7H_3P7@
1
ZZZ1
PCB-MB
H9H_3P7@
1
RE5710K_0402_5%
12
H17H_2P8@
1
FD3FIDUCAL@
1
H15H_2P8@
1
H20H_2P8@
1
H22H_2P8@
1
H5H_3P7@
1
H14H_3P7@
1
CE
57
10
U_
06
03
_6
.3V
6M
KBBL@
1
2
FD4FIDUCIAL@
1
UE4
MX25L1005AMC-12G_SO8
SA00002C100
KB930@
CS#1
SO2
WP#3
GND4
VCC8
HOLD#7
SCLK6
SI5
CE
56
1U
_0
60
3_
10
V6
K
KBBL@
1
2
H16H_2P8@
1
1bios.ru
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SUSP SUSP
+3
V_
D
PCH_PWR_EN#
+1
.5V
S_
D
SUSP
+V
CC
P_
D
+3
VS
_D
SUSP
SUSP
SUSP
+5
VS
_D
SUSP
PCH_PWR_EN#
SUSP
+D
DR
_C
HG
+1
.5V
_C
PU
_V
DD
Q_
CH
G
SYSON#
PCH_PWR_EN#
SYSON#
+1
.5V
_D
SUSP#<10,24,28,46,47,48>
SYSON<24,28,48>
RUN_ON_CPU1.5VS3#<6,10>
PCH_PWR_EN<24>
PCH_PWR_EN#<19>
+3V_PCH+1.5VS +3VS+VCCP
+5VALW
B+_BIAS
+5VS
+3VALW
B+_BIAS
+3VS
B+_BIAS+1.5V +1.5VS
+3VALW
B+_BIAS
+3V_PCH
+5VALW
+5VALW
+0.75VS+1.5V_CPU_VDDQ
+5VALW+3VALW
+1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P 1.0
27 56Wednesday, February 01, 2012
2012/01/17 2013/01/16
Compal Electronics, Inc.
DC/DC Interface
+5VALW to +5VS
+3VALW to +3VS
+1.5V To +1.5VS
+3VALW to +3V_PCH
40mil
QZ1SI4128DY-T1-GE3_SO8
35
2
4
1
678
RZ8
0_0402_5%
CZ110U_0805_10V6K
1
2
RZ4470K_0402_5%
1 2
CZ
15
0.1
U_
06
03
_5
0V
_X
7R
1
2
QZ13A
2N
70
02
DW
-7-F
_S
OT
36
3-6
61
2
CZ
17
0.1
U_
06
03
_5
0V
_X
7R
@1
2
CZ
21
0.1
U_
06
03
_5
0V
_X
7R
@1
2
RZ16
100K_0402_5%
12
QZ13B
2N
70
02
DW
-7-F
_S
OT
36
3-6
3
5
4
QZ2A
DMN66D0LDW-7_SOT363-6
61
2
QZ14B
2N
70
02
DW
-7-F
_S
OT
36
3-6
3
5
4
RZ20
0_0402_5%
CZ510U_0805_10V6K
1
2
G
D
S
QZ9SSM3K7002F_SC59-3
2
13
G
D
S
QZ15SSM3K7002FU_SC70-3
21
3
CZ
18
10
U_
08
05
_1
0V
6K
1
2C
Z1
00
.1U
_0
60
3_
50
V_
X7
R
1
2
CZ610U_0805_10V6K
1
2
G
D
S
QZ10SSM3K7002F_SC59-3
2
13
CZ
16
0.1
U_
06
03
_5
0V
_X
7R
@1
2
RZ5
0_0402_5%
CZ1110U_0805_10V6K
1
2
CZ210U_0805_10V6K
1
2
QZ14A
2N
70
02
DW
-7-F
_S
OT
36
3-6
61
2
RZ13470K_0402_5%
1 2
RZ19100K_0402_5%
12
CZ
19
0.1
U_
04
02
_1
6V
7K
1
2
RZ22
100K_0402_5%
12
RZ24
470_0402_5%
12
RZ3220_0402_5%
12
RZ12100K_0402_5%
12
RZ9
1.5
M_
04
02
_5
%~
D
12
RZ18100K_0402_5%
12
G
D
S
QZ11SSM3K7002FU_SC70-3
2
13
QZ2B
DMN66D0LDW-7_SOT363-6
3
5
4
RZ14
39.2K_0402_1%
QZ7SI4128DY-T1-GE3_SO8
35
2
4
1
678
RZ10100K_0402_5%
12
G
D
S
QZ
6S
SM
3K
70
02
FU
_S
C7
0-3
~D
2
13
CZ81U_0603_10V6K
1
2
CZ710U_0805_10V6K
1
2
RZ23
470_0402_5%
12
G
D
S
QZ12SSM3K7002F_SC59-3
2
13
CZ
90
.1U
_0
60
3_
50
V_
X7
R
1
2
RZ21
2M
_0
40
2_
5%
~D1
2
G
D
S
QZ4SSM3K7002F_SC59-3
2
13
JP2
JUMP_43X79
@
11
22
CZ4
1U
_0
60
3_
10
V6
K
1
2
RZ25
470_0402_5%
12
UZ1
SI4634DY-T1-E3_SO8~D
4
78
65
123
RZ15
1.5
M_
04
02
_5
%~
D
12
CZ1310U_0805_10V6K
1
2
CZ3
10
U_
08
05
_1
0V
6K
1
2
G
D
S
QZ
5S
SM
3K
70
02
FU
_S
C7
0-3
~D
2
13
RZ222_0603_5%~D
12
RZ26
470_0402_5%
12
RZ11
10K_0402_5%
12
QZ3SI4128DY-T1-GE3_SO8
35
2
4
1
678
CZ141U_0603_10V6K
1
2
CZ1210U_0805_10V6K
1
2
RZ17
100K_0402_5%
@
12
RZ27
470_0402_5%
12
RZ7470K_0402_5%
1 2
G
D
S
QZ8SSM3K7002F_SC59-3
2
13
RZ1470_0603_5%
12
CZ
20
0.1
U_
06
03
_5
0V
_X
7R
1
2
RZ6
1.5
M_
04
02
_5
%~
D
12
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
EXPRCRD_CPPE#CARD_RESET#
CPUSB#
USB20_P11
USB20_N11
EXP_USBP11_D+
EXP_USBP11_D-
PCH_SMBDATA
PCH_SMBCLK
CPUSB#
CARD_RESET#
EXPCLK_REQ#
EXP_USBP11_D-EXP_USBP11_D+
CLK_PCIE_EXP#EXPRCRD_CPPE#
PCIE_WAKE#
CLK_PCIE_EXP
PCIE_PTX_EXPRX_N3PCIE_PTX_EXPRX_P3
PCIE_PRX_EXPTX_N3_CPCIE_PRX_EXPTX_P3_C
PLT_RST#STBY#_R
PCH_SMBDATAPCH_SMBCLK
STBY#_R
SYSON_R
SYSON_R
USB_DETECT# USB_DET#_DELAY
USB20_N11<16>
USB20_P11<16>
PCIE_WAKE#<15,24,32>
EXPCLK_REQ#<14>
CLK_PCIE_EXP#<14>CLK_PCIE_EXP<14>
PCIE_PRX_EXPTX_P3<14>PCIE_PRX_EXPTX_N3<14>
PCIE_PTX_EXPRX_P3<14>PCIE_PTX_EXPRX_N3<14>
PLT_RST#<6,16,24,32>
PCH_SMBCLK<6,11,12,14,29,32>PCH_SMBDATA<6,11,12,14,29,32>
PM_SLP_S3#<15,24>
SUSP#<10,24,27,46,47,48>
USB_DET#_DELAY <24>
USB_DETECT# <33>
EC_ON<24,25>EC_ON_35V <45>
SYSON<24,27,48>
+1.5VS
+1.5V_CARD
+3VALW+3VS +3.3V_CARD+3.3V_CARDAUX
+3VS
+1.5VS+1.5V_CARD+3.3V_CARD
+3VS +3VS
+3.3V_CARDAUX
+3.3V_CARD
+1.5V_CARD
+3.3V_CARD +3.3V_CARDAUX
+RTCVCC +RTCVCC +RTCVCC +RTCVCC +RTCVCC +CHGRTC
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P1.0
28 56Wednesday, February 01, 2012
2012/01/17 2013/01/16Compal Electronics, Inc.
PROCESSOR(1/6) DMI,FDI,PEG
Express Card PWR S/W
1A 1A
500mA
500mA 275mA275mA
Express Card
CLOSE TO U1
USB Detected for PWR Share
RX6 0_0402_5%@1 2
CX
30
.1U
_0
40
2_
25
V6
K
EXP@
1
2
R778
100K_0402_5%
12
CX
50
.1U
_0
40
2_
25
V6
K
EXP@
1
2
C130.1U_0402_16V7K
1
2
R787 0_0402_5%
@
1 2
BAV70W-7-F_SOT323-3
D5
2
31
CX
80
.1U
_0
40
2_
25
V6
K
EXP@ 1
2
RX3 0_0402_5%@1 2
RX2 0_0402_5%@1 2
RX7 0_0402_5%1 2
C140.1U_0402_16V7K
1
2
UX1
TPS2231MRGPR-2_QFN20_4X4~DEXP@
STBY#1
3.3VIN2
3.3VOUT3
NC4
NC5
SYSRST#6
GND7
PERST#8
CPUSB#9
CPPE#10
1.5VOUT11
1.5VIN12
NC13
NC14
AUXOUT15
NC16
AUXIN17
RCLKEN18
OC#19
SHDN#20
PAD21
CX
60
.1U
_0
40
2_
25
V6
K
EXP@ 1
2
CX
11
10
U_
06
03
_6
.3V
6M
EXP@1
2
CX
10
0.1
U_
04
02
_2
5V
6K
EXP@ 1
2
CX12 0.1U_0402_10V7K~DEXP@1 2
D4SDMK0340L-7-F
2 1
JEXP
TYCO_2-2041070-6~DCONN@
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
2323
2424
2525
2626
GND27
GND28
U1
TC7SZ14FU_SSOP5~D
Y4
P5
G3
A2
NC1
C4
2.2U_0603_6.3V6K
12
CX13 0.1U_0402_10V7K~DEXP@1 2
C30.1U_0402_16V7K
1
2
R781 0_0402_5%1 2
D3
SD
MK
03
40
L-7
-F
21
R7801M_0402_5%
12
CX
10
.1U
_0
40
2_
25
V6
K
EXP@
1
2
CX
71
0U
_0
60
3_
6.3
V6
M
EXP@1
2
R779
22
0K
_0
40
2_
5%
12
CX
40
.1U
_0
40
2_
25
V6
K
EXP@
1
2
RX
52
.2K
_0
40
2_
5%
EXP@
12
CX
91
0U
_0
60
3_
6.3
V6
M
EXP@1
2
RX8 0_0402_5%1 2
CX
20
.1U
_0
40
2_
25
V6
K
EXP@
1
2
RX
42
.2K
_0
40
2_
5%
EXP@
12
LX1
DLW21SN900SQ2_0805~D
EXP@
11
44
33
22
1bios.ru
A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
SATA_PRX_DTX_N2_C
SATA_PTX_DRX_N2_CSATA_PTX_DRX_P2_C
SATA_PRX_DTX_P2_C
FFS_INT2_Q
HDD_DET#
SATA_PRX_DTX_P0_C
SATA_PTX_DRX_N0_C
SATA_PRX_DTX_N0_C
SATA_PTX_DRX_P0_C
ODD_EN
+3.3V_RUN_FFS
FFS_INT2_Q
FFS_INT2
PCH_SMBDATA
PCH_SMBCLK
FFS_INT1
ODD_DA#_R
HDD_EN_5V
HDD_DET#<13>
ODD_EN#<17>
SATA_PRX_DTX_P0<13>SATA_PRX_DTX_N0<13>
FFS_INT1<16>FFS_INT2<17>
ODD_DETECT#<17>
SATA_PTX_DRX_P0_C<13>SATA_PTX_DRX_N0_C<13>
SATA_PRX_DTX_P2<13>SATA_PRX_DTX_N2<13>
SATA_PTX_DRX_P2_C<13>SATA_PTX_DRX_N2_C<13>
PCH_SMBDATA<6,11,12,14,28,32>PCH_SMBCLK<6,11,12,14,28,32>
ODD_DA#<16>
HDD_S3.5<24>
+5V_HDD
+5VS_ODD
+3VS
+5VS
B+_BIAS
+5VS_ODD
+3VS
+5V_HDD
+3VS
+3VS
+5V_HDD+3VS
+5V_HDD
+5VALW
+5VS
+3VALW
B+_BIAS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
1.0
HDD/ODD/FAN
Custom
29 56Wednesday, February 01, 2012
2012/01/17 2013/01/16Compal Electronics, Inc.
LA-8241P
SATA HDD Conn.
Pleace near ODD CONN
SATA ODD Conn.
ODD Power Control
SHORT DEFAULT
+5V_HDD Source
JP6
PAD-OPEN1x1m
@
1 2
CN14 0.01U_0402_16V7K12
CN1
10
U_
06
03
_6
.3V
6M
FFS@1
2
CN3 0.01U_0402_16V7K1 2
RN10100K_0402_5%@
12
CN8
0.1
U_
04
02
_2
5V
6K
1
2
CN13
1U
_0
40
2_
6.3
V6
K
1
2
QN
5A
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6
@
61
2
10
U_
08
05
_1
0V
6K
CN
18
@1
2
10
U_
08
05
_1
0V
6K
CN
12
1
2
LNG3DMUN1
LNG3DMTR_LGA16_3X3~DFFS@
VDD_IO1
NC2
NC3
SCL/SPC4
GND5
VDD14
CS8
INT 111
INT 29
RES10
GND12
SDO/SA07
SDA / SDI / SDO6
RES13
RES16
RES15
RN8 0_0402_1%@
1 2
CN2
0.1
U_
04
02
_2
5V
6K
FFS@1
2
RN5 100K_0402_5%FFS@1 2
CN15 0.01U_0402_16V7K12
CN9
0.1
U_
04
02
_2
5V
6K
1
2
JHDD
SUYIN_127043FB022G208ZR_RVCONN@
GND1
A+2
A-3
GND4
B-5
B+6
GND7
VCC3.38
VCC3.39
VCC3.310
GND11
GND12
GND13
VCC514
VCC515
VCC516
GND17
RESERVED18
GND19
VCC1220
VCC1221
VCC1222
RN12100K_0402_5%
@
12
QN
1A
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6
FFS@
61
2
RN2100K_0402_5%
FFS@
12
RN11100K_0402_5%
@
12
CN
17
0.1
U_
06
03
_5
0V
_X
7R
@1
2
RN7
1.5
M_
04
02
_5
%~
D
12
QN
1B
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6
FFS@
3
5
4
CN6
0.1
U_
04
02
_2
5V
6K
1
2
JP13
JUMP_43X79
@
11
22
RN1100K_0402_5%
@
12
CN
10
10
00
P_
04
02
_5
0V
7K
1
2
QN
5B
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6
@
3
5
4
RN9100K_0402_5%@
12
RN4 10K_0402_5%FFS@1 2
CN7
10
U_
08
05
_1
0V
6K
1
2
CN
11
0.1
U_
04
02
_2
5V
6K
1
2
S
G
D QN4
SI3456DDV-T1-GE3_TSOP6~D
@
3
624
51
G
D
S
QN3SSM3K7002FU_SC70-3
2
13
CN5
10
00
P_
04
02
_5
0V
7K
1
2
S
G
D
QN2
SI3456BDV-T1-E3 1N TSOP6
3
6
245
1
RN6
470K_0402_5%
12
CN16
0.1
U_
04
02
_2
5V
6K
1
2
RN3 10K_0402_5%FFS@1 2
CN4 0.01U_0402_16V7K1 2
JP7
JUMP_43X79
@
11
22
JODD
TYCO_2-1759838-8~DCONN@
GND114
GND215
GND1
RX+2
RX-3
GND4
TX-5
TX+6
GND7
DP8
+5V9
+5V10
MD11
GND12
GND13
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+FILT_1.65V
+FILT_1.8V
HDA_RST_AUDIO#
HDA_SYNC_AUDIO
HDA_SDOUT_AUDIO
+VDD_IO
PC_BEEP
SPK_L2+
SPK_R1-
SPK_L1-
SPK_R2+
SENSE_A MIC1_PLUGHP_PLUG
PC_BEEP
SPK_L2+_CONNSPK_L1-_CONNSPK_R2+_CONNSPK_R1-_CONN
SPK_L2+
SPK_R1-SPK_R2+SPK_L1-
HP_RHP_L
HDA_SDOUT_AUDIO HDA_RST_AUDIO#
HDA_SYNC_AUDIO
HDA_BITCLK_AUDIO
MIC1_LMIC1_R
MIC1_PLUG
MIC1_L
MIC1_R_RMIC1_R
MIC1_L_R
HP_R
HP_L HPL
HPR
HP_PLUG
SPK_L2+_CONN
SPK_L1-_CONN
SPK_R2+_CONN
SPK_R1-_CONN
AMP_LEFTAMP_RIGHT
HDA_RST_AUDIO#<13>
HDA_SDIN0<13>HDA_SYNC_AUDIO<13>
HDA_SDOUT_AUDIO<13>
HDA_BITCLK_AUDIO<13>
EAPD<24,31>EC_MUTE#<24>
MIC_CLK<22>MIC_DATA<22>
BEEP#<24>
HDA_SPKR<13>
SPK_L2+_CONN<31>
SPK_L1-_CONN<31>
SPK_R2+_CONN<31>
SPK_R1-_CONN<31>
AMP_LEFT <31>AMP_RIGHT <31>
+LDO_OUT_3.3V
+5VS
+5VS
+3VS
+3VS
+5VS
+MICBIASB
GNDA
GNDA
GNDAGNDA
GNDA GNDA
+MICBIASB
+3V_PCH
GNDA
GNDA
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P1.0
30 56Wednesday, February 01, 2012
2012/01/17 2013/01/16Compal Electronics, Inc.
PROCESSOR(1/6) DMI,FDI,PEG
AVDD_3.3 pinis output ofinternal LDO. NOT connectto external supply.
Please bypass caps very close to device.
Internal SPEAKER
Reserve for EMI
PC Beep
ICH Beep
EC Beep
close to Codec
wide 30MIL
for EMI
GND GNDA
VendorrecommendVDD_IO isthe samewith HDA
MIC JACK
HeadPhone JACK
Close to UA1
Pin11,13,14,16
OUTPUT 1Vrms
CA370.1U_0402_16V7K@
1
2
RA8 20K_0402_1%1 2
CA36
10P_0402_50V8J
@1
2
CA1822
0P
_0
40
2_
50
V8
J
@1
2
RA6 5.11K_0402_1%1 2
CA
30
10
00
P_
04
02
_5
0V
7K
1
2
CA
31
10
00
P_
04
02
_5
0V
7K
1
2
CA
25
15
P_
04
02
_5
0V
8J
@
1
2
CA
12
0.1
U_
04
02
_1
6V
7K
1
2
RA14 0_0402_5%1 2
CA
3
4.7
U_
06
03
_6
.3V
6K
1
2RA22 0_0402_5%
@
1 2
LA2
FBMA-L10-160808-800LMT_2P1 2
RA11 0_0402_5%12
RA10 0_0402_5%@
1 2
CA
2
0.1
U_
04
02
_1
6V
7K
1
2
CA
32
10
00
P_
04
02
_5
0V
7K
1
2
CA
11
0.1
U_
04
02
_1
6V
7K
1
2
CA
8
10
U_
06
03
_6
.3V
6M
1
2
RA1910K_0402_5%
12 RA18
10_0402_1%
@
12
G
G
G
JMIC
SINGA_2SJ3013-010311FCONN@
1
2
3
4
5
6
8
9
7
CA26 1U_0603_10V6K1 2
CA20 4.7U_0603_6.3V6K1 2
DA
1P
ES
D5
V0
U2
BT
_S
OT
23
-3
231
RA1
3.3
K_
04
02
_5
%
12
UA1
CX20672-21Z_QFN40_6X6
VD
D_
IO7
VA
UX
_3
.32
SDATA_OUT4
BIT_CLK5
SDATA_IN6
DV
DD
_3
.31
8
SYNC8
RESET#9
PORTA_L22
PORTA_R23
AV
DD
_3
.32
7
PORTC_L30
RPWR_5.015
LPWR_5.012
FLY_P19
FLY_N20
RIGHT-14
RIGHT+16
PORTB_L34
B_BIAS33
PORTB_R35
DMIC_CLK40
AVEE21
C_BIAS32
PORTC_R31
FIL
T_
1.6
52
9
LEFT-13
GPIO1/SPK_MUTE#37
DMIC_1/21
AV
DD
_5
V2
8
GPIO0/EAPD#38
LEFT+11
SENSE_A36
CLASS-D_REF17A
VD
D_
HP
26
FIL
T_
1.8
3PC_BEEP
10G
ND
41
NC24
NC25
SPDIF39
CA1722
0P
_0
40
2_
50
V8
J
@1
2
RA23 0_0402_5%1 2
CA
7
10
U_
06
03
_6
.3V
6M
1
2
DA
2P
ES
D5
V0
U2
BT
_S
OT
23
-3
231
DA7
BAT54C-7-F_SOT23-3
2
3
1
DA
5P
ES
D5
V0
U2
BT
_S
OT
23
-3
@
231
RA12 39.2_0402_1%1 2
CA
14
0.1
U_
04
02
_1
6V
7K
1
2
CA
5
0.1
U_
04
02
_1
6V
7K
1
2
CA2210
P_
04
02
_5
0V
8J
@
1
2
LA6 0_0603_5%1 2
RA9 39.2K_0402_1%1 2
G
G
G
JHP
SINGA_2SJ3013-010311FCONN@
1
2
3
4
5
6
8
9
7
CA21 1000P_0402_50V7K
@
1 2
CA19 4.7U_0603_6.3V6K1 2
CA40
0.1U_0402_16V7K
@1 2
DA
3P
ES
D5
V0
U2
BT
_S
OT
23
-3
231
RA3100_0402_1%
1 2
CA2310
P_
04
02
_5
0V
8J
@
1
2
RA13 39.2_0402_1%1 2
RA5 33_0402_5%1 2
CA
1
1U
_0
60
3_
10
V6
K
1
2
CA
9
4.7
U_
06
03
_6
.3V
6K
1
2
CA
29
10
00
P_
04
02
_5
0V
7K
1
2
CA3410P_0402_50V8J
@
1
2
CA39
0.1U_0402_16V7K
@1 2
LA5 0_0603_5%1 2
RA4100_0402_1%
1 2
DA
6P
ES
D5
V0
U2
BT
_S
OT
23
-3
@
231
LA1
FBMA-L10-160808-800LMT_2P1 2
JSPK
ACES_87213-0400GCONN@
11
22
33
44
GND5
GND6
RA174.7K_0402_5%@
12
LA3 0_0603_5%1 2
CA
4
0.1
U_
04
02
_1
6V
7K
1
2
RA2
3.3
K_
04
02
_5
%
12
CA27
0.1
U_
04
02
_1
6V
7K
@
1
2
CA
6
0.1
U_
04
02
_1
6V
7K
1
2
CA
10
0.1
U_
04
02
_1
6V
7K
1
2
CA28
4.7
U_
06
03
_6
.3V
6K
1
2
RA15 33_0402_5%1 2
RA7 0_0402_5%1 2
CA
13
0.1
U_
04
02
_1
6V
7K
1
2
CA3810P_0402_50V8J
@
1
2
CA
16
0.1
U_
04
02
_1
6V
7K
1
2
LA4 0_0603_5%1 2
CA
24
15
P_
04
02
_5
0V
8J
@
1
2
CA41
0.1U_0402_16V7K
1 2
CA
15
4.7
U_
06
03
_6
.3V
6K
1
2
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BSPR
EAPD_R
GIN0
AMP_LEFT_C
PLIMIT
OUTPR
GIN1
BSPL
OUTNR
GIN1GIN0
OUTPL
OUTNL
BSNR
BSNL
OUTNL
OUTNR
OUTPR
OUTPL
AMP_RIGHT_C
+GVDD
AMP_LEFT
AMP_RIGHT
+PVDD
+PVDD SPK_L2+_CONN
SPK_L1-_CONN
SPK_R2+_CONN
SPK_R1-_CONN
CLK_X1 CLK_X2CLK_X2CLK_X1
LAN_X1_R
LAN_X1_R
PCH_X1_R
VGA_X1_R
EAPD<24,30>
SPK_L2+_CONN <30>
SPK_L1-_CONN <30>
SPK_R2+_CONN <30>
SPK_R1-_CONN <30>
AMP_LEFT<30>
AMP_RIGHT<30>
PCH_RTCX1_R <13>
LAN_X1 <14>
PCH_X1 <14>
VGA_X1 <35>
+GVDD
+GVDD
B+
+3VALW
+5VS
+RTCBATT +RTCVCC
+3VLP
+3VLP
+3VALW
+VCCP
+3VALW+VCCP
+1.8VGS
+1.8VGS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P 1.0
AMP
Custom
56Wednesday, February 01, 2012
2012/01/17 2013/01/16Compal Electronics, Inc.
31
Close to UA2
Pin7,15,16,27,28
5A/120ohm/100MHz
5A/120ohm/100MHz
5A/120ohm/100MHz
5A/120ohm/100MHz
0
0
GAIN1 GAIN0
1
1 0
0
1 1
20dB
26dB
32dB
60Kohm
36dB
30Kohm
15Kohm
AV(inv)INPUTIMPEDANCE
9Kohm
TPA3113 for Speaker
Close to LA9
40mil
Close to LA3
Close to LA4
Close to LA5
Close to LA6
reserved for swing level adjustment
(close to U2)
Need final turn R/C
10/24
Depop if GCLK
with UMA
UMA only
CA4210U_1206_25V6M
AMP@
1
2
C5
22U_0805_6.3V6MGCLK@
1 2
CA
46
1U
_0
60
3_
25
V6
K
AMP@
12
CA
58
1U
_0
60
3_
25
V6
K
AMP@
12
RA35100K_0402_1%
@
12
CA520.027U_0402_16V6K
AMP@
1 2
UA2
TPA3113D2PWPR_HTSSOP28
AMP@
SD#1
FAULT#2
LINP3
LINN4
GAIN05
GAIN16
AVCC7
AGND8
GVDD9
PLIMIT10
RINN11
RINP12
NC13
PBTL14
PVCCR15
PVCCR16
BSPR17
OUTPR18
PGND19
OUTNR20
BSNR21
BSNL22
OUTNL23
PGND24
OUTPL25
BSPL26
PVCCL27
PVCCL28
GND29
RA2728.7K_0402_1%AMP@
12
CA510.027U_0402_16V6K
AMP@
1 2
C8
0.1
U_
04
02
_1
6V
7K
GCLK@1
2
RA33100K_0402_1%
@
12
U2
SLG3NB274VTR_TQFN16_2X3
GCLK@
XTAL_IN1
VDD2
VDDIO_25M_B3
GN
D1
4
25MHz_B5
25MHz_A6
GN
D2
7
VDDIO_25M_A8
32kHz9
VBAT10
VDDIO_27M11
27MHz12
GN
D3
13
VDD_RTC_OUT14
+V3.3A15
XTAL_OUT16
GN
D4
17
RA34100K_0402_1%
AMP@
12
R78533_0402_5%
GCLK@
1 2
RA38
10K_0402_5%
@
12
CA
47
1U
_0
60
3_
25
V6
K
AMP@
12
CA560.22U_0603_25V7K
AMP@
1 2
CA
45
1U
_0
60
3_
25
V6
K
AMP@
12
CA530.22U_0603_25V7K
AMP@
1 2
C1
02
.2U
_0
60
3_
6.3
V6
K
GCLK@
1
2
U2
SLG3NB244VTR_TQFN16_2X3@
CA
57
1U
_0
60
3_
25
V6
K
AMP@
12
RA39
240K_0402_1%
AMP@
1 2
RA26100K_0402_5%AMP@
12
C9
0.1
U_
04
02
_1
6V
7K
GCLK@1
2
R7830_0402_5%
GCLK@
1 2
LA7HCB2012KF-121T50_0805
AMP@
1 2
C7
0.1
U_
04
02
_1
6V
7K
GCLK@1
2
Y125MHZ_20PF_7V25000016
GCLK@
GND
2
33
11
GND
4
CA550.22U_0603_25V7K
AMP@
1 2
RA37
240K_0402_1%
AMP@
1 2
RA24100K_0402_5%
@
1 2
C6
0.1
U_
04
02
_1
6V
7K
GCLK@ 1
2
LA11HCB2012KF-121T50_0805
AMP@
1 2
CA540.22U_0603_25V7K
AMP@
1 2
CA
44
1U
_0
60
3_
25
V6
K
AMP@
12
C1233P_0402_50V8KGCLK@
1
2
RA250_0402_5%
AMP@
1 2
C1133P_0402_50V8KGCLK@
1
2
RA36100K_0402_1%
AMP@
12
LA9FBMA-L11-160808-121LMA30T_0805
AMP@
1 2
R7840_0402_5%
@
1 2
RA40
10K_0402_5%
@
12
CA490.027U_0402_16V6K
AMP@
1 2
RA2810K_0402_1%
AMP@
12
LA8HCB2012KF-121T50_0805
AMP@
1 2
CA
48
1U
_0
60
3_
25
V6
K
AMP@
12
CA430.1U_0402_16V7KAMP@
1
2
R78233_0402_5%GCLK@1 2
CA500.027U_0402_16V6K
AMP@
1 2
LA10HCB2012KF-121T50_0805
AMP@
1 2
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USB20_N10_R
USB20_P10
USB20_N10
USB20_P10_R
USB20_N10_R
USB20_P10_R
SATA_PRX_DTX_P1SATA_PRX_DTX_N1
SATA_PTX_DRX_P1_CSATA_PTX_DRX_N1_C
PWR_LED#
USB10N_R
USB10N_R
USB10P_R
USB10N
USB10P
USB10P_R
USB10N
USB10P
USB3RP3_RUSB3RN3_R
USB3RP4_RUSB3RN4_R
+DAS_PWR
PCH_SATALED#
BATT_LOW_LED#BATT_CHG_LED#
PWR_LED#
WL_BT_LED#
USB20_N2<16>USB20_P2<16>
USB3TN3<16>USB3TP3<16>
USB3RN3<16>USB3RP3<16>
USB20_P3<16>USB20_N3<16>
USB3RP4<16>USB3RN4<16>
USB3TP4<16>USB3TN4<16>
USB20_N10<16>
USB20_P10<16>
SATA_PRX_DTX_P1<13>SATA_PRX_DTX_N1<13>
SATA_PTX_DRX_P1_C<13>
SATA_PTX_DRX_N1_C<13>
PWR_PWM_LED#<24>
BATT_CHG_LED#<24>BATT_LOW_LED#<24>
PCH_SATALED#<13>
WL_BT_LED#<24>
DASH_SW1<24>DASH_SW2<25>DASH_SW3<24>
WOL_EN# <24>
PLT_RST# <6,16,24,28>WLAN_CLKREQ# <14>
USB_OC3# <16>USB_OC2# <16>
LAN_CLKREQ# <14>
USB_EN# <24,33>PCIE_WAKE# <15,24,28>
BT_ON# <17>WL_OFF# <16>
CLK_PCIE_WLAN <14>CLK_PCIE_WLAN# <14>
PCIE_PRX_WLANTX_N2 <14>PCIE_PRX_WLANTX_P2 <14>
PCIE_PTX_WLANRX_P2 <14>PCIE_PTX_WLANRX_N2 <14>
PCIE_PRX_LANTX_P1 <14>PCIE_PRX_LANTX_N1 <14>
CLK_PCIE_LAN <14>CLK_PCIE_LAN# <14>
PCIE_PTX_LANRX_N1 <14>PCIE_PTX_LANRX_P1 <14>
USB20_N4<16>USB20_P4<16>
DASH_LED1#<24>DASH_LED2#<24>DASH_LED3#<24>
AOAC_ON <24>EC_TX <24>EC_RX <24>
USB20_P8<16>USB20_N8<16>
USB20_N5<16>USB20_P5<16>
PCH_SMBDATA <6,11,12,14,28,29>PCH_SMBCLK <6,11,12,14,28,29>
HDD_DETECT# <17>
CLK_LAN_25M <14>LID_SW# <24,26>
DASH_LED_PWM <24>
WLAN_WAKE#<24>
PWR_LED#<25>
+3VS
+5VS
+5VALW
+3VS
+5VALW
+3VS
+3VS
+1.5VS
B+_BIAS+3VALW
+5VS
+5VS
+5VALW
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P 1.0
32 56Wednesday, February 01, 2012
2012/01/17 2013/01/16
Compal Electronics, Inc.
PROCESSOR(1/6) DMI,FDI,PEG
To CardReader/B
To Finger Print
10mils, All pins
To LED/B
TO Function/B
To CardReader/B
* Inspiron only
* Vostro only
<---WLAN (Mini Card 1)
<---10/100/1G LAN
R9 0_0402_5%VOS@1 2
JFP
ACES_51524-0060N-001CONN@
11
22
33
44
55
66
G17
G28 R777
10K_0402_5%
12
R786
100K_0402_5%
12
JCR1
ACES_50504-0040N-001CONN@
11
22
G15
G26
33
44
R7 0_0402_5%@1 2
L2
DLW21SN900SQ2_0805~D
VOS@
11
44
33
22
R8 0_0402_5%@1 2
R1 0_0402_5%@1 2
Q2
AP2301GN-HF_SOT23-3
23 1
G
D
S
Q1
2N7002_SOT23
2
13
R7760_0402_1%@
1 2
D6
PE
SD
5V
0U
2B
T_
SO
T2
3-3
@
231
C1
0.1U_0402_25V6K1
2
JLED2
ACES_51524-0080N-001CONN@
11
22
33
44
55
66
77
88
G19
G210
JCR2
ACES_50504-0040N-001CONN@
11
22
G15
G26
33
44
R7710_0402_1%@
1 2
R2 0_0402_5%@1 2
JLED
ACES_51524-0080N-001CONN@
11
22
33
44
55
66
77
88
G19
G210
R10 0_0402_5%VOS@1 2
JBTB1
ACES_88079-0800A1CONN@
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
2323
2424
2525
2626
2727
2828
2929
3030
3131
3232
3333
3434
3535
3636
3737
3838
3939
4040
4141
4242
4343
4444
4545
4646
4747
4848
4949
5050
5151
5252
5353
5454
5555
5656
5757
5858
5959
6060
6161
6262
6363
6464
6565
6666
6767
6969
7171
7373
7575
7777
7979
6868
7070
7272
7474
7676
7878
GND81
8080
GND82
C20.1U_0402_16V7K
1
2
G
D
S Q3SSM3K7002FU_SC70-3~D
2
13
R7750_0402_1%@
1 2
JFC
ACES_51524-0080N-001CONN@
11
22
33
44
55
66
77
88
G19
G210
L1
DLW21SN900SQ2_0805~D
INS@
11
44
33
22
R7720_0402_1%@1 2
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USB20_N0_R
USB20_P0_R
USB3RP1_R
USB3TN1_R
USB3TP1_R
USB3RN1_R
USB3TP2_R
USB3RP2_R
USB3TP2_R
USB3RN2_R
USB3TN2_R
USB3RP2_R
USB3TN2_R
USB3RN2_R
USB20_P1_R
USB20_N1_R
USB20_N1_R
USB20_P1_R
USB3RP2_R
USB3TN2_R
USB3TP2_R
USB3RN2_RUSB20_P1_SW
USB20_N1_SW
USB3RP1_R
USB3TP1_C USB3TP1_R
USB3TN1_RUSB3TN1_C
USB3TP1_R
USB3RP1_R
USB3TP1_R
USB3RN1_R
USB3TN1_R
USB3RP1_R
USB3TN1_R
USB3RN1_R
USB3RN1_R
USB20_N0
USB20_P0
USB20_N0_R
USB20_P0_R
USB3TN2
USB3TP2
USB3RP2_R
USB3TP2_C USB3TP2_R
USB3TN2_RUSB3TN2_C
USB3RN2_R
USB3TN1
USB3TP1
USB3RN1
USB3RP1
USB3RN2
USB3RP2
SB#
USB20_P1_SWUSB20_N1_SW
PWRSHARE_EN
SEL
USB_EN#
PWRSHARE_EN
PWRSHARE_EN#
USB3TN2<16>
USB3TP2<16>
USB3RN2<16>
USB3RP2<16>
USB3TN1<16>
USB3TP1<16>
USB3RN1<16>
USB3RP1<16>
USB20_N0<16>
USB20_P0<16>
USB20_P1<16>USB20_N1<16>
PWRSHARE_OE#<24>
USB_EN#<24,32> USB_OC0# <16>
USB_OC1# <16>
PWRSHARE_EN_EC#<24>
USB_DETECT#<28>
+5V_USB_PWR1
+5V_USB_PWR2
+5VALW+5VALW
+5V_USB_PWR1
+5VALW
+5V_USB_PWR2
+5VALW
+5VALW
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P 1.0
33 56Wednesday, February 01, 2012
2012/01/17 2013/01/16
Compal Electronics, Inc.
PROCESSOR(1/6) DMI,FDI,PEG
2.0A
USB conn.1
USB conn.2
80mil
80mil
2.0A
UI3
AP2301MPG-13_MSOP8
FLG5
VIN3
VOUT6
GND1
EN4
VOUT7
VIN2
VOUT8
EP
AD
9
LI2
DLW21SN900SQ2L_0805_4P~D
11
22
33
44
JUSB1
TAITW_PUBAU1-09FNLSCNN4H0CONN@
VBUS1
SSTX-8
D+3
GND11
D-2
GND10
GND13
GND4
SSTX+9
SSRX-5
GND7
SSRX+6
GND12
8
DI4
IP4292CZ10-TB_XSON10U10~D
4
5
1
6
2
7
3
10
9
LI1
DLW21SN900HQ2L_0805_4P~D
11
22
33
44
RI14 0_0402_5%@1 2
CI13
0.1
U_
04
02
_1
6V
7K
1
2
CI6
4.7U_0805_10V4Z
1
2
LI5
DLW21SN900SQ2L_0805_4P~D
11
22
33
44
LI4
DLW21SN900HQ2L_0805_4P~D
11
22
33
44
CI3 0.01U_0402_16V7K12
RI20
0_0402_1%
@
1 2
CI10 0.01U_0402_16V7K12
RI16 0_0402_5%@1 2
UI1
SLG55584AVTR_TDFN8_2X2
CEN1
DP3
SELCDP4
DM2
VDD5
TDP6
CB8
TDM7
Thermal Pad9
DI5
PE
SD
5V
0U
2B
T_
SO
T2
3-3
@
231
8
DI1
IP4292CZ10-TB_XSON10U10~D
4
5
1
6
2
7
3
10
9
RI6 0_0402_5%@1 2
RI5 0_0402_5%@1 2
RI10
10K_0402_5%
1 2
RI17 0_0402_5%@1 2
RI4 0_0402_5%@1 2
G
D
S
QI1
SS
M3
K7
00
2F
U_
SC
70
-3~
D
2
13
LI3
DLW21SN900HQ2L_0805_4P~D
11
22
33
44
RI1 0_0402_5%@1 2
CI11 0.01U_0402_16V7K12
RI13 0_0402_5%@1 2
CI2
0.1
U_
04
02
_2
5V
6K
1
2
DI2
PE
SD
5V
0U
2B
T_
SO
T2
3-3
231
+CI1
220U_6.3V_M
1
2
RI15 0_0402_5%@1 2
CI4 0.01U_0402_16V7K12
RI810K_0402_5%
12
+CI8
220U_6.3V_M
1
2
RI1210K_0402_5%
@
12
DI3
SDMK0340L-7-F_SOD323-2~D
12
RI18 0_0402_5%@1 2
RI7 0_0402_5%1 2
LI6
DLW21SN900HQ2L_0805_4P~D
11
22
33
44
RI19
0_0402_1%
@
1 2
CI14
0.1U_0402_16V7K
1
2
CI7
0.1U_0402_16V7K
1
2
RI3 0_0402_5%@1 2
CI17
0.1U_0402_16V7K
1
2
UI2
AP2301MPG-13_MSOP8
FLG5
VIN3
VOUT6
GND1
EN4
VOUT7
VIN2
VOUT8
EP
AD
9
JUSB2
TAITW_USB011-107BRL-TWCONN@
VBUS1
SSTX-8
D+3
GND4
D-2
D1-DP10
GND12
SSTX+9
SSRX-5
GND11
SSRX+6
GND7
GND13
GND14
CI12
4.7U_0805_10V4Z
1
2
CI50.1U_0402_25V6K
1
2
CI9
0.1
U_
04
02
_2
5V
6K
1
2
CI15
0.1U_0402_16V7K
1
2
RI2 0_0402_5%@1 2
RI1
11
00
K_
04
02
_5
%
12
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_PEG_VGACLK_PEG_VGA#
PCIE_CRX_C_GTX_P4PCIE_CRX_C_GTX_N4 PEG_GTX_C_HRX_N4
PEG_GTX_C_HRX_P4
PCIE_CRX_C_GTX_P6PCIE_CRX_C_GTX_N6
PEG_GTX_C_HRX_P6PEG_GTX_C_HRX_N6
PCIE_CRX_C_GTX_P7PCIE_CRX_C_GTX_N7 PEG_GTX_C_HRX_N7
PEG_GTX_C_HRX_P7
PCIE_CRX_C_GTX_P1PCIE_CRX_C_GTX_N1 PEG_GTX_C_HRX_N1
PEG_GTX_C_HRX_P1
PCIE_CRX_C_GTX_P0PCIE_CRX_C_GTX_N0
PEG_GTX_C_HRX_P0PEG_GTX_C_HRX_N0
PCIE_CRX_C_GTX_P5PCIE_CRX_C_GTX_N5 PEG_GTX_C_HRX_N5
PEG_GTX_C_HRX_P5
PCIE_CRX_C_GTX_P3PCIE_CRX_C_GTX_N3 PEG_GTX_C_HRX_N3
PEG_GTX_C_HRX_P3
PCIE_CRX_C_GTX_P2PCIE_CRX_C_GTX_N2
PEG_GTX_C_HRX_P2PEG_GTX_C_HRX_N2
PEG_HTX_C_GRX_P5PEG_HTX_C_GRX_N5
PEG_HTX_C_GRX_P4PEG_HTX_C_GRX_N4
PEG_HTX_C_GRX_P7PEG_HTX_C_GRX_N7
PEG_HTX_C_GRX_P3PEG_HTX_C_GRX_N3
PEG_HTX_C_GRX_P6PEG_HTX_C_GRX_N6
PEG_HTX_C_GRX_P2PEG_HTX_C_GRX_N2
PEG_HTX_C_GRX_P1PEG_HTX_C_GRX_N1
PEG_HTX_C_GRX_P0PEG_HTX_C_GRX_N0
PEG_HTX_C_GRX_P[7..0]
PEG_HTX_C_GRX_N[7..0]
PEG_GTX_C_HRX_P[7..0]
PEG_GTX_C_HRX_N[7..0]
GPU_RST#
GPU_RST#
CLK_PEG_VGA<14>CLK_PEG_VGA#<14>
PEG_HTX_C_GRX_P[7..0]<5>
PEG_HTX_C_GRX_N[7..0]<5>
PEG_GTX_C_HRX_P[7..0] <5>
PEG_GTX_C_HRX_N[7..0] <5>
DGPU_HOLD_RST#<16>
PCH_PLTRST#<16>
+1.0VGS
+3VGS
+1.0VGS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
1.0
ATI_SeymourXT_M2_PCIE/LVDS
Custom
34 56Wednesday, February 01, 2012
2012/01/17 2013/01/16
Compal Electronics, Inc.
LA-8241P
LVDS Interface
GFX PCIE LANE REVERSAL
Chelsea Only
Thames/seymour Only
Install 2K for Thames/Seymour
12/8 Remove CV59~CV74 TX8~1512/8 Remove RX8~15
PCI EXPRESS INTERFACE
CLOCK
CALIBRATION
UV1A
THAMES XT M2 TH@
PWRGOODAH16
PCIE_CALRNY29
PCIE_CALRPY30
PCIE_REFCLKNAA36
PCIE_REFCLKPAB35
PCIE_RX0NY37
PCIE_RX0PAA38
PCIE_RX10NK37
PCIE_RX10PL38
PCIE_RX11NJ36
PCIE_RX11PK35
PCIE_RX12NH37
PCIE_RX12PJ38
PCIE_RX13NG36
PCIE_RX13PH35
PCIE_RX14NF37
PCIE_RX14PG38
PCIE_RX15NE37
PCIE_RX15PF35
PCIE_RX1NW36
PCIE_RX1PY35
PCIE_RX2NV37
PCIE_RX2PW38
PCIE_RX3NU36
PCIE_RX3PV35
PCIE_RX4NT37
PCIE_RX4PU38
PCIE_RX5NR36
PCIE_RX5PT35
PCIE_RX6NP37
PCIE_RX6PR38
PCIE_RX7NN36
PCIE_RX7PP35
PCIE_RX8NM37
PCIE_RX8PN38
PCIE_RX9NL36
PCIE_RX9PM35
PERSTBAA30
PCIE_TX0NY32
PCIE_TX0PY33
PCIE_TX10NL32
PCIE_TX10PL33
PCIE_TX11NL29
PCIE_TX11PL30
PCIE_TX12NK32
PCIE_TX12PK33
PCIE_TX13NJ32
PCIE_TX13PJ33
PCIE_TX14NK29
PCIE_TX14PK30
PCIE_TX15NH32
PCIE_TX15PH33
PCIE_TX1NW32
PCIE_TX1PW33
PCIE_TX2NU32
PCIE_TX2PU33
PCIE_TX3NU29
PCIE_TX3PU30
PCIE_TX4NT32
PCIE_TX4PT33
PCIE_TX5NT29
PCIE_TX5PT30
PCIE_TX6NP32
PCIE_TX6PP33
PCIE_TX7NP29
PCIE_TX7PP30
PCIE_TX8NN32
PCIE_TX8PN33
PCIE_TX9NN29
PCIE_TX9PN30
CV3260.1U_0402_25V6K
DIS@ 1
2
CV57220nF_0402_16V7K DIS@12
UV1
Chelsea Pro
CH@
CV52220nF_0402_16V7K DIS@12
RV641K_0402_5%
DIS@1 2
RV631.27K_0402_1% DIS@1 2
RV2031K_0402_1% CH@1 2
RV198 1.69K_0402_1%~DCH@1 2
CV47220nF_0402_16V7K DIS@12
CV56220nF_0402_16V7K DIS@12
LVTMDP
LVDS CONTROL
UV1G
THAMES XT M2 @
DIGONAJ27
TXCLK_LN_DPE3NAR34
TXCLK_LP_DPE3PAP34
TXCLK_UN_DPF3NAL36
TXCLK_UP_DPF3PAK35
TXOUT_L0N_DPE2NAU35
TXOUT_L0P_DPE2PAW37
TXOUT_L1N_DPE1NAU39
TXOUT_L1P_DPE1PAR37
TXOUT_L2N_DPE0NAR35
TXOUT_L2P_DPE0PAP35
TXOUT_L3NAP37
TXOUT_L3PAN36
TXOUT_U0N_DPF2NAK37
TXOUT_U0P_DPF2PAJ38
TXOUT_U1N_DPF1NAJ36
TXOUT_U1P_DPF1PAH35
TXOUT_U2N_DPF0NAH37
TXOUT_U2P_DPF0PAG38
TXOUT_U3NAG36
TXOUT_U3PAF35
VARY_BLAK27
RV66100K_0402_5%
DIS@
12
CV44220nF_0402_16V7K DIS@12
CV51220nF_0402_16V7K DIS@12
CV43220nF_0402_16V7K DIS@12
CV55220nF_0402_16V7K DIS@12
CV50220nF_0402_16V7K DIS@12
CV49220nF_0402_16V7K DIS@12
CV54220nF_0402_16V7K DIS@12
CV53220nF_0402_16V7K DIS@12
UV13
MC74VHC1G08DFT2G SC70 5PDIS@
B2
A1
Y4
P5
G3
CV46220nF_0402_16V7K DIS@12
CV45220nF_0402_16V7K DIS@12
RV61 0_0402_5%@ 12
CV58220nF_0402_16V7K DIS@12
CV48220nF_0402_16V7K DIS@12
RV652K_0402_1% DIS@1 2
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
GPU_GPIO0GPU_GPIO1GPU_GPIO2
GPU_GPIO9
GPU_GPIO12GPU_GPIO13
GPU_GPIO11
GPU_VID0
GPIO25_TDIGPIO24_TRSTB
GPIO26_TCKGPIO27_TMS
GPIO28_TDO
XTALIN
AC_BATT
XTALOUT
+DPLL_VDDC
+DPLL_PVDDDPLL_PVSS
VRAM_ID0VRAM_ID1VRAM_ID2
+AVDD
+VDD1DI
+TSVDD
XTALINXTALOUT
+VREFG_GPU
GPU_VID1
GPIO24_TRSTBGPIO25_TDI
GPIO26_TCK
GPIO27_TMS
+VREFG_GPU
VGA_CLKREQ#_R
VGA_SMB_DA2
VGA_SMB_CK2
+DPLL_PVDD
+DPLL_VDDC
GPU_GPIO8
GENLK_CLKGENLK_VSYNC
GPIO21_BBEN
GPU_VID2
VDDCI_VID
VGA_SMB_CK2VGA_SMB_DA2
GPU_GPIO0
GPU_GPIO2GPU_GPIO1
AC_BATT
GPU_GPIO9
GPU_GPIO13GPU_GPIO12GPU_GPIO11
GPU_GPIO8
VRAM_ID1
VRAM_ID0
VRAM_ID2
VGA_SMB_CK2
GPU_THERMAL_D-
GPU_THERMAL_D+ VGA_SMB_DA2
THM_ALERT#
GPU_THERMAL_D+GPU_THERMAL_D-
THM_ALERT#
PACIN#
AC_BATT
VGA_CLKREQ#_R
VGA_CRT_CLKVGA_CRT_DATA
VGA_CRT_VSYNCVGA_CRT_HSYNCVGA_CRT_CLKVGA_CRT_DATA
VGA_CRT_RVGA_CRT_GVGA_CRT_B
XTALIN
PS_1
PS_2
PS_3
TS_FDO
TS_FDO
PS_1 PS_2 PS_3
DPLL_PVSS
+DPLL_PVDD
GPU_VID0<52>
GPU_VID1<52>
EC_SMB_DA2 <24>
EC_SMB_CK2 <24>
ACIN<15,24,43,44>
PEG_A_CLKRQ#<14>
VDDCI_VID<53>
VGA_CRT_R <21>
VGA_CRT_G <21>
VGA_CRT_B <21>
VGA_CRT_HSYNC <21>VGA_CRT_VSYNC <21>
VGA_CRT_CLK <21>VGA_CRT_DATA <21>
VGA_X1<31>
GPU_VID2<52>
ACIN_65W<24>
+1.8VGS
+1.8VGS
+1.8VGS
+3VGS
+1.8VGS+3VGS
+3VGS
+1.8VGS
+1.0VGS
+3VGS
+1.8VGS
+3VGS
+3VGS
+3VGS
+3VGS
+3VGS
+3VGS
+3VGS
+3VGS
+1.8VGS
+3VGS
+1.8VGS +1.8VGS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
1.0
ATI_SeymourXT_M2_Main_MSIC
Custom
35 56Wednesday, February 01, 2012
2012/01/17 2013/01/16
Compal Electronics, Inc.
LA-8241P
AUD[1] AUD[0]0 0 No audio function0 1 Audio for DisplayPort and HDMI if dongle is detected1 0 Audio for DisplayPort only1 1 Audio for both DisplayPort and HDMI
HSYNCAUD[1]
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESEGPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET
ENABLE EXTERNAL BIOS ROM
GPIO0 PCIE FULL TX OUTPUT SWINGTX_PWRS_ENB
GPIO1TX_DEEMPH_EN PCIE TRANSMITTER DE-EMPHASIS
GPIO9 VGA ENABLEDBIF_VGA DIS
VIP_DEVICE_STRAP_ENA V2SYNC IGNORE VIP DEVICE STRAPS
GPIO_22_ROMCSB
GPIO2
STRAPS
Advertises PCIE speed when compliance test
DESCRIPTION OF DEFAULT SETTINGSPIN
GPIO[13:11]ROMIDCFG(2:0)
RECOMMENDED
SETTINGS
RSVD
SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT
CONFIGURATION STRAPS
BIOS_ROM_EN
VSYNCAUD[0]
H2SYNC
GPIO8
GPIO21
GENERICC
X
X
0
0
0
0
11
X
XXX
0
0
0
H2SYNC GENERICC
AMD RESERVED CONFIGURATION STRAPSALLOW FOR PULLUP PADS FOR THESE STRAPS BUT DO NOT INSTALLRESISTOR. IF THESE GPIOS ARE USED, THEY MUST KEEP "LOW" ANDNOT CONFLICT DURING RESET
RECOMMENDED SETTINGS 0= DO NOT INSTALL RESISTOR 1 = INSTALL 10K RESISTOR X = DESIGN DEPENDANT NA = NOT APPLICABLE
0.60 V level, Please
VREFG Divider ans
cap close to ASIC
XTALIN
Voltage Swing: 1.8 V
GPIO21 GPIO2 GPIO8
RSVD RESERVED
RSVD RESERVED
RSVD
RSVD
(1.8V@100mA VDD1DI)
(1.8V@65mA AVDD)
(1.8V@20mA TSVDD)
STRAPS
TX_PWRS_ENB GPIO0Transmitter Power Saving Enable0: 50% Tx output swing for mobile mode1: full Tx output swing (Default setting for Desktop)
GPIO1TX_DEEMPH_ENPCI Express Transmitter De-emphasis Enable0: Tx de-emphasis diabled for mobile mode1: Tx de-emphasis enabled (Defailt setting for desktop)
R02
Internal VGA Thermal Sensor
0: 50% swing1: Full swing
0: disable1: enable
0: disable1: enable
0: 2.5GT/s1: 5GT/s
Address:100_1101
VGA Thermal Sensor ADM1032ARMZClosed to GPU
20mil
20mil
20mil
10mil
10mil
10mil
0
0 0
0
0
1
1 1
1 1
64MX16 (1G)
128M16 (2G)
64MX16 (1G)
Hynix 2GBPN:SA00003YO1L
Samsung 2GBPN:SA000047Q1L
RV67
RV68
RV70
RV69
RV71
RV71
RV67
RV69
RV70
RV68
RV72
Vendor VRAM_ID0 VRAM_ID1 VRAM_ID2
Hynix 1GBPN:SA000041S3L
Samsung 1GBPN:SA00004GS1L
RV72
128M16 (2G)
H5TQ1G63DFR-11C
K4W1G1646G-BC11
H5TQ2G63BFR-11C
K4W2G1646C-HC11
1 0
*
(Thames 75mA)
(Thames 125mA)
(Thames 5mA)
65mA
100mA
NC_TSVSSQ should be tied to GND on Thames/Seymour
Not share via for other GND
CRT
Reserved test pad of CRT Signals for debug
Reserved test pad of CRT Signals for debug
for debug CRT
close to YV1
RV67 RV69 RV71MT41J64M16JT-107G
PT
PT
PTMicron 1GBPN:SA00004Y20L
64MX16 (1G)
*
*1 1 1
Add 12/6 for MLPS
Add 12/6 for MLPS
Add 12/8
12/8 Add external thermal sensor BOM
0.935V@Chelsea
CV89
2200P_0402_50V7KCH@
1 2
CV
88
0.1
U_
04
02
_1
6V
7K
DIS
@
1
2
RV7310K_0402_5%
DIS@
12
RV250
0_0402_5%@1 2
RV8810K_0402_5% @1 2
RV239
10K_0402_5%
@
12
CV
87
1U
_0
40
2_
6.3
V6
KD
IS@
1
2
RV67 10K_0402_5%X76@1 2
CV329
0.6
8U
_0
40
2_
10
V
@
1
2
CV
77
10
U_
06
03
_6
.3V
6M
DIS
@
1
2
RV69 10K_0402_5%X76@1 2
RV219 10K_0402_5%@1 2
G
D S
QV28
2N7002_SOT23-3@
2
1 3
CV
79
1U
_0
40
2_
6.3
V6
KD
IS@
1
2
RV95 249_0402_1%DIS@
12
CV
84
0.1
U_
04
02
_1
6V
7K
DIS
@
1
2
CV9418P_0402_50V8J
DIS@
RV89 10K_0402_5%@1 2RV8010K_0402_5% @1 2
RV9010K_0402_5%
DIS@
12
RV7710K_0402_5% @1 2
RV70 10K_0402_5%X76@1 2C
V8
21
0U
_0
60
3_
6.3
V6
MD
IS@
1
2
RV7510K_0402_5% DIS@1 2
RV92 0_0402_5%@1 2
QV14A
2N7002DW-7-F_SOT363-6
DIS@
61
2
LV16
BLM15BD121SN1D_0402
DIS@
1 2
T78
RV246
0_0402_5%@1 2
T80
CV
78
0.1
U_
04
02
_1
6V
7K
DIS
@
1
2
RV97
1M_0402_5%
DIS@
RV2480_0402_5%
TH@1 2
CV85
0.1U_0402_16V7K
CH@
1
2CV95
18P_0402_50V8J
DIS@
QV15BDMN66D0LDW-7_SOT363-6
TH@
3
5
4
RV251
0_0402_5%DIS@1 2
QV15ADMN66D0LDW-7_SOT363-6
TH@
61
2
RV221 150_0402_1%@1 2
RV96
4.7K_0402_5%CH@
12
CV81 0.1U_0402_16V7KDIS@
12
DPA
DPB
DPC
DPD
MUTI GFX
I2C
GENERAL PURPOSE I/O
DAC1
DAC2
DDC/AUX
THERMAL
PLL/CLOCK
UV1B
THAMES XT M2
@
DMINUSAG29
DPLL_PVDDAM32
DPLL_PVSSAN32
DPLL_VDDCAN31
DPLUSAF29
DVPCLKAR1
DVPCNTL_0AP8
DVPCNTL_1AW8
DVPCNTL_2AR3
DVPCNTL_MVP_0AR8
DVPCNTL_MVP_1AU8
DVPDATA_0AU1
DVPDATA_1AU3
DVPDATA_10AV7
DVPDATA_11AN7
DVPDATA_12AV9
DVPDATA_13AT9
DVPDATA_14AR10
DVPDATA_15AW10
DVPDATA_16AU10
DVPDATA_17AP10
DVPDATA_18AV11
DVPDATA_19AT11
DVPDATA_2AW3
DVPDATA_20AR12
DVPDATA_21AW12
DVPDATA_22AU12
DVPDATA_23AP12
DVPDATA_3AP6
DVPDATA_4AW5
DVPDATA_5AU5
DVPDATA_6AR6
DVPDATA_7AW6
DVPDATA_8AU6
DVPDATA_9AT7
GENERICAAJ19
GENERICBAK19
GENERICCAJ20
GENERICDAK20
GENERICE_HPD4AJ24
GENERICF_HPD5AH26
GENERICG_HPD6AH24
GPIO_0AH20
GPIO_1AH18
GPIO_10_ROMSCKAJ16
GPIO_11AK16
GPIO_12AL16
GPIO_13AM16
GPIO_14_HPD2AM14
GPIO_15_PWRCNTL_0AM13
GPIO_16AK14
GPIO_17_THERMAL_INTAG30
GPIO_18_HPD3AN14
GPIO_19_CTFAM17
GPIO_2AN16
GPIO_20_PWRCNTL_1AL13
GPIO_21_BB_ENAJ14
GPIO_22_ROMCSBAK13
GPIO_23_CLKREQBAN13
GPIO_3_SMBDATAAH23
GPIO_4_SMBCLKAJ23
GPIO_5_AC_BATTAH17
GPIO_6AJ17
GPIO_7_BLONAK17
GPIO_8_ROMSOAJ13
GPIO_9_ROMSIAH15
H2SYNC/GENLK_CLKAD29
HPD1AK24
HSYNCAC36
JTAG_TCKAK23
JTAG_TDIAN23
JTAG_TDOAM24
JTAG_TMSAL24
JTAG_TRSTBAM23
DDCDATA_AUX7NAK29
DDCCLK_AUX7PAK30
TS_FDOAK32
TSVDDAJ32
TSVSSAJ33
VREFGAH13
VSS1DIAC34
VSS2DI/NCAG32
XTALINAV33
XTALOUTAU34
A2VDD/NCAG33
A2VDDQ/NCAD33
A2VSSQ/TSVSSQAF33
AUX1NAL27
AUX1PAM27
AUX2NAM20
AUX2PAN20
AVDDAD34
AVSSQAE34
BAF37
B2/NCAF30
B2B/NCAF31
BBAE38
C/NCAC32
COMP/NCAF32
DDC1CLKAM26
DDC1DATAAN26
DDC2CLKAM19
DDC2DATAAL19
DDC6CLKAJ30
DDC6DATAAJ31
DDCDATA_AUX3NAM30
DDCCLK_AUX3PAL30
DDCDATA_AUX4NAM29
DDCCLK_AUX4PAL29
DDCDATA_AUX5NAM21
DDCCLK_AUX5PAN21
GAE36
G2/NCAD30
G2B/NCAD31
GBAD35
RAD39
R2/NCAC30
R2B/NCAC31
R2SET/NCAA29
RBAD37
RSETAB34
SCLAK26
SDAAJ26
TX0M_DPA2NAR24
TX0M_DPC2NAR14
TX0P_DPA2PAT25
TX0P_DPC2PAT15
TX1M_DPA1NAV25
TX1M_DPC1NAV15
TX1P_DPA1PAU26
TX1P_DPC1PAU16
TX2M_DPA0NAR26
TX2M_DPC0NAR16
TX2P_DPA0PAT27
TX2P_DPC0PAT17
TX3M_DPB2NAU30
TX3M_DPD2NAR20
TX3P_DPB2PAV31
TX3P_DPD2PAT21
TX4M_DPB1NAT31
TX4M_DPD1NAV21
TX4P_DPB1PAR32
TX4P_DPD1PAU22
TX5M_DPB0NAU32
TX5M_DPD0NAR22
TX5P_DPB0PAT33
TX5P_DPD0PAT23
TXCAM_DPA3NAV23
TXCAP_DPA3PAU24
TXCBM_DPB3NAT29
TXCBP_DPB3PAR30
TXCCM_DPC3NAV13
TXCCP_DPC3PAU14
TXCDM_DPD3NAT19
TXCDP_DPD3PAU20
V2SYNC/GENLK_VSYNCAC29
VDD1DIAC33
VDD2DI/NCAG31
VSYNCAC38
Y/NCAD32
TS_A/NCAL31
XO_INAW34
XO_IN2AW35
SWAPLOCKAAJ21
SWAPLOCKBAK21
RV218 10K_0402_5%@1 2
RV7910K_0402_5% @1 2
LV13BLM15BD121SN1D_0402
DIS@1 2
RV93 499_0402_1%DIS@
12
CV333
0.6
8U
_0
40
2_
10
V
@
1
2
RV1992.2K_0402_5%@
12
RV2000_0402_5%
@
12
CV
91
10
U_
06
03
_6
.3V
6M
DIS
@
1
2
RV232 0_0402_5%
GCLK@
1 2
CV
80
10
U_
06
03
_6
.3V
6M
DIS
@
1
2
T79
CV
93
0.1
U_
04
02
_1
6V
7K
DIS
@
1
2
T81
RV220 150_0402_1%@1 2
QV14B2N7002DW-7-F_SOT363-6
DIS@
3
5
4
YV1
27MHZ_16PF_7V27000011
DIS@
GND
2
33
11
GND
4
RV7810K_0402_5% @1 2
RV94 0_0402_5%@1 2
RV247
0_0402_5%@1 2
RV222 150_0402_1%@1 2
RV216 10K_0402_5%@1 2
RV238
4.75K_0402_1%
CH@
12
CV9010P_0402_50V8J
@
1
2
CV
83
1U
_0
40
2_
6.3
V6
KD
IS@
1
2
CV
76
1U
_0
40
2_
6.3
V6
KD
IS@
1
2
RV8510K_0402_5% @1 2
RV8110K_0402_5% DIS@1 2
RV9110K_0402_5%
DIS@
12
LV15
BLM15BD121SN1D_0402
DIS@
12
LV12BLM15BD121SN1D_0402
DIS@1 2
RV8210K_0402_5% @1 2
RV744.7K_0402_5%DIS@
12
RV240
4.75K_0402_1%
CH@
12
RV71 10K_0402_5%X76@1 2
RV242
4.75K_0402_1%
CH@
12
RV72 10K_0402_5%X76@1 2
UV14
ADM1032ARMZ-2REEL_MSOP8CH@
VDD1
ALERT#6
THERM#4
GND5
D+2
D-3
SCLK8
SDATA7
RV98 4.7K_0402_5%
CH@
1 2
CV
86
10
U_
06
03
_6
.3V
6M
DIS
@
1
2
LV14
BLM15BD121SN1D_0402
DIS@
12
RV235
10K_0402_5%
@
12
RV8710K_0402_5% @1 2
CV
75
0.1
U_
04
02
_1
6V
7K
DIS
@
1
2
RV237
8.45K_0402_1%
@
12
CV
92
1U
_0
40
2_
6.3
V6
KD
IS@
1
2
RV241
10K_0402_5%
@
12
RV207
0_0402_5%DIS@1 2
RV217 10K_0402_5%@1 2
RV8310K_0402_5% @1 2
RV236
10K_0402_5%
CH@
12
RV84 499_0402_1%DIS@1 2RV7610K_0402_5% DIS@1 2
CV331
0.6
8U
_0
40
2_
10
V
CH@
1
2
RV68 10K_0402_5%X76@1 2
RV8610K_0402_5% @1 2
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
1.0V_ON#
1.0V_ON#
VDDC_ON#
RUNPWROK
PX_MODE
VDDC_ON#
PX_MODE#PX_MODE#
PXS_PWREN#PXS_PWREN
PXS_PWREN
PXS_PWREN#
PXS_PWREN#
PXS_PWREN#
PX_MODE
PX_MODEPXS_PWREN
VGA_PWRGD<17,52>
PX_MODE <24,52,53>
PXS_PWREN<16,52>
PX_EN<37>
+3VGS
+1.0VGS
+VGA_CORE
+BIF_VDDC
+5VS+5VS
+3VGS
+3VGS
+1.5V +1.5VGS
B+_BIAS
+3VS +3VGS
+5VALW
+3VALW
+3VALW
+3VGS
+1.8VS +1.8VGS
B+_BIAS
+VGA_CORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P 1.0
ATI_SeymourXT_M2_BACO POWER
C
36 56Wednesday, February 01, 2012
2012/01/17 2013/01/16
Compal Electronics, Inc.
+1.5VS TO +1.5VGS
+3.3VS TO +3.3VGS
[email protected], in BACO mode
60mil
60mil
60mil
Circuits to support BACO
PX_MODE=1 for Normal Operation
PX_MODE=0 for BACO mode to shut down power rails expcept VDDR3,PCIE_VDDC and 1.8V rail
Switch circuits in BACO desingns for Thanes/Seymour only
+1.8VS TO +1.8VGS
for PX4.0
for PX4.0 and PX5.0
Power Seguence of Thames and Chelsea
+3VGS
+VGA_CORE
+VDDCI
+1.5VGS
+1.0VGS
+1.8VGS<20ms
PX4.0 +VGA_CORE,VDDCI,+1.5VGS ON
PX4.0 +3VGS, +1.0VGS,+1.8VGS OFF
Note:
PX5.0 +3VGS,+VGA_CORE,VDDCI,+1.5VGV,+1.0VGS,+1.8VGS OFF
for PX5.0
for PX5.0
60mil
RV105
20K_0402_5%
DIS@
12
RV233 0_0402_5%DIS@
1 2
CV98
0.1U_0402_16V7K@
1
2
CV20.1U_0603_25V7KDIS@
1
2
CV97
22U_0805_6.3V6MDIS@
1
2
RV1045.11K_0402_1%
DIS@
12
RV11220K_0402_5%
DIS@
RV2120_0402_5%@
12
DV12RB751V_SOD323
@
21
JP9
2MM
@
2 1
RV10010K_0402_5%
CH@
12
RV111470_0603_5%
@
12
UV35
DMN3030LSS-13_SOP8L-8
DIS@
365
78
2
4
1
G
D
S
QV10
2N7002H_SOT23-3DIS@
2
13
G
D
S
QV29
2N7002H_SOT23-3
@
2
13
RV113
300K_0402_5%DIS@1 2
UV17AO4304L_SO8
DIS@
62
4
1
35
78
RV108
1K_0402_5%
DIS@
CV1061U_0603_10V6K
DIS@1
2
G
D
S
QV212N7002K_SOT23-3DIS@
2
13
CV102
1U_0603_10V6K
DIS@
1
2
RV114100K_0402_5%
DIS@
12
RV117100K_0402_5%DIS@
12
CV100
1U_0603_10V6K
@
1
2
RV116 0_0402_5%@
1 2
CV101
10U_0603_6.3V6M
DIS@
1
2
CV1030.1U_0603_25V7K
DIS@1
2
QV27BDM
N66D
0LD
W-7
_S
OT
363-6
DIS@
34
5
G
D
S
QV24
2N7002H_SOT23-3
DIS@2
13
RV109100K_0402_5%
DIS@
12
G
DS
QV16
AO3416_SOT23-3CH@
2
13
RV2340_0603_5%TH@
1 2
UV15
MC74VHC1G08DFT2G SC70 5P
@B
2
A1
Y4
P5
G3
G
D
S QV262N7002K_SOT23-3
@
2
13
G
DS
QV20
AO3416_SOT23-3@
2
13
RV2140_0402_5%@
1 2
QV18ADMN66D0LDW-7_SOT363-6
@
1
2
6
UV16
MC74VHC1G08DFT2G SC70 5P@
B2
A1
Y4
P5
G3
RV106470_0603_5%@
12
G
D
S QV232N7002K_SOT23-3@
2
13
G
DS
QV19
AO3416_SOT23-3@
2
13
JP8
2MM
@
2 1
RV128330K_0402_5%
DIS@
12
QV18BDMN66D0LDW-7_SOT363-6
@
34
5
G
D
S
QV252N7002_SOT23
DIS@2
13
CV990.1U_0402_16V7K
@
1 2
RV2490_0805_5%@
1 2
J92MM
@
2 1
RV213
470_0603_5%@
12
RV211470K_0402_5%DIS@
1 2
CV
96
0.1
U_0402_16V
7K
@
1
2
RV9910K_0402_5%
@
12
QV27ADM
N66D
0LD
W-7
_S
OT
363-6
DIS@
1
2
6
G
DS
QV17
AO3416_SOT23-3CH@
2
13
CV105
10U_0603_6.3V6M
DIS@
1
2
RV1150_0402_5%
@12
CV104
10U_0603_6.3V6M
DIS@
1
2
RV101
10K_0402_5%
DIS@
12
QV22AP2301GN-HF_SOT23-3
DIS@
2
3 1
RV1030_0805_5%CH@
1 2
CV3211U_0603_10V6KDIS@
1
2
RV107
20K_0402_5%
DIS@
CV1070.1U_0603_25V7K
DIS@
1
2
CV32010U_0805_10V6KDIS@
1
2
RV102
0_0402_5%
DIS@1 2
RV110
0_0402_5%@1 2
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+DPCD_VDD18
+DPEF_VDD10
MECH#1MECH#2MECH#3
+DPAB_VDD18
+DPAB_VDD10
+DPEF_VDD18
+DPCD_VDD10
PS_0
PS_0
PX_EN <36>
+1.8VGS
+1.0VGS
+DPEF_VDD10
+1.0VGS
+1.8VGS
+DPAB_VDD18
+DPAB_VDD10
+DPAB_VDD18
+DPAB_VDD18
+DPCD_VDD18
+DPCD_VDD18
+DPEF_VDD18
+DPEF_VDD18
+DPCD_VDD10
+DPCD_VDD18
+DPCD_VDD18
+DPCD_VDD10
+DPEF_VDD10
+DPEF_VDD18
+DPEF_VDD10
+1.8VGS +DPEF_VDD18
+1.0VGS+DPCD_VDD10
+DPAB_VDD18
+DPAB_VDD10
+1.8VGS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
1.0
ATI_SetmourXT_M2_PWR_GND
C
37 56Wednesday, February 01, 2012
2012/01/17 2013/01/16
Compal Electronics, Inc.
LA-8241P
130mA
130mA
110mA
110mA
20mA
20mA
1.8V@300mA DPAB_VDD18)
(1.0V@220mA DPAB_VDD10)
1.8V@300mA DPCD_VDD18)
1.0V@220mA DPCD_VDD10)
1.8V@300mA DPEF_VDD18)
1.0V@240mA DPEF_VDD10)
(Thames 330mA)
(Thames 220mA)
(Thames 330mA)
Thames/Seymour Only
Do not install for Heathrow/Chelsea
PS_0 Should be tied to GND on Thames/Seymour
(Thames 220mA)
(Thames 330mA)
(Thames 330mA)
20mil
20mil
20mil
20mil
20mil
20mil
20mil
20mil
20mA
20mA
20mA
20mA 10mil
10mil
10mil
10mil
10mil
10mil
20mil
20mil
20mil
20mil
0.935V@Chelsea
0.935V@Chelsea
0.935V@Chelsea
PS0:
PS1:
PS2:
PS3:
11001
11000
00000
11000
MLPS BitAMD recommended setting
RV243=8.45K
RV237=NC
RV239=NC
RV241=NC
RV201=2K CV335=NC
RV238=4.75K CV329=NC
RV240=4.75K CV331=0.68u
RV242=4.75K CV333=NC
R_PU R_PD Cstrap
CV
109
1U
_0402_6.3
V6K
@
1
2
CV
121
1U
_0402_6.3
V6K
@
1
2
CV
112
1U
_0402_6.3
V6K
@
1
2
CV
117
10U
_0603_6.3
V6M
@
1
2
RV1210_0402_5%
DIS@
1 2
RV1254.7K_0402_5%DIS@
12
CV
124
1U
_0402_6.3
V6K
@
1
2
CV
108
0.1
U_0402_16V
7K
@
1
2
RV124
0_0402_5%
DIS@
1 2
CV
116
10U
_0603_6.3
V6M
@
1
2
CV
113
0.1
U_0402_16V
7K
@
1
2
CV
118
1U
_0402_6.3
V6K
@
1
2
RV127150_0402_1%
DIS@
12
RV201
2K_0402_1%
CH@
CV
119
0.1
U_0402_16V
7K
@
1
2
CV
120
10U
_0603_6.3
V6M
@
1
2
T83 PAD
CV
123
10U
_0603_6.3
V6M
@
1
2
RV120
0_0402_5%
DIS@
1 2
RV126
0_0402_5%
DIS@
1 2
CV
110
10U
_0603_6.3
V6M
@
1
2
RV201
0_0402_5%
TH@
12
DP PLL POWER
DP A/B POWERDP C/D POWER
DP E/F POWER
UV1H
THAMES XT M2@
DPAB_VDD18/DPA_PVDDAU28
DP_VSSR/DPA_PVSSAV27
DPAB/DPA_VDD10#1AP31
DPAB/DPA_VDD10#2AP32
DPAB/DPA_VDD18#1AN24
DPAB/DPA_VDD18#2AP24
DP/DPA_VSSR#1AN27
DP/DPA_VSSR#2AP27
DP/DPA_VSSR#3AP28
DP/DPA_VSSR#4AW24
DP/DPA_VSSR#5AW26
DPAB_CALRAW28
DPAB_VDD18/DPB_PVDDAV29
DP_VSSR/DPB_PVSSAR28
DPAB/DPB_VDD10#1AN33
DPAB/DPB_VDD10#2AP33
DPAB/DPB_VDD18#1AP25
DPAB/DPB_VDD18#2AP26
DP/DPB_VSSR#1AN29
DP/DPB_VSSR#2AP29
DP/DPB_VSSR#3AP30
DP/DPB_VSSR#4AW30
DP/DPB_VSSR#5AW32
DPCD_VDD18/DPC_PVDDAU18
DP_VSSR/DPC_PVSSAV17
DPCD/DPC_VDD10#1AP13
DPCD/DPC_VDD10#2AT13
DPCD/DPC_VDD18#1AP20
DPCD/DPC_VDD18#2AP21
DP/DPC_VSSR#1AN17
DP/DPC_VSSR#2AP16
DP/DPC_VSSR#3AP17
DP/DPC_VSSR#4AW14
DP/DPC_VSSR#5AW16
DPCD_CALRAW18
DPCD_VDD18/DPD_PVDDAV19
DP_VSSR/DPD_PVSSAR18
DPCD/DPD_VDD10#1AP14
DPCD/DPD_VDD10#2AP15
DPCD/DPD_VDD18#1AP22
DPCD/DPD_VDD18#2AP23
DP/DPD_VSSR#1AN19
DP/DPD_VSSR#2AP18
DP/DPD_VSSR#3AP19
DP/DPD_VSSR#4AW20
DP/DPD_VSSR#5AW22
DPEF_VDD18/DPE_PVDDAM37
DP_VSSR/DPE_PVSSAN38
DPEF/DPE_VDD10#1AL33
DPEF/DPE_VDD10#2AM33
DPEF/DPE_VDD18#1AH34
DPEF/DPE_VDD18#2AJ34
DP/DPE_VSSR#1AN34
DP/DPE_VSSR#2AP39
DP/DPE_VSSR#3AR39
DP/DPE_VSSR#4AU37
DPEF_CALRAM39
DPEF_VDD18/DPF_PVDDAL38
DP_VSSR/DPF_PVSSAM35
DPEF/DPF_VDD10#1AK33
DPEF/DPF_VDD10#2AK34
DPEF/DPF_VDD18#1AF34
DPEF/DPF_VDD18#2AG34
DP/DPF_VSSR#1AF39
DP/DPF_VSSR#2AH39
DP/DPF_VSSR#3AK39
DP/DPF_VSSR#4AL34
DP/DPF_VSSR#5AM34
T82 PAD
CV335
0.6
8U
_0402_10V
@
1
2
RV123 150_0402_1%DIS@1 2
RV243
8.45K_0402_1%
CH@
12
RV122150_0402_1% DIS@ 12
RV119
0_0402_5%
DIS@
1 2
GND
UV1F
THAMES XT M2@
PCIE_VSS#1AB39
PCIE_VSS#10J31
PCIE_VSS#11J34
PCIE_VSS#12K31
PCIE_VSS#13K34
PCIE_VSS#14K39
PCIE_VSS#15L31
PCIE_VSS#16L34
PCIE_VSS#17M34
PCIE_VSS#18M39
PCIE_VSS#19N31
PCIE_VSS#2E39
PCIE_VSS#20N34
PCIE_VSS#21P31
PCIE_VSS#22P34
PCIE_VSS#23P39
PCIE_VSS#24R34
PCIE_VSS#25T31
PCIE_VSS#26T34
PCIE_VSS#27T39
PCIE_VSS#28U31
PCIE_VSS#29U34
PCIE_VSS#3F34
PCIE_VSS#30V34
PCIE_VSS#31V39
PCIE_VSS#32W31
PCIE_VSS#33W34
PCIE_VSS#34Y34
PCIE_VSS#35Y39
PCIE_VSS#4F39
PCIE_VSS#5G33
PCIE_VSS#6G34
PCIE_VSS#7H31
PCIE_VSS#8H34
PCIE_VSS#9H39
VSS_MECH#1A39
VSS_MECH#2AW1
VSS_MECH#3AW39
GND#1A3
GND#10AA6
GND#98F13
GND#100F15
GND#101F17
GND#102F19
GND#103F21
GND#104F23
GND#105F25
GND#106F27
GND#107F29
GND#108F31
GND#11AB12
GND#109F33
GND#110F7
GND#111F9
GND#112G2
GND#113G6
GND#114H9
GND#115J2
GND#116J27
GND#117J6
GND#118J8
GND#12AB15
GND#119K14
GND#120K7
GND#121L11
GND#122L17
GND#123L2
GND#124L22
GND#125L24
GND#126L6
GND#127M17
GND#128M22
GND#13AB17
GND#129M24
GND#130N16
GND#131N18
GND#132N2
GND#133N21
GND#134N23
GND#135N26
GND#136N6
GND#137R15
GND#138R17
GND#14AB20
GND#139R2
GND#140R20
GND#141R22
GND#142R24
GND#143R27
GND#144R6
GND#145T11
GND#146T13
GND#147T16
GND#148T18
GND#15AB22
GND#149T21
GND#150T23
GND#151T26
GND#153U15
GND#154U17
GND#155U2
GND#156U20
GND#157U22
GND#158U24
GND#159U27
GND#16AB24
GND#160U6
GND#161V11
GND#163V16
GND#164V18
GND#165V21
GND#166V23
GND#167V26
GND#168W2
GND#169W6
GND#170Y15
GND#17AB27
GND#171Y17
GND#172Y20
GND#173Y22
GND#174Y24
GND#175Y27
GND#18AC11
GND#19AC13
GND#2A37
GND#20AC16
GND#21AC18
GND#22AC2
GND#23AC21
GND#24AC23
GND#25AC26
GND#26AC28
GND#27AC6
GND#28AD15
GND#29AD17
GND#3AA16
GND#30AD20
GND#31AD22
GND#32AD24
GND#33AD27
GND#34AD9
GND#35AE2
GND#36AE6
GND#37AF10
GND#38AF16
GND#39AF18
GND#4AA18
GND#40AF21
GND#41AG17
GND#42AG2
GND#43AG20
GND#44AG22
GND#45AG6
GND#46AG9
GND#47AH21
GND#48AJ10
GND#5AA2
GND#49AJ11
GND#50AJ2
GND#51AJ28
GND#52AJ6
GND#53AK11
GND#54AK31
GND#55AK7
GND#56AL11
GND#57AL14
GND#58AL17
GND#6AA21
GND#59AL2
GND#60AL20
GND/PX_EN#61AL21
GND#62AL23
GND#63AL26
GND#64AL32
GND#65AL6
GND#66AL8
GND#67AM11
GND#68AM31
GND#7AA23
GND#69AM9
GND#70AN11
GND#71AN2
GND#72AN30
GND#73AN6
GND#74AN8
GND#75AP11
GND#76AP7
GND#77AP9
GND#78AR5
GND#8AA26
GND#79B11
GND#80B13
GND#81B15
GND#82B17
GND#83B19
GND#84B21
GND#85B23
GND#86B25
GND#87B27
GND#9AA28
GND#88B29
GND#89B31
GND#90B33
GND#91B7
GND#92B9
GND#93C1
GND#94C39
GND#95E35
GND#96E5
GND#97F11
GND#152U13
GND#162V13
RV118
0_0402_5%
DIS@
1 2
CV
122
0.1
U_0402_16V
7K
@
1
2
T84 PAD
CV
114
0.1
U_0402_16V
7K
@
1
2
CV
115
1U
_0402_6.3
V6K
@
1
2
CV
111
10U
_0603_6.3
V6M
@
1
2
CV
125
0.1
U_0402_16V
7K
@
1
2
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+PCIE_PVDD
+VDDR4
+PCIE_VDDR
+MPV18
+SPV18
+SPV10
VGA_CORE_SEN
VDDCI_SEN
VSSSENSE_VGA
+PCIE_VDDR
VCCSENSE_VGA<52>
VDDCI_SEN<53>
VSSSENSE_VGA<52>
+1.8VGS
+VDDCI
+1.8VGS +VDDC_CT
+1.0VGS
+1.0VGS
+1.5VGS
+1.8VGS
+3VGS
+1.8VGS
+1.8VGS
+VGA_CORE
+BIF_VDDC
+VGA_CORE
+VGA_CORE
+1.5VGS
+1.8VGS
+VGA_CORE
+VGA_CORE
+VDDCI
+BIF_VDDC
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
1.0
ATI_SeymourXT_M2_Power
C
38 56Wednesday, February 01, 2012
2012/01/17 2013/01/16
Compal Electronics, Inc.
LA-8241P
For DDR3 MVDDQ = 1.5V
(M97, Broadway and Madison: 1.8V@150mA MPV18)
(1.8V@75mA SPV18)
(120mA SPV10)
(1.8V@110mA VDD_CT)
(1.8V@504mA PCIE_VDDR)
(1.0V@1920mA PCIE_VDDC)
For non-BACO designs, connect BIF_VDDC to VDDC.For BACO designs - see BACO reference schematics
(GDDR3/DDR3 1.12V@4A VDDCI)
For Madison, Park, Capilano, Robson, Seymour and Whistler, VDDCI and VDDC can share one common regulator
(GDDR5 1.12V@16A VDDCI)
VDDCI and VDDC should have seperate regulators with a merge option on PCB
4A
(1.8V@40mA PCIE_PVDD)
55mA
(Thames 1.7)A
(Thames 250mA)
(Thames 60mA)
(Thames 150mA)
(Thames 50mA)
(Thames 100mA)
(Thames 20.5A)
(Thames 1.1A)
40mA
(Thames 440mA)
10mil
10mil
20mil
20mil
10mil
20mil
10mil
20mil
40milAdd 12/8
([email protected] PCIE_VDDC)
(Chelsea)
0.935V@Chelsea
CV
157
1U
_0402_6.3
V6K
DIS
@
1
2
CV
175
1U
_0402_6.3
V6K
DIS
@
1
2
CV
138
10U
_0603_6.3
V6M
DIS
@
1
2
CV
167
1U
_0402_6.3
V6K
DIS
@
1
2
LV23
MCK1608471YZF 0603
DIS@
1 2
+CV
135
220U
_B
2_2.5
VM
_R
35
@
1
2
CV
186
1U
_0402_6.3
V6K
DIS
@
1
2
LV22
BLM15BD121SN1D_0402
DIS@
1 2
CV
133
1U
_0402_6.3
V6K
DIS
@
1
2
CV
209
1U
_0402_6.3
V6K
DIS
@
1
2
CV
180
1U
_0402_6.3
V6K
DIS
@
1
2
CV
143
1U
_0402_6.3
V6K
DIS
@
1
2
CV
214
22U
_0603_6.3
V6M
DIS
@
1
2
CV
177
1U
_0402_6.3
V6K
DIS
@
1
2
CV
170
10U
_0603_6.3
V6M
DIS
@
1
2
CV
161
1U
_0402_6.3
V6K
DIS
@
1
2
RV20210_0402_1%DIS@
12
CV
158
1U
_0402_6.3
V6K
DIS
@
1
2
LV19
BLM15BD121SN1D_0402
DIS@
1 2
CV
200
10U
_0603_6.3
V6M
DIS
@
1
2
CV
141
1U
_0402_6.3
V6K
DIS
@
1
2
CV
140
10U
_0603_6.3
V6M
DIS
@
1
2
LV20
BLM15BD121SN1D_0402
DIS@
1 2
CV
198
1U
_0402_6.3
V6K
DIS
@
1
2
CV
176
1U
_0402_6.3
V6K
DIS
@
1
2
CV
147
1U
_0402_6.3
V6K
DIS
@
1
2
CV
182
1U
_0402_6.3
V6K
DIS
@
1
2
+
CV
327
330U
_D
2_2V
M_R
6M
~D
DIS
@
1
2
LV25
BLM15BD121SN1D_0402
@
1 2
CV
183
1U
_0402_6.3
V6K
DIS
@
1
2
CV
212
1U
_0402_6.3
V6K
DIS
@
1
2
CV
181
1U
_0402_6.3
V6K
DIS
@
1
2
CV
136
10U
_0603_6.3
V6M
DIS
@
1
2
CV
139
10U
_0603_6.3
V6M
DIS
@
1
2
CV
126
0.1
U_0402_16V
7K
DIS
@
1
2
CV
156
0.1
U_0402_16V
7K
DIS
@
1
2
CV
189
1U
_0402_6.3
V6K
DIS
@
1
2
RV245
0_0402_5%@1 2
CV
190
1U
_0402_6.3
V6K
DIS
@
1
2
CV
204
1U
_0402_6.3
V6K
DIS
@
1
2
CV
211
1U
_0402_6.3
V6K
DIS
@
1
2
LV26
BLM15BD121SN1D_0402
@
1 2
CV
145
1U
_0402_6.3
V6K
DIS
@
1
2
CV
178
1U
_0402_6.3
V6K
DIS
@
1
2
CV
130
1U
_0402_6.3
V6K
DIS
@
1
2
CV
206
1U
_0402_6.3
V6K
DIS
@
1
2
LV21
MCK1608471YZF 0603
DIS@
1 2
CV
168
1U
_0402_6.3
V6K
DIS
@
1
2
CV
193
1U
_0402_6.3
V6K
DIS
@
1
2
CV
129
1U
_0402_6.3
V6K
DIS
@
1
2
CV
213
10U
_0603_6.3
V6M
DIS
@
1
2
CV
187
10U
_0603_6.3
V6M
DIS
@
1
2
CV
192
22U
_0603_6.3
V6M
DIS
@
1
2
CV
132
0.1
U_0402_16V
7K
DIS
@
1
2
CV
131
10U
_0603_6.3
V6M
DIS
@
1
2
CV
208
1U
_0402_6.3
V6K
DIS
@
1
2
CV
144
1U
_0402_6.3
V6K
DIS
@
1
2
CV
172
1U
_0402_6.3
V6K
DIS
@
1
2
CV
199
0.1
U_0402_16V
7K
DIS
@
1
2
CV
150
1U
_0402_6.3
V6K
DIS
@
1
2
CV
203
1U
_0402_6.3
V6K
DIS
@
1
2
CV
179
1U
_0402_6.3
V6K
DIS
@
1
2
RV20410_0402_1%DIS@
12
CV
151
10U
_0603_6.3
V6M
DIS
@
1
2
CV
128
1U
_0402_6.3
V6K
DIS
@
1
2
CV
194
0.1
U_0402_16V
7K
DIS
@
1
2
CV
207
1U
_0402_6.3
V6K
DIS
@
1
2
CV
142
1U
_0402_6.3
V6K
DIS
@
1
2
CV
205
1U
_0402_6.3
V6K
DIS
@
1
2
CV
146
1U
_0402_6.3
V6K
DIS
@
1
2
CV
164
1U
_0402_6.3
V6K
DIS
@
1
2
CV
184
1U
_0402_6.3
V6K
DIS
@
1
2
CV
191
10U
_0603_6.3
V6M
DIS
@
1
2
CV
160
1U
_0402_6.3
V6K
DIS
@
1
2
CV
323
10U
_0603_6.3
V6M
DIS
@
1
2
CV
155
0.1
U_0402_16V
7K
DIS
@
1
2
CV
216
1U
_0402_6.3
V6K
DIS
@
1
2
LV17
MBK1608121YZF_0603
DIS@
12
LV18
MBK1608121YZF_0603
DIS@
12
CV
137
10U
_0603_6.3
V6M
DIS
@
1
2
CV
202
0.1
U_0402_16V
7K
DIS
@
1
2
CV
127
0.1
U_0402_16V
7K
DIS
@
1
2
CV
196
1U
_0402_6.3
V6K
DIS
@
1
2
CV
217
0.1
U_0402_16V
7K
DIS
@
1
2
CV
134
10U
_0603_6.3
V6M
DIS
@
1
2
CV
163
1U
_0402_6.3
V6K
DIS
@
1
2
CV
210
1U
_0402_6.3
V6K
DIS
@
1
2
CV
169
1U
_0402_6.3
V6K
DIS
@
1
2
CV
154
0.1
U_0402_16V
7K
DIS
@
1
2
CV
148
1U
_0402_6.3
V6K
DIS
@
1
2
CV
325
1U
_0402_6.3
V6K
DIS
@
1
2
CV
195
1U
_0402_6.3
V6K
DIS
@
1
2
CV
171
1U
_0402_6.3
V6K
DIS
@
1
2
CV
173
1U
_0402_6.3
V6K
DIS
@
1
2
RV21510_0402_1%
DIS@
12
CV
201
1U
_0402_6.3
V6K
DIS
@
1
2
CV
152
0.1
U_0402_16V
7K
DIS
@
1
2
CV
166
1U
_0402_6.3
V6K
DIS
@
1
2
RV244
0_0402_5%TH@1 2
CV
159
1U
_0402_6.3
V6K
DIS
@
1
2
POWER
PLL
PCIE
CORE
MEM I/O
I/O
LEVEL
TRANSLATION
ISOLATED
CORE I/O
VOLTAGE
SENESE
UV1E
THAMES XT M2@
PCIE_VDDR/PCIE_PVDDAB37
MPV18#1H7
MPV18#2H8
SPV18AM10
PCIE_VDDC#1G30
PCIE_VDDC#10R28
PCIE_VDDC#11T28
PCIE_VDDC#12U28
PCIE_VDDC#2G31
PCIE_VDDC#3H29
PCIE_VDDC#4H30
PCIE_VDDC#5J29
PCIE_VDDC#6J30
PCIE_VDDC#7L28
PCIE_VDDC#8M28
PCIE_VDDC#9N28
PCIE_VDDR#1AA31
PCIE_VDDR#2AA32
PCIE_VDDR#3AA33
PCIE_VDDR#4AA34
PCIE_VDDR#5V28
PCIE_VDDR#6W29
PCIE_VDDR#7W30
PCIE_VDDR#8Y31
SPV10AN9
SPVSSAN10
VDDR1#1AC7
VDDR1#10G17
VDDR1#11G20
VDDR1#12G23
VDDR1#13G26
VDDR1#14G29
VDDR1#15H10
VDDR1#16J7
VDDR1#17J9
VDDR1#18K11
VDDR1#19K13
VDDR1#2AD11
VDDR1#20K8
VDDR1#21L12
VDDR1#22L16
VDDR1#23L21
VDDR1#24L23
VDDR1#25L26
VDDR1#26L7
VDDR1#27M11
VDDR1#28N11
VDDR1#29P7
VDDR1#3AF7
VDDR1#30R11
VDDR1#31U11
VDDR1#32U7
VDDR1#33Y11
VDDR1#34Y7
VDDR1#4AG10
VDDR1#5AJ7
VDDR1#6AK8
VDDR1#7AL9
VDDR1#8G11
VDDR1#9G14
VDDR3#1AF23
VDDR3#2AF24
VDDR3#3AG23
VDDR3#4AG24
VDDR4#4AF13
VDDR4#5AF15
VDDR4#7AG13
VDDR4#8AG15
VDDR4#1AD12
VDDR4#2AF11
VDDR4#3AF12
VDDR4#6AG11
NC_VDDRHAM20
NC_VDDRHBV12
NC_VSSRHAM21
NC_VSSRHBU12
VDD_CT#1AF26
VDD_CT#2AF27
VDD_CT#3AG26
VDD_CT#4AG27
VDDC#1AA15
VDDC#9AB21
VDDC#10AB23
VDDC#11AB26
VDDC#12AB28
VDDCI#3AC12
VDDCI#4AC15
VDDC#13AC17
VDDC#14AC20
VDDC#15AC22
VDDC#16AC24
VDDC#2AA17
VDDC#17AC27
VDDCI#5AD13
VDDCI#6AD16
VDDC#18AD18
VDDC#19AD21
VDDC#20AD23
VDDC#21AD26
VDDC#22AF17
VDDC#23AF20
VDDC#24AF22
VDDC#3AA20
VDDC#25AG16
VDDC#26AG18
VDDC#27AG21
VDDC#28AH22
VDDCI#8M16
VDDCI#9M18
VDDCI#10M23
VDDC#31M26
VDDCI#12N15
VDDCI#13N17
VDDC#4AA22
VDDCI#14N20
VDDCI#15N22
VDDC#32N24
VDDC/BIF_VDDC#33N27
VDDCI#17R13
VDDCI#18R16
VDDC#34R18
VDDC#35R21
VDDC#36R23
VDDC#37R26
VDDC#5AA24
VDDCI#20T15
VDDC#38T17
VDDC#39T20
VDDC#40T22
VDDC#41T24
VDDC/BIF_VDDC#42T27
VDDC#43U16
VDDC#44U18
VDDC#45U21
VDDC#46U23
VDDC#6AA27
VDDC#47U26
VDDCI#21V15
VDDC#48V17
VDDC#49V20
VDDC#50V22
VDDC#51V24
VDDC#52V27
VDDC#53Y16
VDDC#54Y18
VDDC#55Y21
VDDCI#2AB13
VDDC#56Y23
VDDC#57Y26
VDDC#58Y28
VDDC#7AB16
VDDC#8AB18
VDDCI#7M15
VDDCI#11N13
VDDCI#16R12
VDDCI#19T12
VDDCI#1AA13
VDDCI#22Y13
VDDC#29AH27
VDDC#30AH28
FB_VDDCAF28
FB_VDDCIAG28
FB_GNDAH29
CV
322
10U
_0603_6.3
V6M
DIS
@
1
2
CV
324
10U
_0603_6.3
V6M
DIS
@
1
2
CV
185
1U
_0402_6.3
V6K
DIS
@
1
2
CV
162
1U
_0402_6.3
V6K
DIS
@
1
2
CV
174
0.1
U_0402_16V
7K
DIS
@
1
2
CV
165
1U
_0402_6.3
V6K
DIS
@
1
2
CV
149
1U
_0402_6.3
V6K
DIS
@
1
2
CV
197
10U
_0603_6.3
V6M
DIS
@
1
2
CV
153
0.1
U_0402_16V
7K
DIS
@
1
2
CV
188
1U
_0402_6.3
V6K
DIS
@
1
2
CV
215
10U
_0603_6.3
V6M
DIS
@
1
2
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MDA[0..63] MDB[0..63]
MAA[12..0] MAB[12..0]
A_BA[2..0] B_BA[2..0]
+VDD_MEM15_REFSA
+VDD_MEM15_REFSA
+VDD_MEM15_REFSB
+VDD_MEM15_REFSB
+VDD_MEM15_REFDA
+VDD_MEM15_REFDA
+VDD_MEM15_REFDB
+VDD_MEM15_REFDB
A_BA0A_BA1
A_BA2B_BA0B_BA1
B_BA2
CASA0#CASA1#
CASB0#CASB1#
CKEA0CKEA1
CKEB0CKEB1
CLKA0CLKA0#
CLKA1CLKA1#
CLKB0CLKB0#
CLKB1CLKB1#
CSA0#_0
CSA1#_0
CSB0#_0
CSB1#_0
DQMA#0DQMA#1DQMA#2DQMA#3DQMA#4DQMA#5DQMA#6DQMA#7
DQMB#0DQMB#1DQMB#2DQMB#3DQMB#4DQMB#5DQMB#6DQMB#7
DRAM_RST#_R
DRAM_RST#_R
MAA0MAA1
MAA10MAA11MAA12
MAA13MAA14
MAA2MAA3MAA4MAA5MAA6MAA7MAA8MAA9
MAB0MAB1
MAB10MAB11MAB12
MAB13MAB14
MAB2MAB3MAB4MAB5MAB6MAB7MAB8MAB9
MDA0MDA1
MDA10MDA11MDA12MDA13MDA14MDA15MDA16MDA17MDA18MDA19
MDA2
MDA20MDA21MDA22MDA23MDA24MDA25MDA26MDA27MDA28MDA29
MDA3
MDA30MDA31MDA32MDA33MDA34MDA35MDA36MDA37MDA38MDA39
MDA4
MDA40MDA41MDA42MDA43MDA44MDA45MDA46MDA47MDA48MDA49
MDA5
MDA50MDA51MDA52MDA53MDA54MDA55MDA56MDA57MDA58MDA59
MDA6
MDA60MDA61MDA62MDA63
MDA7MDA8MDA9
MDB0MDB1
MDB10MDB11MDB12MDB13MDB14MDB15MDB16MDB17MDB18MDB19
MDB2
MDB20MDB21MDB22MDB23MDB24MDB25MDB26MDB27MDB28MDB29
MDB3
MDB30MDB31MDB32MDB33MDB34MDB35MDB36MDB37MDB38MDB39
MDB4
MDB40MDB41MDB42MDB43MDB44MDB45MDB46MDB47MDB48MDB49
MDB5
MDB50MDB51MDB52MDB53MDB54MDB55MDB56MDB57MDB58MDB59
MDB6
MDB60MDB61MDB62MDB63
MDB7MDB8MDB9
ODTA0ODTA1
ODTB0ODTB1
QSA#0QSA#1QSA#2QSA#3QSA#4QSA#5QSA#6QSA#7
QSA0QSA1QSA2QSA3QSA4QSA5QSA6QSA7
QSB#0QSB#1QSB#2QSB#3QSB#4QSB#5QSB#6QSB#7
QSB0QSB1QSB2QSB3QSB4QSB5QSB6QSB7
RASA0#RASA1#
RASB0#RASB1#
TESTEN
WEA0#WEA1#
WEB0#WEB1#
B_BA[2..0] <41>
QSB#[7..0] <41>
QSB[7..0] <41>
CLKB1 <41>
CLKB0 <41>
MAB[12..0] <41>
DQMB#[7..0] <41>
RASB0# <41>
CKEB0 <41>
CLKB1# <41>
CLKB0# <41>
CSB0#_0 <41>
WEB0# <41>
CASB0# <41>
CKEB1 <41>
CSB1#_0 <41>
RASB1# <41>
ODTB1 <41>ODTB0 <41>
WEB1# <41>
CASB1# <41>
DRAM_RST#<40,41>
MAB13 <41>
A_BA[2..0] <40>
QSA#[7..0] <40>
QSA[7..0] <40>
CLKA1 <40>
CLKA0 <40>
MAA[12..0] <40>
DQMA#[7..0] <40>
RASA0# <40>
CLKA1# <40>
CLKA0# <40>
CSA0#_0 <40>
WEA0# <40>
CASA0# <40>
CSA1#_0 <40>
RASA1# <40>
ODTA1 <40>ODTA0 <40>
WEA1# <40>
CASA1# <40>
MAA13 <40>MAA14 <40> MAB14 <41>
CKEA0 <40>CKEA1 <40>
MDA[0..63]<40> MDB[0..63]<41>
+1.5VGS
+1.5VGS +1.5VGS
+1.5VGS
+1.5VGS +1.5VGS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
1.0
ATI_SeymourXT_M2_MEM IF
C
39 56Wednesday, February 01, 2012
2012/01/17 2013/01/16
Compal Electronics, Inc.
LA-8241P
route 50ohms single-ended/100ohms diff
and keep short
Debug only, for clock observation, if not needed, DNI
5mil 5mil
This basic topology should be used for DRAM_RST for DDR3/GDDR5.These
Capacitors and Resistor values are an example only. The Series R and
|| Cap values will depend on the DRAM load and will have to be
calculated for different Memory ,DRAM Load and board to pass Reset
Signal Spec.
Place all these components very close to GPU (Within
25mm) and keep all component close to each Other (within
5mm) except Rser2
Co-lay Thames/Seymour/Chelsea
@
POP
POP
RV130
POP
RV131
RV132
@
POP
RV134
@
POP
RV135
@
Thames M2
@
Seymour M2
@
Chelsea M2
RV129
POP
@
RV206
@
@
POPRV205
@
@
@
@
@
@
@
POP
CV2230.1U_0402_16V7KDIS@
12
RV1335.11K_0402_1%
DIS@
1 2
RV206 120_0402_5%CH@1 2
CV222120P_0402_50V9
DIS@
12
CV219@
0.1U_0402_16V7K
12
CV2200.1U_0402_16V7KDIS@
12
CV2240.1U_0402_16V7KDIS@
12
RV146100_0402_1%
DIS@
12
RV135 240_0402_1%DIS@1 2
MEMORY INTERFACE B
DDR2
GDDR5/GDDR3
DDR3
DDR2
GDDR3/GDDR5
DDR3
GDDR5
GDDR5/DDR2/GDDR3
UV1D
THAMES XT M2@
DQB0_0/DQB_0C5
DQB0_1/DQB_1C3
DQB0_10/DQB_10J4
DQB0_11/DQB_11K6
DQB0_12/DQB_12K5
DQB0_13/DQB_13L4
DQB0_14/DQB_14M6
DQB0_15/DQB_15M1
DQB0_16/DQB_16M3
DQB0_17/DQB_17M5
DQB0_18/DQB_18N4
DQB0_19/DQB_19P6
DQB0_2/DQB_2E3
DQB0_20/DQB_20P5
DQB0_21/DQB_21R4
DQB0_22/DQB_22T6
DQB0_23/DQB_23T1
DQB0_24/DQB_24U4
DQB0_25/DQB_25V6
DQB0_26/DQB_26V1
DQB0_27/DQB_27V3
DQB0_28/DQB_28Y6
DQB0_29/DQB_29Y1
DQB0_3/DQB_3E1
DQB0_30/DQB_30Y3
DQB0_31/DQB_31Y5
DQB1_0/DQB_32AA4
DQB1_1/DQB_33AB6
DQB1_2/DQB_34AB1
DQB1_3/DQB_35AB3
DQB1_4/DQB_36AD6
DQB1_5/DQB_37AD1
DQB1_6/DQB_38AD3
DQB1_7/DQB_39AD5
DQB0_4/DQB_4F1
DQB1_8/DQB_40AF1
DQB1_9/DQB_41AF3
DQB1_10/DQB_42AF6
DQB1_11/DQB_43AG4
DQB1_12/DQB_44AH5
DQB1_13/DQB_45AH6
DQB1_14/DQB_46AJ4
DQB1_15/DQB_47AK3
DQB1_16/DQB_48AF8
DQB1_17/DQB_49AF9
DQB0_5/DQB_5F3
DQB1_18/DQB_50AG8
DQB1_19/DQB_51AG7
DQB1_20/DQB_52AK9
DQB1_21/DQB_53AL7
DQB1_22/DQB_54AM8
DQB1_23/DQB_55AM7
DQB1_24/DQB_56AK1
DQB1_25/DQB_57AL4
DQB1_26/DQB_58AM6
DQB1_27/DQB_59AM1
DQB0_6/DQB_6F5
DQB1_28/DQB_60AN4
DQB1_29/DQB_61AP3
DQB1_30/DQB_62AP1
DQB1_31/DQB_63AP5
DQB0_7/DQB_7G4
DQB0_8/DQB_8H5
DQB0_9/DQB_9H6
MVREFDBY12
MVREFSBAA12
TESTENAD28
CASB0BW10
CASB1BAA10
CKEB0U10
CKEB1AA11
CLKB0L9
CLKB0BL8
CLKB1AD8
CLKB1BAD7
CLKTESTAAK10
CLKTESTBAL10
CSB0B_0P10
CSB0B_1L10
CSB1B_0AD10
CSB1B_1AC10
WCKB0_0/DQMB_0H3
WCKB0B_0/DQMB_1H1
WCKB0_1/DQMB_2T3
WCKB0B_1/DQMB_3T5
WCKB1_0/DQMB_4AE4
WCKB1B_0/DQMB_5AF5
WCKB1_1/DQMB_6AK6
WCKB1B_1/DQMB_7AK5
DRAM_RSTAH11
MAB0_0/MAB_0P8
MAB0_1/MAB_1T9
MAB1_2/MAB_10AC8
MAB1_3/MAB_11AC9
MAB1_4/MAB_12AA7
MAB1_5/BA2AA8
MAB1_6/BA0Y8
MAB1_7/BA1AA9
MAB0_2/MAB_2P9
MAB0_3/MAB_3N7
MAB0_4/MAB_4N8
MAB0_5/MAB_5N9
MAB0_6/MAB_6U9
MAB0_7/MAB_7U8
MAB1_0/MAB_8Y9
MAB1_1/MAB_9W9
ADBIB0/ODTB0T7
ADBIB1/ODTB1W7
RASB0BT10
RASB1BY10
EDCB0_0/QSB_0/RDQSB_0F6
EDCB0_1/QSB_1/RDQSB_1K3
EDCB0_2/QSB_2/RDQSB_2P3
EDCB0_3/QSB_3/RDQSB_3V5
EDCB1_0/QSB_4/RDQSB_4AB5
EDCB1_1/QSB_5/RDQSB_5AH1
EDCB1_2/QSB_6/RDQSB_6AJ9
EDCB1_3/QSB_7/RDQSB_7AM5
DDBIB0_0/QSB_0B/WDQSB_0G7
DDBIB0_1/QSB_1B/WDQSB_1K1
DDBIB0_2/QSB_2B/WDQSB_2P1
DDBIB0_3/QSB_3B/WDQSB_3W4
DDBIB1_0/QSB_4B/WDQSB_4AC4
DDBIB1_1/QSB_5B/WDQSB_5AH3
DDBIB1_2/QSB_6B/WDQSB_6AJ8
DDBIB1_3/QSB_7B/WDQSB_7AM3
WEB0BN10
WEB1BAB11
MAB0_8T8
MAB1_8W8
RV14040.2_0402_1%
DIS@
12
RV132 240_0402_1%SE@1 2
RV130 240_0402_1%SE@1 2
RV147100_0402_1%
DIS@
12
MEMORY INTERFACE A
DDR2
GDDR3/GDDR5
DDR3
GDDR5/DDR2/GDDR3
DDR2
GDDR5/GDDR3
DDR3
GDDR5
UV1C
THAMES XT M2@
DQA0_0/DQA_0C37
DQA0_1/DQA_1C35
DQA0_10/DQA_10C30
DQA0_11/DQA_11A30
DQA0_12/DQA_12F28
DQA0_13/DQA_13C28
DQA0_14/DQA_14A28
DQA0_15/DQA_15E28
DQA0_16/DQA_16D27
DQA0_17/DQA_17F26
DQA0_18/DQA_18C26
DQA0_19/DQA_19A26
DQA0_2/DQA_2A35
DQA0_20/DQA_20F24
DQA0_21/DQA_21C24
DQA0_22/DQA_22A24
DQA0_23/DQA_23E24
DQA0_24/DQA_24C22
DQA0_25/DQA_25A22
DQA0_26/DQA_26F22
DQA0_27/DQA_27D21
DQA0_28/DQA_28A20
DQA0_29/DQA_29F20
DQA0_3/DQA_3E34
DQA0_30/DQA_30D19
DQA0_31/DQA_31E18
DQA1_0/DQA_32C18
DQA1_1/DQA_33A18
DQA1_2/DQA_34F18
DQA1_3/DQA_35D17
DQA1_4/DQA_36A16
DQA1_5/DQA_37F16
DQA1_6/DQA_38D15
DQA1_7/DQA_39E14
DQA0_4/DQA_4G32
DQA1_8/DQA_40F14
DQA1_9/DQA_41D13
DQA1_10/DQA_42F12
DQA1_11/DQA_43A12
DQA1_12/DQA_44D11
DQA1_13/DQA_45F10
DQA1_14/DQA_46A10
DQA1_15/DQA_47C10
DQA1_16/DQA_48G13
DQA1_17/DQA_49H13
DQA0_5/DQA_5D33
DQA1_18/DQA_50J13
DQA1_19/DQA_51H11
DQA1_20/DQA_52G10
DQA1_21/DQA_53G8
DQA1_22/DQA_54K9
DQA1_23/DQA_55K10
DQA1_24/DQA_56G9
DQA1_25/DQA_57A8
DQA1_26/DQA_58C8
DQA1_27/DQA_59E8
DQA0_6/DQA_6F32
DQA1_28/DQA_60A6
DQA1_29/DQA_61C6
DQA1_30/DQA_62E6
DQA1_31/DQA_63A5
DQA0_7/DQA_7E32
DQA0_8/DQA_8D31
DQA0_9/DQA_9F30
MEM_CALRP1M12
MVREFDAL18
MVREFSAL20
MEM_CALRN0L27
MEM_CALRN1N12
MEM_CALRN2AG12
MEM_CALRP0M27
MEM_CALRP2AH12
CASA0BK20
CASA1BK17
CKEA0K21
CKEA1J20
CLKA0H27
CLKA0BG27
CLKA1J14
CLKA1BH14
CSA0B_0K24
CSA0B_1K27
CSA1B_0M13
CSA1B_1K16
WCKA0_0/DQMA_0A32
WCKA0B_0/DQMA_1C32
WCKA0_1/DQMA_2D23
WCKA0B_1/DQMA_3E22
WCKA1_0/DQMA_4C14
WCKA1B_0/DQMA_5A14
WCKA1_1/DQMA_6E10
WCKA1B_1/DQMA_7D9
MAA0_0/MAA_0G24
MAA0_1/MAA_1J23
MAA1_2/MAA_10L13
MAA1_3/MAA_11G16
MAA1_4/MAA_12J16
MAA1_5/MAA_13_BA2H16
MAA1_6/MAA_14_BA0J17
MAA1_7/MAA_A15_BA1H17
MAA0_2/MAA_2H24
MAA0_3/MAA_3J24
MAA0_4/MAA_4H26
MAA0_5/MAA_5J26
MAA0_6/MAA_6H21
MAA0_7/MAA_7G21
MAA1_0/MAA_8H19
MAA1_1/MAA_9H20
ADBIA0/ODTA0J21
ADBIA1/ODTA1G19
RASA0BK23
RASA1BK19
EDCA0_0/QSA_0/RDQSA_0C34
EDCA0_1/QSA_1/RDQSA_1D29
EDCA0_2/QSA_2/RDQSA_2D25
EDCA0_3/QSA_3/RDQSA_3E20
EDCA1_0/QSA_4/RDQSA_4E16
EDCA1_1/QSA_5/RDQSA_5E12
EDCA1_2/QSA_6/RDQSA_6J10
EDCA1_3/QSA_7/RDQSA_7D7
MAA0_8H23
MAA1_8J19
DDBIA0_0/QSA_0B/WDQSA_0A34
DDBIA0_1/QSA_1B/WDQSA_1E30
DDBIA0_2/QSA_2B/WDQSA_2E26
DDBIA0_3/QSA_3B/WDQSA_3C20
DDBIA1_0/QSA_4B/WDQSA_4C16
DDBIA1_1/QSA_5B/WDQSA_5C12
DDBIA1_2/QSA_6B/WDQSA_6J11
DDBIA1_3/QSA_7B/WDQSA_7F8
WEA0BK26
WEA1BL15
RV148100_0402_1%
DIS@
12
RV205 120_0402_5%CH@1 2
RV1454.99K_0402_1%
DIS@
12
CV2210.1U_0402_16V7KDIS@
12
CV218@
0.1U_0402_16V7K
12
RV138
@4.7K_0402_5%
12
RV131 240_0402_1%DIS@1 2
RV14410_0402_1%
DIS@
1 2
RV137@
51.1_0402_1%
12
RV134 240_0402_1%DIS@1 2
RV13940.2_0402_1%
DIS@
12 RV143
51.1_0402_1%DIS@
1 2
RV136@
51.1_0402_1%
12
RV14240.2_0402_1%
DIS@
12
RV14140.2_0402_1%
DIS@
12
RV149100_0402_1%
DIS@
12
RV129 240_0402_1%DIS@1 2
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MDA[0..63]
MAA[14..0]
DQMA#[7..0]
QSA#[7..0]
QSA[7..0]
A_BA0 A_BA0 A_BA0A_BA1 A_BA1 A_BA1A_BA2 A_BA2 A_BA2
CASA0# CASA1#
CKEA0 CKEA1
CLKA0
CLKA0
CLKA0#
CLKA0#
CLKA1
CLKA1
CLKA1#
CLKA1#
CSA0#_0 CSA1#_0
DQMA#1DQMA#2 DQMA#4
DQMA#5DQMA#6DQMA#7
DRAM_RST# DRAM_RST# DRAM_RST#
MAA0 MAA0 MAA0MAA1 MAA1 MAA1
MAA10 MAA10 MAA10MAA11 MAA11 MAA11MAA12 MAA12 MAA12MAA13 MAA13 MAA13MAA14 MAA14 MAA14
MAA2 MAA2 MAA2MAA3 MAA3 MAA3MAA4 MAA4 MAA4MAA5 MAA5 MAA5MAA6 MAA6 MAA6MAA7 MAA7 MAA7MAA8 MAA8 MAA8MAA9 MAA9 MAA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA32
MDA33
MDA34MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63
ODTA0 ODTA1
QSA#1QSA#2 QSA#4
QSA#5QSA#6QSA#7
QSA1QSA2 QSA4
QSA5QSA6QSA7
RASA0# RASA1#
VREFC_A1 VREFC_A2
VREFC_A2
VREFC_A3
VREFC_A3
VREFC_A4
VREFC_A4
VREFD_Q1 VREFD_Q2
VREFD_Q2
VREFD_Q3
VREFD_Q3
VREFD_Q4
VREFD_Q4
WEA0# WEA1#
DQMA#0DQMA#3
MAA0MAA1
MAA10MAA11MAA12MAA13MAA14
MAA2MAA3MAA4MAA5MAA6MAA7MAA8MAA9
MDA0
MDA1
MDA2
MDA3MDA4
MDA5
MDA6
MDA7
QSA#0QSA#3
QSA0QSA3
VREFC_A1VREFD_Q1
MDA8
MDA9
MDA19
MDA21
MDA22
MDA16
MDA18
MDA20
MDA23MDA17
MDA26
MDA31MDA24
MDA30
MDA29MDA27
MDA28
MDA25
QSA#[7..0]<39>
QSA[7..0]<39>
DQMA#[7..0]<39>
MAA[14..0]<39>
CKEA1<39>
RASA1#<39>
CLKA1#<39>CLKA1<39>
WEA1#<39>
CSA1#_0<39>ODTA1<39>
CASA1#<39>
CLKA0<39>
CASA0#<39>
A_BA2<39>
ODTA0<39>
RASA0#<39>
CKEA0<39>
CSA0#_0<39>
A_BA1<39>
DRAM_RST#<39,41>
CLKA0#<39>
WEA0#<39>
A_BA0<39>
MDA[0..63]<39>
+1.5VGS
+1.5VGS
+1.5VGS
+1.5VGS
+1.5VGS
+1.5VGS
+1.5VGS +1.5VGS+1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS
+1.5VGS+1.5VGS
+1.5VGS +1.5VGS
+1.5VGS
+1.5VGS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
C 1.0
ATI_SeymourXT_M2_VRAM_A
Compal Electronics, Inc.
LA-8241P
2012/01/17 2013/01/16
40 56Wednesday, February 01, 2012
CHANNEL A: 256MB/512MB DDR3
15mil 15mil 15mil 15mil 15mil 15mil 15mil 15mil
CV2340.01U_0402_16V7KDIS@
12
RV1604.99K_0402_1%
DIS@
12
CV
259
1U
_0402_6.3
V6K
DIS
@
1
2
RV1704.99K_0402_1%
DIS@
12
CV
254
1U
_0402_6.3
V6K
DIS
@
1
2
96-BALLSDRAM DDR3
UV20
K4W1G1646G-BC11X76@
WEL3
RASJ3
CASK3
CS/CS0L2
CKE/CKE0K9
CKJ7
CKK7
DQSUB7
BA0M2
BA1N8
A2P3
A3N2
A4P8
A5P2
A6R8
A7R2
A8T8
A9R3
A10/APL7
A11R7
DQL0E3
DQL1F7
DQL2F2
DQL3F8
DQL4H3
DQL5H8
DQL6G2
DQL7H7
VSSQD1
VSSA9
VSSE1
VSSB3
NC/ODT1J1
VDDB2
VDDD9
VDDQA1
VDDQA8
VDDQC1
VDDQC9
NC/CS1L1
NC/CE1J9
VDDQE9
ZQ/ZQ0L8
RESETT2
DQSLF3
DMUD3
DMLE7
VSSQB1
VSSQB9
VSSQD8
VSSQE2
DQSUC7
VSSQE8
DQSLG3
VDDQF1
VSSQF9
VSSQG1
VDDQH2
VDDQH9
VSSQG9
VREFCAM8
VSSG8
VDDG7
ODT/ODT0K1
A0N3
A1P7
VDDK2
A12N7
VSSJ2
VDDK8
DQU1C3
DQU2C8
DQU3C2
DQU4A7
DQU5A2
DQU6B8
DQU7A3
DQU0D7
A13T3
A14T7
A15/BA3M7
BA2M3
VREFDQH1
NCZQ1L9
VDDN1
VDDN9
VDDR1
VDDR9
VSSJ8
VSSM1
VSSM9
VSSP1
VSSP9
VSST1
VSST9
VDDQD2
CV
252
1U
_0402_6.3
V6K
DIS
@
1
2
CV
253
1U
_0402_6.3
V6K
DIS
@
1
2
CV
244
0.1
U_0402_16V
7K
DIS
@
1
2
CV
230 0
.1U
_0402_16V
7K
DIS@
12
RV1734.99K_0402_1%
DIS@
12
RV164 56_0402_1%
DIS@
1 2
CV
271
1U
_0402_6.3
V6K
DIS
@
1
2
CV
243
0.1
U_0402_16V
7K
DIS
@
1
2
RV1714.99K_0402_1%
DIS@
12
CV
248
10U
_0603_6.3
V6M
DIS
@
1
2
CV
266
1U
_0402_6.3
V6K
DIS
@
1
2
CV
235
0.1
U_0402_16V
7K
DIS
@
1
2
CV
226 0
.1U
_0402_16V
7K
DIS@
12
RV152
240_0402_1%DIS@
12
CV
249
10U
_0603_6.3
V6M
DIS
@
1
2
CV
240
0.1
U_0402_16V
7K
DIS
@
1
2
CV
255
1U
_0402_6.3
V6K
DIS
@
1
2
CV
265
1U
_0402_6.3
V6K
DIS
@
1
2
CV
231
0.1
U_0402_16V
7K
DIS@
12
RV1574.99K_0402_1%
DIS@
12
CV
262
1U
_0402_6.3
V6K
DIS
@
1
2
CV
270
1U
_0402_6.3
V6K
DIS
@
1
2
CV
264
1U
_0402_6.3
V6K
DIS
@
1
2
RV150
240_0402_1%DIS@
12
RV1594.99K_0402_1%
DIS@
12
96-BALLSDRAM DDR3
UV21
K4W1G1646G-BC11X76@
WEL3
RASJ3
CASK3
CS/CS0L2
CKE/CKE0K9
CKJ7
CKK7
DQSUB7
BA0M2
BA1N8
A2P3
A3N2
A4P8
A5P2
A6R8
A7R2
A8T8
A9R3
A10/APL7
A11R7
DQL0E3
DQL1F7
DQL2F2
DQL3F8
DQL4H3
DQL5H8
DQL6G2
DQL7H7
VSSQD1
VSSA9
VSSE1
VSSB3
NC/ODT1J1
VDDB2
VDDD9
VDDQA1
VDDQA8
VDDQC1
VDDQC9
NC/CS1L1
NC/CE1J9
VDDQE9
ZQ/ZQ0L8
RESETT2
DQSLF3
DMUD3
DMLE7
VSSQB1
VSSQB9
VSSQD8
VSSQE2
DQSUC7
VSSQE8
DQSLG3
VDDQF1
VSSQF9
VSSQG1
VDDQH2
VDDQH9
VSSQG9
VREFCAM8
VSSG8
VDDG7
ODT/ODT0K1
A0N3
A1P7
VDDK2
A12N7
VSSJ2
VDDK8
DQU1C3
DQU2C8
DQU3C2
DQU4A7
DQU5A2
DQU6B8
DQU7A3
DQU0D7
A13T3
A14T7
A15/BA3M7
BA2M3
VREFDQH1
NCZQ1L9
VDDN1
VDDN9
VDDR1
VDDR9
VSSJ8
VSSM1
VSSM9
VSSP1
VSSP9
VSST1
VSST9
VDDQD2
RV154 56_0402_1%
DIS@
1 2
CV
258
1U
_0402_6.3
V6K
DIS
@
1
2
RV165 56_0402_1%
DIS@
1 2
CV
251
10U
_0603_6.3
V6M
DIS
@
1
2
CV
238
0.1
U_0402_16V
7K
DIS
@
1
2
96-BALLSDRAM DDR3
UV19
K4W1G1646G-BC11X76@
WEL3
RASJ3
CASK3
CS/CS0L2
CKE/CKE0K9
CKJ7
CKK7
DQSUB7
BA0M2
BA1N8
A2P3
A3N2
A4P8
A5P2
A6R8
A7R2
A8T8
A9R3
A10/APL7
A11R7
DQL0E3
DQL1F7
DQL2F2
DQL3F8
DQL4H3
DQL5H8
DQL6G2
DQL7H7
VSSQD1
VSSA9
VSSE1
VSSB3
NC/ODT1J1
VDDB2
VDDD9
VDDQA1
VDDQA8
VDDQC1
VDDQC9
NC/CS1L1
NC/CE1J9
VDDQE9
ZQ/ZQ0L8
RESETT2
DQSLF3
DMUD3
DMLE7
VSSQB1
VSSQB9
VSSQD8
VSSQE2
DQSUC7
VSSQE8
DQSLG3
VDDQF1
VSSQF9
VSSQG1
VDDQH2
VDDQH9
VSSQG9
VREFCAM8
VSSG8
VDDG7
ODT/ODT0K1
A0N3
A1P7
VDDK2
A12N7
VSSJ2
VDDK8
DQU1C3
DQU2C8
DQU3C2
DQU4A7
DQU5A2
DQU6B8
DQU7A3
DQU0D7
A13T3
A14T7
A15/BA3M7
BA2M3
VREFDQH1
NCZQ1L9
VDDN1
VDDN9
VDDR1
VDDR9
VSSJ8
VSSM1
VSSM9
VSSP1
VSSP9
VSST1
VSST9
VDDQD2
CV
239
0.1
U_0402_16V
7K
DIS
@
1
2
CV
229 0
.1U
_0402_16V
7K
DIS@
12
RV1614.99K_0402_1%
DIS@
12
CV
257
1U
_0402_6.3
V6K
DIS
@
1
2
CV
227 0
.1U
_0402_16V
7K
DIS@
12
96-BALLSDRAM DDR3
UV18
K4W1G1646G-BC11X76@
WEL3
RASJ3
CASK3
CS/CS0L2
CKE/CKE0K9
CKJ7
CKK7
DQSUB7
BA0M2
BA1N8
A2P3
A3N2
A4P8
A5P2
A6R8
A7R2
A8T8
A9R3
A10/APL7
A11R7
DQL0E3
DQL1F7
DQL2F2
DQL3F8
DQL4H3
DQL5H8
DQL6G2
DQL7H7
VSSQD1
VSSA9
VSSE1
VSSB3
NC/ODT1J1
VDDB2
VDDD9
VDDQA1
VDDQA8
VDDQC1
VDDQC9
NC/CS1L1
NC/CE1J9
VDDQE9
ZQ/ZQ0L8
RESETT2
DQSLF3
DMUD3
DMLE7
VSSQB1
VSSQB9
VSSQD8
VSSQE2
DQSUC7
VSSQE8
DQSLG3
VDDQF1
VSSQF9
VSSQG1
VDDQH2
VDDQH9
VSSQG9
VREFCAM8
VSSG8
VDDG7
ODT/ODT0K1
A0N3
A1P7
VDDK2
A12N7
VSSJ2
VDDK8
DQU1C3
DQU2C8
DQU3C2
DQU4A7
DQU5A2
DQU6B8
DQU7A3
DQU0D7
A13T3
A14T7
A15/BA3M7
BA2M3
VREFDQH1
NCZQ1L9
VDDN1
VDDN9
VDDR1
VDDR9
VSSJ8
VSSM1
VSSM9
VSSP1
VSSP9
VSST1
VSST9
VDDQD2
CV
263
1U
_0402_6.3
V6K
DIS
@
1
2
RV151
240_0402_1%DIS@
12
RV1634.99K_0402_1%
DIS@
12
CV
242
0.1
U_0402_16V
7K
DIS
@
1
2
CV
260
1U
_0402_6.3
V6K
DIS
@
1
2
CV
233
0.1
U_0402_16V
7K
DIS@
12
RV1564.99K_0402_1%
DIS@
12
CV
250
10U
_0603_6.3
V6M
DIS
@
1
2
CV
241
0.1
U_0402_16V
7K
DIS
@
1
2
CV
247
0.1
U_0402_16V
7K
DIS
@
1
2
CV
228 0
.1U
_0402_16V
7K
DIS@
12
RV153
240_0402_1%DIS@
12
CV
267
1U
_0402_6.3
V6K
DIS
@
1
2
RV1624.99K_0402_1%
DIS@
12
CV
268
1U
_0402_6.3
V6K
DIS
@
1
2
RV1584.99K_0402_1%
DIS@
12
CV
245
0.1
U_0402_16V
7K
DIS
@
1
2
RV1684.99K_0402_1%
DIS@
12
CV
237
0.1
U_0402_16V
7K
DIS
@
1
2
CV
232
0.1
U_0402_16V
7K
DIS@
12
CV
256
1U
_0402_6.3
V6K
DIS
@1
2
RV155 56_0402_1%
DIS@
1 2
RV1724.99K_0402_1%
DIS@
12
CV
246
0.1
U_0402_16V
7K
DIS
@
1
2
CV
269
1U
_0402_6.3
V6K
DIS
@
1
2
RV1674.99K_0402_1%
DIS@
12
CV2250.01U_0402_16V7KDIS@
12
CV
261
1U
_0402_6.3
V6K
DIS
@
1
2
RV1664.99K_0402_1%
DIS@
12
CV
236
0.1
U_0402_16V
7K
DIS
@
1
2
RV1694.99K_0402_1%
DIS@
12
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MDB[0..63]
MAB[14..0]
DQMB#[7..0]
QSB#[7..0]
QSB[7..0]
B_BA0 B_BA0 B_BA0B_BA1 B_BA1 B_BA1B_BA2 B_BA2 B_BA2
CASB0# CASB1#
CKEB0 CKEB1
CLKB0
CLKB0
CLKB0#
CLKB0#
CLKB1
CLKB1
CLKB1#
CLKB1#
CSB0#_0 CSB1#_0
DQMB#0 DQMB#1DQMB#3 DQMB#2 DQMB#4
DQMB#5DQMB#6DQMB#7
DRAM_RST# DRAM_RST# DRAM_RST#
MAB0 MAB0 MAB0 MAB0MAB1 MAB1 MAB1 MAB1
MAB10 MAB10 MAB10 MAB10MAB11 MAB11 MAB11 MAB11MAB12 MAB12 MAB12 MAB12MAB13 MAB13 MAB13 MAB13MAB14 MAB14 MAB14 MAB14
MAB2 MAB2 MAB2 MAB2MAB3 MAB3 MAB3 MAB3MAB4 MAB4 MAB4 MAB4MAB5 MAB5 MAB5 MAB5MAB6 MAB6 MAB6 MAB6MAB7 MAB7 MAB7 MAB7MAB8 MAB8 MAB8 MAB8MAB9 MAB9 MAB9 MAB9
MDB0
MDB1MDB10
MDB11MDB12
MDB13
MDB14
MDB15
MDB2
MDB3
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB4
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB5
MDB6
MDB7
MDB8
MDB9
ODTB0 ODTB1
QSB#0 QSB#1QSB#3 QSB#2 QSB#4
QSB#5QSB#6QSB#7
QSB0 QSB1QSB3 QSB2 QSB4
QSB5QSB6QSB7
RASB0# RASB1#
VREFC_A1_B
VREFC_A1_B
VREFC_A2_B
VREFC_A3_B
VREFC_A3_B
VREFC_A4_B
VREFC_A4_BVREFD_Q1_B
VREFD_Q1_B VREFD_Q2_B
VREFD_Q2_B
VREFD_Q3_B
VREFD_Q3_B
VREFD_Q4_B
VREFD_Q4_B
WEB0# WEB1#
MDB63
MDB58
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB57
MDB56
MDB60
MDB59
MDB61
MDB62
VREFC_A2_B
MDB23
MDB21
MDB22
MDB18
MDB17
MDB20MDB19MDB16
MDB28
MDB29
MDB24
MDB25
MDB30
MDB31
MDB26
MDB27
QSB#[7..0]<39>
QSB[7..0]<39>
DQMB#[7..0]<39>
MAB[14..0]<39>
CLKB0<39>
CASB0#<39>
CKEB1<39>
RASB1#<39>
B_BA2<39>
ODTB0<39>
RASB0#<39>
CLKB1#<39>CKEB0<39>
CSB0#_0<39>
CLKB1<39>
WEB1#<39>
B_BA1<39>
CSB1#_0<39>
DRAM_RST#<39,40>
CLKB0#<39>
WEB0#<39>
ODTB1<39>
CASB1#<39>
B_BA0<39>
MDB[0..63]<39>
+1.5VGS
+1.5VGS
+1.5VGS
+1.5VGS
+1.5VGS
+1.5VGS
+1.5VGS
+1.5VGS
+1.5VGS+1.5VGS
+1.5VGS +1.5VGS
+1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
C 1.0
ATI_SeymourXT_M2_VRAM_B
Compal Electronics, Inc.
LA-8241P
2012/01/17 2013/01/16
41 56Wednesday, February 01, 2012
CHANNEL B: 256MB/512MB DDR3
15mil 15mil 15mil 15mil 15mil 15mil 15mil 15mil
CV
284
0.1
U_0402_16V
7K
DIS
@
1
2
RV1874.99K_0402_1%
DIS@
12
RV174 56_0402_1%
DIS@
1 2
CV
286
0.1
U_0402_16V
7K
DIS
@
1
2
CV
279
0.1
U_0402_16V
7K
DIS
@
1
2
CV
303
1U
_0402_6.3
V6K
DIS
@
1
2
CV
296
10U
_0603_6.3
V6M
DIS
@
1
2
CV2730.01U_0402_16V7KDIS@
12
RV1834.99K_0402_1%
DIS@
12
RV1884.99K_0402_1%
DIS@
12
RV181 56_0402_1%
DIS@
1 2
CV
300
1U
_0402_6.3
V6K
DIS
@
1
2
RV1924.99K_0402_1%
DIS@
12
CV
280
0.1
U_0402_16V
7K
DIS
@
1
2
RV180 56_0402_1%
DIS@
1 2
RV178
240_0402_1%DIS@
12
RV1904.99K_0402_1%
DIS@
12
CV
307
1U
_0402_6.3
V6K
DIS
@
1
2
CV
282
0.1
U_0402_16V
7K
DIS
@
1
2
CV
301
1U
_0402_6.3
V6K
DIS
@
1
2
RV1954.99K_0402_1%
DIS@
12
CV
314
1U
_0402_6.3
V6K
DIS
@
1
2
CV
293
0.1
U_0402_16V
7K
DIS
@
1
2C
V304
1U
_0402_6.3
V6K
DIS
@
1
2
CV
302
1U
_0402_6.3
V6K
DIS
@
1
2
CV
315
1U
_0402_6.3
V6K
DIS
@
1
2
RV177
240_0402_1%DIS@
12
RV1854.99K_0402_1%
DIS@
12
CV
305
1U
_0402_6.3
V6K
DIS
@
1
2
CV
317
1U
_0402_6.3
V6K
DIS
@
1
2
CV
281
0.1
U_0402_16V
7K
DIS
@
1
2
RV1964.99K_0402_1%
DIS@
12
CV
287
0.1
U_0402_16V
7K
DIS
@
1
2
CV
312
1U
_0402_6.3
V6K
DIS
@
1
2
RV176
240_0402_1%DIS@
12
CV
274
0.1
U_0402_16V
7K
DIS
@
1
2
RV1914.99K_0402_1%
DIS@
12
CV
309
1U
_0402_6.3
V6K
DIS
@
1
2
96-BALLSDRAM DDR3
UV24
K4W1G1646G-BC11X76@
WEL3
RASJ3
CASK3
CS/CS0L2
CKE/CKE0K9
CKJ7
CKK7
DQSUB7
BA0M2
BA1N8
A2P3
A3N2
A4P8
A5P2
A6R8
A7R2
A8T8
A9R3
A10/APL7
A11R7
DQL0E3
DQL1F7
DQL2F2
DQL3F8
DQL4H3
DQL5H8
DQL6G2
DQL7H7
VSSQD1
VSSA9
VSSE1
VSSB3
NC/ODT1J1
VDDB2
VDDD9
VDDQA1
VDDQA8
VDDQC1
VDDQC9
NC/CS1L1
NC/CE1J9
VDDQE9
ZQ/ZQ0L8
RESETT2
DQSLF3
DMUD3
DMLE7
VSSQB1
VSSQB9
VSSQD8
VSSQE2
DQSUC7
VSSQE8
DQSLG3
VDDQF1
VSSQF9
VSSQG1
VDDQH2
VDDQH9
VSSQG9
VREFCAM8
VSSG8
VDDG7
ODT/ODT0K1
A0N3
A1P7
VDDK2
A12N7
VSSJ2
VDDK8
DQU1C3
DQU2C8
DQU3C2
DQU4A7
DQU5A2
DQU6B8
DQU7A3
DQU0D7
A13T3
A14T7
A15/BA3M7
BA2M3
VREFDQH1
NCZQ1L9
VDDN1
VDDN9
VDDR1
VDDR9
VSSJ8
VSSM1
VSSM9
VSSP1
VSSP9
VSST1
VSST9
VDDQD2
CV
283
0.1
U_0402_16V
7K
DIS
@
1
2
CV
295
10U
_0603_6.3
V6M
DIS
@
1
2
CV
290
0.1
U_0402_16V
7K
DIS
@
1
2
CV
311
1U
_0402_6.3
V6K
DIS
@
1
2
RV1974.99K_0402_1%
DIS@
12
CV
298
10U
_0603_6.3
V6M
DIS
@
1
2
CV
308
1U
_0402_6.3
V6K
DIS
@
1
2
CV
313
1U
_0402_6.3
V6K
DIS
@
1
2
CV2720.01U_0402_16V7KDIS@
12 RV179
240_0402_1%DIS@
12
96-BALLSDRAM DDR3
UV25
K4W1G1646G-BC11X76@
WEL3
RASJ3
CASK3
CS/CS0L2
CKE/CKE0K9
CKJ7
CKK7
DQSUB7
BA0M2
BA1N8
A2P3
A3N2
A4P8
A5P2
A6R8
A7R2
A8T8
A9R3
A10/APL7
A11R7
DQL0E3
DQL1F7
DQL2F2
DQL3F8
DQL4H3
DQL5H8
DQL6G2
DQL7H7
VSSQD1
VSSA9
VSSE1
VSSB3
NC/ODT1J1
VDDB2
VDDD9
VDDQA1
VDDQA8
VDDQC1
VDDQC9
NC/CS1L1
NC/CE1J9
VDDQE9
ZQ/ZQ0L8
RESETT2
DQSLF3
DMUD3
DMLE7
VSSQB1
VSSQB9
VSSQD8
VSSQE2
DQSUC7
VSSQE8
DQSLG3
VDDQF1
VSSQF9
VSSQG1
VDDQH2
VDDQH9
VSSQG9
VREFCAM8
VSSG8
VDDG7
ODT/ODT0K1
A0N3
A1P7
VDDK2
A12N7
VSSJ2
VDDK8
DQU1C3
DQU2C8
DQU3C2
DQU4A7
DQU5A2
DQU6B8
DQU7A3
DQU0D7
A13T3
A14T7
A15/BA3M7
BA2M3
VREFDQH1
NCZQ1L9
VDDN1
VDDN9
VDDR1
VDDR9
VSSJ8
VSSM1
VSSM9
VSSP1
VSSP9
VSST1
VSST9
VDDQD2
CV
278
0.1
U_0402_16V
7K
DIS
@
1
2
RV1944.99K_0402_1%
DIS@
12
RV1934.99K_0402_1%
DIS@
12
CV
276
0.1
U_0402_16V
7K
DIS
@
1
2
CV
292
0.1
U_0402_16V
7K
DIS
@
1
2
CV
310
1U
_0402_6.3
V6K
DIS
@
1
2
96-BALLSDRAM DDR3
UV23
K4W1G1646G-BC11X76@
WEL3
RASJ3
CASK3
CS/CS0L2
CKE/CKE0K9
CKJ7
CKK7
DQSUB7
BA0M2
BA1N8
A2P3
A3N2
A4P8
A5P2
A6R8
A7R2
A8T8
A9R3
A10/APL7
A11R7
DQL0E3
DQL1F7
DQL2F2
DQL3F8
DQL4H3
DQL5H8
DQL6G2
DQL7H7
VSSQD1
VSSA9
VSSE1
VSSB3
NC/ODT1J1
VDDB2
VDDD9
VDDQA1
VDDQA8
VDDQC1
VDDQC9
NC/CS1L1
NC/CE1J9
VDDQE9
ZQ/ZQ0L8
RESETT2
DQSLF3
DMUD3
DMLE7
VSSQB1
VSSQB9
VSSQD8
VSSQE2
DQSUC7
VSSQE8
DQSLG3
VDDQF1
VSSQF9
VSSQG1
VDDQH2
VDDQH9
VSSQG9
VREFCAM8
VSSG8
VDDG7
ODT/ODT0K1
A0N3
A1P7
VDDK2
A12N7
VSSJ2
VDDK8
DQU1C3
DQU2C8
DQU3C2
DQU4A7
DQU5A2
DQU6B8
DQU7A3
DQU0D7
A13T3
A14T7
A15/BA3M7
BA2M3
VREFDQH1
NCZQ1L9
VDDN1
VDDN9
VDDR1
VDDR9
VSSJ8
VSSM1
VSSM9
VSSP1
VSSP9
VSST1
VSST9
VDDQD2
CV
299
1U
_0402_6.3
V6K
DIS
@
1
2
RV1824.99K_0402_1%
DIS@
12
RV175 56_0402_1%
DIS@
1 2
RV1864.99K_0402_1%
DIS@
12
CV
306
1U
_0402_6.3
V6K
DIS
@
1
2
CV
291
0.1
U_0402_16V
7K
DIS
@
1
2
RV1844.99K_0402_1%
DIS@
12
CV
288
0.1
U_0402_16V
7K
DIS
@
1
2
CV
318
1U
_0402_6.3
V6K
DIS
@
1
2
RV1894.99K_0402_1%
DIS@
12
CV
289
0.1
U_0402_16V
7K
DIS
@
1
2
CV
285
0.1
U_0402_16V
7K
DIS
@
1
2
CV
294
0.1
U_0402_16V
7K
DIS
@
1
2
CV
316
1U
_0402_6.3
V6K
DIS
@
1
2
CV
275
0.1
U_0402_16V
7K
DIS
@
1
2C
V277
0.1
U_0402_16V
7K
DIS
@
1
2
96-BALLSDRAM DDR3
UV22
K4W1G1646G-BC11X76@
WEL3
RASJ3
CASK3
CS/CS0L2
CKE/CKE0K9
CKJ7
CKK7
DQSUB7
BA0M2
BA1N8
A2P3
A3N2
A4P8
A5P2
A6R8
A7R2
A8T8
A9R3
A10/APL7
A11R7
DQL0E3
DQL1F7
DQL2F2
DQL3F8
DQL4H3
DQL5H8
DQL6G2
DQL7H7
VSSQD1
VSSA9
VSSE1
VSSB3
NC/ODT1J1
VDDB2
VDDD9
VDDQA1
VDDQA8
VDDQC1
VDDQC9
NC/CS1L1
NC/CE1J9
VDDQE9
ZQ/ZQ0L8
RESETT2
DQSLF3
DMUD3
DMLE7
VSSQB1
VSSQB9
VSSQD8
VSSQE2
DQSUC7
VSSQE8
DQSLG3
VDDQF1
VSSQF9
VSSQG1
VDDQH2
VDDQH9
VSSQG9
VREFCAM8
VSSG8
VDDG7
ODT/ODT0K1
A0N3
A1P7
VDDK2
A12N7
VSSJ2
VDDK8
DQU1C3
DQU2C8
DQU3C2
DQU4A7
DQU5A2
DQU6B8
DQU7A3
DQU0D7
A13T3
A14T7
A15/BA3M7
BA2M3
VREFDQH1
NCZQ1L9
VDDN1
VDDN9
VDDR1
VDDR9
VSSJ8
VSSM1
VSSM9
VSSP1
VSSP9
VSST1
VSST9
VDDQD2
CV
297
10U
_0603_6.3
V6M
DIS
@
1
2
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
1.0
HW-PIR
42 56Wednesday, February 01, 2012
2012/01/17 2013/01/16
Compal Electronics, Inc.
17
10
16
COMPAL
14
4 COMPAL
COMPAL
COMPAL
0.1
Page 1Page 1Page 1Page 1
Solution DescriptionSolution DescriptionSolution DescriptionSolution Description Rev.Rev.Rev.Rev.Page#Page#Page#Page# TitleTitleTitleTitle
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
ItemItemItemItem Issue DescriptionIssue DescriptionIssue DescriptionIssue DescriptionDateDateDateDateRequestRequestRequestRequest
OwnerOwnerOwnerOwner1
2
3
18,19 PCH VCCDMI, V_PROC_IO change to +VCCP from +1.05VS
09,10 CPUremove decoupling cap for +VCC_CORE, +VCCP, +VCC_GFXCORE_AXG, owner change to
PWR
15
12
10 CPUVCCSA_SELECT[0:1] which should be connected to VID[1:0] of the System Agent
(SA) VR controller.
13
5
11/07/28
6
7
8
9
08,11,12 DIMMThe M3 traces are routed to the Sandy Bridge Processor reserved pins for DDR3
VREF Intel CHKLST Rev1.5 required
11
18
11/07/28
11/07/28
11/07/28
0.1
0.1
0.1
Intel CHKLST Rev1.5 required
Intel CHKLST Rev1.5 required
Intel CHKLST Rev1.5 required
1bios.ru
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
ADPIN
VSB_N_002
VS
B_
N_
00
3
VSB_N_001
PSID
PSID-1
PSID-5
PSID-2
PSID-3
BA
TT
+
BATT++
BATT_PRSSYS_PRES
VS
_N
_0
01
VS_N_002
N1
CLK_SMBDAT_SMB
POK<45>
BATT_TEMP <24,44>
EC_SMB_DA1 <24,44>
EC_SMB_CK1 <24,44>
VCIN0_PH<24>
VCIN1_PH<24>
PS_ID <24>
65W/90W# <24>
51_ON#<25>
ADP_I <24,44>
130W/90W# <24>
ACIN <15,24,35,44>
VIN
B+
+5VALW
B+_BIAS
+5VALW+5VALW
+3VALW+5VALW
+RTCBATT
+3VLP
+3VALW
BATT++BATT+
+3VLP
VIN
VS
BATT+
+3VLP
+CHGRTC
+3VALW
VIN
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P1.0
43 56Wednesday, February 01, 2012
2012/01/17 2013/01/16Compal Electronics, Inc.
PWR-DCIN / BATT CONN / OTP
SMARTSMARTSMARTSMART
Battery:Battery:Battery:Battery:
01.BATT1+01.BATT1+01.BATT1+01.BATT1+
02.BATT2+02.BATT2+02.BATT2+02.BATT2+
03.CLK_SMB03.CLK_SMB03.CLK_SMB03.CLK_SMB
04.DAT_SMB04.DAT_SMB04.DAT_SMB04.DAT_SMB
05.BATT_PRS05.BATT_PRS05.BATT_PRS05.BATT_PRS
06.SYS_PRES06.SYS_PRES06.SYS_PRES06.SYS_PRES
07.BAT_ALERT07.BAT_ALERT07.BAT_ALERT07.BAT_ALERT
08.GND108.GND108.GND108.GND1
09.GND209.GND209.GND209.GND2
PBATT1 battery connector (Follow E3)
PH901 under CPU botten side :
CPU thermal protection at 90 degree C
65W/90W#
130W/90W#
65W 90W 130W
High
High
Low
Low
Erp lot6 CircuitPR903
33_0402_5%
1 2
PD904
PESD24VS2UT_SOT23-3
@
2 31
PR
90
41
00
K_
04
02
_1
%
12
JRTC9
SUYIN_060003FA002G202NL
@
+1
-2
PC
90
71
00
P_
04
02
_5
0V
8J
12
PH900100K_0402_1%_TSM0B104F4251RZ
12
PR917
499K_0402_1%
12
PC915
.1U_0402_16V7K
@
12
PR913100_0402_5%
1 2
PJPDC9
ACES_50299-00501-003
@
11
22
33
44
55
GND6
GND7
PD907
LL4148_LL34-2
@930
12
PC916
0.1U_0402_25V6
12
PR925
200_0805_5%
@930
1 2
G
D
SPQ
90
42
N7
00
2K
W_
SO
T3
23
-3
2
13
PU900
G920AT24U_SOT89-3
@930
IN2
GND
1
OUT3
PC
91
3
4.7
U_
06
03
_6
.3V
6K
~D
@930
12
PR930
1M_0402_1%12
PC9110.22U_0603_25V7K
@930
12
PC
90
0
10
00
P_
04
02
_5
0V
7K
12
PD905RB751V-40_SOD323-2
@
1 2
PR911
10K_0402_1%
1 2
G
D
S
PQ9032N7002KW_SOT323-3
2
13
PR
93
11
.2K
_1
20
6_
5%
~D
12
PR922100K_0402_1%
@930
12
PR915332K_0402_1%
12
PC9120.1U_0402_25V6
@930
12
PL900SMB3025500YA_2P
1 2
PR914100_0402_5%
1 2
PQ
90
7B
SS
M6
N7
00
2F
U-2
N_
SO
T3
63
-6
3
5
4
PC
91
4
1U
_0
60
3_
25
V6
K
@930
12
PR91890.9K_0402_1%
12
G
D S
PQ901FDV301N_NL_SOT23-3~D
2
1 3
PR9010_0402_5%@
1 2
PR9240_0603_5%
@930
1 2
PR910100_0402_5%
1 2
PD906LL4148_LL34-2
@930
12
PL901SMB3025500YA_2P
1 2
PD
90
0D
A2
04
U_
SO
T3
23
~D
@
231
PC
90
31
00
0P
_0
40
2_
50
V7
K
12
PR92713K_0402_1%
12
PR92322K_0402_1%
@9301 2
PR
90
51
0K
_0
40
2_
1%1
2
PC
90
51
00
P_
04
02
_5
0V
8J
12
PR929
1M_0402_1%
12
PQ902TP0610K-T1-E3_SOT23-3
2
13
PC
90
2
10
0P
_0
40
2_
50
V8
J
12
PR
90
01
5K
_0
40
2_
1%
12
G
D
SPQ
90
62
N7
00
2K
W_
SO
T3
23
-3
@
2
13
E
B
C
PQ900MMST3904-7-F_SOT323~D
2
31
PR
90
22
.2K
_0
40
2_
5%
12
PR91613K_0402_1%
@
12
PR906
10K_0402_1%
1 2
PD902SM24_SOT23
@
2 31
PR92068_1206_5%@930
12
PR9120_0402_5%
1 2
PR90822K_0402_1%
1 2
PR909100K_0402_1%
12
PD903
PESD24VS2UT_SOT23-3
@
2 31
PQ
90
7A
SS
M6
N7
00
2F
U-2
N_
SO
T3
63
-6
61
2
PC
90
80
.22
U_
06
03
_2
5V
7K
12
PC
90
11
00
0P
_0
40
2_
50
V7
K
12
PL902BLM18BD102SN1D_0603~D
12
PR92168_1206_5%
@930
12
PBATT9
ALLTO_C144FE-109A7-L
@
11
33
44
55
66
88
99
22
77
GND10
GND11
PC
91
0.1
U_
04
02
_1
6V
7K
12
PC
90
90
.1U
_0
40
2_
25
V6
12
PC
90
41
00
P_
04
02
_5
0V
8J
12
PR9266.81K_0402_1%
@
12
PC
90
6
0.0
1U
_0
40
2_
25
V7
K12
PD
90
1B
AV
99
W-7
-F_
SO
T-3
23
-3~
D
231
PR
90
71
00
K_
04
02
_1
%12
PQ905TP0610K-T1-E3_SOT23-3
@930
2
13
PR
91
9
0_
04
02
_5
%
12
PR928
200K_0402_1%
12
1bios.ru
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
DL_CHG
ACSETIN
CSIP
DH_CHG
CHG
VDDP_LDO
CSIN
BST
BST_CHGA
VFB
MAX8731_REF
DCIN
VD
DP
_L
DO
V1
ACINACIN
V1
LX_CHG
MA
X8
73
1_
RE
F
MAX8731_REF
V1
VDDP_LDO
ACOFF <24>
EC_SMB_DA1<24,43>
EC_SMB_CK1<24,43>
ACIN <15,24,35,43>
BATT_TEMP<24,43>
H_PROCHOT#<6,24>
ADP_I<24,43>
BATT_TEMP<24,43>
BATT_TEMP<24,43>
BATT_TEMP
ACOFF<24>
ACOFF <24>
VIN
VIN
BATT+
P2P3
B+
CHG_B+
VIN
BATT+
+5VALW
VIN
VIN
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P1.0
44 56Wednesday, February 01, 2012
2012/01/17 2013/01/16Compal Electronics, Inc.
PWR-Charger
Iada=0~4.62A(90W)
CC = 3.52A (Normal)
CV = 13.3V
ADP_I = 19.9*Iadapter*Rsense
731@ for ISL88731C
747@ for BQ24747
PU100
PR133
PR112
PR117
PR113
PC131
PC132
PR122
PR123
PR129
PC117
PC124
PC123
PC125
ISL88731C BQ24747
@ 100k
100k @
158k @
210k 309k
0.1u 220p
0.01u @
@ 200k
@
@
@
@
@
@
7.5k
10k
2200p
56p
120p
1u
PC134
PC129
PC126
PR127
PR111
PC110
@0.01u
@ 0.1u
0.1u0.22u
10 0
4.7 @
@1u
PC108
PR106
PR107
PC112
PD101
10 0
010
0.1u @
0.047u 0.1u
@ BAT54HT1G
ISL88731C BQ24747 BQ24747ISL88731C BQ24747ISL88731C BQ24747ISL88731C
For DT Mode
PR130
100_0402_5%
1 2
PQ
10
6B
SS
M6
N7
00
2F
U-2
N_
SO
T3
63
-6
@
3
5
4
PR129
10K_0402_5%
747@
1 2
PR11047K_0402_1%
12
PQ103PDTA144EU PNP_SOT323
2
13
PQ
10
7D
DT
C1
15
EU
A-7
-F_
SO
T3
23
2
13
PC
13
20
.01
U_
04
02
_2
5V
7K
73
1@
12
PC
10
7
0.1
U_
06
03
_2
5V
7K
12
PR123
7.5K_0402_5%
747@
1 2
PR
13
50
_0
40
2_
5%
@ 12
PR
10
0
3.3
_1
21
0_
5%
12
PR11649.9K_0402_1%
1 2
PR122200K_0402_5%
747@
1 2
PQ
10
5A
SS
M6
N7
00
2F
U-2
N_
SO
T3
63
-6
61
2
PR127
0/0402
747@
PQ105BSSM6N7002FU-2N_SOT363-6
3
5
4
PC126
0.1U/0603
747@
PC
10
34
.7U
_0
80
5_
25
V6
-K
12
PC130
0.1U_0603_25V7K
@
1 2
PC
11
60
.1U
_0
40
2_
10
V7
K
12
PU100
ISL88731CHRTZ-T_QFN28_5X5~D
731@
UGATE24
CSOP18
PHASE23
VFB15
SDA9
VICM8
ICR
EF
1
DCIN22
ACIN2
VDDSMB11
SCL10
ACOK13
NC14
BOOT25
NC16
EAO4
VDDP21
ICOUT26
CS
SP
28
CSON17
PGND19
LGATE20
FBO6
EAI5
CS
SN
27
VREF3
CE7
GND12
TP29
PR1114.7_0603_5%
731@
12
PC131
0.1U/0402
747@
PQ100AO4407AL_SO8
365
78
2
4
1
PQ101AO4409L_SO8
3 65
78
2
4
1
PR
10
32
00
K_
04
02
_1
%
12
PR
12
80
_0
40
2_
5% 1
2
PR113
309K/0402
747@
PR
10
7
10
_0
40
2_
5%
73
1@
12
PC117
2200P_0402_50V7K
747@
12
PR1140_0603_5%
1 2
PC
13
40
.01
U_
04
02
_2
5V
7K
73
1@
12
PC
11
91
0U
_0
80
5_
25
V5
K~
D
12
PQ
11
2B
SS
M6
N7
00
2F
U-2
N_
SO
T3
63
-63
5
4
PR
12
64
.7K
_0
40
2_
5%
12
PC
12
16
80
P_
04
02
_5
0V
7K
@
12
PR105150K_0402_1%
12
G
D
S
PQ111SSM3K7002FU_SC70-3
@2
13
PC1271U_0603_25V6K
@
12
PC
12
80
.1U
_0
40
2_
10
V7
K
@
12
PC131.1U_0402_16V7K
731@
12
PC1131000P_0402_50V7K
1 2
PR10910_1206_1%
1 2
PC
10
10
.1U
_0
60
3_
25
V7
K
12
PD101BAT54HT1G_SOD323-2~D
747@
1 2
PQ
11
2A
SS
M6
N7
00
2F
U-2
N_
SO
T3
63
-6
61
2
PR
10
4
3.3
_1
21
0_
5%
12
PR
13
61
.2K
_1
20
6_
5%
~D
12
PC
12
21
0U
_0
80
5_
25
V5
K~
D
12
PR
12
71
0_
04
02
_5
%7
31
@
12
PR
13
40
_0
40
2_
5%
@ 12
PR131
10K_0402_5%
1 2
PR1020.01_1206_1%
1
3
4
2
PC
10
52
20
0P
_0
40
2_
25
V7
K~
D
12
PR
13
31
00
K_
04
02
_1
%
74
7@
12
PC
10
02
.2U
_0
80
5_
25
V6
K
12
PR125100_0402_1%
12
PQ
10
9D
DT
C1
15
EU
A-7
-F_
SO
T3
23
2
13
PR108200K_0402_1%
1 2
PC
12
01
0U
_0
80
5_
25
V5
K~
D
@
12
PC
10
44
.7U
_0
80
5_
25
V6
-K
12
PR
11
21
00
K_
04
02
_1
%
73
1@
12
PR
11
71
58
K_
04
02
_1
%
73
1@
12
PR106
0/0402
747@
PC
12
4
56
P_
04
02
_5
0V
8~
D
74
7@ 1
2
PC
11
81
0U
_0
80
5_
25
V5
K~
D
12
PQ102AO4407AL_SO8
3 65
78
2
4
1
PR132
10K_0402_5%
1 2
PQ
10
4D
DT
C1
15
EU
A-7
-F_
SO
T3
23
2
13
PC1290.1U_0603_25V7K747@
1 2
PR1190_0402_5%
1 2
PR1200_0402_5%
1 2
PR107
0/0402
747@
PU100
BQ24747
747@
PR115
100K_0402_1%
1 2
PC
12
5
1U
_0
60
3_
10
V6
K
74
7@
12
PR1210.01_1206_1%
1
3
4
2
PR
10
6
10
_0
40
2_
5%
73
1@
12
PL10010UH_PCMB063T-100MS_4A_20%
1 2
PR11847K_0402_5%
1 2
PC112
0.1U/0603
747@
PC1101U_0603_10V6K
731@
12
PQ
10
8
AO
44
66
L_
SO
8~
D
4
7 865
123
PC115
1U_0603_10V6K
1 2P
C1
02
56
00
P_
04
02
_2
5V
7K
~D
12
PR
12
44
.7_
12
06
_5
%
@
12
PQ
10
6A
SS
M6
N7
00
2F
U-2
N_
SO
T3
63
-6
@
61
2
PC1111U_0603_25V6K
12
PC
10
9
0.1
U_
04
02
_1
0V
7K
@
12
PR
11
32
10
K_
04
02
_1
%
73
1@
12
PC135
0.1U_0603_25V7K
1 2
PC
10
60
.1U
_0
60
3_
25
V7
K
12
PC
10
80
.1U
_0
60
3_
25
V7
K7
31
@
12
PC1120.047U_0603_25V7M
731@
1 2
PQ113A
SSM6N7002FU-2N_SOT363-6
61
2
PC123
120P_0402_50VNPO~D
747@
1 2
PQ
11
3B
SS
M6
N7
00
2F
U-2
N_
SO
T3
63
-6
3
5
4
PL1011UH_NRS4018T1R0NDGJ_3.2A_30%
1 2
PC
13
30
.01
U_
04
02
_2
5V
7K
@
12
PR
10
12
00
K_
04
02
_1
%
12
PC126
0.22U_0603_25V7K
731@
1 2
PQ
11
0
AO
47
12
L_
SO
8~
D
4
7 865
123
1bios.ru
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
BST_5V
LX_5V
BST1_5VBST1_3V
UG_5V
BST_3V
EN
TR
IP2
EN
TR
IP1
FB_3V
LG_5V
SN
UB
_3
V
SN
UB
_5
V
EN
TR
IP1
EN
TR
IP1
EN
TR
IP2
LG_3V
UG_3V
LX_3V
FB_5V
N_3_5V_001
3/5V_EN-2
POK <43>
VCOUT0_PH<24>
VCOUT0_PH<24>
EC_ON_35V<28>
B++
+5VALWP
VL
+3VALWP
B++
B++
2VREF_6182
B+
+3VLP
2VREF_6182
+5VALWP +3VALW+5VALW +3VALWP
B++
VL
VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P 1.0
45 56Wednesday, February 01, 2012
2012/01/17 2013/01/16
Compal Electronics, Inc.
PWR-3VALWP/5VALWP
3.3VALWPTDC 5.4APeak Current 7.7AOCP current 9.2A TYP MAXH/S Rds(on) :27mohm , 34mohmL/S Rds(on) :11mohm , 14mohm
5VALWPTDC 5.6APeak Current 8AOCP current 9.6A TYP MAXH/S Rds(on) :27mohm , 34mohmL/S Rds(on) :11mohm , 14mohm
PC202
0.1U_0402_25V6@
1 2
PR20230.9K_0402_1%
1 2
PC2100.22U_0603_10V7K
12
PC2110.22U_0603_10V7K
12
PC
20
54
.7U
_0
80
5_
25
V6
-K12
PJP200
PAD-OPEN 4x4m
1 2
PL2013.3UH_PCMC063T-3R3MS_6A_20%
1 2
PR216150K_0402_1%
@930
1 2
PC
21
71
U_
06
03
_1
0V
6K
@
12
PR
20
94
.7_
12
06
_5
%
@
12
PR214100K_0402_5%
1 2
PC
20
70
.1U
_0
40
2_
25
V6
12
PJP204
PAD-OPEN 4x4m
1 2
PC20610U_0805_6.3V6M
12
PC
20
94
.7U
_0
80
5_
25
V6
-K
12
PC201
1U_0603_16V6K
12
PR
21
04
.7_
12
06
_5
%
@
12
PQ204AON7702A_DFN8-5
4
5
1 2 3
PR206110K_0402_1%
1 2
BZV55-B5V1_SOD80C2
PD200@
21+ PC213
330U_6.3V_M
1
2
PC
21
46
80
P_
06
03
_5
0V
7K
@
12
PR213 2.2K_0402_5%
1 2
PR
21
22
00
K_
04
02
_1
%@
12
PU200
RT8205LZQW(2) WQFN 24P PWM
FB
12
RE
F3
VO124
EN
TR
IP1
1
TO
NS
EL
4
FB
25
SK
IPS
EL
14
NC
18
VR
EG
51
7
VO27
VREG38
VIN
16
GN
D1
5
UGATE121
BOOT122
EN
TR
IP2
6
PGOOD23
PHASE120
LGATE119
EN
13
BOOT29
UGATE210
PHASE211
LGATE212
P PAD25
PR207
2.2_0603_5%
1 2
PQ200A
SSM6N7002FU-2N_SOT363-6
61
2
PJP202
PAD-OPEN 4x4m
1 2
PR205110K_0402_1%
1 2
PQ202AON7408L_DFN8-5
35
2
4
1
PL2003.3UH_PCMC063T-3R3MS_6A_20%
1 2
PJP203
PAD-OPEN 4x4m
1 2
PQ203AON7408L_DFN8-5
35
2
4
1
PC
20
30
.1U
_0
40
2_
25
V6
12
PR
21
74
0.2
K_
04
02
_1
%
@930
12
PC
21
56
80
P_
06
03
_5
0V
7K
@
12
PR208
2.2_0603_5%
1 2
PC
20
82
20
0P
_0
40
2_
50
V7
K
12
PC
21
94
.7U
_0
60
3_
10
V6
K
12
PC200
0.1U_0402_25V6
@
1 2
PC2164.7U_0805_10V6K
12
+ PC212330U_6.3V_M
1
2
PR20113.7K_0402_1%
1 2
PQ205AON7702A_DFN8-5
4
5
123
PQ200B
SSM6N7002FU-2N_SOT363-6
34
5
PR20320K_0402_1%
1 2
PR20420K_0402_1%
1 2
PC2180.1U_0402_25V6
12
PC
20
42
20
0P
_0
40
2_
50
V7
K
12
PQ201DTC115EUA_SC70-3
2
13
PL202
1UH_PCMB061H-1R0MS_7A_20%
1 2
PR215 0_0402_5%
1 2
PR200499K_0402_1%
@
1 2
PR2110_0402_5%@
1 2
1bios.ru
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
1.8VSP_FB
1.8VSP_VIN 1.8VSP_LX
SN
UB
_1
.8V
SP
EN_1.8VSPSUSP#<10,24,27,28,47,48>
+1.8VSP+3VALW
+1.8VSP +1.8VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P1.0
46 56Wednesday, February 01, 2012
2012/01/17 2013/01/16Compal Electronics, Inc.
PWR-1.8VSP
<Vo=1.8V> VFB=0.6VVo=VFB*(1+PR401/PR404)=0.6*(1+20K/10K)=1.8V
+1.8VSP
TDC 2.6A
Peak Current 3.8A
OCP current 4.5A
PJP401
PAD-OPEN 3x3m
@
1 2
PU400
SY8033BDBC_DFN10_3X3
EN5
PG
4
LX3
FB6
SVIN8
TP
11
LX2
PVIN10
NC
7
PVIN9
NC
1
PC
40
42
2U
_0
80
5_
6.3
V6
M12
PC40322U_0805_6.3VAM
12
PC
40
02
2U
_0
80
5_
6.3
V6
M12
PR40147K_0402_5%
@
12
PC
40
2
22
P_
04
02
_5
0V
8J
12
PR
40
44
.7_
12
06
_5
%
12
PR402 100K_0402_5%
1 2
PC
40
16
80
P_
06
03
_5
0V
7K
12
PR40010K_0402_1%
12
PL4001UH_NRS4018T1R0NDGJ_3.2A_30%
1 2
PJP400
PAD-OPEN 3x3m
@
1 2
PR40320K_0402_1%
12
PC
40
50
.22
U_
04
02
_1
6V
7K
12
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BST_+V1.05S_VCCPP
SW_+V1.05S_VCCPP
UG_+V1.05S_VCCPP
LG_+V1.05S_VCCPP
+V1.05S_VCCPP_5V
TRIP_+V1.05S_VCCPP
EN_+V1.05S_VCCPP
FB_+V1.05S_VCCPP
RF_+V1.05S_VCCPP
+V1.05S_VCCPP_B+
+V1.05S_VCCP_PWRGOOD<49>
SUSP#<10,24,27,28,46,48>
VCCIO_SENSE <9>
B+
+5VALW
+VCCP
+3VS
+VCCP +1.05VS
+VCCP
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P1.0
47 56Wednesday, February 01, 2012
2012/01/17 2013/01/16Compal Electronics, Inc.
PWR-V1.05S_VCCPP
+V1.05S_VCCP
TDC 11A
Peak Current 16A
OCP current 19A
TYP MAX
H/S Rds(on) 10mohm , 14.5mohm
L/S Rds(on) :3mohm , 3.6mohm
PR501
100K_0402_5%
12
PU500
TPS51212DSCR_SON10_3X3
EN3
TRIP2
V5IN 7
DRVH 9
SW 8
DRVL 6
VBST 10
TST5
VFB4
PGOOD1
TP 11
PC5091000P_0402_50V7K@
12
PR500
2.2_0603_5%
1 2
PC
503
4.7
U_0805_25V
6-K
12
PQ
500
SIR
472D
P-T
1-G
E3_P
OW
ER
PA
K8-5
~D
4
5
123
PR504
470K_0402_1%
12
PR509
10K_0402_1%
12
PR5054.7_1206_5%@
12
PJP500
JUMP_43X118
@
1 122
PC
502
0.1
U_0402_25V
6 12
PC
504
4.7
U_0805_25V
6-K
12
PC505.1U_0603_25V7K
12
PR5061.2K_0402_1%@
12
PC5001U_0603_10V6K
1 2
PL5001UH_PCMC063T-1R0MN_11A_20%
1 2
PC
501
2200P
_0402_50V
7K
12
PR5080_0402_5%
12
PQ
501
SIR
818D
P-T
1-G
E3_P
OW
ER
PA
K8-5
~D
5
4
2 13
PC
507
0.1
U_0402_10V
7K
@
12
PR502
47.5K_0402_1%1 2
PC5060.22U_0402_16V7K
12
PR503150K_0402_5%
1 2
PR507
4.99K_0402_1%
12
PC508
1000P_0402_50V7K@
12
PJP501
PAD-OPEN 4x4m
@
1 2
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DH_1.5V
VLDOIN_1.5V
S3_1.5V
SW_1.5V
CS_1.5V
DL_1.5V
1.5V_B+
VDD_1.5V
S5_1.5V
VTTREF_1.5V
SN
UB
_1.5
V
BOOT_1.5V
1.5V_B+
1.5V_FB
+1.5V
SYSON<24,27,28>
SUSP#<10,24,27,28,46,47>
+0.75VS+0.75VSP
B+
+1.5V
+5VALW
+5VALW
+1.5V
+0.75VSP
+1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P1.0
48 56Wednesday, February 01, 2012
2012/01/17 2013/01/16Compal Electronics, Inc.
PWR-1.5V/0.75VSP
0.75Volt +/- 5%
TDC 0.7A
Peak Current 1A
OCP Current 1.2A
1.5VP
TDC 14A
Peak Current 20A
OCP current 24A
TYP MAX
H/S Rds(on) :10mohm , 14.5mohm
L/S Rds(on) :3mohm , 3.6mohm
PC314 220P_0402_50V8J~D
1 2
PQ
302
SIR
818D
P-T
1-G
E3_P
OW
ER
PA
K8-5
~D
@
5
4
21 3
PR301
2.2_0603_5%
1 2
PR306200K_0402_5%
1 2
PC
305
2200P
_0402_50V
7K
12
PC3111U_0603_10V6K
12
PU300
RT8207MZQW_WQFN20_3X3
VTTSNS 2
FB
6
S5
8
PG
OO
D10
VDDP12
PH
AS
E16
BO
OT
18
VTTREF 4
PGND14
VTTGND 1
GND 3
VDDQ 5
S3
7
TO
N9
VDD11
CS13
LGATE15 UG
AT
E17
VT
T20
VLD
OIN
19
PAD 21
PR307
10K_0402_1%
12
PC3091U_0603_10V6K
1 2
+ PC308330U_2.5V_M
1
2
PC304
0.22U_0603_10V7K12
PR3080_0402_5%
1 2
PJP300
PAD-OPEN 3x3m
@
1 2
PJP302
JUMP_43X118
@
1 122
PR3045.1_0603_5%
1 2PR
303
4.7
_1206_5% @
12
PC
303
0.1
U_0402_25V
6
12
PQ
300
SIR
472D
P-T
1-G
E3_P
OW
ER
PA
K8-5
~D
4
5
1 2 3
PR3001M_0402_1%
1 2
PJP301
PAD-OPEN1x1m
12
PQ
301
SIR
818D
P-T
1-G
E3_P
OW
ER
PA
K8-5
~D
5
4
21 3
PC
301
4.7
U_0805_25V
6-K
12
PC
307
10U
_0805_6.3
V6M
12
PC
312
680P
_0603_50V
7K
@
12
PR3027.15K_0402_1%
1 2
PC3100.033U_0402_16V7~D
PL3000.68UH_PCMC063T-R68MN_15.5A_20%
1 2
PC300
1U_0402_6.3VX5R
12
PC
302
4.7
U_0805_25V
6-K
12
PR30510K_0402_1%
12
PC
306
10U
_0805_6.3
V6M
12
PC313.1U_0402_16V7K@
12
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SN
UB
_+
1.5
VP
+VCCSA_EN
+VCCSA_PWR_SRC +VCCSA_PHASE
+VCCSAP_FB
+V1.05S_VCCP_PWRGOOD<47>
VCCSA_SENSE <10>
VCCSA_VID1 <10>
VCCSA_VID0 <10>
SA_PGOOD <24>
+VCCSAP +VCCSA
+3VALW +VCCSAP
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P 1.0
49 56Wednesday, February 01, 2012
2012/01/17 2013/01/16
Compal Electronics, Inc.
PWR-VCC_SAP
output voltage adjustable network
VID [0] VID[1] VCCSA Vout
0 0 0.9V
0 1 0.8V
1 0 0.725V
1 1 0.675V
The 1k PD on the VCCSA VIDs are empty.These should be stuffed to ensure thatVCCSA VID is 00 prior to VCCIO stability.
+VCC_SAPTDC 4.2APeak Current 6AOCP current 7.2A
PJP601
PAD-OPEN 4x4m
@
1 2
PU600SY8037BDCC_DFN12_3X3
LX3
LX2
FB9
PVIN11
SVIN10
VOUT8
PVIN12
EN5
PG4
LX1
VID17
GN
D13
VID06
PR605100K_0402_5%
12
PR6020_0402_5%
12
PR
603
1K
_0402_5%
12
PC
601
0.1
U_0402_10V
7K
@
12
PC
605
2200P
_0402_50V
7K
1
2P
C612
10U
_0805_6.3
V6M
12
PC
607
22U
_0805_6.3
VA
M
12
PL6000.47UH_FDVE0630-H-R47M=P3_17.7A_20%
1 2
PC
603
0.1
U_0603_25V
7K 1
2
PC61068P_0402_50V8J
12
PR606100_0402_5%
12
PC600
680P_0402_50V7K12
PR
604
1K
_0402_5%
12
PR600
4.7_1206_5%
12
PC
604
22U
_0805_6.3
VA
M
12
PC
609
22U
_0805_6.3
VA
M
12
PC
611
10U
_0805_6.3
V6M
12
PL601
HCB1608KF-121T30_0603
1 2
PR6010_0402_5%
1 2
PC
606
22U
_0805_6.3
VA
M
12
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TRBSTA#
COMP_CPU1
CSP1A
VSP
FBA3
VR_HOT#
SWN2
CSREF
BST1
CSSUM
BST2_1
CSREF
VR_SVID_DAT1
SWN1
CS
SU
MA
CSP2A
VR_SVID_DAT1
NTC_PH201
VSN
VRMP
IMO
NA
IMO
NA
FB
A
FB_CPU1
DIFF_CPU
DR
OO
PA
TRBST#
CS
P1
A
ROSC_CPU
VR_RDYA
TSENSE
NTC_PH203
BST2
CSP3
CSP3
CSP1
CS
CO
MP
A
CO
MP
_C
PU
VGATE
TS
EN
SE
TS
EN
SE
CS
P2
A
ILIM
A
DIF
FA
ILIM
_C
PU
TSENSEA
VR_SVID_ALRT#VR_SVID_CLK
FBA2
SWN1A
CSREFA
VR_ON_CPU
6132P_VCCP
CSP2
TS
EN
SE
A
VBOOT
FB
_C
PU
CSREFCSCOMP
CO
MP
A
6132_VDDBP
FBA1
COMPA1
BST1_1
6132_VCC
TR
BS
TA
#
DR
OO
PC
SC
OM
PC
SC
OM
PC
SC
OM
PC
SC
OM
PC
SC
OM
PC
SC
OM
P
DROOP
FB_CPU2
FB_CPU3
CSREFACSCOMPA DROOPA
TR
BS
T#
6132_VDDBP
CSP2
CSP1
LG1 <51>
HG1 <51>
VCCSENSE<9>
VSSSENSE<9>
VSS_AXG_SENSE<10>
VCC_AXG_SENSE<10>
VR_RDYA
VR_SVID_DAT<9>VR_SVID_ALRT#<9>
6132_PWMA <51>
VR_SVID_CLK<9>
SWN1A <51>
SWN2 <51>
SW2 <51>
SW1 <51>
HG2 <51>
LG2 <51>
VR_HOT#<24>
SWN1 <51>
CSREFA <51>
VR_ON<24>
VGATE<6,15>
DRVEN <51>
CSREF <51>
IMVP_IMON<24>
+5VS
+3VS
+5VS
+5VS+VCCP
+5VS
+VCCP
+3VS
CPU_B+
+5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P1.0
50 56Wednesday, February 01, 2012
2012/01/17 2013/01/16Compal Electronics, Inc.
CPU Core
Option for
1 phase GFX
PUT COLSE
TO V_GT
HOT SPOT
PUT COLSE
TO VCORE
Phase 1
Inductor
PUT COLSE
TO VCORE
HOT SPOT
PUT COLSE
TO GT
Inductor
Option for
2 phase CPU
PR747
806_0402_1%
1 2
PR73343.2K_0402_1%
1 2
PR735
0_0402_5%1 2
PC713
.1U_0402_16V7K
1 2
PR753
0_0402_5%1 2
PR705
1K_0402_1%
<BOM Structure>
1 2
PC707
10P_0402_50V8J
1 2
PC7301000P_0402_50V7K
12
PR743
10_0402_1%1 2
PR742
6.34K_0402_1%12
PR
70
4
75
K_
04
02
_1
%1
2
PR72695.3K_0402_1%
1 2
PR707
10_0402_1%1 2
PC7101000P_0402_50V7K
12
PR724
10K_0402_1%1 2
PR7391K_0402_1%1 2
PR
74
5
8.2
5K
_0
40
2_
1%
12
PC7221000P_0402_50V7K
12
PR
71
4
8.2
5K
_0
40
2_
1%
12
PR746
8.06K_0402_1%
1 2
PH701
100K_0402_1%_TSM0B104F4251RZ
12
PR70010_0402_1%
1 2
PC
70
3
68
0P
_0
40
2_
50
V7
K
12
PR7360_0402_5%@
12
PC705
1000P_0402_50V7K
1 2
PR
71
31
5.8
K_
04
02
_1
%1
2
PC718
0.22U_0603_10V7K
12
PR740
6.98K_0402_1%1 2
PC714
2.2U_0603_10V7K
1 2
PC
73
4
.1U
_0
40
2_
16
V7
K
12
PR708
1K_0402_1%
1 2
PR741
49.9_0402_1%1 2
PR7302.2_0603_5%1 2
PC729
0.033U_0603_16V7
1 2
PC728
1800P_0402_50V7K
12
PH702
100K_0402_1%_TSM0B104F4251RZ
12
PR748130K_0603_1%
1 2
NCP6132BMNR2G_QFN60_7X7
PU700
TS
NS
A4
6
IOU
TA
54
EN4
VRHOT#11
SDIO5
ALERT#6
ROSC9
SCLK7
VRDYA3
CS
CO
MP
22
CS
P3
25
CS
RE
F2
4C
SS
UM
23
LGA41
TR
BS
TA
#5
7
PVCC36
BST240
HG239
SW238
LG237
PGND35
CO
MP
18
VSP14
DR
OO
P2
1
FB
17
DIFF15
CS
P1
27
SWA42
HGA43
VS
PA
59
DIF
FA
58
DR
OO
PA
52
FB
A5
6
CO
MP
A5
5
CS
RE
FA
49
CS
SU
MA
50
CS
P2
A4
8
VRMP10
VRDY12
DR
VE
N2
9
VSN13
LG134
SW133
VS
NA
60
ILIM
A5
3
VCC1
IOU
T1
9
HG132
CS
P2
26
CS
CO
MP
A5
1
TS
NS
28
ILIM
20
TR
BS
T#
16
PW
M3
0
BST131
BSTA44
CS
P1
A4
7
PWMA45
VDDBP2
VBOOT8
PA
D6
1
PC
70
40
.03
3U
_0
60
3_
16
V7
12
PH700
220K_0402_5%_ERTJ0EV224J
12
PC717
.1U
_0
40
2_
16
V7
K
12
PR720
0_0402_5%1 2
PC7000.033U_0603_16V7
1 2
PR7280_0402_5%
1 2
PR706
165K_0402_1%
12
PC7210.22U_0603_10V7K
12
PR750130K_0603_1%
1 2
PR709
5.11K_0402_1%
1 2
PR717
28K_0402_1%1 2
PR752
165K_0402_1%
1 2
PR
76
71
3.3
K_
04
02
_1
%
@12
PC708
1500P_0402_50V7K
1 2
PR754
1K_0402_1%
1 2
PR7182_0603_5%1 2
PC701
.1U_0402_16V7K
1 2
PR
72
2
54
.9_
04
02
_1
%1
2
PC
72
0
0.0
1U
_0
40
2_
25
V7
K
12
PH703
220K_0402_5%_ERTJ0EV224J
12
PC
73
2
0.0
33
U_
06
03
_1
6V
7
12
PR75175K_0402_1%
1 2
PC
70
2
12
00
P_
04
02
_5
0V
7K
12
PC7090.047U_0402_16V7K
12
PR73175_0402_1%
12
PC723
.1U_0402_16V7K1 2
PR702
8.06K_0402_1%
1 2
PC735560P_0402_50V7K
1 2
PC736
1000P_0402_50V7K
1 2
PR744
6.98K_0402_1%1 2
PR737
0_0402_5%1 2
PR712 6.98K_0402_1%
1 2
PR701
24.9K_0402_1%
1 2
PC706
560P_0402_50V7K
1 2
PC727
560P_0402_50V7K
1 2
PC719 2.2U_0603_10V7K12
PR
72
1
13
0_
04
02
_1
%
12
PR711
69.8K_0603_1%
1 2
PR71610K_0402_1%
@
12
PC733
1500P_0402_50V7K1 2
PR
73
81
2.7
K_
04
02
_1
%1
2
PC725
10P_0402_50V8J
12
PC
72
60
.04
7U
_0
40
2_
16
V7
K
12
PC716
.1U
_0
40
2_
16
V7
K
12
PR7250_0402_5%
1 2
PR727 1K_0402_1%
1 2
PR703
806_0402_1%
1 2
PC753
2.2U_0603_10V7K
1 2
PR73210K_0402_5%
12
PC7111000P_0402_50V7K 1
2
PR
76
61
3.3
K_
04
02
_1
%
12
PC
73
10
.04
7U
_0
40
2_
16
V7
K
12
PR7232.2_0603_5%1 2
PR
74
9
24
.9K
_0
40
2_
1%
12
PR765
0_0402_5%1 2
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
V1N_CPU
SN
UB
_G
FX
1
GFX_BST_1
EN_GFX
CSREF
DRVEN
V2N_CPU
GFX_BST
GFX_HG
GFX_SW
SN
UB
_C
PU
2
GFX_LG
SN
UB
_C
PU
1
VCC_GFX
CSREFA <50>
SWN1A <50>
HG1<50>
SWN2 <50>
SW1<50>
LG1<50>
HG2<50>
SW2<50>
LG2<50>
6132_PWMA<50>
CSREF <50>
SWN1 <50>
DRVEN<50>
+VCC_CORE+VCC_CORE
+5VS
CPU_B+ CPU_B+
B+
+VCC_GFXCORE_AXG
CPU_B+
B+
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P 1.0
51 56Wednesday, February 01, 2012
2012/01/17 2013/01/16
Compal Electronics, Inc.
PWR-VCC_SAP
QC-SV 35W CPUVID1=1.05VIccMax=53AIcc_Dyn=43AIcc_TDC=32AR_LL=1.9m ohmOCP~65A
VCC_coreTDC 32APeak Current 53AOCP current 65Load line -1.9mV/AFSW=300kHzDCR 1.1mohm +/-5% TYP MAXH/S Rds(on) :10mohm , 14.5mohmL/S Rds(on) :3mohm , 3.6mohm
+VCC_GFXCORE_AXGTDC 21.5APeak Current 33AOCP current 40ALoad line -3.9mV/AFSW=300kHzDCR 1.1mohm +/-5% TYP MAXH/S Rds(on) :10mohm , 14.5mohmL/S Rds(on) :3mohm , 3.6mohm
PQ
705
SIR
818D
P-T
1-G
E3_P
OW
ER
PA
K8-5
~D
5
4
2 13
PC
742
4.7
U_0805_25V
6-K
12
PC
741
4.7
U_0805_25V
6-K
12
PC
743
4.7
U_0805_25V
6-K
12
PC745
680P_0402_50V7K
@
12
PR760
2K_0402_1%12
PC
752
680P
_0402_50V
7K
@
12
PJP701
JUMP_43X118
@
11
22
PR7554.7_1206_5%
@
12
PR7564.7_1206_5%
@
12
PC7512.2U_0603_10V7K
12
PR764
10_0402_1%
12
PJP700
JUMP_43X118
@
11
22
PQ
704
SIR
472D
P-T
1-G
E3_P
OW
ER
PA
K8-5
~D
4
5
123
PQ
703
SIR
818D
P-T
1-G
E3_P
OW
ER
PA
K8-5
~D
5
4
2 13
PR757
10_0402_1%
12
PQ
708
SIR
818D
P-T
1-G
E3_P
OW
ER
PA
K8-5
~D
@
5
4
2 13
PC746
680P_0402_50V7K
@
12
PC
749
4.7
U_0805_25V
6-K
12
PQ
701
SIR
472D
P-T
1-G
E3_P
OW
ER
PA
K8-5
~D
4
5
123
PC
744
4.7
U_0805_25V
6-K
12
PC
747
4.7
U_0805_25V
6-K
12PR759
2.2_0603_5%
1 2
PQ
702
SIR
818D
P-T
1-G
E3_P
OW
ER
PA
K8-5
~D
5
4
2 13
PQ
707
SIR
818D
P-T
1-G
E3_P
OW
ER
PA
K8-5
~D
@
5
4
2 13
+
PC
724
100U
_25V
_M
~D
1
2
+
PC
712
100U
_25V
_M
~D
1
2
PL7040.36UH_FDU1040J-H-R36M=P3_33A_20%
1
3
4
2
PU701
NCP5911MNTBG_DFN8_2X2
DRVL5
EN3
VCC4
PWM2
BST1
GND6
SW7
DRVH8
FLAG9
PL7010.36UH_FDU1040J-H-R36M=P3_33A_20%
1
3
4
2
PL7020.36UH_FDU1040J-H-R36M=P3_33A_20%
1
3
4
2
PC750
0.22U_0603_10V7K12
PR75810_0402_1%
12
PR7610_0402_5%
12
PC
740
4.7
U_0805_25V
6-K
12
PC
739
4.7
U_0805_25V
6-K
12
PQ
700
SIR
472D
P-T
1-G
E3_P
OW
ER
PA
K8-5
~D
4
5
123
PR
762
4.7
_1206_5%
@
12P
Q706
SIR
818D
P-T
1-G
E3_P
OW
ER
PA
K8-5
~D
5
4
2 13
PC
748
4.7
U_0805_25V
6-K
12
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LX_PCIE
+V
GA
_P
CIE
P
EN_PCIE
FB_PCIE
PCIE_B+
SN
UB
_P
CIE
VGA_CORE_B+
EN_VGA_CORE
BST_VGA_CORE
SW_VGA_CORE
LG_VGA_CORE
VGA_CORE_5V
UG_VGA_CORE
PXS_PWREN<16,36>
GP
U_
VID
1
<3
5>
VCCSENSE_VGA<38>
VSSSENSE_VGA<38>
GP
U_
VID
0
<3
5>
VGA_PWRGD<17,36>
PX_MODE<24,36,53>
GPU_VID2<35>
+VGA_CORE
+VGA_PCIEP +1.0VGS
B+
+VGA_PCIEP+3VALW
+3VS
+5VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P1.0
52 56Wednesday, February 01, 2012
2012/01/17 2013/01/16Compal Electronics, Inc.
VGA_COREP
0.95V
PR825 6.81K
1.0VVGA_PCIE
5.9K
+VGA_CORE
TDC 22A
Peak Current 30A
OCP current 36A
FSW=350kHz
DCR 1.1mohm +/-5%
TYP MAX
H/S Rds(on) :10mohm , 14.5mohm
L/S Rds(on) :3mohm , 3.6mohm
Thames XT Chelsea Pro
+VGA_PCIE
TDC 3.6A
Peak Current 5.2A
OCP current 6A
Core Voltage Level
0
1
GPU_VID0GPU_VID1
11
Chelsea Pro
GPU_VID2
0.775V
0.8V
0.825V
0.85V
0.875V
0.9V
0.925V
0.95V
11
1 10
1 0 0
0 1 1
0 01
0 0 1
0 0 0
G
D S
PQ804
SI2301CDS-T1-GE3_SOT23-3
VGA@
2
1 3
PC
83
00
.1U
_0
40
2_
10
V7
KV
GA
@
12
PC806
.1U_0402_16V7K
VGA@
1 2
PR
83
61
K_
04
02
_5
%V
GA
@ 12
PJP804
JUMP_43X79
@
11
22
PC
82
2
0.1
U_
04
02
_1
0V
7K
VG
A@
12
PR82710K_0402_1%VGA@
12
PR825
5.9K_0402_1%
VGA@
12
PC
81
21
0U
_0
80
5_
6.3
V6
MV
GA
@
12
PR
80
1
10
K_
04
02
_1
%
VG
A@
12
PC81922U_0805_6.3VAM
VGA@
12
PR8042.2K_0402_5%
VGA@
1 2
PR
82
94
.7_
12
06
_5
%V
GA
@
12
PU801
TPS51518RUKR_QFN20_3X3
VGA@
V05
GSNS1
VID
08
PG
OO
D7
SLE
W19
V5IN15
SW12
BST11
MO
DE
16
VR
EF
6
V32
V23
V14
DRVL14
DRVH13
GN
D17
TR
IP18
VS
NS
20
PA
D21
VID
19
EN
10
PQ
80
2S
IR8
18
DP
-T1
-GE
3_
PO
WE
RP
AK
8-5
~D
VG
A@
5
4
2 13
PR8000_0402_5%
VGA@
1 2
PC
82
66
80
P_
06
03
_5
0V
7K
VG
A@
12
PC
80
44
.7U
_0
80
5_
25
V6
-KV
GA
@
12
PC
82
12
2U
_0
80
5_
6.3
VA
MV
GA
@
12
PC829
10P_0402_50V8J
VGA@
12
PR81576.8K_0402_1%
VGA@
12
PC
81
01
0U
_0
80
5_
6.3
V6
MV
GA
@
12
PJP800
JUMP_43X118
@
11
22
PL8000.36UH_FDU1040J-H-R36M=P3_33A_20%
VGA@
1 2
PR
81
15
.11
K_
04
02
_1
%V
GA
@
12
PJP805
JUMP_43X79
@
11
22
PR
83
31
05
K_
04
02
_1
%V
GA
@
12
PC
82
42
2U
_0
80
5_
6.3
VA
MV
GA
@
12
PQ
80
0S
IR4
72
DP
-T1
-GE
3_
PO
WE
RP
AK
8-5
~D
VG
A@
4
5
123
PR
83
0
0_
04
02
_5
%V
GA
@
12P
C8
28
10
P_
04
02
_5
0V
8J
VG
A@
12
PR8022.2_0603_5%
VGA@
12
PR807
43K_0402_1%
12
PC8050.1U_0603_25V7K
VGA@
1 2
PC825
22P_0402_50V8J
VGA@
12
PU800
SY8036LDBC_DFN10_3x3
VGA@
EN5
PG
4
LX3
FB6
SVIN8
TP
11
LX2
PVIN10
SS
7
PVIN9
LX
1
PC
82
30
.1U
_0
40
2_
10
V7
K
VGA@
12
PC813
1000P_0603_50V7K
@
12
PQ
80
1S
IR8
18
DP
-T1
-GE
3_
PO
WE
RP
AK
8-5
~D
VG
A@
5
4
2 13
PR
83
90
_0
40
2_
5%
~D
@1
2
+
PC
80
04
70
U_
D2
_2
VM
_R
4.5
MV
GA
@ 1
2 3
PR
81
05
.11
K_
04
02
_1
%V
GA
@
12
PC8071U_0603_10V6K
VGA@
12
PC
81
4
47
00
P_
04
02
_2
5V
7K
VG
A@
12
PR8084.7_1206_5%
@
12
PR
83
80
_0
40
2_
5%
~D
@
12
PR80310K_0402_1%
VGA@
1 2
PR826
200K_0402_5%
VGA@
1 2
PL8010.47UH_FDVE0630-H-R47M=P3_17.7A_20%
VGA@
1 2
PR
81
35
.11
K_
04
02
_1
%V
GA
@
12
PR82847K_0402_5%
@
12
PC
80
10
.1U
_0
40
2_
25
V6
VG
A@
12 P
C8
02
22
00
P_
04
02
_5
0V
7K
VG
A@
12
PR8342.49K_0402_1%
VGA@
1 2
PC
80
34
.7U
_0
80
5_
25
V6
-KV
GA
@
12
PR8142.49K_0402_1%
VGA@
12
G
DS
PQ803
2N7002KW_SOT323-3
VGA@
2
13
PR8350_0402_5%
VGA@
1 2
+
PC
80
94
70
U_
D2
_2
VM
_R
4.5
MV
GA
@ 1
2 3 PC
81
11
0U
_0
80
5_
6.3
V6
MV
GA
@
12
PR
83
71
K_
04
02
_5
%V
GA
@12
PC
81
82
2U
_0
80
5_
6.3
VA
MV
GA
@
12
PC
82
02
2U
_0
80
5_
6.3
VA
MV
GA
@
12
1bios.ru
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
FB_VDDCIP
LX_VDDCIP
EN_VDDCIP
VDDCI_VID <35>
PX_MODE<24,36,52>
VDDCI_SEN <38>
+VDDCIP+3VALW
+3VGS
+VDDCIP +VDDCI
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P1.0
53 56Wednesday, February 01, 2012
2012/01/17 2013/01/16Compal Electronics, Inc.
+VDDCIP
FB=0.6Volt
Low 0.9V
1VHigh
VDDCI_VID
+VDDCI
TDC 2.8A
Peak Current 4A
OCP current 6A
PR1006
10_0402_5%
VGA@
12
PJ1000
JUMP_43X79
@
11
22
PR
10
01
4.7
_1
20
6_
5%
VG
A@1
2
PC
10
00
22
P_
04
02
_5
0V
8J
VG
A@
12
PR1003
4.99K_0402_1%
VGA@
1 2
PL10000.47UH_FDVE0630-H-R47M=P3_17.7A_20%
VGA@
1 2
PC
82
70
.1U
_0
40
2_
10
V7
KV
GA
@
12
PR100729.4K_0402_1%
VGA@
12
PR1004
0_0402_5%
VGA@
12
PR100810K_0402_5%
VGA@
12
G
D
SPQ10002N7002W-T/R7_SOT323-3
VGA@
2
13
PC
10
04
0.1
U_
04
02
_1
0V
7K
VGA@
12
PR100910K_0402_5%
VGA@
12
PC100122U_0805_6.3V6M
VGA@
12
PR100010K_0402_1%
VGA@
12
PC
10
03
22
U_
08
05
_6
.3V
6M
VG
A@
12
PR1010100K_0402_5%
@
12
PC
10
05
22
U_
08
05
_6
.3V
6M
VG
A@
12
PC
10
02
68
0P
_0
60
3_
50
V7
KV
GA
@
12
PU1000
SY8036LDBC_DFN10_3x3
VGA@
EN5
PG
4
LX3
FB6
SVIN8
TP
11
LX2
PVIN10
SS
7
PVIN9
LX
1
PR1002 10K_0402_5%
VGA@
1 2
PR10051M_0402_5%
@
12
PJ1001
PAD-OPEN 4x4m
@
1 2
PC10064700P_0402_25V7K@
12
1bios.ru
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCCP+VCC_CORE
+VCC_CORE
+VCC_CORE
+VCC_GFXCORE_AXG
+VCCP
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P1.0
54 56Wednesday, February 01, 2012
2012/01/17 2013/01/16Compal Electronics, Inc.
PROCESSOR DECOUPLING
+VCC_CORE +VCC_GFXCORE_AXG
Socket Bottom
Socket Top
5 x 22 µF (0805)
5 x (0805) no-stuff
sites
7 x 22 µF (0805)
2 x (0805) no-stuff
sites
Below is 458544_CRV_PDDG_0.5 Table 5-8.
PC
1212
22U
_0805_6.3
V6M
1
2
PC
1218
22U
_0805_6.3
V6M
1
2
PC
1215
22U
_0805_6.3
V6M
1
2
+ PC1257
330U_D2_2VM_R9M
1
2 3
PC123922U_0805_6.3V6M
1
2
+ PC1261330U_D2_2V_Y
@
1
2
+PC1246
330U_D2_2V_Y
1
2
PC
1231
22U
_0805_6.3
V6M
1
2
PC
1235
22U
_0805_6.3
V6M
1
2
PC
1228
22U
_0805_6.3
V6M
1
2
PC
1229
22U
_0805_6.3
V6M
1
2
PC120510U_0805_6.3VAM
1
2
PC
1216
22U
_0805_6.3
V6M
1
2
+
PC
1200
330U
_D
2_2V
M_R
9M
1
2
PC120710U_0805_6.3VAM
1
2
PC124922U_0805_6.3V6M
1
2
PC120210U_0805_6.3VAM
1
2
PC121010U_0805_6.3VAM
1
2
PC120410U_0805_6.3VAM
1
2
PC120310U_0805_6.3VAM
1
2
PC120810U_0805_6.3VAM
1
2
PC
1214
22U
_0805_6.3
V6M
1
2
+
PC
1254
330U
_D
2_2V
M_R
9M
1
2
+ PC1260330U_D2_2V_Y
1
2
PC
1233
22U
_0805_6.3
V6M
1
2
PC125622U_0805_6.3V6M
1
2
PC
1226
22U
_0805_6.3
V6M
1
2
PC125122U_0805_6.3V6M
1
2
PC122122U_0805_6.3V6M
1
2
+
PC
1255
330U
_D
2_2V
M_R
9M
1
2
PC
1217
22U
_0805_6.3
V6M
1
2
PC
1245
22U
_0805_6.3
V6M
1
2
PC
1232
22U
_0805_6.3
V6M
1
2
PC
1213
22U
_0805_6.3
V6M
1
2
PC120610U_0805_6.3VAM
1
2
PC124122U_0805_6.3V6M
1
2
PC
1225
22U
_0805_6.3
V6M
1
2
PC123822U_0805_6.3V6M
1
2
PC
1236
22U
_0805_6.3
V6M
1
2
PC
1244
22U
_0805_6.3
V6M
1
2
+ PC1259
330U_D2_2VM_R9M
1
2 3
PC125022U_0805_6.3V6M
1
2
PC
1234
22U
_0805_6.3
V6M
1
2
PC125222U_0805_6.3V6M
1
2
PC
1230
22U
_0805_6.3
V6M
1
2
PC
1237
22U
_0805_6.3
V6M
1
2
PC121922U_0805_6.3V6M
1
2
+ PC1262330U_D2_2V_Y
@
1
2
+ PC1258330U_D2_2V_Y
1
2
PC124022U_0805_6.3V6M
1
2
+ PC1247330U_D2_2V_Y
1
2
PC120910U_0805_6.3VAM
1
2
PC
1224
22U
_0805_6.3
V6M
1
2
PC
1243
22U
_0805_6.3
V6M
1
2
PC122322U_0805_6.3V6M
1
2
PC
1211
22U
_0805_6.3
V6M
1
2
PC120110U_0805_6.3VAM
1
2
PC122022U_0805_6.3V6M
1
2
PC124222U_0805_6.3V6M
1
2
PC
1227
22U
_0805_6.3
V6M
1
2
PC125322U_0805_6.3V6M
1
2
PC122222U_0805_6.3V6M
1
2
1bios.ru
5
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D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P 0.2
55 56Wednesday, February 01, 2012
2012/1/17 2013/1/16
Compal Electronics, Inc.
PROCESSOR DECOUPLING
Page 48
+1.5V/+0.75VSP: TDC:14A/0.7ART8207MZQW
B+
AlwaysDC IN +3VALWP: TDC:5.4A
+5VALWP: TDC:5.6A RT8205LZQW(2) WQFN
Power block
CHARGERCC:0A~3.52ACV:13.3V(6cell)ISL88731CHRTZ-T
SYSON
VR_ON+VCC_CORETDC: 32ANCP6132BMNR2G
Page 45
Page 44
InputSwitch
Page 50/51
CPU OTP
Turn Off
Page 43
Page 44
Battery
+1.8VSP: TDC:2.6ASY8033BDBC
SUSP#
Page 46
+VGA_CORETDC:23.4ATPS51518RUKR
Page 52
+VCCP: TDC:11A TPS51212DSCR
Page 47
SUSP#
+VCC_GFXCORE_AXGTDC: 21.5ANCP6132BMNR2G
Page 50/51
+VCCSAP: TDC:4.2ASY8037DCC
Page 49
VR_ON
+V1.05S_VCCP_PWRGOOD
+VGA_PCIEP: TDC:3.5A SY8036LDBC
Page 52
PXS_PWREN
PX_MODE
+VDDCIP: TDC:2.8A SY8036LDBC Page 53
PX_MODE
1bios.ru
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5
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4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-8241P 1.0
56 56Wednesday, February 01, 2012
2012/01/17 2013/01/16
Compal Electronics, Inc.
PWR-PIR
Page 1Page 1Page 1Page 1
Solution DescriptionSolution DescriptionSolution DescriptionSolution Description Rev.Rev.Rev.Rev.Page#Page#Page#Page# TitleTitleTitleTitle
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
ItemItemItemItem Issue DescriptionIssue DescriptionIssue DescriptionIssue DescriptionDateDateDateDateRequestRequestRequestRequest
OwnerOwnerOwnerOwner1 Frank44 Charger. 11/12/08 Change PR113 from 316k to 309k for Charger IC BQ24747RHDR.
Remove PR132.
2 45 3.3VALWP/5VALWP 11/12/08 Frank
Change PR113 for temperature and voltage test.
Change PC219 from 1uF to 4.7uF.
+VDDCIP533 11/12/08 Frank Change PR1002 from 100k to 0ohm.
Remove PR1005 and PC1004.
Fine tune time sequence.
Design change.
X00
X00
X00