compal la-6755p, la-6757p - schematics. …itpc.net.ua/node/img/remnotetbook/lenovo_g575/...security...
TRANSCRIPT
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Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA6755P/7P 1.0Cover Page
B
1 48Tuesday, November 30, 2010
2010/06/30 2012/06/30Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA6755P/7P 1.0Cover Page
B
1 48Tuesday, November 30, 2010
2010/06/30 2012/06/30Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA6755P/7P 1.0Cover Page
B
1 48Tuesday, November 30, 2010
2010/06/30 2012/06/30Compal Electronics, Inc.
AMD APU Ontario-FT1 + FCH Hudson-M1 + GPU Roberson XT
PAWGC/D Schematics Document
REV:1.0
Compal Confidential
2010-11-10
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Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA6755P/7P 1.0Block Diagrams
B
2 48Tuesday, November 30, 2010
2010/06/30 2012/06/30Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA6755P/7P 1.0Block Diagrams
B
2 48Tuesday, November 30, 2010
2010/06/30 2012/06/30Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA6755P/7P 1.0Block Diagrams
B
2 48Tuesday, November 30, 2010
2010/06/30 2012/06/30Compal Electronics, Inc.
CRT Conn.
BGA 605-Ball23mm x 23mm
AMD Brazos APU
x4 UMI Gen. 1
Hudson M1
page 5,6,7
page 13,14,15,16,17
LVDS Conn.
Single Channel BANK 0, 1, 2, 3200pin DDRII-SO-DIMM X2
1.5V DDRIII 1333
Memory BUS(DDRIII)
page 8,9
HDMI Conn.
WLAN &WiMax
GIGA LAN
4 * x1 PCI-E 2.0
FT1BGA 413-Ball19mm x 19mm
AR8151/8152
2.5GT/s per lane
DDR3*4
AMD Robson
VRAM 64*16 x4 PCI-E GPP GEN2
WLAN/WiMAX
ESATA HDD AND USB CONN(Left)
USB PORT 2.0 x3(Left)
SATA3.0 HDD CONN
SATA ODD CONN
6*SATA serial
Internal MIC
BlueTooth CONN
CMOS Camera
CX20671Audio Codec
2Channel Speaker
AZALIA
14*USB2.0
Audio JacksStereo HeadPhone OutputMicrophone Input
USB PORT 2.0 x1(Right)
Card ReaderRealtek RTS5139SD/MMC/MS/MS Pro/XD
SPI ROM
LPC BUS
Int.KBD
ENE KB930
Touch Pad
EC
EMC1403
Thermal Sensor
PCI ExpressMini card Slot 1
WLAN/WiMAXPCI-E(WLAN)
USB(WiMAX)
File Name : PAWGC/DCompal confidential
1. POWER BOARD2. Card Reader BOARD
For PAWGC
page 10
page 12
page 11
page 18 ~ 24
page 25,26
page 27
page 27
page 27
page 28
page 29
page 29
page 30
page 30
page 31
page 32
page 32
page 33page 34
page 34
page 35
page 34
page 10
page 15SPI ROM
+SW(4pin) BOARD3. 4*LED+SW(3pin)
For PAWGD
2. Card reader BOARD1. POWER BOARD
4. ODD BOARD
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Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA6755P/7P 1.0Notes List
B
3 48Tuesday, November 30, 2010
2010/06/30 2012/06/30Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA6755P/7P 1.0Notes List
B
3 48Tuesday, November 30, 2010
2010/06/30 2012/06/30Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA6755P/7P 1.0Notes List
B
3 48Tuesday, November 30, 2010
2010/06/30 2012/06/30Compal Electronics, Inc.
+APU_CORE_NB 1.0V switched power rail ON OFF
+0.75VS 0.75VS switched power rail for DDR terminato r
+RTCVCC RTC power
+1.8VS 1.8V switched power rail
+5VS
+3VS
+5VALW
+1.5V
+3VALW
1.5V power rail for CPU VDDIO and DDRIII
3.3V always on power rail
5V always on power rail
3.3V switched power rail
5V switched power rail
+VSB VSB always on power rail ON ON*
ONON
ON
ON
ON
OFF
OFF
+APU_CORE
Voltage Rails
VIN
B+
+1.0VS
Adapter power supply (19V)
AC or battery power rail for power circuit.
Core voltage for CPU (0.7-1.2V)
OFF
1.0V switched power rail for NB VDDC & VGA
+1.1VS 1.1VS switched power rail ON OFF OFF
ON ON*
ON OFF OFF
+3V_LAN 3.3V power rail for LAN ON ON(WOL) OFF
S1 S3 S5
ON OFF
ON
N/A N/A N/A
N/AN/AN/A
Power Plane Description
OFF
OFF
ON
OFF
OFF
ON
Note : ON* means that this power plane is ON only w ith AC power available, otherwise it is OFF.
OFFON
ON
ON
ON ON*
OFF
OFF
ON
OFF
EC SM Bus1 address
Device
SM Bus Controller 0
Device Address
Address Address
EC SM Bus2 address
Device
Smart Battery 0001-011xb
HEX
HEX
HEX
9AH
SB-TSI
ON ON*ON+1.1VALW 1.1V always on power rail
EMC1412-2 (dGPU)
EMC1403-2(DDR,WLAN)
1111-100xb
1001-101xb
1001-100xb 98H
SM Bus Controller 1
Device Address HEX
DDR DIMM1 (FCH_SMB0)
DDR DIMM2 (FCH_SMB0)
1001-000xb
1001-001xb
90
92
WLAN (FCH_SMB0)
APU SIC/SID (FCH_SMB3)
(FCH_SMB1 ~ FCH_SMB4, SMB_ALERT#)
(FCH_SMB0)
H_THERMTRIP# (FCH_ALERT#)
FCH Hudson-M1USB Port List
USB1.1
USB2.0
Port0
Port1
Port0
Port1
Port2
Port3
Port4
Port5
Port6
Port7
Port8
Port9
Port10
Port11
Port12
Port13
Left USB1
USB Camera
Left(Combo)
Left USB2
Right USB
BT
CardReader
Mini-PCIE
NC
NC
NC
NC
NC
NC
NC
NC
BrazosPCIE Port List
PCIE0
PCIE1
PCIE2
PCIE3
PCIE0
PCIE1
PCIE2
PCIE3
APU
FCH
GPU PCIE x4
LAN
WLAN
NC
NC
FCH Hudson-M1SATA Port List
SATA0
SATA1
SATA2
SATA3
SATA4
SATA5
HDD
ODD
eSATA
NC
NC
NC
BOM Structure
UMA@ : UMA onlyPX@ : DIS muxluss - PX3@ : PX3.0 only - BACO@ : Baco only
GIGA@ : AR81518152@ : AR8152
CMOS@ : USB cameraHDMI@ : HDMI function
ESATA@: eSATA functionBT@ : BT functionME@ : ME components
HWM@ : hardware monitor function
X76@, H1G@, H512@, S1G@, S512@ : VRAM45@ : 45 Level
nonHWM@: w/o hardware monitor function
F8H15H
nonHDMI@ : w/o HDMI function
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Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA6755P/7P 1.0dGPU Block Diagram
B
4 48Tuesday, November 30, 2010
2010/06/30 2012/07/14Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA6755P/7P 1.0dGPU Block Diagram
B
4 48Tuesday, November 30, 2010
2010/06/30 2012/07/14Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA6755P/7P 1.0dGPU Block Diagram
B
4 48Tuesday, November 30, 2010
2010/06/30 2012/07/14Compal Electronics, Inc.
Note: Do not drive any IOs before VDDR3 is ramped u p.
VDD_CT(1.8V)
VDDR3(3.3VGS)
VDDC/VDDCI(1.12V)
PERSTb
Straps Reset
Straps Valid
REFCLK
VDDR1(1.5VGS)
Power-Up/Down Sequence1. All the ASIC supplies must fully reach their res pective nominal voltages within 20 ms of the start of the ramp-upsequence, though a shorter ramp-up duration is pref erred.
2. VDDR3 should ramp-up before or simultaneously wi th VDDC.
3. For LVDS, DPx_VDD10 should ramp-up before DPx_VD D18 and the PCIe Reference clock should begin befor eDPx_VDD18. For power-down, DPx_VDD18 should ramp-do wn before DPx_VDD10.
4. The external pull-ups on the DDC/AUX signals (if applicable) should ramp-up before or after both VD DC andVDD_CT have ramped up.
5.VDDC and VDD_CT should not ramp-up simultaneously . (e.g., VDDC should reach 90% before VDD_CT starts toramp-up (or vice versa).)
PCIE_VDDC(1.0V)
Global ASIC Reset
T4+16clock
dGPU Power Pins Max current
1679mA
575mA
2A
190mA
70mA
2.8A
12.9A
PCIE_PVDD, PCIE_VDDR, TSVDD, VDDR4, VDD_CT,
DPE_PVDD, DP[F:E]_VDD18, DP[D:A]_PVDD,
DP[D:A]_VDD18, AVDD, VDD1DI, A2VDDQ, VDD2DI,
DPLL_PVDD, MPV18, and SPV18
DP[F:E]_VDD10, DP[D:A]_VDD10, DPLL_VDDC, and
SPV10
PCIE_VDDC
VDDR3 , and A2VDD
BIF_VDDC (current consumption = [email protected], in
BACO mode)
VDDR1
VDDC/VDDCI
Voltage
1.8V
1.0V
1.0V
3.3V
VDDCSame as
1.5V
1.12V
PX 3.0
OFF
MOS
OFF
OFF
OFF
OFF
OFF
OFF
BACO Mode
ON
ON
ON
ON
ONSame asPCIE_VDDC
OFF
OFF
+1.0VGS
+3.3VGS
+1.5VGS
+VGA_CORE+1.8VGS
iGPU
+1.0V
dGPU
+3.3VALW
PE_GPIO1
+1.5V
+B+1.8V
PE_GPIO0 PE_EN BACO Switch
BIF_VDDC
PX_mode
PWRGOOD
PE_GPIO0 : Low -> Reset dGPU ; High ->Normal operationPE_GPIO1 : Low -> dGPU Power OFF ; High -> dGPU Power ON
Without BACO option :
BACO option :
PE_GPIO0 : High ->Normal operation (dGPU is not reset on BACO mode)PE_GPIO1 : Low -> dGPU Power OFF ; High -> dGPU Power ON (always High)
SI4800
SI4800
Regulator
Regulator
1
23
45
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LDT_RST#APU_PWRGD
APU_SVC
APU_PROCHOT#APU_THERMTRIP#
APU_TDIAPU_TDOAPU_TCKAPU_TMSAPU_TRST#APU_DBRDYAPU_DBREQ#
APU_SICAPU_SID
APU_SVD
APU_ALERT#_R
APU_SIC
APU_SID
TEST19TEST18
TEST25_HTEST_25_L
HDMI_TX2N_CHDMI_TX2P_C
HDMI_TX0N_CHDMI_TX0P_C
HDMI_TX1N_CHDMI_TX1P_C
HDMI_CLKN_CHDMI_CLKP_C
APU_PROCHOT#
FCH_SID
FCH_SIC
EC_SMB_DA2
EC_SMB_CK2
EC_SMB_CKAPU_SIC
EC_SMB_DAAPU_SID
APU_THERMTRIP#
TEST28_LTEST28_H
TEST31
TEST36TEST37
TEST15
TEST_25_L
TEST33_HTEST33_L
TEST36
EDID_CLKEDID_DATA
APU_DBREQ#
APU_ALERT#_R
HDMI_DATA
HDMI_CLK
HDMI_DATAHDMI_CLK
APU_PROCHOT#
J108_PLLTST0
APU_TDO
J108_PLLTST1
APU_PWRGD
TEST_19
TEST_18
APU_TRST#_R
LDT_RST#
APU_TCK
APU_DBRDY
APU_TMS
APU_DBREQ#
APU_TRST#
APU_TDI
TEST35
APU_CLK(13)APU_CLK#(13)
DISP_CLK(13)DISP_CLK#(13)
LDT_RST#(13)APU_PWRGD(13)
H_THERMTRIP# (14)
HDMI_DET (11)
ALLOW_STOP# (13)
APU_ENBKL (10)APU_ENVDD (10)APU_BLPWM (10)
DAC_RED (12)
DAC_GRN (12)
DAC_BLU (12)
CRT_HSYNC (12)CRT_VSYNC (12)
CRT_DDC_CLK (12)CRT_DDC_DATA (12)
APU_VDDNB_RUN_FB_H(44)APU_VDD0_RUN_FB_H(44)
APU_SVC(44)APU_SVD(44)
FCH_SID (14)
FCH_SIC (14)
EC_SMB_DA2 (19,29,31)
EC_SMB_CK2 (19,29,31)
EDID_CLK (10)EDID_DATA (10)
LVDS_A2(10)LVDS_A2#(10)
LVDS_ACLK(10)LVDS_ACLK#(10)
LVDS_A0(10)LVDS_A0#(10)
LVDS_A1(10)LVDS_A1#(10)
HDMI_TX2N(11)HDMI_TX2P(11)
HDMI_TX1N(11)HDMI_TX1P(11)
HDMI_TX0N(11)HDMI_TX0P(11)
HDMI_CLKN(11)HDMI_CLKP(11)
APU_ALERT#_FCH(15)FCH_PROCHOT#(13)
EC_PROCHOT#(31)
APU_VDD0_RUN_FB_L(44)
HDMI_DATA (11)HDMI_CLK (11)
APU_ALERT#_EC(31)
+1.8VS
+3VS
+3VS
+1.8VS
+3VS
+1.8VS
+1.8VS
+1.8VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA6755P/7P1.0
FT1 CTRL/DP/CRT
Custom
5 48Tuesday, November 30, 2010
2010/06/30 2012/06/30Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA6755P/7P1.0
FT1 CTRL/DP/CRT
Custom
5 48Tuesday, November 30, 2010
2010/06/30 2012/06/30Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA6755P/7P1.0
FT1 CTRL/DP/CRT
Custom
5 48Tuesday, November 30, 2010
2010/06/30 2012/06/30Compal Electronics, Inc.T0 FCH
TO EC
TO EC
T0 FCH
Vgs(th): min 1.0VTyp 1.6VMax 2.0V
2N7002DW-T/R7
If FCH internal pull-up disabled, level-shifter could be deleted. Need BIOS to disable internal pull-up!!
Close to APU
Connection to EC, FCH input need to pull-down
AMD Debug
If Q80 or R429, R432 implemented,R747 & R748 need to be mounted
Please be noted about TEST_18 and TEST_19
Pull-high to enable HDMI function20100812
Delete Test point for layout limitation20100818
need to pop for HDT debug20101012
need to pop for HDT debug20101012
AMD check list update20101110
C516 0.1U_0402_16V4ZC516 0.1U_0402_16V4Z1 2 R420 51_0402_1%R420 51_0402_1%1 2
R418 0_0402_5%@R418 0_0402_5%@1 2
T94PADT94PAD
C515 0.1U_0402_16V7KC515 0.1U_0402_16V7K1 2
R852 0_0402_5%@R852 0_0402_5%@1 2
R42810K_0402_5%@
R42810K_0402_5%@
12
R808 0_0402_5%R808 0_0402_5%1 2
R406 100K_0402_5%R406 100K_0402_5%1 2
R431 0_0402_5%R431 0_0402_5%1 2
R873 0_0402_5%R873 0_0402_5%1 2
R401 300_0402_5%R401 300_0402_5%12
R408 150_0402_1%R408 150_0402_1%1 2
R402 510_0402_1%R402 510_0402_1%1 2
R430 0_0402_5%R430 0_0402_5%1 2
T77PADT77PAD
T66PAD T66PAD
R845 1K_0402_5%R845 1K_0402_5%12
C509 0.1U_0402_16V7KC509 0.1U_0402_16V7K1 2
R433 0_0402_5%R433 0_0402_5%1 2
R414 1K_0402_5%R414 1K_0402_5%1 2
T69PAD T69PAD
R416 1K_0402_5%R416 1K_0402_5%1 2
R84
2
1K_0
402_
5%
R84
2
1K_0
402_
5%
12
R812 10K_0402_5%R812 10K_0402_5%1 2
R432 0_0402_5%@
R432 0_0402_5%@1 2
R851 0_0402_5%@R851 0_0402_5%@1 2
R422 1K_0402_5%nonHDMI@
R422 1K_0402_5%nonHDMI@1 2
C517 0.1U_0402_16V4ZC517 0.1U_0402_16V4Z1 2
R848 10K_0402_5%@R848 10K_0402_5%@ 12
R409 150_0402_1%R409 150_0402_1%1 2
T67PAD T67PAD
R413 499_0402_1%R413 499_0402_1%1 2
R411 1K_0402_5%R411 1K_0402_5%1 2
EB
C
Q79
MMBT3904_NL_SOT23-3
EB
C
Q79
MMBT3904_NL_SOT23-3
2
3 1
R425
1K_0402_5%
R425
1K_0402_5%
12
T72PAD T72PAD
R400 1K_0402_5%R400 1K_0402_5%1 2
R417 1K_0402_5%R417 1K_0402_5%1 2
Q80B2N7002DW-T/R7_SOT363-6
@
Q80B2N7002DW-T/R7_SOT363-6
@3
5
4
R415 1K_0402_5%@R415 1K_0402_5%@1 2
T71PAD T71PAD
C510 0.1U_0402_16V7KC510 0.1U_0402_16V7K1 2
R412 1K_0402_5%R412 1K_0402_5%1 2
R807 0_0402_5%@R807 0_0402_5%@1 2
C513 0.1U_0402_16V7KC513 0.1U_0402_16V7K1 2
R429 0_0402_5%@
R429 0_0402_5%@1 2
R847 10K_0402_5%@R847 10K_0402_5%@ 12
R844 1K_0402_5%R844 1K_0402_5%12
R410 1K_0402_5%R410 1K_0402_5%1 2
T93PADT93PAD
C508 0.1U_0402_16V7KC508 0.1U_0402_16V7K1 2
R421 51_0402_1%R421 51_0402_1%1 2
C512 0.1U_0402_16V7KC512 0.1U_0402_16V7K1 2
R398 150_0402_1%R398 150_0402_1%1 2
R843 1K_0402_5%R843 1K_0402_5%12
R958 1K_0402_5%HDMI@
R958 1K_0402_5%HDMI@1 2
R404 300_0402_5%R404 300_0402_5%12
T73PAD T73PAD
R407 150_0402_1%R407 150_0402_1%1 2
TE
ST
VG
A D
AC
JTA
GC
TR
LS
ER
CLK
DP
MIS
C
DIS
PLA
YP
OR
T 0
DIS
PLA
YP
OR
T 1
U22B
ONTARIO-2M161000-1.6G_BGA413
TE
ST
VG
A D
AC
JTA
GC
TR
LS
ER
CLK
DP
MIS
C
DIS
PLA
YP
OR
T 0
DIS
PLA
YP
OR
T 1
U22B
ONTARIO-2M161000-1.6G_BGA413
RSVD_3V5RSVD_2W11RSVD_1B4
VSS_SENSEF1
VDDIO_MEM_S_SENSEF3VDDCR_CPU_SENSEG1VDDCR_NB_SENSEF4
DBREQ_LM1DBRDYM3TRST_LM4
TCKP1TDON1TDIN2
ALERT_LT2THERMTRIP_LU2PROCHOT_LU1
PWROKT4RESET_LT3
SIDP4SICP3
SVDJ2SVCJ1
DISP_CLKIN_LD1DISP_CLKIN_HD2
CLKIN_LV1CLKIN_HV2
LTDP0_TXN3C8LTDP0_TXP3D8
LTDP0_TXN2B6LTDP0_TXP2A6
LTDP0_TXN1C6LTDP0_TXP1D6
LTDP0_TXN0A5LTDP0_TXP0B5
TDP1_TXP3A10
TDP1_TXN2C10
TDP1_TXN1A9TDP1_TXP1B9
TDP1_TXN0B8TDP1_TXP0A8
DMAACTIVE_L T1TEST38 K3
TEST37 R5TEST36 N5TEST35 H4
TEST34_L T15TEST34_H U15TEST33_L J19TEST33_H J18
TEST31 M21TEST28_L M5TEST28_H L5TEST25_L K2TEST25_H K1
TEST19 M2TEST18 L2TEST17 L1TEST16 K4TEST15 E4TEST14 T5
TEST6 R6TEST5 R2TEST4 R1
DAC_ZVSS D12
DAC_SDA D4DAC_SCL F2
DAC_VSYNC E2DAC_HSYNC E1
DAC_BLUEB B13DAC_BLUE A13
DAC_GREENB B12DAC_GREEN A12
DAC_REDB D13DAC_RED C12
LTDP0_HPD D3
LTDP0_AUXN B3LTDP0_AUXP A3
TDP1_HPD C1
TDP1_AUXN C2TDP1_AUXP B2
DP_VARY_BL H1DP_DIGON H2DP_BLON G2
DP_ZVSS H3
TDP1_TXP2D10
TDP1_TXN3B10
TMSP2
R8460_0402_5%
@
R8460_0402_5%
@
1 2
R403 1K_0402_5%R403 1K_0402_5%1 2
R850 300_0402_5%@R850 300_0402_5%@1 2
R42410K_0402_5%
R42410K_0402_5%
12
R849 10K_0402_5%@R849 10K_0402_5%@ 12
R427 0_0402_5%@R427 0_0402_5%@1 2
R434 0_0402_5%R434 0_0402_5%1 2
R405 300_0402_5%
R405 300_0402_5%
12
R811 10K_0402_5%R811 10K_0402_5%1 2
R423 1K_0402_5%R423 1K_0402_5%1 2
R419 510_0402_1%R419 510_0402_1%1 2
T76PAD T76PAD
R399 1K_0402_5%R399 1K_0402_5%1 2C511 0.1U_0402_16V7KC511 0.1U_0402_16V7K1 2
C514 0.1U_0402_16V7KC514 0.1U_0402_16V7K1 2
Q80A2N7002DW-T/R7_SOT363-6
@
Q80A2N7002DW-T/R7_SOT363-6
@61
2
T68PAD T68PAD
T95PAD T95PAD
-
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
DDR_A_MA15
DDR_A_MA12
DDR_A_MA14DDR_A_MA13
DDR_A_MA11DDR_A_MA10
DDR_A_MA6
DDR_A_MA1
DDR_A_MA7
DDR_A_MA2DDR_A_MA3
DDR_A_MA8
DDR_A_MA5DDR_A_MA4
DDR_A_MA9
DDR_A_MA0
DDR_A_DM6DDR_A_DM5DDR_A_DM4DDR_A_DM3DDR_A_DM2DDR_A_DM1DDR_A_DM0
DDR_A_DM7
DDR_A_DQS7DDR_A_DQS#7
DDR_A_DQS0DDR_A_DQS#0
DDR_A_DQS4DDR_A_DQS#4
DDR_A_DQS1DDR_A_DQS#1
DDR_A_DQS5DDR_A_DQS#5
DDR_A_DQS2DDR_A_DQS#2
DDR_A_DQS6DDR_A_DQS#6
DDR_A_DQS3DDR_A_DQS#3
DDR_A_CLK#1
DDR_A_CLK#0DDR_A_CLK0
DDR_A_CLK1
+MEM_VREF
DDR_A_D33DDR_A_D32
DDR_A_D37DDR_A_D36DDR_A_D35DDR_A_D34
DDR_A_D38DDR_A_D39
DDR_A_D19
DDR_A_D22DDR_A_D23
DDR_A_D16DDR_A_D17
DDR_A_D21DDR_A_D20
DDR_A_D29
DDR_A_D24
DDR_A_D28DDR_A_D27
DDR_A_D18
DDR_A_D26
DDR_A_D30DDR_A_D31
DDR_A_D25
DDR_A_D47
DDR_A_D40DDR_A_D41
DDR_A_D45DDR_A_D44DDR_A_D43DDR_A_D42
DDR_A_D46
DDR_A_D1
DDR_A_D5
DDR_A_D0
DDR_A_D4DDR_A_D3DDR_A_D2
DDR_A_D6DDR_A_D7
DDR_A_D62DDR_A_D63
DDR_A_D57
DDR_A_D61DDR_A_D60DDR_A_D59
DDR_A_D56
DDR_A_D58
DDR_A_D8
DDR_A_D12DDR_A_D11DDR_A_D10
DDR_A_D14DDR_A_D15
DDR_A_D9
DDR_A_D13
DDR_A_D49
DDR_A_D53DDR_A_D52DDR_A_D51DDR_A_D50
DDR_A_D54
DDR_A_D48
DDR_A_D55
DDR_A_ODT1DDR_A_ODT0
DDR_EVENT#DDR_RST#
DDR_A_WE#DDR_A_CAS#DDR_A_RAS#
DDR_CKE0DDR_CKE1
DDR_CS1_DIMMA#DDR_CS0_DIMMA#
+MEM_VREF
DDR_B_ODT1DDR_B_ODT0
DDR_CS1_DIMMB#DDR_CS0_DIMMB#
DDR_B_CLK#3
DDR_B_CLK#2DDR_B_CLK2
DDR_B_CLK3
P_ZVDD_10
UMI_TX2P_CUMI_TX2N_C
UMI_TX3P_CUMI_TX3N_C
UMI_TX0P_CUMI_TX0N_C
UMI_TX1P_CUMI_TX1N_C
P_ZVSS
DDR_A_D[0..63]
DDR_A_MA[0..15]
DDR_A_DM[0..7]
PCIE_CTX_C_GRX_N0PCIE_CTX_C_GRX_P0
PCIE_CTX_C_GRX_N1PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_N2PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_N3PCIE_CTX_C_GRX_P3
PCIE_CRX_GTX_P0PCIE_CRX_GTX_N0
PCIE_CRX_GTX_P1PCIE_CRX_GTX_N1
PCIE_CRX_GTX_P2PCIE_CRX_GTX_N2
PCIE_CRX_GTX_P3PCIE_CRX_GTX_N3
DDR_EVENT#
DDR_A_BS0(8,9)DDR_A_BS1(8,9)DDR_A_BS2(8,9)
DDR_A_DQS0(8,9)
DDR_A_DQS1(8,9)
DDR_A_DQS2(8,9)
DDR_A_DQS3(8,9)
DDR_A_DQS4(8,9)
DDR_A_DQS5(8,9)
DDR_A_DQS6(8,9)
DDR_A_DQS7(8,9)
DDR_A_DQS#0(8,9)
DDR_A_DQS#1(8,9)
DDR_A_DQS#2(8,9)
DDR_A_DQS#3(8,9)
DDR_A_DQS#4(8,9)
DDR_A_DQS#5(8,9)
DDR_A_DQS#6(8,9)
DDR_A_DQS#7(8,9)
DDR_A_CLK0(8)DDR_A_CLK#0(8)DDR_A_CLK1(8)DDR_A_CLK#1(8)
DDR_RST#(8,9)DDR_EVENT#(8,9)
DDR_A_RAS#(8,9)DDR_A_CAS#(8,9)DDR_A_WE#(8,9)
DDR_A_ODT0(8)DDR_A_ODT1(8)
DDR_CKE0(8,9)DDR_CKE1(8,9)
DDR_CS0_DIMMA#(8)DDR_CS1_DIMMA#(8)
DDR_B_ODT0(9)DDR_B_ODT1(9)
DDR_CS0_DIMMB#(9)DDR_CS1_DIMMB#(9)
DDR_B_CLK2(9)DDR_B_CLK#2(9)DDR_B_CLK3(9)DDR_B_CLK#3(9)
UMI_TX0P (13)
UMI_TX1N (13)
UMI_TX0N (13)
UMI_TX1P (13)
UMI_TX2P (13)UMI_TX2N (13)
UMI_TX3N (13)UMI_TX3P (13)UMI_RX3P(13)
UMI_RX3N(13)
UMI_RX2P(13)UMI_RX2N(13)
UMI_RX1P(13)UMI_RX1N(13)
UMI_RX0P(13)UMI_RX0N(13)
DDR_A_MA[0..15] (8,9)
DDR_A_D[0..63] (8,9)
DDR_A_DM[0..7] (8,9)
PCIE_CRX_GTX_P0(18)PCIE_CRX_GTX_N0(18)
PCIE_CRX_GTX_P1(18)PCIE_CRX_GTX_N1(18)
PCIE_CRX_GTX_P2(18)PCIE_CRX_GTX_N2(18)
PCIE_CRX_GTX_P3(18)PCIE_CRX_GTX_N3(18)
PCIE_CTX_GRX_P0 (18)PCIE_CTX_GRX_N0 (18)
PCIE_CTX_GRX_P1 (18)PCIE_CTX_GRX_N1 (18)
PCIE_CTX_GRX_P2 (18)PCIE_CTX_GRX_N2 (18)
PCIE_CTX_GRX_P3 (18)PCIE_CTX_GRX_N3 (18)
+1.5V
+1.5V
+1.0VS
+1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA6755P/7P 1.0FT1 DDRIII/UMI/PCIE
Custom
6 48Tuesday, November 30, 2010
2010/06/30 2012/0630 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA6755P/7P 1.0FT1 DDRIII/UMI/PCIE
Custom
6 48Tuesday, November 30, 2010
2010/06/30 2012/0630 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA6755P/7P 1.0FT1 DDRIII/UMI/PCIE
Custom
6 48Tuesday, November 30, 2010
2010/06/30 2012/0630Compal Electronics, Inc.Place within 1000 mils to APU20100526
Less than 1"Less than 1"
C533 0.1U_0402_16V7KC533 0.1U_0402_16V7K1 2
C520 0.1U_0402_16V7KC520 0.1U_0402_16V7K1 2
R435 2K_0402_1%R435 2K_0402_1%1 2
C527 0.1U_0402_16V7KC527 0.1U_0402_16V7K1 2
R4391K_0402_1%
R4391K_0402_1%
12
C524 0.1U_0402_16V7KC524 0.1U_0402_16V7K1 2
C530 0.1U_0402_16V7KC530 0.1U_0402_16V7K1 2
C519 0.1U_0402_16V7KC519 0.1U_0402_16V7K1 2
C522 0.1U_0402_16V7KC522 0.1U_0402_16V7K1 2
C526 0.1U_0402_16V7KC526 0.1U_0402_16V7K1 2
DD
R S
YS
TE
M M
EM
OR
Y
U22E
ONTARIO-2M161000-1.6G_BGA413
DD
R S
YS
TE
M M
EM
OR
Y
U22E
ONTARIO-2M161000-1.6G_BGA413
M_WE_LV17M_CAS_LV19
M1_CS_L1V16M1_CS_L0U17M0_CS_L1W16M0_CS_L0T17
M1_ODT1W15M1_ODT0U19M0_ODT1V15M0_ODT0W19
M_CKE1E15M_CKE0F15
M_EVENT_LN17M_RESET_LL23
M_CLK_H3L18M_CLK_L2N19M_CLK_H2N18M_CLK_L1M18M_CLK_H1M19M_CLK_L0M16M_CLK_H0M17
M_DQS_L7AC16
M_DQS_L6AC21M_DQS_H6AC20M_DQS_L5V22M_DQS_H5W22M_DQS_L4P22M_DQS_H4R22M_DQS_L3J23M_DQS_H3J22M_DQS_L2E22M_DQS_H2E23M_DQS_L1A20M_DQS_H1B20M_DQS_L0B16M_DQS_H0A16
M_DM7AA16M_DM6AB20M_DM5V23M_DM4P23M_DM3H22M_DM2D21M_DM1B19M_DM0D15
M_BANK2F16M_BANK1T18M_BANK0R18
M_ADD15G15M_ADD14E16M_ADD13W17M_ADD12E18M_ADD11F17M_ADD10T19M_ADD9E19M_ADD8F19M_ADD7G18M_ADD6H15M_ADD5G17M_ADD4H17M_ADD3H18M_ADD2J17M_ADD1H19M_ADD0R17
M_ZVDDIO_MEM_S M22
M_VREF M23
M_DATA63 AC15M_DATA62 AB15M_DATA61 AB18M_DATA60 AC18M_DATA59 AC14M_DATA58 AB14M_DATA57 Y16M_DATA56 AC17
M_DATA55 Y18M_DATA54 AB19M_DATA53 AA20M_DATA52 AA23M_DATA51 AA18M_DATA50 AC19M_DATA49 AB22M_DATA48 Y20
M_DATA47 Y21M_DATA46 W23M_DATA45 U23M_DATA44 T21M_DATA43 Y22M_DATA42 Y23M_DATA41 V21M_DATA40 V20
M_DATA39 T22M_DATA38 R23M_DATA37 P20M_DATA36 M20M_DATA35 T23M_DATA34 T20M_DATA33 P21M_DATA32 N23
M_DATA31 K23M_DATA30 K20M_DATA29 H20M_DATA28 G23M_DATA27 K21M_DATA26 K22M_DATA25 H23M_DATA24 H21
M_DATA23 F21M_DATA22 F20M_DATA21 D22M_DATA20 C22M_DATA19 F22M_DATA18 F23M_DATA17 D23M_DATA16 C23
M_DATA15 C20M_DATA14 A21M_DATA13 B18M_DATA12 A18M_DATA11 D20M_DATA10 B21M_DATA9 A19M_DATA8 C18
M_DATA7 D16M_DATA6 C16M_DATA5 C14M_DATA4 A14M_DATA3 D18M_DATA2 A17M_DATA1 A15M_DATA0 B14
M_CLK_L3L17
M_DQS_H7AB16
M_RAS_LU18
R4381K_0402_1%
R4381K_0402_1%
12
UM
I I/F
PC
IE I/
F
U22A
ONTARIO-2M161000-1.6G_BGA413
UM
I I/F
PC
IE I/
F
U22A
ONTARIO-2M161000-1.6G_BGA413
P_UMI_RXN3AB7P_UMI_RXP3AC7
P_UMI_RXN2AC10P_UMI_RXP2AB10
P_UMI_RXN1Y10P_UMI_RXP1AA10
P_UMI_RXN0Y12P_UMI_RXP0AA12
P_ZVDD_10Y14
P_GPP_RXN3Y3P_GPP_RXP3Y4
P_GPP_RXN2AA2P_GPP_RXP2AA1
P_GPP_RXN1AC4P_GPP_RXP1AB4
P_GPP_RXN0Y6P_GPP_RXP0AA6
P_UMI_TXN3 AC8P_UMI_TXP3 AB8
P_UMI_TXN2 Y8P_UMI_TXP2 AA8
P_UMI_TXN1 AB11P_UMI_TXP1 AC11
P_UMI_TXN0 AC12P_UMI_TXP0 AB12
P_ZVSS AA14
P_GPP_TXN3 V4P_GPP_TXP3 V3
P_GPP_TXN2 Y2P_GPP_TXP2 Y1
P_GPP_TXN1 AC3P_GPP_TXP1 AB3
P_GPP_TXN0 AC6P_GPP_TXP0 AB6
R437
39.2_0402_1%
R437
39.2_0402_1%
12
C531 0.1U_0402_16V7KC531 0.1U_0402_16V7K1 2
C528 0.1U_0402_16V7KC528 0.1U_0402_16V7K1 2
R436 1.27K_0402_1%R436 1.27K_0402_1%1 2
C534
1000P_0402_50V7K
C534
1000P_0402_50V7K
1
2
C518 0.1U_0402_16V7KC518 0.1U_0402_16V7K1 2
C525 0.1U_0402_16V7KC525 0.1U_0402_16V7K1 2
C532 0.1U_0402_16V7KC532 0.1U_0402_16V7K1 2
R4441K_0402_5%
R4441K_0402_5%
1 2
C521 0.1U_0402_16V7KC521 0.1U_0402_16V7K1 2
C535
0.1U_0402_16V4Z
C535
0.1U_0402_16V4Z
1
2
C523 0.1U_0402_16V7KC523 0.1U_0402_16V7K1 2
C529 0.1U_0402_16V7KC529 0.1U_0402_16V7K1 2
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VDD_18
+VDD_10
+VDDL_10
+VDD_18_DAC
+APU_CORE
+APU_CORE_NB
+1.5V
+1.8VS
+1.8VS
+1.0VS
+3VS
+APU_CORE
+APU_CORE_NB
+1.5V
+1.5V
+APU_CORE
+APU_CORE_NB
+1.5V +1.8VS
+1.0VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA6755P/7P 1.0P07-FT1 PWR/VSS
C
7 48Tuesday, November 30, 2010
2010/06/30 2012/06/30 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA6755P/7P 1.0P07-FT1 PWR/VSS
C
7 48Tuesday, November 30, 2010
2010/06/30 2012/06/30 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA6755P/7P 1.0P07-FT1 PWR/VSS
C
7 48Tuesday, November 30, 2010
2010/06/30 2012/06/30
By case (Along split)
Near CPU Socket
Near CPU Socket Near CPU Socket
POWER
Near CPU Socket
(S ELE CAP 330U 6.3V M 6.3X5.9 LESR15M VU)*1=(SF000002000)20100813
(330uF_6.3V_4.2L_ESR17m)*1=(SF000002Z00)
POWER POWER
POWER
Compal Electronics, Inc.
Change from SM010014520 to SD00200008020100816
Change from SM010014520 to SD00200008020100816
Change from SM010014520 to SD00200008020100816
+1.0VS has been raised to +1.05VS for AMD design guide 45339_R1.02 update 20101004
unpop for PVT 20101004
11A 2A
10A0.15A
0.2A
5.5A
0.5A
2A
C60
3
180P
_040
2_50
V8J
C60
3
180P
_040
2_50
V8J1
2
C57
9
10U
_060
3_6.
3V6M
C57
9
10U
_060
3_6.
3V6M1
2
L29
FBMA-L11-201209-221LMA30T_0805
L29
FBMA-L11-201209-221LMA30T_080512
C58
6
1U_0
402_
6.3V
6K
C58
6
1U_0
402_
6.3V
6K1
2
C60
0
0.1U
_040
2_16
V7K
C60
0
0.1U
_040
2_16
V7K
1
2
C59
7
1U_0
402_
6.3V
6K
C59
7
1U_0
402_
6.3V
6K1
2
C61
9
10U
_060
3_6.
3V6M
C61
9
10U
_060
3_6.
3V6M1
2
C61
3
180P
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2_50
V8J
C61
3
180P
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2_50
V8J
1
2C
549
10U
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3_6.
3V6M
C54
9
10U
_060
3_6.
3V6M1
2
C61
1
0.1U
_040
2_16
V7K
C61
1
0.1U
_040
2_16
V7K 1
2
GN
D
U22D
ONTARIO-2M161000-1.6G_BGA413
GN
D
U22D
ONTARIO-2M161000-1.6G_BGA413
VSS_49N11VSS_48N8VSS_47N6VSS_46N4VSS_45M7VSS_44L22VSS_43L20VSS_42L13VSS_41L11VSS_40L8VSS_39L6VSS_38L4VSS_37K14VSS_36K10VSS_35J20VSS_34J7VSS_33J5VSS_32J4VSS_31H13VSS_30H11VSS_29H6VSS_28G22VSS_27G20VSS_26G12VSS_25G9VSS_24G7VSS_23G5VSS_22G4VSS_21F13VSS_20F11VSS_19F8VSS_18E20VSS_17E12VSS_16E9VSS_15E7VSS_14D19VSS_13D17VSS_12B15VSS_11D14VSS_10D11VSS_9D9VSS_8D7VSS_7D5VSS_6C4VSS_5B22VSS_4B17VSS_3B11VSS_2B7VSS_1A7
VSSBG_DAC A11VSS_97 AC13VSS_96 AC9VSS_95 AC5VSS_94 AB21VSS_93 AB17VSS_92 AB13VSS_91 AB9VSS_90 AB5VSS_89 AB2VSS_88 AA22VSS_87 AA4VSS_86 Y19VSS_85 Y17VSS_84 Y15VSS_83 Y13VSS_82 Y11VSS_81 Y9VSS_80 Y7VSS_79 Y5VSS_78 W20VSS_77 W12VSS_76 W7VSS_75 W5VSS_74 W4VSS_73 W2VSS_72 W1VSS_71 V13VSS_70 V11VSS_69 V9VSS_68 V8VSS_67 U22VSS_66 U20VSS_65 U12VSS_64 U7VSS_63 U5VSS_62 U4VSS_61 T13VSS_60 T11VSS_59 T9VSS_58 T6VSS_57 R20VSS_56 R7VSS_55 R4VSS_54 P14VSS_53 P10VSS_52 N22VSS_51 N20VSS_50 N13
C58
9
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3_6.
3V6M
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9
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3_6.
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2
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4
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2_50
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2_50
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2
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2
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0.1U
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2_16
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2
C59
8
1U_0
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8
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6.3V
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5
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5
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3_6.
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2
C57
3
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3_6.
3V6M
C57
3
10U
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3_6.
3V6M1
2
C53
8
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8
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6.3V
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2
C59
4
0.1U
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4
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2
C54
4
10U
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3_6.
3V6M
C54
4
10U
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3_6.
3V6M1
2
C60
9
0.1U
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2_16
V7K
C60
9
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2_16
V7K 1
2+
C62
2
330U
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V_M
+
C62
2
330U
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V_M1
2
C61
5
180P
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2_50
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5
180P
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1
2
C54
0
10U
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3_6.
3V6M
C54
0
10U
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3_6.
3V6M1
2
+
C62
4
330U
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V_M
+
C62
4
330U
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V_M1
2
C56
2
0.1U
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2_16
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C56
2
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2
C56
3
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10U
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3V6M
@
C61
6
10U
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3_6.
3V6M
@
1
2
C58
3
1U_0
402_
6.3V
6K
C58
3
1U_0
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6.3V
6K1
2
C53
9
10U
_060
3_6.
3V6M
C53
9
10U
_060
3_6.
3V6M1
2
C58
1
1U_0
402_
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6K
C58
1
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6.3V
6K1
2
C55
6
180P
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2_50
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C55
6
180P
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2_50
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1
2
C55
5
180P
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2_50
V8J
C55
5
180P
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2_50
V8J
1
2
L31
FBMA-L11-201209-221LMA30T_0805
L31
FBMA-L11-201209-221LMA30T_0805
12
+
C60
6
330U
_D2E
_2.5
VM
_R9M
+
C60
6
330U
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VM
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1
2
C62
3
22U
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5_6.
3V6M
@
C62
3
22U
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5_6.
3V6M
@
1
2
C56
7
10U
_060
3_6.
3V6M
C56
7
10U
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3_6.
3V6M1
2
C57
1
1U_0
402_
6.3V
6K
C57
1
1U_0
402_
6.3V
6K1
2
C56
1
0.1U
_040
2_16
V7K
C56
1
0.1U
_040
2_16
V7K1
2
C57
0
0.1U
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2_16
V7K
C57
0
0.1U
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2_16
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2
C57
2
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6K
C57
2
1U_0
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6.3V
6K1
2
C55
7
1U_0
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6.3V
6K
C55
7
1U_0
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6K1
2
C57
7
10U
_060
3_6.
3V6M
C57
7
10U
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3_6.
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2
C62
0
10U
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3_6.
3V6M
@
C62
0
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3_6.
3V6M
@
1
2
C59
6
1U_0
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6.3V
6K
C59
6
1U_0
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6.3V
6K1
2
C54
2
10U
_060
3_6.
3V6M
C54
2
10U
_060
3_6.
3V6M1
2C
584
1U_0
402_
6.3V
6K
C58
4
1U_0
402_
6.3V
6K1
2
+
C62
1
220U
_B2_
2.5V
M_R
35
+
C62
1
220U
_B2_
2.5V
M_R
351
2
C55
2
1U_0
402_
6.3V
6K
C55
2
1U_0
402_
6.3V
6K1
2
+
C61
8
330U
_D2_
2.5V
Y_R
9M
+
C61
8
330U
_D2_
2.5V
Y_R
9M1
2
C59
1
0.1U
_040
2_16
V7K
C59
1
0.1U
_040
2_16
V7K1
2
C61
0
0.1U
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2_16
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C61
0
0.1U
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2
C54
1
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1
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3_6.
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2
C61
2
180P
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2_50
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2
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1
2
C56
9
0.1U
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C56
9
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2_16
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2
C55
3
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6K
C55
3
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6.3V
6K1
2
C53
6
10U
_060
3_6.
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C53
6
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3_6.
3V6M1
2
C55
8
10U
_060
3_6.
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C55
8
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3_6.
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2
+
C60
5
330U
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5
330U
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1
2
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0
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6K
C55
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2
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8
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1
2
C58
2
1U_0
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C58
2
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6.3V
6K1
2
C54
6
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C54
6
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6K1
2
C58
5
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C58
5
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6.3V
6K1
2
C57
4
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_060
3_6.
3V6M
C57
4
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_060
3_6.
3V6M1
2
C54
7
1U_0
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C54
7
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402_
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2
C56
5
0.1U
_040
2_16
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C56
5
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2_16
V7K1
2
CP
U C
OR
EG
PU
AN
D N
B C
OR
ED
DR
3
TS
ense/PLL/D
P/P
CIE
/IOD
IS P
LLP
CIE
/IO/D
DR
3 Phy
DA
C
DP
Phy/IO
POWER
U22C
ONTARIO-2M161000-1.6G_BGA413
CP
U C
OR
EG
PU
AN
D N
B C
OR
ED
DR
3
TS
ense/PLL/D
P/P
CIE
/IOD
IS P
LLP
CIE
/IO/D
DR
3 Phy
DA
C
DP
Phy/IO
POWER
U22C
ONTARIO-2M161000-1.6G_BGA413
VDDIO_MEM_S_11U16VDDIO_MEM_S_10W18VDDIO_MEM_S_9R19VDDIO_MEM_S_8R16VDDIO_MEM_S_7N16VDDIO_MEM_S_6L19VDDIO_MEM_S_5L16VDDIO_MEM_S_4J16VDDIO_MEM_S_3E17VDDIO_MEM_S_2G19VDDIO_MEM_S_1G16
VDDCR_NB_22P13VDDCR_NB_21P11VDDCR_NB_20N14VDDCR_NB_19N12VDDCR_NB_18N10VDDCR_NB_17M13VDDCR_NB_16M12VDDCR_NB_15M11VDDCR_NB_14L14VDDCR_NB_13L12VDDCR_NB_12L10VDDCR_NB_11K13VDDCR_NB_10K11VDDCR_NB_9H12VDDCR_NB_8H9VDDCR_NB_7G13VDDCR_NB_6G11VDDCR_NB_5F12VDDCR_NB_4F9VDDCR_NB_3E13VDDCR_NB_2E11VDDCR_NB_1E8
VDDCR_CPU_15R8VDDCR_CPU_14N7VDDCR_CPU_13M8VDDCR_CPU_12M6VDDCR_CPU_11L7VDDCR_CPU_10J8VDDCR_CPU_9J6VDDCR_CPU_8H7VDDCR_CPU_7H5VDDCR_CPU_6G8VDDCR_CPU_5G6VDDCR_CPU_4F7VDDCR_CPU_3F5VDDCR_CPU_2E6VDDCR_CPU_1E5
VDD_33 A4
VDD_10_4 T12VDD_10_3 V12VDD_10_2 W13VDD_10_1 U13
VDDPL_10 U11
VDD_18_DAC W9
VDD_18_7 V7VDD_18_6 T7VDD_18_5 W6VDD_18_4 U9VDD_18_3 U6VDD_18_2 W8VDD_18_1 U8
C54
3
10U
_060
3_6.
3V6M
C54
3
10U
_060
3_6.
3V6M1
2
C54
8
1U_0
402_
6.3V
6K
C54
8
1U_0
402_
6.3V
6K1
2
L32
FBMA-L11-201209-221LMA30T_0805
L32
FBMA-L11-201209-221LMA30T_0805
12
C62
5
10U
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3_6.
3V6M
@
C62
5
10U
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3_6.
3V6M
@
1
2
C55
1
1U_0
402_
6.3V
6K
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1
1U_0
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6.3V
6K1
2
C59
5
1U_0
402_
6.3V
6K
C59
5
1U_0
402_
6.3V
6K1
2
C60
2
180P
_040
2_50
V8J
C60
2
180P
_040
2_50
V8J1
2
C58
7
180P
_040
2_50
V8J
C58
7
180P
_040
2_50
V8J
1
2
C60
1
0.1U
_040
2_16
V7K
C60
1
0.1U
_040
2_16
V7K
1
2
C59
0
10U
_060
3_6.
3V6M
C59
0
10U
_060
3_6.
3V6M1
2
C55
9
0.1U
_040
2_16
V7K
C55
9
0.1U
_040
2_16
V7K1
2
C57
6
10U
_060
3_6.
3V6M
C57
6
10U
_060
3_6.
3V6M1
2
L30
FBMA-L11-201209-221LMA30T_0805
L30
FBMA-L11-201209-221LMA30T_0805
12
C59
9
0.1U
_040
2_16
V7K
C59
9
0.1U
_040
2_16
V7K
1
2
C55
4
180P
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2_50
V8J
C55
4
180P
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2_50
V8J
1
2
C60
8
0.1U
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2_16
V7K
C60
8
0.1U
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2_16
V7K 1
2
C56
4
180P
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2_50
V8J
C56
4
180P
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2_50
V8J
1
2
C58
8
180P
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2_50
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8
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2_50
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1
2
C54
5
180P
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2_50
V8J
C54
5
180P
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2_50
V8J
1
2
C56
0
0.1U
_040
2_16
V7K
C56
0
0.1U
_040
2_16
V7K1
2
+
C60
7
330U
_D2E
_2.5
VM
_R9M
+
C60
7
330U
_D2E
_2.5
VM
_R9M
1
2
C59
3
0.1U
_040
2_16
V7K
C59
3
0.1U
_040
2_16
V7K1
2
C56
6
1U_0
402_
6.3V
6K
C56
6
1U_0
402_
6.3V
6K1
2
C57
8
10U
_060
3_6.
3V6M
C57
8
10U
_060
3_6.
3V6M1
2
C58
0
0.1U
_040
2_16
V7K
C58
0
0.1U
_040
2_16
V7K1
2
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D[0..63]
DDR_A_MA[0..15]
DDR_A_DM[0..7]
DDR_A_D26
DDR_A_D2
DDR_A_D25
DDR_A_D27
DDR_A_D0
DDR_A_DM0
DDR_A_D19
DDR_A_D10
DDR_A_D3
DDR_A_D1
DDR_A_D16
DDR_A_DM3
DDR_A_D9
DDR_A_D24
DDR_A_D18
DDR_A_D11
DDR_A_D8
DDR_A_D17
DDR_A_MA12
DDR_A_MA3
DDR_A_MA8
DDR_A_MA10
DDR_A_MA9
DDR_A_MA1
DDR_A_MA5
DDR_A_MA13
DDR_A_D35
DDR_A_D42
DDR_A_D59
DDR_A_D57
DDR_A_D51
DDR_A_D33
DDR_A_D58
DDR_A_DM5
DDR_A_D40
DDR_A_D49
DDR_A_DM7
DDR_A_D56
DDR_A_D43
DDR_A_D34
DDR_A_D48
DDR_A_D32
DDR_A_D50
DDR_A_D41
DDR_A_D5
DDR_A_D22
DDR_A_D14
DDR_A_D31
DDR_A_D12
DDR_A_D6
DDR_A_DM2
DDR_A_DM1
DDR_A_D28
DDR_A_D4
DDR_A_D30
DDR_A_D29
DDR_A_D7
DDR_A_D13
DDR_A_D20DDR_A_D21
DDR_A_D15
DDR_A_D23
DDR_A_MA15
DDR_A_MA7
DDR_A_MA0
DDR_A_MA6
DDR_A_MA14
DDR_A_MA4
DDR_A_MA11
DDR_A_MA2
DDR_A_D36
DDR_A_D63
DDR_A_DM6
DDR_A_D39
DDR_A_D46
DDR_A_DM4
DDR_A_D44
DDR_A_D52
DDR_A_D54
DDR_A_D45
DDR_A_D60
DDR_A_D37
DDR_A_D55
DDR_A_D62
DDR_A_D53
DDR_A_D47
DDR_A_D38
DDR_A_D61
DDR_A_MA[0..15] (6,9)
DDR_A_D[0..63] (6,9)
DDR_A_DM[0..7] (6,9)
DDR_A_DQS#1(6,9)DDR_A_DQS1(6,9)
DDR_A_DQS#2(6,9)DDR_A_DQS2(6,9)
DDR_CKE0(6,9)
DDR_CS1_DIMMA#(6)
DDR_A_WE#(6,9)
DDR_A_BS2(6,9)
DDR_A_BS0(6,9)
DDR_A_CAS#(6,9)
DDR_A_CLK0(6)DDR_A_CLK#0(6)
DDR_A_DQS#4(6,9)DDR_A_DQS4(6,9)
DDR_A_DQS#6(6,9)DDR_A_DQS6(6,9)
DDR_RST# (6,9)
DDR_A_DQS3 (6,9)
DDR_A_DQS0 (6,9)
DDR_A_DQS#3 (6,9)
DDR_A_DQS#0 (6,9)
DDR_A_BS1 (6,9)DDR_A_RAS# (6,9)
DDR_CS0_DIMMA# (6)DDR_A_ODT0 (6)
DDR_A_ODT1 (6)
DDR_A_CLK#1 (6)DDR_A_CLK1 (6)
DDR_CKE1 (6,9)
DDR_EVENT# (6,9)FCH_SMDAT0 (9,14,30)FCH_SMCLK0 (9,14,30)
DDR_A_DQS5 (6,9)DDR_A_DQS#5 (6,9)
DDR_A_DQS7 (6,9)DDR_A_DQS#7 (6,9)
+VREF_DQ
+1.5V
+VREF_CA
+1.5V
+0.75VS+1.5V
+1.5V
+VREF_DQ
+1.5V
+3VS
+1.5V
+VREF_CA
+0.75VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA6755P/7P 1.0DDR3 SODIMM-I Socket
Custom
8 48Tuesday, November 30, 2010
2010/06/30 2012/06/30 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA6755P/7P 1.0DDR3 SODIMM-I Socket
Custom
8 48Tuesday, November 30, 2010
2010/06/30 2012/06/30 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA6755P/7P 1.0DDR3 SODIMM-I Socket
Custom
8 48Tuesday, November 30, 2010
2010/06/30 2012/06/30
Place near JDIMM1
CRB 0.1u X1 4.7u X1 CRB 100U X2
Combine to one?
DDR3 SO-DIMM AReverse Type
Compal Electronics, Inc.
20100729
SF000002Y00
C632
0.1U_0402_16V4Z
C632
0.1U_0402_16V4Z
1
2
C62
6
0.1U
_040
2_16
V4Z
C62
6
0.1U
_040
2_16
V4Z
1
2
C64
4
0.1U
_040
2_16
V4Z
C64
4
0.1U
_040
2_16
V4Z
1
2
C633
0.1U_0402_16V4Z
C633
0.1U_0402_16V4Z
1
2
C629
0.1U_0402_16V4Z
C629
0.1U_0402_16V4Z
1
2
+
C64
3
220U
_6.3
V_M
+
C64
3
220U
_6.3
V_M1
2
C638
0.1U_0402_16V4Z
@C638
0.1U_0402_16V4Z
@1
2
C636
0.1U_0402_16V4Z
@C636
0.1U_0402_16V4Z
@1
2
C630
0.1U_0402_16V4Z
C630
0.1U_0402_16V4Z
1
2
R446
10K_0402_5%
R446
10K_0402_5%
12
C62
7
1000
P_0
402_
50V
7K
C62
7
1000
P_0
402_
50V
7K
1
2
C64
7
0.1U
_040
2_16
V4Z
C64
7
0.1U
_040
2_16
V4Z
1
2
C64
1
0.1U
_040
2_16
V4Z
C64
1
0.1U
_040
2_16
V4Z
1
2
C64
0
0.1U
_040
2_16
V4Z
@
C64
0
0.1U
_040
2_16
V4Z
@1
2
JDIMM1
LCN_DAN06-K4406-0103
ME@JDIMM1
LCN_DAN06-K4406-0103
ME@
VREF_DQ1
VSS3
DQ05
DQ17
VSS9
DM011
VSS13
DQ215
DQ317
VSS19
DQ821
DQ923
VSS25
DQS1#27
DQS129
VSS31
DQ1033
DQ1135
VSS37
DQ1639
VSS 2
DQ4 4
DQ5 6
VSS 8
DQS0# 10
DQS0 12
VSS 14
DQ6 16
DQ7 18
VSS 20
DQ12 22
DQ13 24
VSS 26
DM1 28
RESET# 30
VSS 32
DQ14 34
DQ15 36
VSS 38
DQ20 40
DQ1741
VSS43
DQS2#45
DQS247
VSS49
DQ1851
DQ1953
VSS55
DQ2457
DQ2559
VSS61
DM363
VSS65
DQ2667
DQ2769
VSS71
CKE073
VDD75
NC77
BA279
VDD81
A12/BC#83
A985
VDD87
A889
A591
VDD93
A395
A197
VDD99
CK0101
CK0#103
VDD105
A10/AP107
BA0109
VDD111
WE#113
CAS#115
VDD117
A13119
S1#121
VDD123
TEST125
VSS127
DQ32129
DQ33131
VSS133
DQS4#135
DQS4137
VSS139
DQ34141
DQ35143
VSS145
DQ40147
DQ41149
VSS151
DM5153
VSS155
DQ42157
DQ43159
VSS161
DQ48163
DQ49165
VSS167
DQS6#169
DQS6171
VSS173
DQ50175
DQ51177
VSS179
DQ56181
DQ57183
VSS185
DM7187
VSS189
DQ58191
DQ59193
VSS195
SA0197
VDDSPD199
DQ21 42
VSS 44
DM2 46
VSS 48
DQ22 50
DQ23 52
VSS 54
DQ28 56
DQ29 58
VSS 60
DQS3# 62
DQS3 64
VSS 66
DQ30 68
DQ31 70
VSS 72
CKE1 74
VDD 76
A15 78
A14 80
VDD 82
A11 84
A7 86
VDD 88
A6 90
A4 92
VDD 94
A2 96
A0 98
VDD 100
CK1 102
CK1# 104
VDD 106
BA1 108
RAS# 110
VDD 112
S0# 114
ODT0 116
VDD 118
ODT1 120
NC 122
VDD 124
VREF_CA 126
VSS 128
DQ36 130
DQ37 132
VSS 134
DM4 136
VSS 138
DQ38 140
DQ39 142
VSS 144
DQ44 146
DQ45 148
VSS 150
DQS5# 152
DQS5 154
VSS 156
DQ46 158
DQ47 160
VSS 162
DQ52 164
DQ53 166
VSS 168
DM6 170
VSS 172
DQ54 174
DQ55 176
VSS 178
DQ60 180
DQ61 182
VSS 184
DQS7# 186
DQS7 188
VSS 190
DQ62 192
DQ63 194
VSS 196
EVENT# 198
SDA 200
SA1201
VTT203
GND1205
SCL 202
VTT 204
GND2 206
BOSS1207 BOSS2 208
R4421K_0402_1%R4421K_0402_1%
12
C635
0.1U_0402_16V4Z
@C635
0.1U_0402_16V4Z
@1
2
C639
0.1U_0402_16V4Z
@C639
0.1U_0402_16V4Z
@1
2
C64
2
4.7U
_060
3_6.
3V6K
C64
2
4.7U
_060
3_6.
3V6K
1
2
R4401K_0402_1%R4401K_0402_1%
12
C631
0.1U_0402_16V4Z
C631
0.1U_0402_16V4Z
1
2
C628
0.1U_0402_16V4Z
C628
0.1U_0402_16V4Z
1
2
C637
0.1U_0402_16V4Z
@C637
0.1U_0402_16V4Z
@1
2
C64
6
2.2U
_060
3_6.
3V4Z
C64
6
2.2U
_060
3_6.
3V4Z
1
2
R4431K_0402_1%R4431K_0402_1%
12
C634
0.1U_0402_16V4Z
@C634
0.1U_0402_16V4Z
@1
2
R445 10K_0402_5%R445 10K_0402_5%1 2
C64
5
1000
P_0
402_
50V
7K
C64
5
1000
P_0
402_
50V
7K
1
2
R4411K_0402_1%R4411K_0402_1%
12
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D36
DDR_A_D63
DDR_A_D26
DDR_A_D2
DDR_A_D5
DDR_A_D22
DDR_A_D25
DDR_A_D35
DDR_A_MA12
DDR_A_D14
DDR_A_DM6
DDR_A_D42
DDR_A_D27
DDR_A_MA15
DDR_A_D31
DDR_A_D12
DDR_A_D59
DDR_A_MA3
DDR_A_D6
DDR_A_D39
DDR_A_MA7
DDR_A_MA0
DDR_A_DM2
DDR_A_DM1
DDR_A_D57
DDR_A_D46
DDR_A_D0
DDR_A_D28
DDR_A_DM0
DDR_A_D51
DDR_A_D19
DDR_A_DM4
DDR_A_D4
DDR_A_D30
DDR_A_D44
DDR_A_D33
DDR_A_D58
DDR_A_DM5
DDR_A_MA8
DDR_A_D10
DDR_A_MA6
DDR_A_MA10
DDR_A_D3
DDR_A_D1
DDR_A_D40
DDR_A_MA9
DDR_A_D16
DDR_A_D29
DDR_A_D52
DDR_A_DM3
DDR_A_D54
DDR_A_D49
DDR_A_D45
DDR_A_D9
DDR_A_DM7
DDR_A_MA1
DDR_A_D7
DDR_A_D13
DDR_A_D20
DDR_A_D60
DDR_A_D37
DDR_A_MA5
DDR_A_MA14
DDR_A_D55
DDR_A_MA4
DDR_A_D21
DDR_A_D62
DDR_A_D24
DDR_A_D15
DDR_A_D56
DDR_A_D23
DDR_A_D53
DDR_A_D47
DDR_A_D18
DDR_A_D43
DDR_A_D34
DDR_A_D48
DDR_A_D11
DDR_A_D38
DDR_A_D32
DDR_A_MA13
DDR_A_MA11
DDR_A_D50
DDR_A_D8
DDR_A_D61
DDR_A_MA2
DDR_A_D41
DDR_A_D17
DDR_A_D[0..63]
DDR_A_MA[0..15]
DDR_A_DM[0..7]
DDR_CKE0(6,8)
DDR_CS1_DIMMB#(6)
DDR_A_BS1 (6,8)
DDR_A_WE#(6,8)
DDR_A_RAS# (6,8)
DDR_CS0_DIMMB# (6)
DDR_RST# (6,8)
DDR_A_BS2(6,8)
DDR_A_BS0(6,8)
DDR_A_CAS#(6,8) DDR_B_ODT0 (6)
DDR_B_ODT1 (6)
DDR_B_CLK#3 (6)DDR_B_CLK3 (6)DDR_B_CLK2(6)
DDR_B_CLK#2(6)
DDR_CKE1 (6,8)
DDR_A_DQS3 (6,8)
DDR_A_DQS0 (6,8)
DDR_A_DQS#3 (6,8)
DDR_A_DQS#0 (6,8)
DDR_A_DQS5 (6,8)DDR_A_DQS#5 (6,8)
DDR_A_DQS7 (6,8)DDR_A_DQS#7 (6,8)
DDR_A_DQS#1(6,8)DDR_A_DQS1(6,8)
DDR_A_DQS#2(6,8)DDR_A_DQS2(6,8)
DDR_A_DQS#4(6,8)DDR_A_DQS4(6,8)
DDR_A_DQS#6(6,8)DDR_A_DQS6(6,8)
DDR_EVENT# (6,8)
DDR_A_MA[0..15] (6,8)
DDR_A_D[0..63] (6,8)
DDR_A_DM[0..7] (6,8)
FCH_SMDAT0 (8,14,30)FCH_SMCLK0 (8,14,30)
+0.75VS
+VREF_CA
+1.5V
+VREF_DQ
+0.75VS
+1.5V
+3VS
+1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA6755P/7P 1.0DDR3 SODIMM-II Socket
Custom
9 48Tuesday, November 30, 2010
2010/06/30 2012/06/30 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA6755P/7P 1.0DDR3 SODIMM-II Socket
Custom
9 48Tuesday, November 30, 2010
2010/06/30 2012/06/30 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA6755P/7P 1.0DDR3 SODIMM-II Socket
Custom
9 48Tuesday, November 30, 2010
2010/06/30 2012/06/30
Place near JDIMM2
CRB 0.1u X1 4,7uX1
CRB only one 4.7kDDR3 SO-DIMM BReverse Type
Compal Electronics, Inc.
For DRAM strap pin reservation20100817
For DRAM strap pin reservation20100817
C650
0.1U_0402_16V4Z
C650
0.1U_0402_16V4Z1
2
JDIMM2
LCN_DAN06-K4806-0103
ME@JDIMM2
LCN_DAN06-K4806-0103
ME@
VREF_DQ1 VSS1 2
VSS23 DQ4 4
DQ05 DQ5 6
DQ17 VSS3 8
VSS49 DQS#0 10
DM011 DQS0 12
VSS513 VSS6 14
DQ215 DQ6 16
DQ317 DQ7 18
VSS719 VSS8 20
DQ821 DQ12 22
DQ923 DQ13 24
VSS925 VSS10 26
DQS#127 DM1 28
DQS129 RESET# 30
VSS1131 VSS12 32
DQ1033 DQ14 34
DQ1135 DQ15 36
VSS1337 VSS14 38
DQ1639 DQ20 40
DQ1741 DQ21 42
VSS1543 VSS16 44
DQS#245 DM2 46
DQS247 VSS17 48
VSS1849 DQ22 50
DQ1851 DQ23 52
DQ1953 VSS19 54
VSS2055 DQ28 56
DQ2457 DQ29 58
DQ2559 VSS21 60
VSS2261 DQS#3 62
DM363 DQS3 64
VSS2365 VSS24 66
DQ2667 DQ30 68
DQ2769 DQ31 70
VSS2571 VSS26 72
A12/BC#83 A11 84
A985 A7 86
VDD587 VDD6 88
A889 A6 90
CKE073 CKE1 74
VDD175 VDD2 76
NC177 A15 78
BA279 A14 80
VDD381 VDD4 82
A591 A4 92
VDD793 VDD8 94
A395 A2 96
A197 A0 98
VDD999 VDD10 100
CK0101 CK1 102
CK0#103 CK1# 104
VDD11105 VDD12 106
A10/AP107 BA1 108
BA0109 RAS# 110
VDD13111 VDD14 112
WE#113 S0# 114
CAS#115 ODT0 116
VDD15117 VDD16 118
A13119 ODT1 120
S1#121 NC2 122
VDD17123 VDD18 124
NCTEST125 VREF_CA 126
VSS27127 VSS28 128
DQ32129 DQ36 130
DQ33131 DQ37 132
VSS29133 VSS30 134
DQS#4135 DM4 136
DQS4137 VSS31 138
VSS32139 DQ38 140
DQ34141 DQ39 142
DQ35143 VSS33 144
VSS34145 DQ44 146
DQ40147 DQ45 148
DQ41149 VSS35 150
VSS36151 DQS#5 152
DM5153 DQS5 154
VSS37155 VSS38 156
DQ42157 DQ46 158
DQ43159 DQ47 160
VSS39161 VSS40 162
DQ48163 DQ52 164
DQ49165 DQ53 166
VSS41167 VSS42 168
DQS#6169 DM6 170
DQS6171 VSS43 172
VSS44173 DQ54 174
DQ50175 DQ55 176
DQ51177 VSS45 178
VSS46179 DQ60 180
DQ56181 DQ61 182
DQ57183 VSS47 184
VSS48185 DQS#7 186
DM7187 DQS7 188
VSS49189 VSS50 190
DQ58191 DQ62 192
DQ59193 DQ63 194
VSS51195 VSS52 196
SA0197 EVENT# 198
VDDSPD199 SDA 200
SA1201 SCL 202
VTT1203 VTT2 204
G1205 G2 206
C657
0.1U_0402_16V4Z
@C657
0.1U_0402_16V4Z
@1
2
R44910K_0402_5%
@
R44910K_0402_5%
@1 2
C654
0.1U_0402_16V4Z
C654
0.1U_0402_16V4Z1
2
C66
6
1000
P_0
402_
50V
7K
C66
6
1000
P_0
402_
50V
7K
1
2
C659
0.1U_0402_16V4Z
@C659
0.1U_0402_16V4Z
@1
2
C66
4
4.7U
_060
3_6.
3V6K
C66
4
4.7U
_060
3_6.
3V6K
1
2
C653
0.1U_0402_16V4Z
C653
0.1U_0402_16V4Z
1
2
C668
0.1U_0402_16V4Z
C668
0.1U_0402_16V4Z
1
2
C656
0.1U_0402_16V4Z
@C656
0.1U_0402_16V4Z
@1
2
C66
5
0.1U
_040
2_16
V4Z
C66
5
0.1U
_040
2_16
V4Z
1
2
R96210K_0402_5%
R96210K_0402_5%
12
C649
1000
P_0
402_
50V
7K
C649
1000
P_0
402_
50V
7K
1
2
C651
0.1U_0402_16V4Z
C651
0.1U_0402_16V4Z
1
2
C66
3
0.1U
_040
2_16
V4Z
C66
3
0.1U
_040
2_16
V4Z
1
2
C655
0.1U_0402_16V4Z
C655
0.1U_0402_16V4Z
1
2
R448 10K_0402_5%@R448 10K_0402_5%@1 2
C660
0.1U_0402_16V4Z
@C660
0.1U_0402_16V4Z
@1
2
C648
0.1U
_040
2_16
V4Z
C648
0.1U
_040
2_16
V4Z
1
2
C6672.2U_0603_6.3V4Z
C6672.2U_0603_6.3V4Z
1
2
C652
0.1U_0402_16V4Z
C652
0.1U_0402_16V4Z1
2
C66
2
0.1U
_040
2_16
V4Z
@
C66
2
0.1U
_040
2_16
V4Z
@ 1
2
R961 10K_0402_5%R961 10K_0402_5%1 2
C6610.1U_0402_16V4Z@
C6610.1U_0402_16V4Z@
1
2
C658
0.1U_0402_16V4Z
@C658
0.1U_0402_16V4Z
@1
2
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DISPOFF#
+5VS_CMOSAPU_BLPWM +CMOS_PW
LVDS_A1
LVDS_A2#
LVDS_A1#
LVDS_A2
LVDS_ACLK#LVDS_ACLK
LVDS_A0LVDS_A0#
USB20_N1USB20_P1
DISPOFF#INVTPWM
EDID_DATAEDID_CLK
EDID_CLKEDID_DATA
LVDS_A2#LVDS_A2
LVDS_A1#LVDS_A1
LVDS_A0LVDS_A0#
LVDS_ACLKLVDS_ACLK#
INVTPWM
DISPOFF#
CMOS1
CE_EN
CMOS_OFF#(31)
USB20_N1 (14)USB20_P1 (14)
APU_ENVDD(5)
BKOFF#(31)
EDID_CLK(5)EDID_DATA(5)
LVDS_A2(5)LVDS_A2#(5)
LVDS_A1(5)LVDS_A1#(5)
LVDS_A0(5)LVDS_A0#(5)
LVDS_ACLK#(5)LVDS_ACLK(5)
APU_ENBKL(5) ENBKL (31)
INVT_PWM(31)
APU_BLPWM(5)
CE_EN(31)
+3VS
+LCDVDD +5VALW
+LCDVDD_CONN+LCDVDD
+LEDVDD B+
+LCDVDD_CONN
+5VS
+3VS_CMOS
+3VS
+3VS_CMOS
+3VS
+3VS
+5VS
+5VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
1.0
LVDS/CAMERAB
10 48Tuesday, November 30, 2010
2010/06/30 2012/06/30Compal Electronics, Inc.
LA6755P/7P
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
1.0
LVDS/CAMERAB
10 48Tuesday, November 30, 2010
2010/06/30 2012/06/30Compal Electronics, Inc.
LA6755P/7P
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
1.0
LVDS/CAMERAB
10 48Tuesday, November 30, 2010
2010/06/30 2012/06/30Compal Electronics, Inc.
LA6755P/7P
LCD POWER CIRCUIT
W=60mils
W=60mils
For EMI
CMOS
CMOS Camera
(60 MIL)
pop R490 instead of R49120100727
20100728
20100728
Change footprint20100812
Change footprint20100812
Change footprint20100812
Change footprint20100812
Change footprint20100812
AMD check list update20101110
R458150_0603_1%R458150_0603_1%
C677
470P
_040
2_50
V7K
@C677
470P
_040
2_50
V7K
@1
2
C68110U_0805_10V4ZCMOS@
C68110U_0805_10V4ZCMOS@
1
2
C680
0.1U_0402_16V4Z
CMOS@
C680
0.1U_0402_16V4Z
CMOS@
1 2
C6714.7U_0603_6.3V6K
C6714.7U_0603_6.3V6K
1
2
R880150K_0402_5%
CMOS@
R880150K_0402_5%
CMOS@
1 2
R4890_0603_5%CMOS@
R4890_0603_5%CMOS@
12
R477 0_0402_5%R477 0_0402_5%1 2
R459100K_0402_5%R459100K_0402_5%
12
Q82AP2301GN-HF_SOT23-3Q82AP2301GN-HF_SOT23-3
2
31
R462 220K_0402_5%R462 220K_0402_5%1 2
R4872K_0402_5%R4872K_0402_5%
12
D4RB751V_SOD323
@D4RB751V_SOD323
@
21
Q84 AP2301GN-HF_SOT23-3
CMOS@
Q84 AP2301GN-HF_SOT23-3
CMOS@
2
3 1
C6744.7U_0805_25V6-KC6744.7U_0805_25V6-K
1
2
Q85DTC124EKAT146_SC59-3CMOS@
Q85DTC124EKAT146_SC59-3CMOS@
IN2
OU
T1
GN
D3
L33
FBMA-L11-201209-221LMA30T_0805
L33
FBMA-L11-201209-221LMA30T_0805
1 2
C672
0.1U_0402_16V4Z
C672
0.1U_0402_16V4Z
1
2
R484 0_0402_5%R484 0_0402_5%1 2
C679
470P
_040
2_50
V7K
@C679
470P
_040
2_50
V7K
@1
2R938
0_0402_5%@
R9380_0402_5%
@
12
R48510K_0402_5%R48510K_0402_5%
12
R927 0_0402_5%@R927 0_0402_5%@1 2
R48310K_0402_5%
@R48310K_0402_5%
@
12
R480100K_0402_1%
R480100K_0402_1%
12
C675680P_0402_50V7K
@
C675680P_0402_50V7K
@1
2
C673680P_0402_50V7K
@
C673680P_0402_50V7K
@
1
2
JLVDS1
ACES_87142-3041-BSME@
JLVDS1
ACES_87142-3041-BSME@
GND 31GND32
1 122
3 344
5 566
7 788
9 91010
11 111212
13 131414
15 151616
17 171818
19 192020
21 212222
23 232424
25 252626
27 272828
29 293030
R473100K_0402_5%
@R473100K_0402_5%
@
12
R491 0_0402_5%@
R491 0_0402_5%@1 2
C6760.1U_0402_16V4ZCMOS@
C6760.1U_0402_16V4ZCMOS@
1
2
R488 100K_0402_5%CMOS@R488 100K_0402_5%CMOS@
G
D
S
Q812N7002H_SOT23-3 G
D
S
Q812N7002H_SOT23-3
2
13
R490 0_0402_5%R490 0_0402_5%1 2
R479 0_0805_5%R479 0_0805_5%1 2
R4862K_0402_5%
R4862K_0402_5%
12
R928 0_0402_5%CMOS@R928 0_0402_5%CMOS@1 2
C6694.7U_0603_6.3V6KC6694.7U_0603_6.3V6K
1
2
Q83DTC124EKAT146_SC59-3
Q83DTC124EKAT146_SC59-3
IN2
OU
T1
GN
D3
C670
0.1U_0402_16V4Z
C670
0.1U_0402_16V4Z
1
2
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HDMICLK_RHDMIDAT_R
HDMI_HPD
HDMI_HPD
+5VS_HDMI
HDMI_CLK-_CONN
HDMI_CLK+_CONNHDMI_TX0-_CONN
HDMI_TX0+_CONNHDMI_TX1-_CONN
HDMI_TX1+_CONNHDMI_TX2-_CONN
HDMI_TX2+_CONN
HDMI_TX0+_CONN
HDMI_TX1-_CONN
HDMI_TX2+_CONN
HDMI_TX1+_CONN
HDMI_CLK-_CONN
HDMI_CLK+_CONN
HDMI_TX2-_CONN
HDMI_TX0-_CONN
HDMI_TX1-_CONN
HDMI_TX1+_CONN
HDMI_TX0+_CONN
HDMI_TX0-_CONN
HDMI_CLK+_CONN
HDMI_TX2-_CONN
HDMI_CLK-_CONN
HDMI_TX2+_CONN
HDMI_TX1P
HDMI_TX2N
HDMI_TX1N
HDMI_CLKN
HDMI_TX2P
HDMI_TX0P
HDMI_TX0N
HDMI_CLKP
HDMICLK_RHDMIDAT_R
HDMI_HPD
HDMI_TX1-_CONNHDMI_TX2+_CONN
HDMI_TX0+_CONNHDMI_TX0-_CONN
HDMI_CLK+_CONN
HDMI_TX1+_CONN
HDMI_CLK-_CONN
HDMI_TX2-_CONN
HDMICLK_R
HDMIDAT_R
+5VS_HDMI_F
HDMI_DET(5)
HDMI_TX1P(5)HDMI_TX1N(5)HDMI_TX2P(5)HDMI_TX2N(5)
HDMI_CLKP(5)HDMI_CLKN(5)HDMI_TX0P(5)HDMI_TX0N(5)
HDMI_CLK(5)
HDMI_DATA(5)
+3VS
+5VS
+5VS +5VS
+5VS
+3VS
+5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA6755P/7P 1.0HDMI Connector
Custom
11 48Tuesday, November 30, 2010
2010/06/30 2012/06/30Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA6755P/7P 1.0HDMI Connector
Custom
11 48Tuesday, November 30, 2010
2010/06/30 2012/06/30Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA6755P/7P 1.0HDMI Connector
Custom
11 48Tuesday, November 30, 2010
2010/06/30 2012/06/30Compal Electronics, Inc.
NEAR CONNECT
Change footprint20100812
Add fuse for safety requirement20100923
AMD check list update20101110
R525
150K_0402_5%@
R525
150K_0402_5%@
1 2
R528100K_0402_5%
@R528100K_0402_5%
@
12
Q86B2N7002KDWH_SOT363-6
HDMI@Q86B
2N7002KDWH_SOT363-6
HDMI@
34
5
EB
CQ88
MMBT3904_NL_SOT23-3@
EB
CQ88
MMBT3904_NL_SOT23-3@ 2
31
R501 499_0402_1%HDMI@R501 499_0402_1%HDMI@1 2
R524
0_0402_5%HDMI@
R524
0_0402_5%HDMI@
1 2
L34
WCM-2012-900T_4P
@L34
WCM-2012-900T_4P
@
11
44 3 3
2 2
Q86A2N7002KDWH_SOT363-6
HDMI@Q86A2N7002KDWH_SOT363-6
HDMI@
61
2
R503 499_0402_1%HDMI@R503 499_0402_1%HDMI@1 2
R521
0_0805_5%
@R521
0_0805_5%
@
R512100K_0402_5%
@R512100K_0402_5%
@
12
R515 0_0402_5%HDMI@R515 0_0402_5%HDMI@1 2
R517 0_0402_5%HDMI@R517 0_0402_5%HDMI@1 2
D7
RB491D_SC59-3HDMI@
D7
RB491D_SC59-3HDMI@
21
L37
WCM-2012-900T_4P
@L37
WCM-2012-900T_4P
@
11
44 3 3
2 2
G
D
S
Q872N7002H_SOT23-3HDMI@
G
D
S
Q872N7002H_SOT23-3HDMI@
2
13
R8160_0402_5%@
R8160_0402_5%@1 2
R514 0_0402_5%HDMI@R514 0_0402_5%HDMI@1 2
R506 499_0402_1%HDMI@R506 499_0402_1%HDMI@1 2
R500 499_0402_1%HDMI@R500 499_0402_1%HDMI@1 2
D6BAT54S-7-F_SOT23-3
@D6BAT54S-7-F_SOT23-3
@2
3
1
C6900.1U_0402_16V4ZHDMI@
C6900.1U_0402_16V4ZHDMI@
1
2
R505 499_0402_1%HDMI@R505 499_0402_1%HDMI@1 2
R5232K_0402_5%
HDMI@R5232K_0402_5%
HDMI@
12
R519 0_0402_5%HDMI@R519 0_0402_5%HDMI@1 2
R513 0_0402_5%HDMI@R513 0_0402_5%HDMI@1 2
R530100K_0402_5%HDMI@
R530100K_0402_5%HDMI@
12
F21.1A_6V_SMD1812P110TF
HDMI@F2
1.1A_6V_SMD1812P110TF
HDMI@
21
R518 0_0402_5%HDMI@R518 0_0402_5%HDMI@1 2
JHDMI1
SUYIN_100042GR019M23DZLME@
JHDMI1
SUYIN_100042GR019M23DZLME@
D2+1D2_shield2D2-3D1+4D1_shield5D1-6D0+7D0_shield8D0-9CK+10CK_shield11CK-12CEC13Reserved14SCL15SDA16DDC/CEC_GND17+5V18HP_DET19
G1 20
G2 21
G3 22
G4 23
R5222K_0402_5%
HDMI@R522
2K_0402_5%
HDMI@
12
D5BAT54S-7-F_SOT23-3
@D5BAT54S-7-F_SOT23-3
@2
3
1
L35
WCM-2012-900T_4P
@L35
WCM-2012-900T_4P
@
11
44 3 3
2 2
R527200K_0402_5%
@R527
200K_0402_5%
@
12
D8BAT54S-7-F_SOT23-3
@D8BAT54S-7-F_SOT23-3
@2
3
1
R516 0_0402_5%HDMI@R516 0_0402_5%HDMI@1 2
L36
WCM-2012-900T_4P
@L36
WCM-2012-900T_4P
@
11
44 3 3
2 2
R520 0_0402_5%HDMI@R520 0_0402_5%HDMI@1 2
R502 499_0402_1%HDMI@R502 499_0402_1%HDMI@1 2
R815
0_0402_5%@
R815
0_0402_5%@1 2
R509 499_0402_1%HDMI@R509 499_0402_1%HDMI@1 2
R508 499_0402_1%HDMI@R508 499_0402_1%HDMI@1 2
-
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DAC_RED
DAC_GRN
DAC_BLU
REDGREENBLUE
CRT_DDC_DAT_CONN
RED
GREEN
BLUE
JVGA_VSJVGA_HS
CRT_DDC_CLK_CONN
JVGA_VS
JVGA_HS
CRT_VSYNC_1
CRT_HSYNC_1
BLUE
CRT_DDC_DAT_CONN
CRT_DDC_CLK_CONN
RED
GREEN
JVGA_HS
JVGA_VS
CRT_VSYNC(5)
CRT_HSYNC(5)
DAC_RED(5)
DAC_GRN(5)
DAC_BLU(5)
CRT_DDC_DATA(5)
CRT_DDC_CLK(5)
+3VS
+5VS +5VS +5VS
+5VS +5VS
+CRT_VCC+3VS
+CRT_VCC
+CRT_VCC
+5VS+CRT_VCC
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
1.0
CRT Connector
Custom
12 48Tuesday, November 30, 2010
2010/06/30 2012/06/30Compal Electro