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Hardware Manual Revision : 1.0.1 Revision Data 2016. 03. 01 COMIZOA DAQ SYSTEM COMI-CP101 Multi-Function board Hardware Reference Manual

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Hardware Manual Revision : 1.0.1

Revision Data 2016. 03. 01

COMIZOA DAQ SYSTEM

COMI-CP101 Multi-Function board

Hardware Reference Manual

Copyright โ“’ by 2016 COMIZOA CO.,LTD. All right reserved

์ด ์‚ฌ์šฉ์ž ์„ค๋ช…์„œ์— ๊ธฐ๋ก๋œ ๋‚ด์šฉ์€ ์ธ์‡„์ƒ์˜ ์ž˜๋ชป์ด๋‚˜ ์ œํ’ˆ์˜ ์„ฑ๋Šฅ ํ–ฅ์ƒ์œผ๋กœ ์ธํ•œ ์ˆ˜์ •์ด ์žˆ์„ ์ˆ˜ ์žˆ์œผ๋ฉฐ ์‚ฌ์ „

ํ†ต๋ณด ์—†์ด ๋ณ€๊ฒฝ๋  ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค.

์ด ์‚ฌ์šฉ์ž ์„ค๋ช…์„œ๋Š” ์ €์ž‘๊ถŒ๋ฒ•์— ์˜ํ•ด ๋ณดํ˜ธ๋˜๊ณ  ์žˆ์œผ๋ฉฐ ๊ทธ ์ €์ž‘๊ถŒ์€ ใˆœ์ปค๋ฏธ์กฐ์•„๊ฐ€ ์†Œ์œ ํ•˜๊ณ  ์žˆ์Šต๋‹ˆ๋‹ค.

์ด ์„ค๋ช…์„œ์˜ ๋ชจ๋“  ์„ค๋ช…, ์ •๋ณด ๋ฐ ๊ถŒ์žฅ ์‚ฌํ•ญ์ด ์ •ํ™•ํ•˜๋‹ค๊ณ  ํŒ๋‹จ๋˜๋”๋ผ๋„ ์–ด๋– ํ•œ ๋ช…์‹œ์ ์ด๊ฑฐ๋‚˜ ๋ฌต์‹œ์ ์ธ ๋ณด์ฆ๋„ ํ•˜์ง€

์•Š์Šต๋‹ˆ๋‹ค. ์ฆ‰ ์ด ๋ฌธ์„œ์˜ ์–ด๋– ํ•œ ๋‚ด์šฉ๋„ ์ถ”๊ฐ€์ ์ธ ๋ณด์ฆ์„ ๊ตฌ์„ฑํ•˜๋Š” ๊ฒƒ์œผ๋กœ ํ•ด์„๋  ์ˆ˜ ์—†์Šต๋‹ˆ๋‹ค.

์ €์ž‘๊ถŒ์ž์˜ ์‚ฌ์ „ ์„œ๋ฉด ๋™์˜ ์—†์ด ๋ฌด๋‹จ์œผ๋กœ ์‚ฌ์šฉ์ž์„ค๋ช…์„œ์˜ ์ผ๋ถ€ ๋˜๋Š” ์ „์ฒด๋ฅผ ์–ด๋–ค ํ˜•ํƒœ๋กœ๋“  ๋ณต์‚ฌ, ์ „์žฌ, ์žฌ ๋ฐฐํฌ

ํ•˜๋Š” ํ–‰์œ„๋Š” ์ €์ž‘๊ถŒ๋ฒ•๊ณผ ๊ทธ ์™ธ ๋ฒ•๋ฅ ์— ์˜ํ•ด ๊ธˆ์ง€๋˜์–ด ์žˆ์Šต๋‹ˆ๋‹ค.

CONTENTS

CHAPTER 1 COMI-CP101 ๋ณด๋“œ ์†Œ๊ฐœ ................................................................................................................................ 2

1.1 COMI-CP101 ................................................................................................................................................................. 3

1.2 FEATURE ......................................................................................................................................................................... 4

1.3 SD402 ๊ตฌ์กฐ ................................................................................................................................................................... 6

1.4 SD402 ์ปค๋„ฅํ„ฐ ํ•€ ๋ฐฐ์—ด ................................................................................................................................................ 7

1.5 SD402 ๊ด€๋ จ ์•…์„ธ์„œ๋ฆฌ ................................................................................................................................................. 9

CHAPTER 2 DAS ................................................................................................................................................................ 11

2.1 ์‹ ํ˜ธ์„ ์˜ ์ข…๋ฅ˜ ๋ฐ ์—ฐ๊ฒฐ๋ฐฉ๋ฒ• ..................................................................................................................................... 11

2.1.1 ์•„๋‚ ๋กœ๊ทธ ์ž…๋ ฅ์‹ ํ˜ธ ์—ฐ๊ฒฐ .................................................................................................................................. 12

2.1.2 ๋””์ง€ํ„ธ ์ž…์ถœ๋ ฅ ์‹ ํ˜ธ ์—ฐ๊ฒฐ ................................................................................................................................ 15

2.1.3 ์—”์ฝ”๋” ์‹ ํ˜ธ ์—ฐ๊ฒฐ .............................................................................................................................................. 16

2.1.4 32Bit Counter ์‹ ํ˜ธ ์—ฐ๊ฒฐ ................................................................................................................................... 21

2.2 A/D ๋ณ€ํ™˜ ์ข…๋ฅ˜ ........................................................................................................................................................... 22

APPENDIX A A/D, D/A GAIN ๋ฐ OFFSET ์กฐ์ •๋ฐฉ๋ฒ• ..................................................................................................... 24

A.1 ๊ฐ ๋ณด๋“œ ๋ณ„ ๊ฐ€๋ณ€์ €ํ•ญ์˜ ์œ„์น˜ ๋ฐ ๊ธฐ๋Šฅ .................................................................................................................... 24

A.2 A/D CONVERTER ์˜ OFFSET ๋ฐ GAIN ์กฐ์ • ............................................................................................................... 30

A.2.1 Offset ์กฐ์ •.......................................................................................................................................................... 31

A.2.2 Gain ์กฐ์ • ........................................................................................................................................................... 33

A.3 D/A CONVERTER ์˜ OFFSET ๋ฐ GAIN ์กฐ์ •............................................................................................................... 33

A.3.1 Offset ์กฐ์ •.......................................................................................................................................................... 33

A.3.2 Gain ์กฐ์ • ........................................................................................................................................................... 33

APPENDIX B DATA ACQUISITION ๊ฐœ์š”.......................................................................................................................... 34

B.1 DATA ACQUISITION & CONTROL SYSTEM ์ด๋ž€?............................................................................................................ 34

B.1.1 PC-Bus Interface ................................................................................................................................................. 35

B.1.2 Standard Communication Channel ...................................................................................................................... 35

B.2 IBM-PC ์˜ ๋‚ด๋ถ€ ๊ตฌ์กฐ ( MEMORY ADDRESS ๋ฅผ ์ค‘์‹ฌ์œผ๋กœ ) ..................................................................................... 36

B.2.1 PC Expansion Slot ์˜ ๊ตฌ์กฐ ............................................................................................................................... 44

CHAPTER 1 COMI-CP101 ๋ณด๋“œ ์†Œ๊ฐœ

2

CHAPTER 1 COMI-CP101 ๋ณด๋“œ ์†Œ๊ฐœ

๋ณธ ์žฅ์—์„œ๋Š” ใˆœ์ปค๋ฏธ์กฐ์•„์—์„œ ๊ฐœ๋ฐœํ•œ COMI-CP101 Multi-Function Board ์˜ ํ•˜๋“œ์›จ์–ด์ ์ธ ์‚ฌํ•ญ๋“ค

์„ ์„ค๋ช…ํ•ฉ๋‹ˆ๋‹ค. COMI-CP101 Multi-Function Board ์˜ ํ•˜๋“œ์›จ์–ด์ ์ธ ์ƒ์„ธ ์‚ฌ์–‘ ๋ฐ ํ•˜๋“œ์›จ์–ด ๊ตฌ

์กฐ, ์ปค๋„ฅํ„ฐ ํ•€ ๋ฐฐ์—ด ๋“ฑ์— ๋Œ€ํ•œ ๋‚ด์šฉ์„ ์ˆ˜๋กํ–ˆ์„ ๋ฟ ์•„๋‹ˆ๋ผ ํ„ฐ๋ฏธ๋„ ๋ณด๋“œ์™€์˜ ์—ฐ๊ฒฐ ์˜ˆ ๋“ฑ์„ ์ˆ˜๋กํ•˜

์—ฌ ์‚ฌ์šฉ์ž๊ฐ€ COMI-CP101 Multi-Function Board ์˜ ํ•˜๋“œ์›จ์–ด ํŠน์„ฑ ๋ฐ ์‚ฌ์šฉ ๋ฐฉ๋ฒ•์„ ์‰ฝ๊ฒŒ ํŒŒ์•…ํ• 

์ˆ˜ ์žˆ๋„๋ก ํ•˜์˜€์Šต๋‹ˆ๋‹ค.

CHAPTER 1 COMI-CP101 ๋ณด๋“œ ์†Œ๊ฐœ

3

1.1 COMI-CP101

[๊ทธ๋ฆผ 1-1] COMI-CP101

COMI-CP101 ์€ Single Ended 8 ์ฑ„๋„ ์•„๋‚ ๋กœ๊ทธ ์ž…๋ ฅ, 1 ์ฑ„๋„ ์•„๋‚ ๋กœ๊ทธ ์ถœ๋ ฅ , ๊ฐ๊ฐ 8 ์ฑ„๋„์˜ ๋””์ง€

ํ„ธ ์ž…์ถœ๋ ฅ, ๊ทธ๋ฆฌ๊ณ  1 ์ฑ„๋„ ์นด์šดํ„ฐ๋ฅผ ๋‚ด์žฅํ•˜๊ณ  ์žˆ์Šต๋‹ˆ๋‹ค. ์‚ฌ์šฉ์ž๊ฐ€ ์‘์šฉํ•˜๊ณ ์ž ํ•˜๋Š” ์ผ๋ฐ˜์ ์ธ ์‚ฌ์–‘

์— ๊ฐ€์žฅ ์ ํ•ฉํ•œ Multi-Function Data Acquisition Board ์ž…๋‹ˆ๋‹ค.

์ด ์ œํ’ˆ์€ 32Bits PCI ๊ตฌ์กฐ๋กœ ์„ค๊ณ„๋˜์–ด Windows Plug and Play ๋ฅผ ์ง€์›ํ•˜์—ฌ ์‚ฌ์šฉ์ž๊ฐ€ ์‰ฝ๊ฒŒ ์žฅ์ฐฉ

๊ฐ€๋Šฅํ•˜๋ฉฐ ํŠนํžˆ ๋ชจ๋“  ์ƒํƒœ๋ฅผ ํ”„๋กœ๊ทธ๋žจ์œผ๋กœ ์ œ์–ด๊ฐ€ ๊ฐ€๋Šฅํ•˜๋„๋ก ์„ค๊ณ„๋˜์—ˆ์Šต๋‹ˆ๋‹ค.

ํŠนํžˆ ์•„๋‚ ๋กœ๊ทธ ์ž…๋ ฅ๋ถ€๋Š” 12Bits Resolution ์œผ๋กœ ์ตœ๋Œ€ ์ƒ˜ํ”Œ๋ง ์†๋„๊ฐ€ 30KHz ์ด๋ฉฐ, 8 ์ฑ„๋„ Single-

Ended ์˜ ์•„๋‚ ๋กœ๊ทธ ์ž…๋ ฅ์‹ ํ˜ธ๋ฅผ ์ฒ˜๋ฆฌํ•  ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค. ๊ทธ๋ฆฌ๊ณ  ๊ฐ ์ฑ„๋„์˜ Gain (Voltage Range)์„ค์ •

์ด ยฑ1V, ยฑ2V, ยฑ5V, ยฑ10V ๋กœ ์‚ฌ์šฉ์ž ์„ค์ •์ด ๊ฐ€๋Šฅํ•˜์—ฌ Data Resolution ์„ ๋†’์˜€์Šต๋‹ˆ๋‹ค.

์•„๋‚ ๋กœ๊ทธ ์ถœ๋ ฅ๋ถ€๋Š” 12Bits Resolution ์œผ๋กœ 1 ์ฑ„๋„์ด ์‚ฌ์šฉ ๊ฐ€๋Šฅํ•ฉ๋‹ˆ๋‹ค.

CHAPTER 1 COMI-CP101 ๋ณด๋“œ ์†Œ๊ฐœ

4

1.2 Feature

โ–ท Bus : IBM PC Bus (32Bits PCI)

โ–ท Size : 155 * 100 mm

โ–ท PNP (Plug &Play)

I/O Channels

โ–ท Analog Input : Single-Ended 8 Channels

โ–ท Analog Output : 1 Channel

โ–ท Digital Input : 8 Channels

โ–ท Digital Output : 8 Channels

โ–ท Timer : 1 Channel

A/D Conversion

โ–ท Complete 12 Bit A/D Conversion

โ–ท Type of ADC : Successive Approximation

โ–ท A/D Channel : Single-Ended 8

โ–ท Input Voltage Range : ยฑ10V, ยฑ5V, ยฑ2V, ยฑ1V

โ–ท Resolution : 12 Bits, 0 in 4095

โ–ท Maximum Sampling Rate : 30 kHz

โ–ท Streaming to Disk Rate : 30 kHz

โ–ท Input Impedance : 10M Ohm

โ–ท A/D Trigger Mode : Programmable Timer, Software, External

โ–ท Data Transfer : Programmed I/O, Interrupt

โ–ท Channel Configuration : Gain, Channel No

D/A Conversion

โ–ท D/A Channel : 1 Channel (for single DC Output)

โ–ท Resolution : 12 Bits, 0 in 4095

โ–ท Setting Time : 2 micro sec

โ–ท Output Voltage Range : ยฑ10V

โ–ท Data Transfer : Programmed I/O

CHAPTER 1 COMI-CP101 ๋ณด๋“œ ์†Œ๊ฐœ

5

Digital Input

โ–ท TTL Compatible Input

โ–ท Channels : 8 Channels

โ–ท Voltage Level : Low(0 ~ 0.8V), High(2V ~ )

โ–ท Input Load : Low 0.5V(0.2mA), High 2.7V(20mA)

โ–ท Data Transfer : Programmed I/O

Digital Output

โ–ท TTL Compatible Output

โ–ท Channels : Max 16 Channels

โ–ท Voltage Level : Low(0 ~ 0.4V), High(2.4V ~ )

โ–ท Input Load : Low 0.5V(0.2mA), High 2.7V(0.4mA)

โ–ท Data Transfer : Programmed I/O

Programmable Counter

โ–ท Intel 8254

โ–ท Channel : 1 Channel

โ–ท Resolution : 16Bits

โ–ท Programmable Rate Generator

โ–ท Real Time Clock

โ–ท Digital One-Shot

Accessories

โ–ท Terminal : COMI-CPT1

โ–ท Cable : CB-DMS-TS

CHAPTER 1 COMI-CP101 ๋ณด๋“œ ์†Œ๊ฐœ

6

1.3 CP101 ๊ตฌ์กฐ

I/O

CO

NN

EC

TO

R

Analog Input

Counter Source

PC

I B

US

PCICONTROLLER

AnalogMUX

GainController

A/DConvertor

Buffer

Data

Address

Control

Timer/Counter

Control ControlDecorder Address

Digital Output

Digital Input

AnalogAmplifier

D/AConvertor

Data

Data

Data

[๊ทธ๋ฆผ 1-2] COMI-CP101 Hardware ๊ฐœ๋…๋„

CHAPTER 1 COMI-CP101 ๋ณด๋“œ ์†Œ๊ฐœ

7

1.4 CP101 ์ปค๋„ฅํ„ฐ ํ•€ ๋ฐฐ์—ด

123456789

10111213141516171819

202122232425262728293031323334353637

AI 0ch

AI 1ch

AI 2ch

AI 3ch

AI 4ch

AI 5ch

AI 6ch

AI 7ch

AGND

DI 0ch

DI 1ch

DI 2ch

DI 3ch

DI 4ch

DI 5ch

DI 6ch

DI 7ch

GND

GND

DAOUT

AGND

AGND

DO 0ch

DO 1ch

DO 2ch

DO 3ch

DO 4ch

DO 5ch

DO 6ch

DO 7ch

CLK

GATE

TOUT

E_TRG

VCC

VCC

[๊ทธ๋ฆผ 1-3] COMI-CP101 ์ปค๋„ฅํ„ฐ ํ•€ ๋ฐฐ์—ด

CHAPTER 1 COMI-CP101 ๋ณด๋“œ ์†Œ๊ฐœ

8

Signal Name Reference I/O Description

AI<0..7> AGND ์ž…๋ ฅ ์•„๋‚ ๋กœ๊ทธ ์ž…๋ ฅ ์ฑ„๋„ (single ended 0๋ถ€ํ„ฐ

7๋ฒˆ)

AGND ์•„๋‚ ๋กœ๊ทธ ๊ทธ๋ผ์šด๋“œ - ์ด ํ•€๋“ค์€ ์•„๋‚ ๋กœ๊ทธ

์‹ ํ˜ธ์˜ ๊ธฐ์ค€์ 

DAOUT AGND ์ถœ๋ ฅ ์•„๋‚ ๋กœ๊ทธ ์ถœ๋ ฅ ์ฑ„๋„

TOUT DGND ์ถœ๋ ฅ 8253/4 ํƒ€์ด๋จธ์˜ OUT0๋ฒˆ

GATE DGND ์ž…๋ ฅ 8253/4 ํƒ€์ด๋จธ์˜ GATE0๋ฒˆ

CLK DGND ์ž…๋ ฅ 8253/4 ํƒ€์ด๋จธ์˜ CLK0๋ฒˆ

E_TRG DGND ์ž…๋ ฅ A/D ๋ณ€ํ™˜ ์™ธ๋ถ€ ํŠธ๋ฆฌ๊ฑฐ. ์‚ฌ์šฉ์ž๊ฐ€ ๋ณ„๋„์˜

์™ธ๋ถ€์‹ ํ˜ธ๋ฅผ ์ž…๋ ฅ ๋ฐ›์•„ A/D๋ณ€ํ™˜

DGND ๋””์ง€ํ„ธ ๊ทธ๋ผ์šด๋“œ

VCC DGND ์ถœ๋ ฅ 5V ์ถœ๋ ฅ

DI<0..7> DGND ์ž…๋ ฅ ๋””์ง€ํ„ธ ์ž…๋ ฅ ์ฑ„๋„

D0<0..7> DGND ์ถœ๋ ฅ ๋””์ง€ํ„ธ ์ถœ๋ ฅ ์ฑ„๋„

[ํ‘œ 1-1] COMI-CP101 DSUB-37P Connector Pin

CHAPTER 1 COMI-CP101 ๋ณด๋“œ ์†Œ๊ฐœ

9

1.5 CP101 ๊ด€๋ จ ์•…์„ธ์„œ๋ฆฌ

COMI-CPT1

[๊ทธ๋ฆผ 1-4] COMI-CPT1

COMI-CPT1 ์€ ๋ชจ๋“  CP ์‹œ๋ฆฌ์ฆˆ DAS ๋ณด๋“œ์— ์‚ฌ์šฉ๋˜์–ด์งˆ ์ˆ˜ ์žˆ๋Š” ๋ฒ”์šฉ ํ„ฐ๋ฏธ๋„ ๋ณด๋“œ ์ž…๋‹ˆ๋‹ค. ์ด

37 ๊ฐœ์˜ ํ„ฐ๋ฏธ๋„๋กœ ๊ตฌ์„ฑ๋˜์–ด ์žˆ์œผ๋ฉฐ ์ปค๋„ฅํ„ฐ ์ผ€์ด๋ธ”๊ณผ์˜ ์ ‘์ด‰์ด ์ž˜๋˜์—ˆ๋Š”์ง€ ๋‚˜ํƒ€๋‚ด์ฃผ๋Š” LED ๊ฐ€ ๋‚ด

์žฅ๋˜์–ด ์žˆ์Šต๋‹ˆ๋‹ค.

์•„๋‚ ๋กœ๊ทธ ์ž…๋ ฅ์‹ ํ˜ธ์˜ ์žก์Œ์ด ๋งŽ์ด ๋ฐœ์ƒํ•˜๋Š” ๊ฒฝ์šฐ์— ๋Œ€๋น„ํ•˜์—ฌ COMI-CPT1 ์— ์‚ฌ์šฉ์ž๊ฐ€ ๊ตฌ์„ฑํ•  ์ˆ˜

์žˆ๋Š” Low Pass Filter(LPF)๊ฐ€ ์žˆ์Šต๋‹ˆ๋‹ค.

[๊ทธ๋ฆผ 1-4] ์™€ ๊ฐ™์ด ์ฒ˜์Œ์—๋Š” LPF ์— ์ €ํ•ญ์—๋Š” 0ฮฉ์˜ ์ €ํ•ญ์ด ์—ฐ๊ฒฐ๋˜์–ด ์žˆ์œผ๋ฉฐ ์ปจ๋ด์„œ์—๋Š” ์˜คํ”ˆ๋˜

์–ด ์žˆ์Šต๋‹ˆ๋‹ค. ๋”ฐ๋ผ์„œ ์‚ฌ์šฉ์ž๋Š” ์ž์‹ ์ด ์—ฐ๊ฒฐํ•˜๊ณ ์ž ํ•˜๋Š” ์•„๋‚ ๋กœ๊ทธ ์ž…๋ ฅ์‹ ํ˜ธ์˜ ์žก์Œ์ƒํƒœ๋ฅผ ๋ฏธ๋ฆฌ ์˜ค

์‹ค๋กœ์Šค์ฝ”ํ”„์™€ ๊ฐ™์€ ๊ณ„์ธก๊ธฐ๊ธฐ๋ฅผ ์‚ฌ์šฉํ•˜์—ฌ ์žก์Œ์˜ ์ฃผํŒŒ์ˆ˜ ๋ ˆ๋ฒจ์„ ํ™•์ธํ•œ ํ›„ ์ ๋‹นํ•œ Cut off

frequency ๋ฅผ ์ •ํ•ด R ๊ณผ C ๊ฐ’์„ ์ •ํ•˜์—ฌ ์—ฐ๊ฒฐํ•ด ์ฃผ์‹ญ์‹œ์˜ค.

์ €ํ•ญ R

์ปจ๋ด์„œ C

์•„๋‚ ๋กœ๊ทธ ์ž…๋ ฅ์™ธ๋ถ€ ์•„๋‚ ๋กœ๊ทธ ์ž…๋ ฅ

[๊ทธ๋ฆผ 1-5] Low pass filter

์‚ฌ์šฉ์ž์— ๋”ฐ๋ผ ์ž…๋ ฅ์‹ ํ˜ธ์˜ ์ „์••๋ฒ”์œ„๊ฐ€ ํฐ ๊ฒฝ์šฐ์—๋Š” [๊ทธ๋ฆผ 1-5] ์˜ C ๋Œ€์‹  ์ ๋‹นํ•œ ์ €ํ•ญ์„ ์‚ฌ์šฉํ•˜

์—ฌ ์ „์•• ๋ถ„๋ฐฐ๋ฅผ ํ•  ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค.

CHAPTER 1 COMI-CP101 ๋ณด๋“œ ์†Œ๊ฐœ

10

CB-DMS-TS

[๊ทธ๋ฆผ 1-6] CB-DMS-TS

CB-DMS-TS ๋Š” Dsub-Dsub 37 ํ•€ ์ปค๋„ฅํ„ฐ ์ผ€์ด๋ธ”์ž…๋‹ˆ๋‹ค. ์ฒด๊ฒฐํ˜•์‹์€ ์–‘์ชฝ ๋ชจ๋‘ ์Šคํฌ๋ฅ˜(Screw)

ํ˜•์ž…๋‹ˆ๋‹ค.

CHAPTER 2 DAS

11

CHAPTER 2 DAS

2.1 ์‹ ํ˜ธ์„ ์˜ ์ข…๋ฅ˜ ๋ฐ ์—ฐ๊ฒฐ๋ฐฉ๋ฒ•

ใˆœ์ปค๋ฏธ์กฐ์•„์˜ DAS ์ œํ’ˆ ๊ตฐ ์ค‘ 10x Series ์™€ 20x Series ๋“ฑ ๊ณผ ๊ฐ™์ด ์•„๋‚ ๋กœ๊ทธ ์ž…๋ ฅ์‹ ํ˜ธ๋ฅผ ์ฒ˜๋ฆฌ

ํ•˜๋Š” ๋ณด๋“œ์—์„œ ์ž…๋ ฅ์‹ ํ˜ธ์˜ ์—ฐ๊ฒฐ์€ ๋ฌด์—‡๋ณด๋‹ค ์ค‘์š”ํ•ฉ๋‹ˆ๋‹ค. ์•„๋‚ ๋กœ๊ทธ ์ž…๋ ฅ ์‹ ํ˜ธ๋ฅผ ํ„ฐ๋ฏธ๋„๋ณด๋“œ์— ์—ฐ

๊ฒฐํ•˜๋Š” ๋ฐฉ๋ฒ•์€ ์—ฌ๋Ÿฌ๋ถ„์ด ์‚ฌ์šฉํ•˜๊ณ ์ž ํ•˜๋Š” ์„ผ์„œ์˜ ์ถœ๋ ฅ ํ˜•ํƒœ์— ๋”ฐ๋ผ ๋‹ฌ๋ผ์งˆ ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค. ๋‹ค์Œ์€

์‹ ํ˜ธ์˜ ์œ ํ˜• ์ž…๋‹ˆ๋‹ค.

Ground-Referenced Signal Source

์„ผ์„œ์˜(-)์‹ ํ˜ธ๊ฐ€ ๊ฑด๋ฌผ์˜ ๊ทธ๋ผ์šด๋“œ์— ์ ‘์ง€๋˜์–ด ์žˆ๊ณ  SD ์‹œ๋ฆฌ์ฆˆ๊ฐ€ ์„ค์น˜๋œ ์ปดํ“จํ„ฐ์˜ ์ „์›๋ถ€๋ถ„์˜ ๊ทธ

๋ผ์šด๋“œ ํ•€์ด ๊ฑด๋ฌผ ๊ทธ๋ผ์šด๋“œ์— ๊ณตํ†ต ์ ‘์ง€๋˜์–ด ์žˆ์œผ๋ฉด ์‹ ํ˜ธ์˜ ๊ทธ๋ผ์šด๋“œ๊ฐ€ ๊ณตํ†ต์ธ ๊ฒฝ์šฐ ์ž…๋‹ˆ๋‹ค.

Floating Signal Source

์„ผ์„œ์˜ (-)์‹ ํ˜ธ๊ฐ€ ๊ทธ๋ผ์šด๋“œ์™€ ๋ถ„๋ฆฌ๋˜์–ด ์žˆ์–ด์„œ ์„ผ์„œ์˜ ์–‘ ๋‹จ (+,-)์˜ ๋ณ€ํ™”๋ฅผ ์ฝ์–ด์•ผ ํ•˜๋Š” ์‹ ํ˜ธ

์ž…๋‹ˆ๋‹ค. ์˜ˆ๋ฅผ ๋“ค๋ฉด ๋ฐฐํ„ฐ๋ฆฌ๋‚˜ Optical Isolator ์ถœ๋ ฅ ๋“ฑ์ด ์žˆ์Šต๋‹ˆ๋‹ค.

CHAPTER 2 DAS

12

2.1.1 ์•„๋‚ ๋กœ๊ทธ ์ž…๋ ฅ์‹ ํ˜ธ ์—ฐ๊ฒฐ

Single Ended ์—ฐ๊ฒฐ๋ฒ• 1

์‹ ํ˜ธ์˜ ์œ ํ˜•์ด Ground-Referenced Signal Source ์ผ ๋•Œ Single Ended ๋กœ ์•„๋‚ ๋กœ๊ทธ ์‹ ํ˜ธ๋ฅผ ์—ฐ๊ฒฐ

ํ•˜๋ฉด [๊ทธ๋ฆผ 2-1]๊ณผ ๊ฐ™์Šต๋‹ˆ๋‹ค. ์ด์™€ ๊ฐ™์ด ์‹ ํ˜ธ๋ฅผ ์—ฐ๊ฒฐํ•  ๊ฒฝ์šฐ COMI-LX101 ์€ ์ด 32 ์ฑ„๋„์˜ ์•„

๋‚ ๋กœ๊ทธ ์ž…๋ ฅ์„ ์ฒ˜๋ฆฌ ํ•  ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค. ๋งŒ์•ฝ ์‹ ํ˜ธ์„ ์— Shield ์„ ์ด ์žˆ๋Š” ๊ฒฝ์šฐ์—๋Š” ์„ผ์„œ๋ถ€๋‚˜ COMI-

LX101 ์˜ ๊ทธ๋ผ์šด๋“œ ํ•œ์ชฝ์—๋งŒ Shield ์„ ์„ ์—ฐ๊ฒฐํ•ฉ๋‹ˆ๋‹ค. ๊ทธ๋Ÿฌ๋‚˜ ์ด ๋ฐฉ๋ฒ•์€ ๊ทธ๋ผ์šด๋“œ ๋ฃจํ”„ํ˜„์ƒ์ด ๋ฐœ

์ƒํ•˜์—ฌ ์„ผ์„œ์˜ ๊ทธ๋ผ์šด๋“œ์™€ COMI-LX101 ์˜ ๊ทธ๋ผ์šด๋“œ ์‚ฌ์ด์— ์ „์••์ฐจ๊ฐ€ ๋ฐœ์ƒํ•  ์ˆ˜ ์žˆ์–ด ๋ฐ”๋žŒ์งํ•˜

์ง€ ์•Š์Šต๋‹ˆ๋‹ค.

+

-

ACH

AGND

EARTH AGND

[๊ทธ๋ฆผ 2-1] Single Ended ์•„๋‚ ๋กœ๊ทธ ์‹ ํ˜ธ ์—ฐ๊ฒฐ๋ฒ• 1

Single Ended ์—ฐ๊ฒฐ๋ฒ• 2

์‹ ํ˜ธ์˜ ์œ ํ˜•์ด Floating Signal ์ด๊ณ  ๋‹ค์ฑ„๋„ ์‚ฌ์šฉํ•˜์‹ค ๊ฒฝ์šฐ Single Ended ์‚ฌ์šฉ์„ ๊ถŒํ•ฉ๋‹ˆ๋‹ค. [๊ทธ๋ฆผ

2-2]๊ณผ ๊ฐ™์ด ์—ฐ๊ฒฐํ•˜์‹œ๊ณ  ๋งŒ์•ฝ Shield ์„ ์ด ์žˆ๋Š” ๊ฒฝ์šฐ์—๋Š” ํ•œ์ชฝ์˜ ๊ทธ๋ผ์šด๋“œ์—๋งŒ ์—ฐ๊ฒฐํ•˜์‹ญ์‹œ์˜ค.

+

-

ACH

AGND

EARTH AGND

[๊ทธ๋ฆผ 2-2] Single Ended ์•„๋‚ ๋กœ๊ทธ ์‹ ํ˜ธ ์—ฐ๊ฒฐ๋ฒ• 2

CHAPTER 2 DAS

13

Differential ์—ฐ๊ฒฐ๋ฒ• 1

์‹ ํ˜ธ์˜ ์œ ํ˜•์ด Ground-Referenced Signal Source ์ด๊ณ  Differential ๋กœ ์•„๋‚ ๋กœ๊ทธ ์‹ ํ˜ธ๋ฅผ ์—ฐ๊ฒฐํ•˜์‹ค

๋•Œ [๊ทธ๋ฆผ 2-3]๊ณผ ๊ฐ™์ด ์—ฐ๊ฒฐํ•˜์‹ค ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค.

+

-

ACH+

ACH-

EARTH AGND

[๊ทธ๋ฆผ 2-3] Differential ์•„๋‚ ๋กœ๊ทธ ์‹ ํ˜ธ ์—ฐ๊ฒฐ๋ฒ• 1

Differential ์—ฐ๊ฒฐ๋ฒ• 2

์‹ ํ˜ธ์˜ ์œ ํ˜•์ด Floating Signal ์ด๊ณ  Differential ๋กœ ์•„๋‚ ๋กœ๊ทธ ์‹ ํ˜ธ๋ฅผ ์—ฐ๊ฒฐํ•  ๊ฒฝ์šฐ [๊ทธ๋ฆผ 2-4]์™€

๊ฐ™์ด ์—ฐ๊ฒฐ ํ•  ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค.

์ด ๋•Œ ์‚ฌ์šฉ์ž๊ฐ€ ์œ ์˜ํ•  ์‚ฌํ•ญ์€ ์„ผ์„œ์˜ ์ถœ๋ ฅ์‹ ํ˜ธ๊ฐ€ Floating ๋˜์–ด์žˆ๋Š”์ง€ ๋‹ค์‹œ ํ•œ๋ฒˆ ํ™•์ธ ํ•˜์‹œ๊ณ 

์ถœ๋ ฅ ์ž„ํ”ผ๋˜์Šค๋ฅผ ์ธก์ •ํ•˜์‹ญ์‹œ์˜ค. ์ถœ๋ ฅ ์ž„ํ”ผ๋˜์Šค์— ๋”ฐ๋ผ์„œ [๊ทธ๋ฆผ 2-4] ์˜ ์ €ํ•ญ๊ฐ’์„ ๊ฒฐ์ • ํ•  ์ˆ˜ ์žˆ

์Šต๋‹ˆ๋‹ค.

+

-

ACH+

ACH-

AGNDEARTH

์ €ํ•ญ

[๊ทธ๋ฆผ 2-4] Differential ์•„๋‚ ๋กœ๊ทธ ์‹ ํ˜ธ ์—ฐ๊ฒฐ๋ฒ• 2

CHAPTER 2 DAS

14

Shielded Differential ์—ฐ๊ฒฐ๋ฒ•

[๊ทธ๋ฆผ 2-4]์™€ ๊ฐ™๊ณ  ๋‹จ์ง€ ์„ผ์„œ์˜ ์‹ ํ˜ธ์„ ์ด Shield ์„ ์œผ๋กœ ๋˜์–ด์žˆ์œผ๋ฉด [๊ทธ๋ฆผ 2-5]๊ณผ ๊ฐ™์ด Shield

์„ ์„ ์ปค๋ฏธ์กฐ์•„ ๋ณด๋“œ์˜ ์•„๋‚ ๋กœ๊ทธ ๊ทธ๋ผ์šด๋“œ๋‚˜ ์„ผ์„œ์˜ ๊ทธ๋ผ์šด๋“œ์ค‘ ํ•œ ์ชฝ์—๋งŒ ์—ฐ๊ฒฐํ•˜์‹ญ์‹œ์˜ค. ๊ทธ ์ด

์œ ๋Š” [๊ทธ๋ฆผ 2-1]์—์„œ์™€ ๊ฐ™์ด ๊ทธ๋ผ์šด๋“œ ๋ฃจํ•‘ํ˜„์ƒ์ด ๋ฐœ์ƒํ•˜์—ฌ ์–‘์ชฝ ๊ทธ๋ผ์šด๋“œ์— ์›ํ•˜์ง€ ์•Š๋Š” ์ „์••

์ฐจ๊ฐ€ ๋ฐœ์ƒํ•˜๊ณ  ์ด๊ฒƒ์ด ๋ณด๋“œ์˜ Gain Error ์›์ธ์ด ๋ฉ๋‹ˆ๋‹ค.

๊ฑฐ์˜ ๋ชจ๋“  ์•„๋‚ ๋กœ๊ทธ ์ž…๋ ฅ ์‹ ํ˜ธ์„ ์€ ์ฃผ์œ„ ํ™˜๊ฒฝ์ด๋‚˜ ๊ธธ์ด์— ๋”ฐ๋ผ Shield ์„ ์„ ์“ฐ๋Š” ๊ฒƒ์ด ๋ฐ”๋žŒ์ง ํ•ฉ

๋‹ˆ๋‹ค. ์ฃผ์œ„์˜ Noise ๊ฐ€ Shield ์„ ์— ๋”ฐ๋ผ ๊ทธ๋ผ์šด๋“œ๋กœ ๋น ์ง€๋ฏ€๋กœ ์‹ ํ˜ธ๊ฐ€ ๊นจ๋—ํ•˜๊ณ  ์•ˆ์ •๋œ ์‹ ํ˜ธ๋ฅผ

ํš๋“ ํ•  ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค.

+

-

ACH+

ACH-

AGNDEARTH

์ €ํ•ญ

[๊ทธ๋ฆผ 2-5] Shielded Differential ์•„๋‚ ๋กœ๊ทธ ์‹ ํ˜ธ ์—ฐ๊ฒฐ๋ฒ•

์‚ฌ์šฉ์ž๋Š” ๋‹ค์Œ ๋„ค ๊ฐ€์ง€ ๊ฒฝ์šฐ์—๋Š” Differential Mode ๋กœ ์‹ ํ˜ธ๋ฅผ ์ž…๋ ฅ ๋ฐ›์•„์•ผ ํ•ฉ๋‹ˆ๋‹ค.

์„ผ์„œ์˜ ์ถœ๋ ฅ ์‹ ํ˜ธ๊ฐ€ ๊ทธ๋ผ์šด๋“œ์™€ ๋ถ„๋ฆฌ๋˜์–ด ์žˆ์„ ๋•Œ

์ฃผ์œ„ ํ™˜๊ฒฝ์— Noise ๊ฐ€ ๋งŽ์„ ๋•Œ

์„ผ์„œ์˜ ์ถœ๋ ฅ ์‹ ํ˜ธ๊ฐ€ 1 Volt ๋ฏธ๋งŒ์ผ ๋•Œ

์„ผ์„œ๊ฐ€ COMIZOA ํ„ฐ๋ฏธ๋„ ๋ธ”๋ก๊ณผ 3m ์ด์ƒ์ผ ๋•Œ

[๊ทธ๋ฆผ 2-3] ๊ณผ ๊ฐ™์ด Ground-Referenced Signal Source ๋ฅผ Differential ์ž…๋ ฅ์œผ๋กœ ๋ฐ›๋Š” ๊ฒฝ์šฐ๋Š”

Picked-up Noise ๋ฅผ ๊ฐ์†Œ ์‹œํ‚ค๊ณ  Common-mode Noise Rejection ์„ ํ–ฅ์ƒ ์‹œํ‚ต๋‹ˆ๋‹ค. ์„ผ์„œ์˜ ์ถœ

๋ ฅ ์‹ ํ˜ธ๊ฐ€ ๋ฏธ์•ฝํ•˜๊ณ  ์ฃผ์œ„ ํ™˜๊ฒฝ์ด ์—ด์•…ํ•  ๋•Œ ์•„๋‚ ๋กœ๊ทธ ๊ทธ๋ผ์šด๋“œ์™€ ์„ผ์„œ์˜ (-)์‹ ํ˜ธ๋ฅผ ์˜ค์‹ค๋กœ์Šค์ฝ”ํ”„

๋กœ ๊ด€์ฐฐํ•˜๋ฉด ์‹ ํ˜ธ์— ๋งŽ์€ ์žก์‹ ํ˜ธ๊ฐ€ ์žˆ์Œ์„ ์•Œ ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค. ์ด๋Ÿฐ ์ƒํ™ฉ์—์„œ Single Ended ์—ฐ๊ฒฐ๋ฒ•

์„ ์‚ฌ์šฉํ•˜์‹œ๋ฉด ์„ผ์„œ์˜ (-)์‹ ํ˜ธ๋ฅผ ๋ณด๋“œ์˜ ๊ธฐ์ค€ ์ „์••์ธ ์•„๋‚ ๋กœ๊ทธ ๊ทธ๋ผ์šด๋“œ์™€ ์ ‘์ง€ํ•˜๋ฏ€๋กœ ๋ณด๋“œ์˜ ์•„

๋‚ ๋กœ๊ทธ ๊ทธ๋ผ์šด๋“œ์— ์žก์‹ ํ˜ธ๊ฐ€ ์„ž์—ฌ์„œ ์ •ํ™•ํ•œ ๋ฐ์ดํ„ฐ์˜ ํš๋“์ด ๋ถˆ๊ฐ€๋Šฅํ•ฉ๋‹ˆ๋‹ค. ๋”ฐ๋ผ์„œ ์ด๋Ÿด ๋•Œ๋Š”

Differential ์—ฐ๊ฒฐ๋ฒ•์„ ์‚ฌ์šฉํ•˜์‹œ๋ฉด (-)์‹ ํ˜ธ์™€ ๊ทธ๋ผ์šด๋“œ๊ฐ€ ๋ถ„๋ฆฌ๋˜์–ด ์žˆ์–ด ์„ผ์„œ์˜ (+)์‹ ํ˜ธ์™€ (-)์‹ ํ˜ธ

์˜ ์ „์••์ฐจ๋ฅผ ์ธก์ •ํ•˜๊ฒŒ ๋˜๋ฏ€๋กœ ์œ„์˜ ๋ฌธ์ œ๊ฐ€ ํ•ด๊ฒฐ๋  ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค.

[๊ทธ๋ฆผ 2-4] ์™€ ๊ฐ™์ด ์‹ ํ˜ธ์˜ ์œ ํ˜•์ด Floating Signal ์ด๊ณ  Differential ์ž…๋ ฅ์„ ์ด์šฉํ•˜์‹ค ๋•Œ ์ฃผ์œ„ ํ•˜

์‹ค ์ ์€ ์„ผ์„œ ์‹ ํ˜ธ์˜ ์ถœ๋ ฅ ์ž„ํ”ผ๋˜์Šค๊ฐ€ ๋†’์œผ๋ฉด ์‚ฌ์šฉ์ด ๋ถˆ๊ฐ€๋Šฅ ํ•ฉ๋‹ˆ๋‹ค. ์ด๋•Œ ๊ทธ๋ฆผ๊ณผ ๊ฐ™์ด Bias ์ €

ํ•ญ์„ ๋Œ€๋žต ์ถœ๋ ฅ ์ž„ํ”ผ๋˜์Šค์˜ ์ˆ˜ ๋ฐฑ๋ฐฐํฌ๊ธฐ๋กœ ์—ฐ๊ฒฐํ•˜์…”์•ผ ํ•ฉ๋‹ˆ๋‹ค. ์‚ฌ์šฉ์ž๊ฐ€ 100 ๋ฐฐ์˜ ์ €ํ•ญ์„ ์—ฐ๊ฒฐ

ํ•˜์‹œ๋ฉด 1%์˜ Gain Error ๊ฐ€ ์žˆ์„ ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค. ๋งŒ์•ฝ ์„ผ์„œ ์‹ ํ˜ธ์˜ ์ถœ๋ ฅ ์ž„ํ”ผ๋˜์Šค๊ฐ€ ์ถฉ๋ถ„ํžˆ ๋‚ฎ์œผ๋ฉด

์„ผ์„œ์˜ (-)์‹ ํ˜ธ๋ฅผ ๋ณด๋“œ์˜ ์•„๋‚ ๋กœ๊ทธ ๊ทธ๋ผ์šด๋“œ์— ์ง์ ‘์—ฐ๊ฒฐ ํ•˜์‹ค ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค.

CHAPTER 2 DAS

15

2.1.2 ๋””์ง€ํ„ธ ์ž…์ถœ๋ ฅ ์‹ ํ˜ธ ์—ฐ๊ฒฐ

0

1

2

3

4

5

6

7

0

1

2

3

4

5

6

7

DIGITALOUTPUT<0..7>

DIGITALINPUT<0..7>

+5V

LED

์ €ํ•ญ

DGND

TTL

Relay

SWITCH

์ €ํ•ญ

[๊ทธ๋ฆผ 2-6] ๋””์ง€ํ„ธ ์ž…์ถœ๋ ฅ ์—ฐ๊ฒฐ๋ฒ•

[๊ทธ๋ฆผ 2-6]์€ ๋””์ง€ํ„ธ ์ž…๋ ฅ์ด 8 ์ฑ„๋„, ๋””์ง€ํ„ธ ์ถœ๋ ฅ์ด 8 ์ฑ„๋„์ธ ๊ฒฝ์šฐ์ž…๋‹ˆ๋‹ค. ๋””์ง€ํ„ธ ์ž…์ถœ๋ ฅ์€ ๋ชจ๋“ 

์‚ฐ์—…์‹œ์„ค์˜ ์ž๋™ํ™”๋‚˜ ๊ณ„์ธก๊ธฐ๊ธฐ์˜ ์ œ์–ด๋“ฑ ์‘์šฉ๋ฒ”์œ„๊ฐ€ ๋งค์šฐ ๊ด‘๋ฒ”์œ„ ํ•ฉ๋‹ˆ๋‹ค. [๊ทธ๋ฆผ 2-6]์€ ๊ทธ ์ค‘

๊ฐ„๋‹จํ•œ ์˜ˆ๋กœ ๋””์ง€ํ„ธ ์ถœ๋ ฅ์„ ์ด์šฉํ•˜์—ฌ LED ๋ฅผ ON/OFF ํ•˜๋ฉฐ Relay ๋ฅผ ๊ตฌ๋™ํ•˜๋Š” ๊ทธ๋ฆผ์ž…๋‹ˆ๋‹ค.

์‚ฌ์šฉ์ž๋Š” ์ž์‹ ์ด ์„ ํƒํ•œ LED ์˜ ์‚ฌ์–‘์— ๋”ฐ๋ผ ์ €ํ•ญ์„ ์—ฐ๊ฒฐํ•˜์—ฌ LED ์— ํ๋ฅด๋Š” ์ „๋ฅ˜๋ฅผ ์กฐ์ •ํ•˜๊ณ 

LED ์˜ ON/OFF ๋ฅผ ๋””์ง€ํ„ธ ์ถœ๋ ฅํ•€์˜ ON/OFF ๋กœ ์ œ์–ด ํ•ฉ๋‹ˆ๋‹ค. Relay ๊ตฌ๋™๋„ ์‚ฌ์–‘์— ๋”ฐ๋ผ ์—ฐ๊ฒฐ

ํ•˜์‹œ๊ณ  ๋””์ง€ํ„ธ ์ถœ๋ ฅํ•€์˜ ON/OFF ๋กœ ์ ‘์ ์„ ON/OFF ์‹œํ‚ต๋‹ˆ๋‹ค.

๋””์ง€ํ„ธ ์ž…๋ ฅ์€ ์™ธ๋ถ€ ๊ธฐ๊ธฐ์˜ ์ œ์–ด๋ฅผ ๋ชฉ์ ์œผ๋กœ ์™ธ๋ถ€ ๊ธฐ๊ธฐ์˜ ์ƒํ™ฉ์„ ์ธ์‹ํ•˜๊ธฐ์œ„ํ•ด ์‚ฌ์šฉํ•  ์ˆ˜ ์žˆ์Šต๋‹ˆ

๋‹ค. ์‚ฌ์šฉ์ž๋Š” [๊ทธ๋ฆผ 2-6]๊ณผ ๊ฐ™์ด TTL ์ถœ๋ ฅ์„ ์ง์ ‘ ์ฝ์„ ์ˆ˜ ์žˆ์œผ๋ฉฐ ์™ธ๋ถ€ ํšŒ๋กœ์˜ ์Šค์œ„์น˜์˜ ์ƒํƒœ๋„

์•Œ ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค.

๋””์ง€ํ„ธ ์ž…์ถœ๋ ฅ์˜ ์ œ์–ด๋Š” ์‚ฌ์šฉ์ž์˜ ํ”„๋กœ๊ทธ๋žจ์—์„œ ์›ํ•˜๋Š” ์‹œ๊ธฐ์— ์ฃผ๊ธฐ์ ์ด๋“  ๋น„์ฃผ๊ธฐ์ ์ด๋“  ๋””์ง€ํ„ธ

์ž…๋ ฅ์„ ์ฝ๊ฑฐ๋‚˜ ๋””์ง€ํ„ธ ์ถœ๋ ฅ์„ ๋‚ด๋ณด๋‚ผ ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค.

CHAPTER 2 DAS

16

2.1.3 ์—”์ฝ”๋” ์‹ ํ˜ธ ์—ฐ๊ฒฐ

์—”์ฝ”๋”์˜ ์—ฐ๊ฒฐ์€ ์—”์ฝ”๋”์˜ ์ข…๋ฅ˜์— ๋”ฐ๋ผ ์—ฐ๊ฒฐ๋ฒ•์ด ๋‹ฌ๋ผ์งˆ ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค. ๋”ฐ๋ผ์„œ ์—”์ฝ”๋”์˜ ์ž…๋ ฅ ์‹ 

ํ˜ธ๋ฅผ ์ง€์›ํ•˜๋Š” ใˆœ์ปค๋ฏธ์กฐ์•„ ๋ณด๋“œ์— ์—ฐ๊ฒฐํ•˜๋Š” ๋ฐฉ๋ฒ•์€ ์—ฌ๋Ÿฌ๋ถ„์ด ์‚ฌ์šฉํ•˜๊ณ ์ž ํ•˜๋Š” ์—”์ฝ”๋”์˜ ์ถœ๋ ฅ ํ˜•

ํƒœ์— ๋”ฐ๋ผ ๋‹ฌ๋ผ์ง‘๋‹ˆ๋‹ค. ์ด ์ ˆ์—์„œ๋Š” ใˆœ์ปค๋ฏธ์กฐ์•„์˜ ์—”์ฝ”๋”๋ฅผ ์ง€์›ํ•˜๋Š” COMI-SD501 ์„ ์ค‘์‹ฌ์œผ๋กœ

์„ค๋ช…ํ•˜๊ฒ ์Šต๋‹ˆ๋‹ค.

A์ƒ

B์ƒ

Z์ƒ

T

T/2 T/4

T/4 T/8

T T/2

CW (์‹œ๊ณ„๋ฐฉํ–ฅ)

[๊ทธ๋ฆผ 2-7] ์—”์ฝ”๋” ์ถœ๋ ฅํŒŒํ˜•

[๊ทธ๋ฆผ 2-7]์€ ์—”์ฝ”๋” ์ถœ๋ ฅ ํŒŒํ˜•์ž…๋‹ˆ๋‹ค. ์—”์ฝ”๋”์˜ A ์ƒ๊ณผ B ์ƒ์ด ์—”์ฝ”๋”๊ฐ€ ์‹œ๊ณ„๋ฐฉํ–ฅ์œผ๋กœ ํšŒ์ „ํ•˜

๋ฉด ๊ทธ๋ฆผ๊ณผ ๊ฐ™์ด ์ถœ๋ ฅ๋˜๊ณ  ์ด ๋•Œ ํ•œ ๋ฐ”ํ€ดํšŒ์ „ํ•˜๋ฉด Z ์ƒ์ด ์ถœ๋ ฅ๋ฉ๋‹ˆ๋‹ค. ์—”์ฝ”๋”์˜ ๋ถ„ํ•ด๋Šฅ์— ๋”ฐ๋ผ ์—”

์ฝ”๋” ํ•œ ๋ฐ”ํ€ด ํšŒ์ „ ๋‹น A ์ƒ์˜ ๊ฐœ์ˆ˜๊ฐ€ ๊ฒฐ์ •๋ฉ๋‹ˆ๋‹ค. ํ˜„์žฌ ์—”์ฝ”๋”์˜ ํšŒ์ „๋ฐฉํ–ฅ์„ ์—”์ฝ”๋” ์‹ ํ˜ธ๋ฅผ ์‚ฌ์šฉ

ํ•˜์—ฌ ๊ณ„์ธกํ•˜๊ณ ์ž ํ•  ๋•Œ๋Š” A ์ƒ๊ณผ B ์ƒ์˜ ์ˆœ์„œ์— ๋”ฐ๋ผ ์•Œ ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค. ใˆœ์ปค๋ฏธ์กฐ์•„์˜ ๋ณด๋“œ์—๋Š” Z

์ƒ์„ ๋ฐฉํ–ฅ์— ๋”ฐ๋ผ Up/Dn ์นด์šดํŠธ ํ•˜๋Š” ๊ธฐ๋Šฅ๋„ ์žˆ์Šต๋‹ˆ๋‹ค. ์—”์ฝ”๋”์˜ ์‹ ํ˜ธ๋Š” ๊ฐ๊ฐ ๊ทธ๋ฆผ์—์„œ ๋ณด์—ฌ์ง€

๋Š” ๋ฐ”์™€ ๊ฐ™์ด ์ฃผ๊ธฐ์— ๋”ฐ๋ฅธ ์˜ค์ฐจ๊ฐ€ ์žˆ์„ ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค. ์ •๋ฐ€ํ•œ ์ œ์–ด๋ฅผ ํ•˜๊ณ ์ž ํ•  ๊ฒฝ์šฐ์—๋Š” ์—”์ฝ”๋”

์˜ ๋ถ„ํ•ด๋Šฅ์„ ๋†’์ด๋Š” ๋ฐฉ๋ฒ•์œผ๋กœ ์ฑ„๋ฐฐํ•˜๋Š” ๊ฒฝ์šฐ๊ฐ€ ์žˆ์Šต๋‹ˆ๋‹ค. ์ด๋Ÿฌํ•œ ๊ฒฝ์šฐ์—๋Š” A,B ์ƒ์„ ์ด์šฉํ•˜์—ฌ

ํ˜„์žฌ์˜ ๋ถ„ํ•ด๋Šฅ์„ 2 ๋ฐฐ ์ด์ƒ์œผ๋กœ ๋†’์ผ ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค.

CHAPTER 2 DAS

17

Totem Pole

[๊ทธ๋ฆผ 2-8]์—์„œ ์œ„์ชฝ์˜ Q1 ํŠธ๋žœ์ง€์Šคํ„ฐ ๋Œ€์‹ ์— ์ €ํ•ญ์„ ์—ฐ๊ฒฐํ•˜๋ฉด ์ €ํ•ญ์˜ ํฌ๊ธฐ๋งŒํผ ์ง€์—ฐ์ด ๋˜๋ฉฐ ํŒŒ

์›Œ๊ฐ€ ๊ฐ์†Œ๋ฉ๋‹ˆ๋‹ค. ๋”ฐ๋ผ์„œ ํŠธ๋žœ์ง€์Šคํ„ฐ๋ฅผ ์ €ํ•ญ๋Œ€์‹ ์— Active Pull-up ๊ฐ™์ด ์‚ฌ์šฉํ•˜๋ฉด ์œ„์™€ ๊ฐ™์€ ๋ฌธ์ œ

๊ฐ€ ํ•ด๊ฒฐ๋˜๋Š”๋ฐ ์ด๋Ÿฌํ•œ ์ถœ๋ ฅํ˜•ํƒœ๋ฅผ ํ† ํ…œํด ์ถœ๋ ฅ์ด๋ผ ํ•ฉ๋‹ˆ๋‹ค. ํ† ํ…œํด์˜ ์žฅ์ ์€ ์ถœ๋ ฅ ์ž„ํ”ผ๋˜์Šค๊ฐ€

๋‚ฎ์œผ๋ฏ€๋กœ ๋…ธ์ด์ฆˆ์™€ ํŒŒํ˜•์˜ ์™œ๊ณก์ด ์ ์Šต๋‹ˆ๋‹ค.

๋™์ž‘์€ ์ถœ๋ ฅ์‹ ํ˜ธ๊ฐ€ High ์ผ ๋•Œ๋Š” Q1 ์ด ON, Q2 ๊ฐ€ OFF ๋œ ์ƒํƒœ์ด๋ฉฐ ์ถœ๋ ฅ์‹ ํ˜ธ๊ฐ€ Low ์ธ ๊ฒฝ์šฐ์—๋Š”

Q1 ์ด OFF ๋˜๊ณ  Q2 ๊ฐ€ ON ๋œ ๊ฒฝ์šฐ์ž…๋‹ˆ๋‹ค. ์‚ฌ์šฉ์ž๋Š” ์œ„์™€ ๊ฐ™์€ ํ˜•ํƒœ์˜ ์—”์ฝ”๋”๋ฅผ ์—ฐ๊ฒฐํ•˜์‹ค ๋•Œ๋Š”

ํ„ฐ๋ฏธ๋„ ๋ณด๋“œ์— A-,B-,Z-,P(5V),G(GND)๋ฅผ ๊ฐ๊ฐ์˜ ์—”์ฝ”๋” ์‹ ํ˜ธ์™€ ์—ฐ๊ฒฐํ•˜์‹œ๊ณ  A+,B+,Z+๋ฅผ P ์™€

์—ฐ๊ฒฐํ•˜์‹ญ์‹œ์˜ค.

[๊ทธ๋ฆผ 2-9]๋Š” ์—”์ฝ”๋”์˜ ์ถœ๋ ฅํ˜•ํƒœ๊ฐ€ ํ† ํ…œํด์ผ ๊ฒฝ์šฐ ์—ฐ๊ฒฐํ•˜๋Š” ๋ฐฉ๋ฒ•์ž…๋‹ˆ๋‹ค.

์—”์ฝ”๋”ํšŒ๋กœ

+V

Out

Gnd

Q1

Q2

[๊ทธ๋ฆผ 2-8] ์—”์ฝ”๋” Totem Pole ์ถœ๋ ฅํšŒ๋กœ

์—”์ฝ”๋”ํšŒ๋กœ

+V

A

Gnd

Q1

Q2

[๊ทธ๋ฆผ 2-9] COMI-SD501 ํšŒ๋กœ ์—ฐ๊ฒฐ๋„

[๊ทธ๋ฆผ 2-10] ์€ Totem Pole ์ถœ๋ ฅํ˜•ํƒœ์˜ ์—”์ฝ”๋”์™€ COMI-SD501 ์˜ ์—ฐ๊ฒฐ๋„ ์ž…๋‹ˆ๋‹ค.

Encoder In ch#N

B- B+ A- A+ Z- Z+ G P

B A Z

[๊ทธ๋ฆผ 2-10] SD501 ๊ณผ ์—”์ฝ”๋”์˜ ์—ฐ๊ฒฐ๋„ 1

CHAPTER 2 DAS

18

NPN Open Collector

[๊ทธ๋ฆผ 2-11] ๊ฐ™์ด ์ถœ๋ ฅ๋‹จ, ์ฆ‰ ํŠธ๋žœ์ง€์Šคํ„ฐ์˜ Collector ๋ฅผ ๊ฐœ๋ฐฉ ์‹œํ‚จ ํ˜•ํƒœ๋ฅผ Open Collector ์ถœ๋ ฅ

๋ฐฉ์‹ ์ด๋ผ ํ•ฉ๋‹ˆ๋‹ค. ์ด์™€ ๊ฐ™์€ ์ถœ๋ ฅ ํ˜•ํƒœ๋Š” ์„ผ์„œ๋ถ€์™€ ์ œ์–ด๋ถ€์˜ ์ „์••์ด ์ฐจ์ด๊ฐ€ ์žˆ์„ ๋•Œ ์ ์šฉํ•  ์ˆ˜

์žˆ์Šต๋‹ˆ๋‹ค.

์—”์ฝ”๋”

ํšŒ๋กœ

+V

A

Gnd

Q

[๊ทธ๋ฆผ 2-11] SD501 ํšŒ๋กœ ์—ฐ๊ฒฐ๋„

์ฃผ์˜ํ•  ์ ์€ [๊ทธ๋ฆผ 2-11]๊ณผ ๊ฐ™์ด ํ’€์—… ์ €ํ•ญ์ด ์—ฐ๊ฒฐ๋˜์–ด์•ผ ๋ฉ๋‹ˆ๋‹ค. ์‚ฌ์šฉ์ž๋Š” ์œ„์™€ ๊ฐ™์€ ํ˜•ํƒœ์˜

์—”์ฝ”๋”๋ฅผ SD501 ์— ์—ฐ๊ฒฐํ•˜์‹ค ๋•Œ๋Š” A-,B-,Z-,P(Vcc),G(GND)๋ฅผ ๊ฐ๊ฐ์˜ ์—”์ฝ”๋” ์‹ ํ˜ธ์™€ ์—ฐ๊ฒฐํ•˜์‹œ

๊ณ  A+,B+,Z+๋ฅผ 5V ์™€ ์—ฐ๊ฒฐํ•˜์‹ญ์‹œ์˜ค. [๊ทธ๋ฆผ 2-12]๋ฅผ ์ฐธ์กฐํ•˜์‹ญ์‹œ์˜ค.

Encoder In ch#N

B- B+ A- A+ Z- Z+ G P

B A Z

[๊ทธ๋ฆผ 2-12] SD501 ๊ณผ ์—”์ฝ”๋”์˜ ์—ฐ๊ฒฐ๋„ 2

CHAPTER 2 DAS

19

PNP Open Collector

[๊ทธ๋ฆผ 2-13]๊ณผ ๊ฐ™์ด ์ถœ๋ ฅ๋‹จ์˜ ํŠธ๋žœ์ง€์Šคํ„ฐ๊ฐ€ PNP ํ˜•์ธ ์ถœ๋ ฅ ํ˜•ํƒœ์ž…๋‹ˆ๋‹ค. ์‚ฌ์šฉ์ž๋Š” ์œ„์™€๊ฐ™์€ ํ˜•

ํƒœ์˜ ์—”์ฝ”๋”๋ฅผ COMI-SD501 ์— ์—ฐ๊ฒฐํ•˜์‹ค ๋•Œ๋Š” ํ„ฐ๋ฏธ๋„ ๋ณด๋“œ์— A+,B+,Z+,P(Vcc),G(GND)๋ฅผ ๊ฐ๊ฐ

์˜ ์—”์ฝ”๋” ์‹ ํ˜ธ์™€ ์—ฐ๊ฒฐํ•˜์‹œ๊ณ  A-,B-,Z-๋ฅผ G ์™€ ์—ฐ๊ฒฐํ•˜์‹ญ์‹œ์˜ค.

[๊ทธ๋ฆผ 2-14]๋ฅผ ์ฐธ์กฐํ•˜์‹ญ์‹œ์˜ค.

์—”์ฝ”๋”

ํšŒ๋กœ

+V

A

Gnd

Q

[๊ทธ๋ฆผ 2-13] SD501 ํšŒ๋กœ ์—ฐ๊ฒฐ๋„

Encoder In ch#N

B- B+ A- A+ Z- Z+ G P

ZB A

[๊ทธ๋ฆผ 2-14] SD501 ๊ณผ ์—”์ฝ”๋”์˜ ์—ฐ๊ฒฐ๋„ 3

CHAPTER 2 DAS

20

Line Drive

[๊ทธ๋ฆผ 2-15]์™€ ๊ฐ™์ด ์ด ํ˜•ํƒœ์˜ ์—”์ฝ”๋” ์ถœ๋ ฅ์€ ์ œ์–ด ์ถœ๋ ฅ ํšŒ๋กœ์— Line Drive ์šฉ IC ๋ฅผ ์‚ฌ์šฉํ•˜์—ฌ ๊ณ 

์†์˜ ์‘๋‹ตํŠน์„ฑ๊ณผ ์žฅ๊ฑฐ๋ฆฌ ์ „์†ก์ด ์šฉ์ดํ•ฉ๋‹ˆ๋‹ค. ์‚ฌ์šฉ์ž๋Š” ์œ„์™€ ๊ฐ™์€ ํ˜•ํƒœ์˜ ์—”์ฝ”๋”๋ฅผ SD501 ์— ์—ฐ

๊ฒฐํ•˜์‹ค ๋•Œ๋Š” ํ„ฐ๋ฏธ๋„ ๋ณด๋“œ์— A+,B+,Z+,A-,B-,Z-,P(5V),G(GND)๋ฅผ ๊ฐ๊ฐ์˜ ์—”์ฝ”๋” ์‹ ํ˜ธ์™€ ์—ฐ๊ฒฐํ•˜

์‹ญ์‹œ์˜ค.

[๊ทธ๋ฆผ 2-16]์„ ์ฐธ์กฐํ•˜์‹ญ์‹œ์˜ค.

์—”์ฝ”๋”

ํšŒ๋กœ

+V

A-

Gnd

A+

[๊ทธ๋ฆผ 2-15] SD501 ํšŒ๋กœ ์—ฐ๊ฒฐ๋„

Encoder In ch#N

B- B+ A- A+ Z- Z+ G P

Z+B+ A+ Z-B- A-

[๊ทธ๋ฆผ 2-16] SD501 ๊ณผ ์—”์ฝ”๋”์˜ ์—ฐ๊ฒฐ๋„ 4

CHAPTER 2 DAS

21

2.1.4 32Bit Counter ์‹ ํ˜ธ ์—ฐ๊ฒฐ

FPGA Counter ๋ฅผ ์‚ฌ์šฉํ•œ ์นด์šดํ„ฐ ์—ฐ๊ฒฐ๋ฒ• ์ž…๋‹ˆ๋‹ค. FPGA Chip ์—๋Š” 2 ๊ฐœ์˜ ์นด์šดํ„ฐ๊ฐ€ ์žˆ๊ณ  ๊ฐ ์นด์šด

ํ„ฐ์—๋Š” Gate, Clock ํฌํŠธ๊ฐ€ ์žˆ์Šต๋‹ˆ๋‹ค.

[๊ทธ๋ฆผ 2-17]์€ FPGA Counter ๋ฅผ ์‚ฌ์šฉํ•œ ์ผ๋ฐ˜์ ์ธ ์—ฐ๊ฒฐ ๋ฐฉ๋ฒ•์ž…๋‹ˆ๋‹ค.

COUNTER0

CLK0

GATE0

[๊ทธ๋ฆผ 2-17] 32bit ์นด์šดํ„ฐ ์—ฐ๊ฒฐ

Clock ์€ ์ตœ๋Œ€ 10MHz ์ด๋‚ด์ด์–ด์•ผ ๋˜๋ฉฐ, Gate ๋Š” HIGH ์ƒํƒœ์ด์–ด์•ผ ํ•ฉ๋‹ˆ๋‹ค.

CHAPTER 2 DAS

22

2.2 A/D ๋ณ€ํ™˜ ์ข…๋ฅ˜

๋ชจ๋“  ์•„๋‚ ๋กœ๊ทธ ์‹ ํ˜ธ๋ฅผ ์ปดํ“จํ„ฐ๋ฅผ ํ†ตํ•˜์—ฌ ๊ธฐ๋กํ•˜๊ฑฐ๋‚˜ ์—ฐ์‚ฐํ•ด์•ผ ํ•  ๊ฒฝ์šฐ Analog To Digital ๋ณ€ํ™˜์€

๋ฐ˜๋“œ์‹œ ํ•„์š”ํ•ฉ๋‹ˆ๋‹ค. ๋‹ค์Œ์€ ๊ธฐ๋ณธ์ ์ธ A/D ๋ณ€ํ™˜ ๋ฐฉ๋ฒ•์ž…๋‹ˆ๋‹ค..

Simultaneous A/D Converter (Flash Conversion)

๋ณ‘๋ ฌ๋กœ ์—ฐ๊ฒฐ๋œ Differential Comparator ๊ฐ€ ๊ธฐ์ค€ ์ „์••๊ณผ ์•„๋‚ ๋กœ๊ทธ ์‹ ํ˜ธ๋ฅผ ๋น„๊ตํ•˜๋Š” ๋ฐฉ๋ฒ•์ž…๋‹ˆ๋‹ค.

๋น„๊ตํ•œ ๊ฒฐ๊ณผ๋ฅผ Encoder ์— ์—ฐ๊ฒฐํ•˜์—ฌ ์›ํ•˜๋Š” Binary ์ถœ๋ ฅ์„ ์–ป์Šต๋‹ˆ๋‹ค. ์ด ๋ฐฉ๋ฒ•์˜ ์žฅ์ ์€ ๋น ๋ฅธ ์†

๋„์— ์žˆ๊ณ  ๋‹จ์ ์€ Comparator ๊ฐ€ ๋งŽ์ด ํ•„์š”ํ•ฉ๋‹ˆ๋‹ค.

Stair step-ramp A/D Converter (Digital Ramp or Counter)

์ด ๋ฐฉ๋ฒ•์€ Digital Ramp ๋˜๋Š” Counter ๋ฐฉ๋ฒ•์œผ๋กœ ์•Œ๋ ค์ ธ ์žˆ์œผ๋ฉฐ D/A Converter ์™€ Binary Counter

๊ฐ€ ๋‚ด์žฅ๋˜์–ด ์žˆ์Šต๋‹ˆ๋‹ค. ์นด์šดํ„ฐ๊ฐ€ ์ˆœ์ฐจ์ ์œผ๋กœ ์ฆ๊ฐ€๋˜๋ฉด D/A Converter ์˜ ์ถœ๋ ฅ์ด ์ฆ๊ฐ€๋˜๊ฒŒ ํšŒ๋กœ

๋ฅผ ๊ตฌ์„ฑํ•˜๊ณ  ์ด๋ฅผ Comparator ์— ์•„๋‚ ๋กœ๊ทธ ์ž…๋ ฅ์‹ ํ˜ธ์™€ ์—ฐ๊ฒฐํ•˜์—ฌ ๋น„๊ตํ•ฉ๋‹ˆ๋‹ค. ์ด๋ฅผ ๋ฐ˜๋ณตํ•˜์—ฌ ์›ํ•˜

๋Š” A/D ๋ณ€ํ™˜์„ ์ˆ˜ํ–‰ํ•ฉ๋‹ˆ๋‹ค. ์ด ๋ฐฉ๋ฒ•์€ Simultaneous ๋ฐฉ๋ฒ•๋ณด๋‹ค ๋Š๋ฆฌ๊ณ  ์ตœ์•…์˜ ๊ฒฝ์šฐ ์ž…๋ ฅ ์‹ ํ˜ธ๊ฐ€

์ตœ๋Œ€์ผ ๋•Œ ๊ฐ€์žฅ ๋Š๋ฆฝ๋‹ˆ๋‹ค.

Tracking A/D Converter (Up/Down Counter)

์ด ๋ฐฉ๋ฒ•์€ Stair step-ramp ๋ฐฉ๋ฒ•๊ณผ ๊ฑฐ์˜ ๋™์ผ ํ•˜๋‚˜ ์•Œ๊ณ ๋ฆฌ์ฆ˜์˜ ๋ฐœ๋‹ฌ๋กœ ์†๋„๊ฐ€ ๋”์šฑ ๋น ๋ฆ…๋‹ˆ๋‹ค. ์ด

์ „ ์•„๋‚ ๋กœ๊ทธ ์ž…๋ ฅ์„ ๋ณ€ํ™˜ํ•œ ๊ฐ’์„ Latch ์— ์ €์žฅํ•˜์—ฌ ์ด ๊ฐ’์„ ์‹œ์ž‘์œผ๋กœ Binary Counter ๊ฐ€ ๋™์ž‘๋˜

์–ด ์‹œ๊ฐ„์„ ๋‹จ์ถ•ํ•ฉ๋‹ˆ๋‹ค. ๊ทธ๋Ÿฌ๋‚˜ ์•„๋‚ ๋กœ๊ทธ ์ž…๋ ฅ์‹ ํ˜ธ๊ฐ€ ๋ถˆ์•ˆ์ •ํ•˜๋ฉด Comparator ๊ฐ€ ์ฆ๊ฐ€,๊ฐ์†Œ๋ฅผ ๋ฐ˜

๋ณตํ•˜๋Š” ๊ฒƒ์ด ๋‹จ์ ์ž…๋‹ˆ๋‹ค.

Single-Slope A/D Converter

์ผ๋ฐ˜์ ์ธ Voltmeter ์— ๋งŽ์ด ์“ฐ์ด๋Š” ๋ฐฉ๋ฒ•์œผ๋กœ ์œ„์˜ ๋‘ ๊ฐ€์ง€ ๋ฐฉ๋ฒ•๊ณผ๋Š” ๋‹ค๋ฅด๊ฒŒ D/A Converter ๋ฅผ ์‚ฌ

์šฉํ•˜์ง€ ์•Š๊ณ  Linear Ramp Generator ๋ฅผ ์‚ฌ์šฉํ•ฉ๋‹ˆ๋‹ค.

์ด๊ฒƒ์€ Comparator ์— ์—ฐ๊ฒฐ๋˜๋Š” ๊ธฐ์ค€ ์ „์••์„ ์ผ์ • ๊ธฐ์šธ๊ธฐ๋กœ ์ฆ๊ฐ€์‹œ์ผœ ์™ธ๋ถ€์˜ ์•„๋‚ ๋กœ๊ทธ ์ž…๋ ฅ์‹ ํ˜ธ

์™€ ์ˆœ์ฐจ์ ์œผ๋กœ ๋น„๊ตํ•ฉ๋‹ˆ๋‹ค.

Dual-Slope A/D Converter

์ด ๋ฐฉ๋ฒ•๋„ ์ผ๋ฐ˜์ ์ธ Voltmeter ๋‚˜ ๊ณ„์ธก๊ธฐ๊ธฐ์— ์‚ฌ์šฉํ•˜๋Š” ๋ฐฉ๋ฒ•์œผ๋กœ Single-slope ์™€ ๊ฑฐ์˜ ๋น„์Šทํ•˜๋‚˜

Ramp Generator ์˜ ์ „์•• ๋ณ€ํ™”์˜ ๊ธฐ์šธ๊ธฐ๋ฅผ ๋ฐ”๊ฟ” ์†๋„๋ฅผ ํ–ฅ์ƒ์‹œ์ผฐ์Šต๋‹ˆ๋‹ค.

Successive-Approximation A/D Converter

์ด ๋ฐฉ๋ฒ•์€ ๊ฐ€์žฅ ๋„๋ฆฌ ์“ฐ์ด๋Š” A/D ๋ณ€ํ™˜ ๋ฐฉ๋ฒ•์œผ๋กœ LX ์‹œ๋ฆฌ์ฆˆ์—์„œ๋„ ์ด ๋ฐฉ๋ฒ•์„ ์‚ฌ์šฉํ•˜๋Š” ์นฉ์ด ์žฅ์ฐฉ

๋˜์–ด ์žˆ์Šต๋‹ˆ๋‹ค. ์ด ๋ฐฉ๋ฒ•์€ ์–ด๋–ค ์•„๋‚ ๋กœ๊ทธ ์ž…๋ ฅ์‹ ํ˜ธ์— ๋”ฐ๋ผ์„œ๋„ A/D ๋ณ€ํ™˜ ์†๋„๊ฐ€ ์ผ์ •ํ•˜๋ฉฐ ์œ„์—

์†Œ๊ฐœ๋œ ๋ฐฉ๋ฒ• ์ค‘ ์ œ์ผ ๋น ๋ฆ…๋‹ˆ๋‹ค.

์ด ๋ฐฉ๋ฒ•์€ D/A Converter, SAR(Successive Approximation Register), Comparator ๋ฅผ ์‚ฌ์šฉํ•ฉ๋‹ˆ๋‹ค.

๋™์ž‘๋ฐฉ๋ฒ•์€ MSB(Most Significant bit)๋ถ€ํ„ฐ LSB(Least Significant bit)๊นŒ์ง€ ์ˆœ์ฐจ์ ์œผ๋กœ D/A ๋ฅผ ๊ตฌ

๋™ ์‹œ์ผœ ์•„๋‚ ๋กœ๊ทธ ์ž…๋ ฅ์‹ ํ˜ธ์™€ ๋น„๊ตํ•ฉ๋‹ˆ๋‹ค.

CHAPTER 2 DAS

23

๊ธฐํƒ€ ํŠน์ˆ˜ ์šฉ๋„์˜ A/D Converter

์œ„์— ์†Œ๊ฐœ๋œ ๋ฐฉ๋ฒ• ์™ธ์— ๋‹ค๋ฅธ ๋ฐฉ๋ฒ•๋„ ์žˆ์„ ์ˆ˜ ์žˆ์œผ๋ฉฐ ํŠน์ˆ˜ ์šฉ๋„์— ์‚ฌ์šฉํ•˜๊ธฐ์œ„ํ•ด ์ œ์ž‘ํ•ฉ๋‹ˆ๋‹ค.

D/A CONVERTER

SA REGISTERD

C

ParallelOutput

SerialOutputCLK

AnalogInput

-

+

COMPARATOR

Vout

MSB LSB

[๊ทธ๋ฆผ 2-18]Successive-Approximation A/D

Appendix A. A/D, D/A Gain ๋ฐ Offset ์กฐ์ •๋ฐฉ๋ฒ•

24

Appendix A A/D, D/A Gain ๋ฐ Offset ์กฐ์ •๋ฐฉ๋ฒ•

ใˆœ์ปค๋ฏธ์กฐ์•„์˜ CP/SD Series ๋ณด๋“œ ์ค‘ ์ผ๋ถ€๋Š” A/D, D/A Gain ๋ฐ Offset ๊ฐ’์„ ํ•˜๋“œ์›จ์–ด ์ ์œผ๋กœ ์กฐ

์ • ๊ฐ€๋Šฅํ•ฉ๋‹ˆ๋‹ค. ๋ณธ ์žฅ์—์„œ๋Š” ํ•ด๋‹น ๋ณด๋“œ์˜ A/D, D/A Gain ๋ฐ Offset ์กฐ์ • ๋ฐฉ๋ฒ•์„ ์„ค๋ช…ํ•ฉ๋‹ˆ๋‹ค.

A.1 ๊ฐ ๋ณด๋“œ ๋ณ„ ๊ฐ€๋ณ€์ €ํ•ญ์˜ ์œ„์น˜ ๋ฐ ๊ธฐ๋Šฅ

COMI-SD101/103

COMI-SD101/103 Board ์—๋Š” ์•„๋‚ ๋กœ๊ทธ ์ž…๋ ฅ ์ฑ„๋„์˜ Offset ๊ณผ Gain ์„ ์กฐ์ •ํ•  ์ˆ˜ ์žˆ๋Š” 4 ๊ฐœ์˜ ๊ฐ€

๋ณ€์ €ํ•ญ ( VR1, VR2, VR3, VR4 ) ๊ณผ, ์•„๋‚ ๋กœ๊ทธ ์ถœ๋ ฅ ์ฑ„๋„์˜ Offset ๊ณผ Gain ์„ ์กฐ์ •ํ•  ์ˆ˜ ์žˆ๋Š” 4 ๊ฐœ

์˜ ๊ฐ€๋ณ€์ €ํ•ญ ( VR5, VR6, VR7, VR8 )์ด ์žˆ์Šต๋‹ˆ๋‹ค.

๊ฐ Calibration ์šฉ ๊ฐ€๋ณ€์ €ํ•ญ์˜ ์œ„์น˜๋Š” ์•„๋ž˜ ๊ทธ๋ฆผ๊ณผ ๊ฐ™์Šต๋‹ˆ๋‹ค.

VR5 VR6 VR7 VR8

Single Eeded

Differential

TP1PGA

OFFSET

TP2AGNDVR1 VR2 VR3 VR4

[๊ทธ๋ฆผ A-1] COMI-SD101/103 Calibration ์šฉ ๊ฐ€๋ณ€์ €ํ•ญ์˜ ์œ„์น˜

Appendix A. A/D, D/A Gain ๋ฐ Offset ์กฐ์ •๋ฐฉ๋ฒ•

25

๊ทธ๋ฆฌ๊ณ  ๊ฐ Calibration ์šฉ ๊ฐ€๋ณ€์ €ํ•ญ์˜ ๊ธฐ๋Šฅ์€ ์•„๋ž˜์˜ [ํ‘œ A-1]์— ๋‚˜ํƒ€๋‚ด์—ˆ์Šต๋‹ˆ๋‹ค.

๋ฒˆ ํ˜ธ ๊ฐ€๋ณ€ ์ €ํ•ญ๊ธฐ ๊ธฐ ๋Šฅ ์šฉ ๋„

1

2

3

4

VR1

VR2

VR3

VR4

A/D PGA Offset์กฐ์ •

A/D Bipolar Offset์กฐ์ •

A/D Bipolar Gain์กฐ์ •

A/D Unipolar Offset์กฐ์ •

A/D

์กฐ์ •์šฉ

4

5

6

7

VR5

VR6

VR7

VR8

D/A0 offset์กฐ์ •

D/A0 Gain ์กฐ์ •

D/A1 Offset์กฐ์ •

D/A1 Gain ์กฐ์ •

D/A

์กฐ์ •์šฉ

[ํ‘œ A-1] COMI-SD101/103 Calibration ์šฉ ๊ฐ€๋ณ€์ €ํ•ญ์˜ ๊ธฐ๋Šฅ

Appendix A. A/D, D/A Gain ๋ฐ Offset ์กฐ์ •๋ฐฉ๋ฒ•

26

COMI-CP101

COMI-CP101 Board ์—๋Š” ์•„๋‚ ๋กœ๊ทธ ์ž…๋ ฅ ์ฑ„๋„์˜ Offset ๊ณผ Gain ์„ ์กฐ์ •ํ•  ์ˆ˜ ์žˆ๋Š” 2 ๊ฐœ์˜ ๊ฐ€๋ณ€์ €

ํ•ญ ( VR1, VR2 ) ๊ณผ, ์•„๋‚ ๋กœ๊ทธ ์ถœ๋ ฅ ์ฑ„๋„์˜ Offset ๊ณผ Gain ์„ ์กฐ์ •ํ•  ์ˆ˜ ์žˆ๋Š” 2 ๊ฐœ์˜ ๊ฐ€๋ณ€์ €ํ•ญ

( VR3, VR4 )์ด ์žˆ์Šต๋‹ˆ๋‹ค.

๊ฐ Calibration ์šฉ ๊ฐ€๋ณ€์ €ํ•ญ์˜ ์œ„์น˜๋Š” ์•„๋ž˜ ๊ทธ๋ฆผ๊ณผ ๊ฐ™์Šต๋‹ˆ๋‹ค.

VR1 VR2 VR3 VR4

[๊ทธ๋ฆผ A-2] COMI-CP101 Calibration ์šฉ ๊ฐ€๋ณ€์ €ํ•ญ์˜ ์œ„์น˜

๊ทธ๋ฆฌ๊ณ  ๊ฐ Calibration ์šฉ ๊ฐ€๋ณ€์ €ํ•ญ์˜ ๊ธฐ๋Šฅ์€ ์•„๋ž˜์˜ [ํ‘œ A-2]์— ๋‚˜ํƒ€๋‚ด์—ˆ์Šต๋‹ˆ๋‹ค.

๋ฒˆ ํ˜ธ ๊ฐ€๋ณ€ ์ €ํ•ญ๊ธฐ ๊ธฐ ๋Šฅ ์šฉ ๋„

1

2

VR1

VR2

A/D Bipolar offset์กฐ์ •

A/D Bipolar Gain์กฐ์ •

A/D

์กฐ์ •์šฉ

3

4

VR3

VR4

D/A Gain ์กฐ์ •

D/A Offset์กฐ์ •

D/A

์กฐ์ •์šฉ

[ํ‘œ A-2] COMI-CP101 Calibration ์šฉ ๊ฐ€๋ณ€์ €ํ•ญ์˜ ๊ธฐ๋Šฅ

Appendix A. A/D, D/A Gain ๋ฐ Offset ์กฐ์ •๋ฐฉ๋ฒ•

27

COMI-SD201

COMI-SD201 Board ์—๋Š” ์•„๋‚ ๋กœ๊ทธ ์ž…๋ ฅ ์ฑ„๋„์˜ Offset ๊ณผ Gain ์„ ์กฐ์ •ํ•  ์ˆ˜ ์žˆ๋Š” 4 ๊ฐœ์˜ ๊ฐ€๋ณ€์ €

ํ•ญ ( VR1, VR2, VR3, VR4 ) ์ด ์žˆ์Šต๋‹ˆ๋‹ค.

๊ฐ Calibration ์šฉ ๊ฐ€๋ณ€์ €ํ•ญ์˜ ์œ„์น˜๋Š” ์•„๋ž˜ ๊ทธ๋ฆผ๊ณผ ๊ฐ™์Šต๋‹ˆ๋‹ค.

VR1 VR2 VR3 VR4

Single Eeded

Differential TP1PGA

OFFSET

TP2AGND

[๊ทธ๋ฆผ A-3] COMI-SD201 Calibration ์šฉ ๊ฐ€๋ณ€์ €ํ•ญ์˜ ์œ„์น˜

๋ฒˆ ํ˜ธ ๊ฐ€๋ณ€ ์ €ํ•ญ๊ธฐ ๊ธฐ ๋Šฅ ์šฉ ๋„

1

2

3

4

VR1

VR2

VR3

VR4

A/D PGA offset์กฐ์ •

A/D Bipolar offset์กฐ์ •

A/D Bipolar Gain์กฐ์ •

A/D Unipolar offset์กฐ์ •

A/D

์กฐ์ •์šฉ

[ํ‘œ A-3] COMI-SD201 Calibration ์šฉ ๊ฐ€๋ณ€์ €ํ•ญ์˜ ๊ธฐ๋Šฅ

Appendix A. A/D, D/A Gain ๋ฐ Offset ์กฐ์ •๋ฐฉ๋ฒ•

28

COMI-CP201

COMI-CP201 Board ์—๋Š” ์•„๋‚ ๋กœ๊ทธ ์ž…๋ ฅ ์ฑ„๋„์˜ Offset ๊ณผ Gain ์„ ์กฐ์ •ํ•  ์ˆ˜ ์žˆ๋Š” 2 ๊ฐœ์˜ ๊ฐ€๋ณ€์ €

ํ•ญ ( VR1, VR2 ) ์ด ์žˆ์Šต๋‹ˆ๋‹ค.

๊ฐ Calibration ์šฉ ๊ฐ€๋ณ€์ €ํ•ญ์˜ ์œ„์น˜๋Š” ์•„๋ž˜ ๊ทธ๋ฆผ๊ณผ ๊ฐ™์Šต๋‹ˆ๋‹ค.

VR1 VR2

[๊ทธ๋ฆผ A-4] COMI-CP201 Calibration ์šฉ ๊ฐ€๋ณ€์ €ํ•ญ์˜ ์œ„์น˜

๋ฒˆ ํ˜ธ ๊ฐ€๋ณ€ ์ €ํ•ญ๊ธฐ ๊ธฐ ๋Šฅ ์šฉ ๋„

1

2

VR1

VR2

A/D Bipolar offset์กฐ์ •

A/D Bipolar Gain์กฐ์ •

A/D

์กฐ์ •์šฉ

[ํ‘œ A-4] COMI-CP201 Calibration ์šฉ ๊ฐ€๋ณ€์ €ํ•ญ์˜ ๊ธฐ๋Šฅ

Appendix A. A/D, D/A Gain ๋ฐ Offset ์กฐ์ •๋ฐฉ๋ฒ•

29

COMI-CP301

COMI-CP301 Board ์—๋Š” ์•„๋‚ ๋กœ๊ทธ ์ถœ๋ ฅ 6 ์ฑ„๋„์˜ Offset ๊ณผ Gain ์„ ์กฐ์ •ํ•  ์ˆ˜ ์žˆ๋Š” 12 ๊ฐœ์˜ ๊ฐ€

๋ณ€์ €ํ•ญ ( VR1 ~ VR12 ) ์ด ์žˆ์Šต๋‹ˆ๋‹ค.

๊ฐ Calibration ์šฉ ๊ฐ€๋ณ€์ €ํ•ญ์˜ ์œ„์น˜๋Š” ์•„๋ž˜ ๊ทธ๋ฆผ๊ณผ ๊ฐ™์Šต๋‹ˆ๋‹ค.

VR1 VR2 VR3 VR4 VR5 VR6 VR7 VR8 VR9VR10

VR11VR12

[๊ทธ๋ฆผ A-5] COMI-CP301 Calibration ์šฉ ๊ฐ€๋ณ€์ €ํ•ญ์˜ ์œ„์น˜

๋ฒˆ ํ˜ธ ๊ฐ€๋ณ€ ์ €ํ•ญ๊ธฐ ๊ธฐ ๋Šฅ ์šฉ ๋„

1

2

VR1

VR2

D/A 0 ch Gain ์กฐ์ •

D/A 0 ch Offset์กฐ์ •

D/A

์กฐ์ •์šฉ

3

4

VR3

VR4

D/A 1 ch Gain ์กฐ์ •

D/A 1 ch Offset์กฐ์ •

D/A

์กฐ์ •์šฉ

5

6

VR5

VR6

D/A 2 ch Gain ์กฐ์ •

D/A 2 ch Offset์กฐ์ •

D/A

์กฐ์ •์šฉ

7

8

VR7

VR8

D/A 3 ch Gain ์กฐ์ •

D/A 3 ch Offset์กฐ์ •

D/A

์กฐ์ •์šฉ

9

10

VR9

VR10

D/A 4 ch Gain ์กฐ์ •

D/A 4 ch Offset์กฐ์ •

D/A

์กฐ์ •์šฉ

11

12

VR11

VR12

D/A 5 ch Gain ์กฐ์ •

D/A 5 ch Offset์กฐ์ •

D/A

์กฐ์ •์šฉ

[ํ‘œ A-5] COMI-CP301 Calibration ์šฉ ๊ฐ€๋ณ€์ €ํ•ญ์˜ ๊ธฐ๋Šฅ

Appendix A. A/D, D/A Gain ๋ฐ Offset ์กฐ์ •๋ฐฉ๋ฒ•

30

A.2 A/D Converter ์˜ Offset ๋ฐ Gain ์กฐ์ •

COMI-SD Series Board ์—๋Š” A/D ๋ณ€ํ™˜ ์‹œ ์„ ํƒํ•  ์ˆ˜ ์žˆ๋Š” ์ž…๋ ฅ ์ „์•• ๋ฒ”์œ„๋Š” ยฑ10V, ยฑ5V, ยฑ2V,

ยฑ1V, 0~10V, 0~5V, 0~2V, 0~1V ์ค‘ ํ•˜๋‚˜์ž…๋‹ˆ๋‹ค.

Offset, Gain ์กฐ์ • ์ž‘์—…์€ ๋‹ค์Œ ํ‘œ๋ฅผ ์‚ฌ์šฉํ•˜์—ฌ ์กฐ์ •ํ•ฉ๋‹ˆ๋‹ค.

์ „์••๋ฒ”์œ„

( FSR )

000 ์—์„œ 001 ๋กœ ์ฒœ์ด

( -FSR + 1/2LSB )

FFEh ์—์„œ FFFh ๋กœ ์ฒœ์ด

( FSR + 3/2LSB )

1 LSB ๊ฐ’

ยฑ10V

-9.9976 V

+9.9927 V

4.88MV

[ํ‘œ A-6] ๊ฐ ์ „์•• ๋ฒ”์œ„์—์„œ์˜ A/D ์ฒœ์ด ์ฝ”๋“œํ‘œ

โ–ถ FSR : Full Scale Range

โ–ถ LSB : Least Significant Bit

Appendix A. A/D, D/A Gain ๋ฐ Offset ์กฐ์ •๋ฐฉ๋ฒ•

31

A.2.1 Offset ์กฐ์ •

1) COMI-SD101/103 Offset ์กฐ์ •

PGA Offset ์กฐ์ •๋ฐฉ๋ฒ• :

ยฑ10V ์ „์••๋ฒ”์œ„๋กœ ์„ ํƒํ•˜๊ณ  A/D 0Channel ์— AGND ๋ฅผ ์—ฐ๊ฒฐํ•ฉ๋‹ˆ๋‹ค.

TP1 ๊ณผ TP2 ์˜ ์ „์••์ฐจ๋ฅผ ์ฒดํฌํ•˜์—ฌ 0.000V ๊ฐ€ ๋˜๋„๋ก VR ์„ ์กฐ์ •ํ•ฉ๋‹ˆ๋‹ค.

Bipolar Offset ์กฐ์ •๋ฐฉ๋ฒ• :

ยฑ10V ์ „์••๋ฒ”์œ„๋กœ ์„ ํƒํ•˜๊ณ  A/D 0Channel ์— AGND ๋ฅผ ์—ฐ๊ฒฐํ•ฉ๋‹ˆ๋‹ค.

VR ์„ ์กฐ์ •ํ•˜์—ฌ ์ž…๋ ฅ ์ฝ”๋“œ๊ฐ€ 2047~2048( 0V )๋กœ ์ฒœ์ดํ•˜๋„๋ก ํ•ฉ๋‹ˆ๋‹ค.

ํ†ต๊ณ„์ ์œผ๋กœ ์ด๊ฒƒ์€ ์ผ์ •ํ•œ ์‹œ๊ฐ„ ๋™์•ˆ 2047~2048( 0V )์ด ๊ฐ๊ฐ 50%๊ฐ€ ๋‚˜ํƒ€๋‚˜๋„๋ก ํ•˜๋Š” ๊ฒƒ์ž…๋‹ˆ๋‹ค.

Unipolar Offset ์กฐ์ •๋ฐฉ๋ฒ• :

Bipolar ๋ฅผ ์กฐ์ •ํ•œ ํ›„ Unipolar ๋ฅผ ์กฐ์ •ํ•˜์„ธ์š”.

0~10V ์ „์••๋ฒ”์œ„๋กœ ์„ ํƒํ•˜๊ณ  A/D 0Channel ์— AGND ๋ฅผ ์—ฐ๊ฒฐํ•ฉ๋‹ˆ๋‹ค.

VR ์„ ์กฐ์ •ํ•˜์—ฌ ์ž…๋ ฅ ์ฝ”๋“œ๊ฐ€ 000~001h( 0V )๋กœ ์ฒœ์ดํ•˜๋„๋ก ํ•ฉ๋‹ˆ๋‹ค.

ํ†ต๊ณ„์ ์œผ๋กœ ์ด๊ฒƒ์€ ์ผ์ •ํ•œ ์‹œ๊ฐ„ ๋™์•ˆ 000~001h( 0V )์ด ๊ฐ๊ฐ 50%๊ฐ€ ๋‚˜ํƒ€๋‚˜๋„๋ก ํ•˜๋Š” ๊ฒƒ์ž…๋‹ˆ๋‹ค.

Appendix A. A/D, D/A Gain ๋ฐ Offset ์กฐ์ •๋ฐฉ๋ฒ•

32

2) COMI-SD201 Offset ์กฐ์ •

PGA Offset ์กฐ์ •๋ฐฉ๋ฒ• :

ยฑ10V ์ „์••๋ฒ”์œ„๋กœ ์„ ํƒํ•˜๊ณ  A/D 0Channel ์— AGND ๋ฅผ ์—ฐ๊ฒฐํ•ฉ๋‹ˆ๋‹ค.

TP1 ๊ณผ TP2 ์˜ ์ „์••์ฐจ๋ฅผ ์ฒดํฌํ•˜์—ฌ 0.000V ๊ฐ€ ๋˜๋„๋ก VR ์„ ์กฐ์ •ํ•ฉ๋‹ˆ๋‹ค.

Bipolar Offset ์กฐ์ •๋ฐฉ๋ฒ• :

ยฑ10V ์ „์••๋ฒ”์œ„๋กœ ์„ ํƒํ•˜๊ณ  A/D 0Channel ์— AGND ๋ฅผ ์—ฐ๊ฒฐํ•ฉ๋‹ˆ๋‹ค.

VR ์„ ์กฐ์ •ํ•˜์—ฌ ์ž…๋ ฅ ์ฝ”๋“œ๊ฐ€ 0000h~0001h( 0V )๋กœ ์ฒœ์ดํ•˜๋„๋ก ํ•ฉ๋‹ˆ๋‹ค.

ํ†ต๊ณ„์ ์œผ๋กœ ์ด๊ฒƒ์€ ์ผ์ •ํ•œ ์‹œ๊ฐ„ ๋™์•ˆ 0000h~0001h ( 0V )์ด ๊ฐ๊ฐ 50%๊ฐ€ ๋‚˜ํƒ€๋‚˜๋„๋ก ํ•˜๋Š” ๊ฒƒ์ž…

๋‹ˆ๋‹ค.

Unipolar Offset ์กฐ์ •๋ฐฉ๋ฒ• :

Bipolar ๋ฅผ ์กฐ์ •ํ•œ ํ›„ Unipolar ๋ฅผ ์กฐ์ •ํ•˜์„ธ์š”.

0~10V ์ „์••๋ฒ”์œ„๋กœ ์„ ํƒํ•˜๊ณ  A/D 0Channel ์— AGND ๋ฅผ ์—ฐ๊ฒฐํ•ฉ๋‹ˆ๋‹ค.

VR ์„ ์กฐ์ •ํ•˜์—ฌ ์ž…๋ ฅ ์ฝ”๋“œ๊ฐ€ -32768~-32767( 0V )๋กœ ์ฒœ์ดํ•˜๋„๋ก ํ•ฉ๋‹ˆ๋‹ค.

ํ†ต๊ณ„์ ์œผ๋กœ ์ด๊ฒƒ์€ ์ผ์ •ํ•œ ์‹œ๊ฐ„ ๋™์•ˆ -32768~-32767( 0V )์ด ๊ฐ๊ฐ 50%๊ฐ€ ๋‚˜ํƒ€๋‚˜๋„๋ก ํ•˜๋Š” ๊ฒƒ

์ž…๋‹ˆ๋‹ค.

Appendix A. A/D, D/A Gain ๋ฐ Offset ์กฐ์ •๋ฐฉ๋ฒ•

33

A.2.2 Gain ์กฐ์ •

1) COMI-SD101/103 Gain ์กฐ์ •

Bipolar Gain ์กฐ์ •๋ฐฉ๋ฒ• :

ยฑ10V ์ „์••๋ฒ”์œ„๋กœ ์„ ํƒํ•˜๊ณ  A/D 0Channel ์— 10.000V ๋ฅผ ์—ฐ๊ฒฐํ•ฉ๋‹ˆ๋‹ค.

VR ์„ ์กฐ์ •ํ•˜์—ฌ ์ž…๋ ฅ ์ฝ”๋“œ๊ฐ€ 4094~4095( 10V )๋กœ ์ฒœ์ดํ•˜๋„๋ก ํ•ฉ๋‹ˆ๋‹ค.

ํ†ต๊ณ„์ ์œผ๋กœ ์ด๊ฒƒ์€ ์ผ์ •ํ•œ ์‹œ๊ฐ„ ๋™์•ˆ 4094~4095( 10V )์ด ๊ฐ๊ฐ 50%๊ฐ€ ๋‚˜ํƒ€๋‚˜๋„๋ก ํ•˜๋Š” ๊ฒƒ์ž…๋‹ˆ

๋‹ค.

2) COMI-SD201 Gain ์กฐ์ •

Bipolar Gain ์กฐ์ •๋ฐฉ๋ฒ• :

ยฑ10V ์ „์••๋ฒ”์œ„๋กœ ์„ ํƒํ•˜๊ณ  A/D 0Channel ์— 10.000V ๋ฅผ ์—ฐ๊ฒฐํ•ฉ๋‹ˆ๋‹ค.

VR ์„ ์กฐ์ •ํ•˜์—ฌ ์ž…๋ ฅ ์ฝ”๋“œ๊ฐ€ 32766~32767( 10V )๋กœ ์ฒœ์ดํ•˜๋„๋ก ํ•ฉ๋‹ˆ๋‹ค.

ํ†ต๊ณ„์ ์œผ๋กœ ์ด๊ฒƒ์€ ์ผ์ •ํ•œ ์‹œ๊ฐ„ ๋™์•ˆ 32766~32767( 10V )์ด ๊ฐ๊ฐ 50%๊ฐ€ ๋‚˜ํƒ€๋‚˜๋„๋ก ํ•˜๋Š” ๊ฒƒ์ž…

๋‹ˆ๋‹ค.

A.3 D/A Converter ์˜ Offset ๋ฐ Gain ์กฐ์ •

D/A ์ถœ๋ ฅ์ „์•• ๋ฒ”์œ„๋Š” Bipolar ยฑ10V ์ž…๋‹ˆ๋‹ค.

์•„๋‚ ๋กœ๊ทธ ์ถœ๋ ฅ์— ๋Œ€ํ•ด Offset ๊ณผ Gain ์„ ์กฐ์ •ํ•  ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค.

A.3.1 Offset ์กฐ์ •

์ฝ”๋“œ 000h (Hex)๋ฅผ ์ถœ๋ ฅ์‹œํ‚ค๊ณ  ์ถœ๋ ฅ ์ „์••์ด โ€“10.000V ๊ฐ€ ๋˜๋„๋ก VR ์„ ์กฐ์ •ํ•ฉ๋‹ˆ๋‹ค. ๋‹ค์‹œ ๋งํ•˜๋ฉด

ํ•ด๋‹น ์•„๋‚ ๋กœ๊ทธ ์ถœ๋ ฅ์ฑ„๋„์˜ ์ „์••์„ โ€“10.000V ๋กœ ์„ค์ •ํ•˜๊ณ  VR ์„ ์กฐ์ •ํ•˜์—ฌ ์‹ค์ œ ์ถœ๋ ฅ์ด โ€“10.000V

๊ฐ€ ๋˜๋„๋ก ํ•ฉ๋‹ˆ๋‹ค.

A.3.2 Gain ์กฐ์ •

์ฝ”๋“œ FFFh (Hex)๋ฅผ ์ถœ๋ ฅ์‹œํ‚ค๊ณ  ์ถœ๋ ฅ ์ „์••์ด +10.000V ๊ฐ€ ๋˜๋„๋ก VR ์„ ์กฐ์ •ํ•ฉ๋‹ˆ๋‹ค.

Appendix B. Data Acquisition ๊ฐœ์š”

34

Appendix B Data Acquisition ๊ฐœ์š”

B.1 Data Acquisition & Control System ์ด๋ž€?

Data Acquisition (ํš๋“)๊ณผ Control (์ œ์–ด)์€ ์„œ๋กœ ๋‹ค๋ฅธ ์˜๋ฏธ์˜ ์šฉ์–ด์ž…๋‹ˆ๋‹ค. ๊ฐ„๋‹จํ•œ ์˜ˆ๋กœ,

Multimeter ๋‚˜ Oscilloscope ๋กœ Data ๋ฅผ ๊ด€์ธกํ•˜๊ณ  ์ธ์‡„ํ•˜๋Š” ๊ฒƒ์€ Data Acquisition ์ด๊ณ  ์‹ค๋‚ด ์ „๋“ฑ

์˜ ๋ฐ๊ธฐ๋ฅผ ์กฐ์ ˆ ๋…ธ๋ธŒ(Knob)๋กœ ์กฐ์ •ํ•˜๋Š” ๊ฒƒ์€ Control ์ด๋ผ๊ณ  ์ด์•ผ๊ธฐ ํ•  ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค. ์ตœ๊ทผ ๋“ค์–ด

๋งŽ์€ ๋ถ€๋ถ„์˜ ์ผ๋“ค์ด ์ด๋Ÿฌํ•œ Data Acquisition ๊ณผ Control ์„ ํ•„์š”๋กœ ํ•˜๊ฒŒ ๋˜์—ˆ์œผ๋ฉฐ, Acquisition ๋œ

Data ๋“ค์€ ์ปดํ“จํ„ฐ๋กœ ํ•ด์„ํ•˜๊ณ  ์ฒ˜๋ฆฌํ•˜๋ฉฐ ๋˜ํ•œ Control ํ•  ์ˆ˜ ์žˆ๊ฒŒ ๋˜์—ˆ์Šต๋‹ˆ๋‹ค.

PhysicalPhenomena

Sensor/Transducers

SignalConditioning

Data Conversion

Computer- Analysis- Decision Making

Display/Plot/Printing/

Communication

Data Conversion

Control/Output

[๊ทธ๋ฆผ B-1] Data Acquisition & Control System ๊ตฌ์„ฑ๋„

์ด๋Ÿฌํ•œ Data Acquisition ๊ณผ Control ๋Š” ์ „๊ธฐ, ์ „์ž, ์ฒ ๊ฐ•, ๊ธฐ๊ณ„, ํ™”ํ•™, ์„์œ , ์‹ํ’ˆ, ์—๋„ˆ์ง€, ์œ ์ „๊ณต

ํ•™, ์˜๋ฃŒ๊ณตํ•™ ๋“ฑ์˜ ๊ฑฐ์˜ ๋ชจ๋“  ์‚ฐ์—… ๋ถ„์•ผ์™€ ๋ฌผ๋ฆฌ, ์ˆ˜ํ•™, ํ™”ํ•™, ์ „์ž, ์ „๊ธฐ, ๊ธฐ๊ณ„, ์˜๋ฃŒ๋“ฑ ๋ชจ๋“  ํ•™๊ณ„

์—์„œ๋„ ๊ด‘๋ฒ”์œ„ํ•˜๊ฒŒ ์‘์šฉ๋˜๊ณ  ์žˆ์œผ๋ฉฐ, ์ด์— ๋”ฐ๋ผ ๊ณผํ•™์ž๋‚˜ ์—”์ง€๋‹ˆ์–ด๋Š” ๋ฌผ๋ก ์ด๊ณ  ๊ฐ์ข… ์‹œํ—˜๊ณผ ์—ฐ๊ตฌ,

๊ฐœ๋ฐœ, ์ƒ์‚ฐ์— ์ข…์‚ฌํ•˜๊ณ  ์žˆ๋Š” ์‚ฌ๋žŒ๋“ค์— ์˜ํ•ด ์ด์šฉ๋˜๊ณ  ์žˆ์Šต๋‹ˆ๋‹ค.

์ตœ๊ทผ ๋“ค์–ด ์ปดํ“จํ„ฐ์˜ Data ์ฒ˜๋ฆฌ ์†๋„๊ฐ€ ๊ณ ์†ํ™” ๋˜๊ณ , ์‹ ๋ขฐ๋„๊ฐ€ ๋†’์•„์ง€๋ฉฐ, ๋Œ€์šฉ๋Ÿ‰์˜ Memory ๋ฅผ ์ 

์žฌํ•  ์ˆ˜ ์žˆ๊ฒŒ ๋˜๋ฉด์„œ, ์ปดํ“จํ„ฐ์— ํƒ‘์žฌ๋œ Data Acquisition ๊ณผ Control System ์€ ๊ด‘๋ฒ”์œ„ํ•œ ์ˆ˜์น˜ ํ•ด

์„ ๋ฐ Data ์ €์žฅ ๋Šฅ๋ ฅ์„ ๋ณด์œ ํ•˜๊ฒŒ ๋˜์—ˆ์Šต๋‹ˆ๋‹ค. ๋‚˜์•„๊ฐ€ ์ปดํ“จํ„ฐ๋ฅผ ํ†ตํ•˜์—ฌ ์ฒ˜๋ฆฌ ๊ฒฐ๊ณผ์˜ ์ถœ๋ ฅ ํ˜•ํƒœ๋ฅผ

๋‹ค์–‘ํ™”ํ•  ์ˆ˜ ์žˆ์œผ๋ฉฐ, Digital Control ๋ฐ ํ†ต์‹ ์—๋„ ์ด์šฉํ•  ์ˆ˜ ์žˆ๊ฒŒ ๋˜์—ˆ์Šต๋‹ˆ๋‹ค.

[๊ทธ๋ฆผ B-1]์€ Data Acquisition ๊ณผ Control System ์˜ ๊ตฌ์„ฑ๋„ ์ž…๋‹ˆ๋‹ค.

์ผ๋ฐ˜์ ์œผ๋กœ ์ปดํ“จํ„ฐ๋ฅผ ์ด์šฉํ•œ Data Acquisition & Control System ์€ ๋‘ ๊ฐ€์ง€ ๋ฐฉ๋ฒ•์œผ๋กœ ๊ตฌํ˜„ํ•  ์ˆ˜

์žˆ์Šต๋‹ˆ๋‹ค. ์ฒซ์งธ๋Š” PC-Bus ์™€ ์ง์ ‘ Interface ์‹œํ‚ค๋Š” ๋ฐฉ๋ฒ•์ด๋ฉฐ, ๋‘˜์งธ๋Š” RS232, RS422, IEEE488 ๋“ฑ

์˜ Standard Communication Channel ์„ ํ†ตํ•˜๋Š” ๋ฐฉ๋ฒ•์ž…๋‹ˆ๋‹ค. ๋‘ ๋ฐฉ๋ฒ•์€ ๋ชจ๋‘ ๋‚˜๋ฆ„์˜ ์žฅ์ ์„ ๊ฐ–๊ณ 

์žˆ์Šต๋‹ˆ๋‹ค. ์ด๋ฅผ ๊ฐ„๋‹จํžˆ ์‚ดํŽด ๋ณด๋ฉด ๋‹ค์Œ๊ณผ ๊ฐ™์Šต๋‹ˆ๋‹ค.

Appendix B. Data Acquisition ๊ฐœ์š”

35

B.1.1 PC-Bus Interface

Low Cost : PC Power ๋ฅผ ์ด์šฉํ•  ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค.

Small Size : PC ๋‚ด๋ถ€์˜ ๋ฏธ๋ฆฌ ํ™•๋ณด๋œ ๊ณต๊ฐ„์„ ํ™œ์šฉํ•ฉ๋‹ˆ๋‹ค.

High Speed : ์†ก์ˆ˜์‹ ์„ ์œ„ํ•œ ๋ณ„๋„์˜ Protocol ์ด ๋ถˆํ•„์š”ํ•ฉ๋‹ˆ๋‹ค.

B.1.2 Standard Communication Channel

System ์ œ์ž‘ ํฌ๊ธฐ์— ์ œํ•œ์ด ์—†์Šต๋‹ˆ๋‹ค.

Computer ์™€ ์›๊ฑฐ๋ฆฌ ์„ค์น˜๊ฐ€ ๊ฐ€๋Šฅํ•ฉ๋‹ˆ๋‹ค. (์‹œํ—˜ํ•˜๊ณ ์ž ํ•˜๋Š” ๊ฐ€๊นŒ์šด ์œ„์น˜์— System ์„ ์„ค์น˜ํ•˜๊ณ 

Host Computer ์™€ ํ†ต์‹  ).

Data Acquisition & Control System ์ด Computer ๊ธฐ์ข…์— ๊ด€๊ณ„์—†์ด Interface ๊ฐ€ ๊ฐ€๋Šฅํ•ฉ๋‹ˆ๋‹ค

Appendix B. Data Acquisition ๊ฐœ์š”

36

B.2 IBM-PC ์˜ ๋‚ด๋ถ€ ๊ตฌ์กฐ ( Memory Address ๋ฅผ ์ค‘์‹ฌ์œผ๋กœ )

PC ์˜ ๊ธฐ๋ณธ ๊ตฌ์„ฑ์€ ๋ณธ์ฒด, ์ž…๋ ฅ์žฅ์น˜ ( Keyboard, Mouse ๋“ฑ ) ๋ฐ ์ถœ๋ ฅ์žฅ์น˜ ( Monitor, Printer,

Plotter )๋“ฑ์œผ๋กœ ์ด๋ฃจ์–ด์ง‘๋‹ˆ๋‹ค. ์ตœ๊ทผ ๋“ค์–ด ์†Œํ˜• PC (Laptop, Notebook Type )๊ฐ€ ๊ฐœ๋ฐœ๋˜๋ฉด์„œ ์ด์„

์ด์šฉํ•˜์—ฌ ์†Œํ˜• Portable Data Acquisition & Control System ์„ ๊ตฌ์ถ•ํ•  ์ˆ˜ ์žˆ๊ฒŒ ๋˜์—ˆ์Šต๋‹ˆ๋‹ค. ๊ทธ๋Ÿฌ

๋‚˜ ์ผ๋ถ€ ์ œ์ž‘ํšŒ์‚ฌ์˜ ์†Œํ˜• PC ๋Š” ์ผ๋ฐ˜ PC ์™€ ํ˜ธํ™˜์„ฑ ( ํŠนํžˆ Expansion Slot )์ด ๋ถ€์กฑํ•˜์—ฌ PC-Bus

๋ฅผ ์ด์šฉํ•œ Interface ์— ์ œํ•œ์ด ์žˆ์Šต๋‹ˆ๋‹ค.

PC ์˜ Expansion Slot ์„ ์ด์šฉํ•œ System ๋„ ๋‘ ๊ฐ€์ง€ ๋ฐฉ๋ฒ•์œผ๋กœ ์ œ์ž‘ํ•  ์ˆ˜ ์žˆ๋Š”๋ฐ, PC ์˜ I/O ๊ณต๊ฐ„

์„ ์ด์šฉํ•˜๋Š” ๋ฐฉ๋ฒ•๊ณผ Memory Location ์˜์—ญ์„ ์ด์šฉํ•˜๋Š” ๋ฐฉ๋ฒ•์ž…๋‹ˆ๋‹ค. PC ์˜ I/O Map ๊ณผ Memory

Map ์„ ๋‹ค์Œ์˜ ํ‘œ์— ๋‚˜ํƒ€๋‚ด์—ˆ์Šต๋‹ˆ๋‹ค. Memory ๋ฐ I/O Space ์˜ ๋ณด๋‹ค ์ƒ์„ธํ•œ ๋‚ด์šฉ์€ โ€œ PC

Technical Reference โ€๋ฅผ ์ฐธ์กฐํ•˜๊ธฐ ๋ฐ”๋ž๋‹ˆ๋‹ค.

ํ‘œ๋ฅผ ๋ณด๋ฉด User ๊ฐ€ ์‚ฌ์šฉํ•  ์ˆ˜ ์žˆ๋Š” Memory ๋ฐ I/O ๊ณต๊ฐ„์€ ๋งค์šฐ ์ œํ•œ๋˜์–ด ์žˆ์„ ๋ฟ๋งŒ ์•„๋‹ˆ๋ผ, ๊ฐ€์šฉ

๊ณต๊ฐ„์„ ์ด๋ฏธ ๋‹ค๋ฅธ Card ๊ฐ€ ์‚ฌ์šฉํ•˜๊ณ  ์žˆ์„ ์ˆ˜๋„ ์žˆ์Šต๋‹ˆ๋‹ค. ์ด๋Ÿฌํ•œ ์‚ฌ์ •์œผ๋กœ ์ธํ•ด ๋ฐœ์ƒํ•  ์ˆ˜ ์žˆ๋Š”

Address ์ถฉ๋Œ์„ ๋ฐฉ์ง€ํ•˜๊ธฐ ์œ„ํ•ด, Data Acquisition & Control Card ๋Š” Switch Bank ๋ฅผ ๋‹ฌ์•„ User ๊ฐ€

์ž„์˜๋กœ ์กฐ์ •ํ•  ์ˆ˜ ์žˆ๋„๋ก ๋˜์–ด ์žˆ์Šต๋‹ˆ๋‹ค.

FFFFF

100000

AT extended memory (15K)

ํ‘œ 10 ์ฐธ์กฐ

FFFFF

F0000

ROM ํ‘œ 6 ์ฐธ์กฐ

EFFFF

E0000

Open in PC/XT (64K) (1)

DFFFF

D0000

Open in PC/XT (64K) (2)

CFC00

CD000

CFC00

CF800

CF400

CF000 USER AREA

CEC00

CE800

CE400

CE000

CDC00

CD800

CD400

CD000

CCFFF

C8000

Fixed disk, XT only (20K) (3)

ํ‘œ 5 ์ฐธ์กฐ

C7FFF

C4000

ROM expansion (16K) (4)

ํ‘œ 5 ์ฐธ์กฐ

C3FFF

Open(16K) (5)

ํ‘œ 5 ์ฐธ์กฐ

EGA

SCREEN BUFFERS

AND ROM C0000

CGA

Screen buffer

AFFFF

A0000

Open(64K) (6)

ํ‘œ 4 ์ฐธ์กฐ

Appendix B. Data Acquisition ๊ฐœ์š”

37

9FFFF

80000

128K RAM expansion area (7)

ํ‘œ 8 ์ฐธ์กฐ

7FFFF

00400

003FF

00000

512K RAM expansion area ํ‘œ 11 ์ฐธ์กฐ

DOS ํ‘œ 2 ์ฐธ์กฐ

BIOS ํ‘œ 11 ์ฐธ์กฐ

Interrupt vectors

ํ‘œ 10 ์ฐธ์กฐ

[ํ‘œ B-1] IBM-PC/XT/AT Memory Map

00500

00504

00510 - 00511

00512 - 00513

00514 - 00515

00516 - 00517

00518 - 00519

0051A - 0051B

0051C - 0051D

00600 - XXXXX

= Print screen status.

= Single-drive status (Drive A or B).

= BASICโ€™s default data segment pointer.

= IP for BASICโ€™s timer interrupt vector.

= CS for BASICโ€™s timer interrupt vector.

= IP for BASICโ€™s ctrl-break interrupt.

= CS for BASICโ€™s ctrl-break interrupt.

= IP for BASICโ€™s fatal-error interrupt.

= CS for BASICโ€™s fatal-error interrupt.

= DOS and โ€˜other thingsโ€™.

[ํ‘œ B-2] DOS and BASIC Data Area

7FFF

80000 - 9FFFF

9FFFF

= Top of 512K

= AT, 128K RAM expansion area.

= Top of 640K, end of memory expansion

area

[ํ‘œ B-3] RAM Expansion Area

A0000 - AFFFF

B0000 - B7FFF

B0000 - B0FFF

B1000 - B7FFF

B8000 - BFFFF

B8000 - BBFFF

BC000 - BFFFF

C0000 - C3FFF

= Enhanced Graphics Adaptor (EGA)

Screen buffers.

= Monochrome adapter of EGA.

= Monochrome screen buffer.

= Reserved for screen buffers.

= Color Graphics Adaptor(CGA) or EGA.

= CGA buffer.

= CGA/EGA screen buffers.

= EGA BIOS.

[ํ‘œ B-4] CRT Screen Buffers

Appendix B. Data Acquisition ๊ฐœ์š”

38

C4000 - C7FFF

C8000 - CCFFF

CD000 - CFFFF

D0000 - DFFFF

E0000 - EFFFF

= ROM expansion area.

= Fixed disk control (XT).

= User PROM, memory-mapped I/O.

= User PROM, recommended โ€œLIMโ€

location.

= ROM expansion area, optional I/O

for PC/XT.

[ํ‘œ B-5] User Area

F0000 - FDFFF

F0000 - FDFFF

F0000 - FDFFF

F0000 - FDFFF

F0000 - FDFFF

= ROM BASIC.

= BIOS.

= First code executed after power-on.

= BIOS release date.

= Machine ID.

[ํ‘œ B-6] ROM

100000 - FFFFFF

= I/O channel memory ( PC/AT

extended memory, 15MB

maximum )

[ํ‘œ B-7] AT Extended Memory

000 - 00F

020 - 021

040 - 043

060 - 063

080 - 083

0A0

200 - 20F

210 - 217

2F8 - 2FF

300 - 31F

320 - 32F

378 - 37F

380 - 37F

3B0 - 3BF

3D0 - 3D7

3F0 - 3F7

3F8 - 3FF

= DMA controller (8237A).

= Interrupt controller (8259A).

= Timer (8253).

= PPI (8255A).

= DMA page register (74LS612).

= NMI mask register.

= Joystick (game) controller.

= Expansion unit.

= Serial port (secondary).

= Prototype card.

= Fixed disk.

= Parallel printer (primary).

= SDLC.

= Monochrome adapter/printer.

= Color/graphics adapter.

= Diskette controller.

= Serial port (primary).

[ํ‘œ B-8] IBM PC/XT I/O Map

Appendix B. Data Acquisition ๊ฐœ์š”

39

000 - 01F

020 - 03F

040 - 05F

060 - 06F

070 - 07F

080 - 09F

0A0 - 0BF

0C0 - 0DF

0F0 - 0FF

1F0 - 1F8

200 - 207

258 - 25F

278 - 27F

300 - 31F

060 - 36F

378 - 37F

080 - 38F

3A0 - 3AF

3B0 - 3BF

3C0 - 3CF

3D0 - 3DF

3F0 - 3F7

3F8 - 3FF

= DMA controller (8237A-5).

= Interrupt controller (8259A).

= Timer (8254).

= Keyboard (8042).

= NMI mask register, real-time clock.

= DMA page register (74LS612).

= Interrupt controller 2 (8259A).

= DMA controller 2 (8237A).

= Math coprocessor.

= Fixed disk.

= Joystick (game) controller.

= Intel โ€œ Above Board โ€.

= Parallel printer (secondary).

= Prototype card.

= Reserved.

= Parallel printer (primary).

= SDLC or bisynchronous communications

(secondary).

= Bisynchronous communications

(primary).

= Monochrome adapter/printer.

= EGA, reserved.

= Color/graphics adapter.

= Diskette controller.

= Serial port (primary).

[ํ‘œ B-9] IBM PC/AT I/O Map

Appendix B. Data Acquisition ๊ฐœ์š”

40

00000 - 00003

00004 - 00007

00008 - 0000B

0000C - 0000F

00010 - 00013

00014 - 00017

00018 - 0001B

0001C - 0001F

00020 - 00023

00024 - 00027

00028 - 0002B

0002C - 0002F

00030 - 00033

00034 - 00037

00038 - 0003B

0003C - 0003F

00040 - 00043

00044 โ€“ 00047

00048 - 0004B

0004C - 0004F

00050 - 00053

00054 - 00057

00058 - 0005B

0005C - 0005F

00060 - 00063

00064 โ€“ 00067

00068 - 0006B

0006C - 0006F

00070 - 00073

00074 - 00077

00078 - 0007B

0007C - 0007F

00080 - 00083

Interrupt 0, divide-by-zero-error.

Interrupt 1, single-step operation.

Interrupt 2, non-maskable interrupt.

Interrupt 3, break-point.

Interrupt 4, arithmetic overflow.

Interrupt 5, BIOS print-screen routine.

Interrupt 6, reserved.

Interrupt 7, reserved.

Interrupt 8, hardware timer 18/2/sec.

Interrupt 9, keyboard.

Interrupt A, reserved.

Interrupt B, communications.

Interrupt C, communications.

Interrupt D, alternate printer.

Interrupt E, floppy diskette signal.

Interrupt F, printer control.

Interrupt 10, invokes BIOS video I/O service routines.

Interrupt 11, invokes BIOS equipment configuration

check.

Interrupt 12, invokes BIOS memory-size check.

Interrupt 13, invokes BIOS disk I/O service routines.

Interrupt 14, invokes BIOS RS-232 I/O routines.

Interrupt 15, invokes BIOS cassette I/O extended AT

service routines.

Interrupt 16, invokes BIOS keyboard I/O routines.

Interrupt 17, invokes BIOS printer I/O.

Interrupt 18, ROM BASIC.

Interrupt 19, invokes BIOS boot-strap start-up

routine.

Interrupt 1A, invokes BIOS time-of-day routines.

Interrupt 1B, BIOS ctrl-break control

Interrupt 1C, gen at timer clock tick.

Interrupt 1D, vides initialization control parameter

pointer.

Interrupt 1E, disk parameter table pointer.

Interrupt 1F, graphics character table pointer.

Interrupt 20, invokes DOS program termination.

Appendix B. Data Acquisition ๊ฐœ์š”

41

00084 - 00087

00088 - 0008B

0008C - 0008F

0009C - 0009F

000A0 - 000FF

00100 - 00103

00104 - 00107

00108 - 00123

00124 - 00127

00128 - 0017F

00180 - 0019F

001A0 - 001FF

00200 - 00217

00218 - 003C3

003C4 - 003FF

Interrupt 21, invokes all DOS function calls.

Interrupt 22, user-created, DOS-controlled interrupt

routine invoked at program end.

Interrupt 23, user-created, DOS-controlled interrupt

routine

Interrupt 27, ends program and keeps program in

memory under DOS.

Interrupts 28 through 3F, reserved.

Interrupt 40, disk I/O (XT)

Interrupt 41, fixed disk parameters (XT)

Interrupts 42 through 48, reserved.

Interrupt 49, keyboard supplement translation table

pointer.

Interrupts 49 through 5F, reserved.

Interrupts 60 through 67, user-defined interrupts.

Interrupts 68 through 7F, not used.

Interrupts 80 through 85, reserved for BASIC.

Interrupts 86 through F0, BASIC interpreter.

Interrupts F1 through FF, not used.

[ํ‘œ B-10] Interrupt Vector

Appendix B. Data Acquisition ๊ฐœ์š”

42

00400 -00401

00402 -00403

00404 -00405

00406 -00407

00408 -00409

0040A-0040B

0040C-0040D

0040E-0040F

00410-00411

00412

00413-00414

00415-00416

00417-00418

00419

0041A-0041B

0041C-0041D

0041E-0043D

0043E

0043F

00440

00441

00412-00448

00449

0044A-0044B

0044C-0044D

0044E-0044F

00450-00451

00452-00453

00454-00455

00456-00457

00458-00459

0045A-0045B

0045ffffffffffffff

ffffffffffffffff004

5D

004CE-004DF

00460-00461

00462

Address of RS-232 adapter 1.

Address of RS-232 adapter 2.

Address of RS-232 adapter 3.

Address of RS-232 adapter 4.

Address of printer adapter 1.

Address of printer adapter 2.

Address of printer adapter 3.

Address of printer adapter 4.

Equipment flag.

Manufacturing test indicator.

Useable memory size in K.

Memory in I/O channel for 64K-planar PC.

Keyboard status bits.

Alternate keyboard numeric input.

( future use )

Keyboard buffer tail pointer.

Keyboard buffer tail pointer.

Keyboard buffer.

Floppy disk seek status.

Floppy disk motor status.

Floppy disk motor timeout.

Floppy disk status.

Floppy disk controller status bytes.

CRT mode code.

CRT column screen width.

CRT regeneration buffer length.

Starting address in regeneration buffer.

Cursor position for CRT page 1.

Cursor position for CRT page 2.

Cursor position for CRT page 3.

Cursor position for CRT page 4.

Cursor position for CRT page 5.

Cursor position for CRT page 6.

Cursor position for CRT page 7.

Cursor position for CRT page 8.

Cursor mode.

Active page number.

Appendix B. Data Acquisition ๊ฐœ์š”

43

00463-00464

00465

00466

00467-00468

00469-0046A

0046B

0046C-0046D

0046E-0046F

00470

00490-004C1

00471

00472-00473

00474-00477

00478

00479

0047A

0047B

0047C

0047D

0047E

0047F

00480-00483

00484-004A8

00484

00485

00487

00488

004A8

004D0-004EF

004F0-004FF

CRT mode.

Address of current display adapter.

Palette setting.

Time count.

CRC register.

Last input value.

Low word of timer count.

High word of timer count.

Timer rolloever.

Used by MODE.COM.

Break indicator.

Reboot (Alt-Ctrl-Del) indicator.

Fixed disk data area (XT).

Printer 1 timeout (XT).

Printer 2 timeout (XT).

Printer 3 timeout (XT).

Printer 4 timeout (XT).

RS-232 card 1 timeout (XT).

RS-232 card 2 timeout (XT).

RS-232 card 3 timeout (XT).

RS-232 card 4 timeout (XT).

Additional keyboard buffer pointers (XT).

EGA BIOS buffer.

Number of character rows.

Bytes per character.

Status byte.

Feature bits, DIP switches.

Pointer save.

Reserved.

Intra-application communication area.

[ํ‘œ B-11] BIOS data area

Appendix B. Data Acquisition ๊ฐœ์š”

44

B.2.1 PC Expansion Slot ์˜ ๊ตฌ์กฐ

PC ์˜ ํ™•์žฅ ์Šฌ๋กฏ์—๋Š” ๋‹ค์Œ๊ณผ ๊ฐ™์€ ๋„ค ๊ฐ€์ง€ ์œ ํ˜•์ด ์žˆ์Šต๋‹ˆ๋‹ค.

8 Bit PC/XT ์šฉ Slot.

16 Bit PC/AT ๋ฐ PC/XT ์šฉ Slot.

32 Bit PC/AT ๋ฐ PC/XT ์šฉ Slot.

32 Bit PCI Slot

์ด๋ฅผ [๊ทธ๋ฆผ B-2]์— ๋‚˜ํƒ€๋‚ด์—ˆ์Šต๋‹ˆ๋‹ค. [ํ‘œ B-12], [ํ‘œ B-13]๋Š” ๊ฐ๊ฐ 16bit ๋ฐ 8bit ์šฉ ์Šฌ๋กฏ์˜ ์‹ ํ˜ธ

์‚ฌ์–‘๋“ค์ž…๋‹ˆ๋‹ค. [ํ‘œ B-14]๋Š” COMIZOA CP Series ๋ชจ๋“  ๋ณด๋“œ์— ํ•ด๋‹น๋˜๋Š” PCI ์Šฌ๋กฏ์˜ ์‹ ํ˜ธ ์‚ฌ์–‘์ž…

๋‹ˆ๋‹ค.

๊ฐ ์‹ ํ˜ธ๋ช…์˜ ๊ธฐ๋Šฅ๋“ค์€ PC Technical Reference Manual ์ฐธ์กฐ ํ•˜์‹ญ์‹œ์˜ค.

Appendix B. Data Acquisition ๊ฐœ์š”

45

o PC/XT Buso 8 Bit Data Buso 62 Contacts

o PC/AT Bus ( ISA is 99% Compatible with the AT bus)o 16 Bit Data Buso XT Bus + 36 Contacts

o EISA Buso 32 Bit Data Buso 188 Contacts

o PCI Buso 32 Bit Data Buso 120 Contacts

[๊ทธ๋ฆผ B-2] Expansion Slot์˜ ์ข…๋ฅ˜

Pin NO. ์‹ ํ˜ธ๋ช… I/O Pin NO. ์‹ ํ˜ธ๋ช… I/O

C1

C2

C3

C4

C5

C6

C7

C8

/IOBHE

A23

A22

A21

A20

A19

A18

A17

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

D1

D2

D3

D4

D5

D6

D7

D8

/MEM CS 16

/I/O CS 16

IRQ 10

IRQ 11

IRQ 12

IRQ 15

IRQ 14

/DACK 0

I

I

I

I

I

I

I

O

Appendix B. Data Acquisition ๊ฐœ์š”

46

C9

C10

C11

C12

C13

C14

C15

C16

C17

C18

/MR

/MW

D8

D9

D01

D11

D12

D13

D14

D15

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

D9

D10

D11

D12

D13

D14

D15

D16

D17

D18

DRQ 0

/DACK 5

DRQ 5

/DACK 6

DRQ 6

/DACK 7

DRQ 7

+5V

/MASTER

GND

I

O

I

O

I

O

I

-

I

-

[ํ‘œ B-12] 16bit ํ™•์žฅ Slot ์‹ ํ˜ธ์‚ฌ์–‘

Pin NO. ์‹ ํ˜ธ๋ช… I/O Pin NO. ์‹ ํ˜ธ๋ช… I/O

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10

A11

A12

A13

A14

A15

A16

A17

A18

A19

A20

A21

A22

A23

A24

A25

A26

A27

A28

A29

A30

A31

/IOCHCK

D7

D6

D5

D4

D3

D2

D1

D0

/IOCHRDY

AEN

A19

A18

A17

A16

A15

A14

A13

A12

A11

A10

A9

A8

A7

A6

A5

A4

A3

A2

A1

A0

I

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I

O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

B1

B2

B3

B4

B5

B6

B7

B8

B9

B10

B11

B12

B13

B14

B15

B16

B17

B18

B19

B20

B21

B22

B23

B24

B25

B26

B27

B28

B29

B30

B31

GND

RESET DRV

-5V

IRQ 9

-5V

DRQ 2

-12V

/SRDY

+12V

GND

/MEMW

/MEMR

/IOWC

/IORC

/DACK 3

DRQ 3

/DACK 1

DRQ 1

/MEMREF

SYSCLK

IRQ 7

IRQ 6

IRQ 5

IRQ 4

IRQ 3

/DACK 2

TC

BUSALE

+5V

OSC

GND

-

O

-

I

-

I

-

I

-

-

O

O

O

O

O

I

O

I

I/O

O

I

I

I

I

I

O

O

O

-

O

-

[ํ‘œ B-13] 8bit ํ™•์žฅ Slot ์‹ ํ˜ธ์‚ฌ์–‘

Appendix B. Data Acquisition ๊ฐœ์š”

47

Pin No. 5V System Environment

Side A Side B

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

-12V

TCK

GND

TDO

+5V

+5V

INTB#

INTD#

PRSNT1#

RESERVED

PRSNT2#

GND

GND

RESERVED

GND

CLK

GND

REQ#

+5V

AD[31]

AD[29]

GND

AD[27]

AD[25]

+3.3V

C/BE[3]#

AD[23]

GND

AD[21]

AD[19]

+3.3V

AD[17]

C/BE[2]#

GND

IRDY#

+3.3V

DEVSEL#T

TRST#

+12V

TMS

TDI

+5V

INTA#

INTC#

+5V

RESERVED

+5V

RESERVED

GND

GND

RESERVED

RST#

+5V

GNT#

GND

RESERVED

AD[30]

+3.3V

AD[28]

AD[26]

GND

AD[24]

IDSEL

+3.3V

AD[22]

AD[20]

GND

AD[18]

AD[16]

+3.3V

FRAME#

GND

TRDY#

GND

Appendix B. Data Acquisition ๊ฐœ์š”

48

Pin No. 5V System Environment

Side A Side B

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

53

54

55

56

57

58

59

60

61

62

GND

LOCK#

PERR#

+3.3V

SERR#

+3.3V

C/BE[1]#

AD[14]

GND

AD[12]

AD[10]

GND

STOP#

+3.3V

SDONE

SBO#

GND

PAR

AD[15]

+3.3V

AD[13]

AD[11]

GND

AD[9]

AD[8]

AD[7]

+3.3V

AD[5]

AD[3]

GND

AD[1]

+5V

ACK64#

+5V

+5V

C/BE[0]#

+3.3V

AD[6]

AD[4]

GND

AD[2]

AD[0]

+5V

REQ64#

+5V

+5V

[ํ‘œ B-14] 32bit PCI PIN

Appendix B. Data Acquisition ๊ฐœ์š”

49

Signal

Status

Modes

Low

or Going

Low

Rising

High

0 Disables Counting ___ Enables

Counting

1

___

โ—Ž Initiates

Counting

โ—Ž Resets output

after next

___

2

โ—Ž Disables

Counting

โ—Ž Sets output

immediately high

โ—Ž Reloads

Counter

โ—Ž Initiates Counting

Enables

Counting

3

โ—Ž Disables

Counting

โ—Ž Sets output

immediately high

โ—Ž Reloads Counter

โ—Ž Initiates Counting

Enables

Counting

4 Disables Counting ___ Enables

Counting

5 ___ Initiates Counting ___

[ํ‘œ B-15] ๊ฐ ๋ชจ๋“œ์—์„œ GATE์ž…๋ ฅ์— ๋”ฐ๋ฅธ ํšจ๊ณผ

[ํ‘œ B-15]์€ ์นด์šดํ„ฐ์˜ GATE ์ž…๋ ฅํ•€์˜ ์ƒํƒœ์— ๋”ฐ๋ผ ๊ฐ ๋ชจ๋“œ์—์„œ์˜ ์นด์šดํ„ฐ ๋™์ž‘์ด ์–ด๋–ป๊ฒŒ ๋ณ€ํ™”๋˜

๋Š”์ง€ ๋‚˜ํƒ€๋ƒ…๋‹ˆ๋‹ค. ํ‘œ๋ฅผ ์ฐธ์กฐํ•˜์—ฌ ์‚ฌ์šฉ์ž๊ฐ€ ์„ ํƒํ•œ ๋ชจ๋“œ๊ฐ€ ์ ์ ˆํ•œ์ง€๋ฅผ ํŒ๋‹จํ•˜์‹ญ์‹œ์˜ค.

Hardware Reference Manual Update List

NO VERSION DATE Changes in

1 1.00 2003.04.07. release

2 1.01 2016.03.01 ํฐํŠธ ๋ณ€๊ฒฝ(๋‚˜๋ˆ” ๊ณ ๋”•, ๊ตด๋ฆผ), ์‹ ์–‘์‹ ๋ณ€๊ฒฝ

3

51

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