chongo service training hardware overview prepared by merlin miller, dave jordahl, john ciardi,...
TRANSCRIPT
ChongoService Training
Hardware Overview
Prepared by Merlin Miller, Dave Jordahl, John Ciardi,
March 2005
Page N°2
Chongo Building Blocks
PC Subsystem– Runs system and application software– USB, Firewire, DVD-ROM, RS422, and Ethernet interfaces– Disk Interface– PCI Bus interface to Codec Module– USB interface to Front Panel Module
Disk Array– 2 SATA drives in RAID0 array
Codec Module– Real-time control processor– MPEG SD encoder– 2 MPEG SD/HD Decoders– Audio DSP– Video and Audio I/O interfaces
Front Panel- WinCE Processor - TFT Display, TouchScreen, Keys, Knob Interface, LEDs
Page N°3
PC Subsystem
The PC subsystem runs application software running on top of a embedded WindowXP OS. This subsystem includes the following components:
Mechanical Chassis
Intel D865GLC microATX motherboard
3.0GHz Pentium 4 processor
512 MB DDR memory (2 DIM modules- separate memory busses)
1 IDE port for interfacing to removable media drive (DVD-ROM/CD-ROM)
1 10/100/1000BT Ethernet port
4 rear panel/1 front panel accessible USB2.0 ports
1 rear panel/1 front panel accessible ( front shared with second rear panel connector) Firewire IEEE1394A ports
2 SATA ports for interfacing to internal media drives
3 RS422 ports with SMPTE pinout (interfaced through internal USB connection)
PS2 keyboard and mouse ports
VGA display interface
Page N°4
PC Subsystem Block Diagram
P4512MB DDR
USB2.010/100/1000BT Ethernet
VGA
MicroATX Motherboard
PC
I
DVD-ROM
SATA HD
SATA HDSATA
Front InterconnectBoard
(USB, 1394, LEDs,PowerOn, Audio Monitor)USB
Power Supply350W FlexATX
PC Subsystem Audio Monitor
1394
USB
RS422 Board
Front Panel
PCIFAN
Page N°5
Disk Array
2 - 73GByte 10K RPM SATA Drives
Partioned into 3 Volumes– System Volume (C:) – 4GBytes on Physical Drive 0
– OS Swap and Media Database Volume (D:) – 4GBytes on Physical Drive 1
– Media Volume (V:) – 134GBytes striped across Drive 0 and 1
Page N°6
Front Panel
Front Panel System– Provides an intelligent interface that can operate the system
without plugging in external monitor, keyboard, or mouse
FPS Components– Embedded Sharp ARM microprocessor with 16MBytes flash
memory and 64MBytes SD-RAM
– Runs WinCE operating system
– 320x240 Pixel TFT Display
– Integrated TouchScreen
– Function and transport keys
– Interface to intelligent knob
– USB interface to PC Subsystem
– 5V Power for FP circuits
Page N°7
Front Panel Block Diagram
SharpLH7A404Processor
SDRAM
SDRAM
FLASH
FLASH
TFT Displayw/TouchScreen
LCDDCPwr
BacklightPower
VCOM/CS
Generator
TouchScreenConnector
RS232HeaderReset
Logic
PowerConverter
Manufact.JTAG
Header
EncoderLevel
Converter
ImmersionEncoder
(Rotary Dial/Push Switch)
LEDDriver(16)
PwrConn.
DebugJTAG
HeaderKey
Matrix4x4
LEDS(16)
RS232Converter
USBHeader
Hostconnection
DebugConnection
GPIO
RS232
RS232
Page N°8
Front Panel Intelligent Knob
Immersion Encoder– Rotary Encoder
– Function depends on current Front Panel Application
– Provides programmable stops and detents
– Provides push-button functionality
– Serial interface to Front Panel processor
– 5V supply from Front Panel board
Page N°9
Codec Subsystem
The CODEC subsystem runs on a real time processor and includes all video based I/O processing. This subsystem includes the following components:
– Real Time Processor: Intel Xscale
– Video I/O
– Audio I/O
– LTC I/O
– Genlock
Page N°10
Codec Subsystem
Codec Board
Codec Board
PC
I
RTPReference
Design
TL955Decoder
TL955Decoder
CcubeEncoder
AudioDSP
PC
I
PCI
PCI
PCI
PCI
PCI
259M
Component
DVI Digital
Composite/SVideo
LTC
SPDIF
AnalogAudio
259M
Component
DVI Digital
Composite/SVideo
LTC
SPDIF
AnalogAudio
259M
Component/Composite/
SVideo
LTC
SPDIF
AnalogAudio
XLR Board
GP
IO
VideoRefgenSupportFPGA
MonitorAudio
To Front Interconnect
EthernetDebug PCI
ReferenceLoopThru
Page N°11
Codec Subsystem RTP Section
Intel Xscale real time processor
Support PLD
PCI Bridge
JTAG Interface
I2C serial interface
Flash boot ROM
UART debug connector
Page N°12
Codec Subsystem RTP Section
Intel80312
PCI Bridge/Support
Chip
SDRAM (256MB)32Mx8x9
Auxiliary Flash Connector
Primary Flash (32 Mbit)
4Mx8
Support PLDBoard ID = 0x50 (SFP)
Rev = 0x0Mod = 0x00
L_A
D B
us
Uar
t Con
nect
or
L_A Bus
CS[1:0]
PRI_CS
AUX_CS
Intel80200
uP
Debug LED
Ints
JTAG
Ris
er P
CI
Con
nect
or
Codec Interrupts
72 (64+ECC)
Codec PCI
Req/Gnt
17
3232
23
GPIO
GPIO
TL955 SPI
Device ResetsPrimary PCI
P_INTB*, P_INTC*
Page N°13
Codec Subsystem Video I/O Recorder Section
Input is SDI, Analog composite, or Analog component
SDI Receiver integrated in FPGA
Composite and Component input using ADV7183B
LSI DVX MPEG encoder the same as M-Series
Page N°14
Codec Subsystem Video I/O Recorder Section
DMJ 6/16/04
LSI DVxpress(Encode)
SUM
8MB SDRAM
32-bit, 33MHz PCI Bus
Video Encode
ReferenceTiming
Video FPGA
SDI In
LTC In (Differential)Diff Receiver
FPGAProgramming
AudioMonitorSelect
Decoder
Rec ClkVCXO
I2C from RTP
Analogcomposite in
Analogcomponent in
Page N°15
Codec Subsystem Video I/O Player Section
Output Mpeg decoder- Zoran TL955
Component output directly from TL955
DVI output from TL955 with TFP410 driver
SDI Transmitter integrated in FPGA
Composite output from ADV7191A same as M-Series
S-video output from ADV7191A extra ports
Page N°16
Codec Subsystem Video I/O Player Section
DMJ 6/16/04
TL-955(Decode)
128MB DDR ram
32-bit, 33MHz PCI Bus
Video GenlockVideo Decode
ReferenceTiming
Video FPGA
EncoderAnalog Composite Out
FPGAProgramming
AudioMonitorSelect
Diff Line DriverLTC Out (Differential)
SDI Out Cable Driver
AudioMonitor
Comp Enc ClkVCXO
Analogcomponent
out
DVI outVideo Input
SPIflash
27mhz enc clk
S video out
Page N°17
Codec Subsystem Audio I/O Section
Audio subsection similar to M-series
TI DSP processor for audio input and output processing
Digital I/O meeting SPDIF format, similar to AES format but different levels
Analog I/O with differential input and output
Front Panel Headphone driver
Page N°18
Codec Subsystem Audio I/O Section
TI DSPTMS320C6205
4Mx32SDRAM
PCIAudOut
AudIn
Video FPGADSP_HW_RST*
DSP_JTAG
Audio Peripherals:Analog: ADC/DACDigital:SPDIF I/Os
Headphone: SRC, driver
Audio I/O
Page N°19
Codec Subsystem LTC I/O Section
LTC function implemented in FPGA
External LTC driver and receiver circuitry
Page N°20
Codec Subsystem Genlock Section
Provides reference video and audio clocks
Locks system clocks to input reference (PAL or NTSC)
Page N°21
RISER BOARD
RISER Board– Connects PCI bus and power from PC subsystem to CODEC
board
– General Purpose Interface connector and circuitry driven by Codec
Components– PCI connectors
– GPI connector, drivers and receivers
Page N°22
XLR Breakout BOARD
XLR Breakout Board– Analog audio input connector for left and right channel recorder
– Analog audio output connectors, 2 sets for player 1 and player 2
– Passive