chin report - 2nd

Upload: aiko0818

Post on 30-May-2018

224 views

Category:

Documents


0 download

TRANSCRIPT

  • 8/14/2019 Chin Report - 2nd

    1/18

    E X C E P T I ON S

    Is often used to refer toany event that causes aninterruption

  • 8/14/2019 Chin Report - 2nd

    2/18

    Kinds of Exceptions

    Recovery from Errors

    Exception-Service Routine-takes appropriate action

    to recover from the error or toinform the user about it.

  • 8/14/2019 Chin Report - 2nd

    3/18

    Debugging

    Debugger-helps the programmer find errors

    in a program.

    2 important facilities of debugger:

    Trace ModeBreakpoints

  • 8/14/2019 Chin Report - 2nd

    4/18

  • 8/14/2019 Chin Report - 2nd

    5/18

    Privilege Exception

    Privileged Instruction-modifies the priority of the

    processor.

  • 8/14/2019 Chin Report - 2nd

    6/18

    Operating System

    Responsible for coordinating all activities within acomputer.

    Makes extensive use of I/O operations.

    Incorporates the interrupt-service routines for alldevices connected to a computer.

    Provides a variety of services to applicationprograms.

  • 8/14/2019 Chin Report - 2nd

    7/18

    The OS includes:

    Multitasking a mode of operationin which a processor executes severaluser programs at the same time.

    Time slicing with this technique,each program runs for a short periodcalled a time slice.

    OSINIT set interrupt vectors.

  • 8/14/2019 Chin Report - 2nd

    8/18

    SCHEDULER an OS routine whosefunction is to determine which user

    program should run in the next time slice.It saves all the information that will beneeded later when the execution of aprogram is resumed.

    Program State the information savedby the SCHEDULER. It includes registercontents, the program counter, and theprocessor status word.

    Processor Status Word it containsthe condition flags and other informationsuch as priority level.

  • 8/14/2019 Chin Report - 2nd

    9/18

    PROCESS

    Running the program is currentlybeing executed.Runnable the program is ready

    for execution but is waiting to beselected by the SCHEDULER.

    Blocked the program is not readyto resume execution for some reason.

    OSSERVICES examine stack todetermine requested operation.

  • 8/14/2019 Chin Report - 2nd

    10/18

    IOINIT a routine that is responsiblefor starting I/O operations.

    Device Driver - is a computerprogram allowing higher-level computerprograms to interact with a hardwaredevice.

    IODATA poll devices to determinesource of interrupt.

    END a flag that is set to 1 if thecharacter is a carriage return.

  • 8/14/2019 Chin Report - 2nd

    11/18

    Use of Interrupts in OS

    Enables the operating system to assignpriorities, switch from one user programto another, implement security and

    protection features, and coordinate I/Oactivities.

    Can be used to call different parts of theOS, depending on the service beingrequested.

  • 8/14/2019 Chin Report - 2nd

    12/18

    Processor Examples

    ARM Interrupt Structure

    ARM Processor- Advanced RISC (Reduced Instruction

    Set Computer) Machines has a simple yetpowerful exception-handling mechanism.

  • 8/14/2019 Chin Report - 2nd

    13/18

    5 Sources of ExceptionsExternal interrupt-request lines(IRQ).

    Fast Interrupt Request (FIQ).

    Software Interrupt Instruction(SWI).

    External Abort following a bus

    error.

    Attempt to execute an undefinedinstruction.

  • 8/14/2019 Chin Report - 2nd

    14/18

    Exceptions are handledaccording to the following

    priority structure:

    3. Reset4. Data Abort5. FIQ 6. IRQ 7. Prefetch Abort8. Undefined Structure

  • 8/14/2019 Chin Report - 2nd

    15/18

    When the processor accepts aninterrupt, it takes the followingactions:

    2. It saves the return address of theinterrupted program in register14 of thecorresponding mode.

    3. It saves the contents of the currentprocessor status register (CPSR) in thecorresponding SPSR (Saved ProcessorStatus Register).

    4. It changes the mode bits in CPSRaccording to the type of interrupt.

    5. It branches to the interrupt-serviceroutine starting at the appropriate vectoraddress.

  • 8/14/2019 Chin Report - 2nd

    16/18

    *The ARM Processor uses a pipelined structure .

    Pipelined Structure- an instruction is fetched before the

    execution of the preceding instruction iscompleted.

  • 8/14/2019 Chin Report - 2nd

    17/18

    ARM Processor

  • 8/14/2019 Chin Report - 2nd

    18/18

    Stacks and Nesting

    ARM Interrupt Mechanism

    - stores the return address in aregister and does not automaticallyimplements a stacking mechanism toallow subroutine or interrupt nesting.