characteristics presentation for development process experiment by: nir shahar and amir kleinhendler...

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Characteristics Presentation for Development Process Experiment By: Nir Shahar and Amir Kleinhendler Supervisor: Ina Rivkin

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Characteristics Presentation for Development Process Experiment

By: Nir Shahar and Amir KleinhendlerSupervisor: Ina Rivkin

Spring 2007

Agenda• System main features.

• System block diagram.

• I/O Controller.

• System Controller.

• Memory.

• Logic units.

• Questions.

System main featuresThe complete system will illustrate a full computer with the below parts.

The system is composed of 8 separate units: The system is composed of 8 separate units: • Keyboard • LCD display • 8 LEDs • 4 switches • I/O controller • System controller • Several logic units • Memory unit

System functionality:The computer will receive an OPcode followed by data through PS/2 keyboard. The OPcode and the data will be delivered to an I/O controller and from there to the FIFO memory character by character. The system controller will read the data from the FIFO memory and then build the parallel OPcode and data. After the building the data will be sent to the logic bus for the use of the logic units.The correct logic unit will collect the data and then perform the appropriate logic action.After performing the logic action the result will be send to the I/O controller and from there to the LCD display.The system has more 4 switches and 8 LEDs to control on the system state.

System block diagram

I/O

keyboard

MEMORY

LOGIC UNITS

Key

_clo

ck

Key

_In

pu

t

Dip Switch

4

Dip_In

Lcd_Out

11

Led

_ou

t

8

CL

K

Dat

a_L

og

ic_V

alid

Dat

a_F

rom

_Lo

gic

Res

et_F

rom

_IO

Reset_From_IO

IO_O

ut_

Val

id

Dat

a_M

em_O

ut

RE

CLK

Res

et_F

rom

_IO

System controller

CL

K

CL

KDat

a_M

em_O

ut

RE

Mem

_Em

pty

Op

cod

e

Dat

a_O

ut_

Co

ntr

olle

rLo

gic

_Fin

ish

Controller_Stat_out

Mem

_Em

pty

4

Dat

a_O

ut_

Co

ntr

olle

r_V

alid

Res

et_F

rom

_IO

Dat

a_In

IO_O

ut

8

WE

Mem

_Ful

lM

em_F

ull

Dat

a_O

ut

RE

Mem

_Em

pty

8

8

8

8

Controller_Stat_In

4

I/O Controller

Led_out

Data_Logic_Valid

Data_From_Logic

8

Keyboard controller

Key_clock

Key_Input

Reset_From_IO

Scancode

Gotcode

I/O Core

Memory Controller

LCD Controller

8

WE

RE

Reset_From_IO

IO_D

ata_

Ou

t

Mem_Con

Mem_Full

LCD_DB

8LCD_E

LCD_RS

LCD_RW

LCD_D_IN

8LCD_D_VALID

Reset_From_IO

4

Dip_In

Scancode

Gotcode8{

CLK

Data_Mem_Out

Mem_Empty

Mem_Full 8{{

12

Reset_From_IO

Controller_Stat_out

8

8

LCD_D_IN

8

LCD_D_VALID

Controller_Stat_In

4

8

LCD_OP

4

LCD_OP

4

System Controller

Data_Out_Controller

Controller_Stat_out

4

Data_Out_Controller_Valid

8

Data_Mem_Out

Mem_Empty

4

{OpCodeGen

Reset_From_IO

CLK

8

Opcode

Controller Core

OpCodeStat

RE

Reset_From_IO

CLK

RE

Data_Mem_Out

Mem_Empty

Mem_Full 8{Controller_Stat_In

4

Memory

MEMORY

Reset_From_IO

IO_O

ut_

Val

id

Dat

a_M

em_O

ut

RE

CLK

Mem

_Em

pty

Dat

a_In

IO_O

ut

8

WE

Mem

_Ful

lM

em_F

ull

Dat

a_O

ut

RE

Mem

_Em

pty

8

Logic units

LOGIC UNITSD

ata_

Lo

gic

_Val

id

Dat

a_F

rom

_Lo

gic

Res

et_F

rom

_IO

CL

K

Opcode

Data_Out_Controller

Lo

gic

_Fin

ish

Data_Out_Controller_Valid

8

8

8

QUESTIONS