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Chapter 1

From Power-Efficient to Power-DrivenComputing

Rishad Shafik1 and Alex Yakovlev2

The dramatic spread of computing, at the scale of trillions of ubiquitous devices, isdelivering on the pervasive penetration into the real world in the form of Internet ofThings (IoTs). Today, the widely used power-efficient paradigms directly related tothe behaviour of computing systems are those of Real-Time (working to deadlinesimposed from the real-world) and Low-Power (prolonging battery life or reducingheat dissipation and electricity bills). Neither addresses the strict requirements onpower supply, allocation and utilisation that are imposed by the needs of new de-vices and applications in the computing swarm – many of which are expected tobe confronted with challenges of autonomy and battery-free long-life. Indeed, weneed to design and build systems for survival, operating under a wide range of powerconstraints; we need a new power-driven paradigm called Real-Power Computing.

This chapter provides an overview of this emerging paradigm with definition,taxonomies and a case study, together with a summary of the existing research. To-wards the end, the overview leads to research and development challenges and op-portunities surfacing this paradigm. Throughout the chapter, we have used the powerand energy terms as follows. From the supply side, the energy term will be used torefer to harvesters with built-in storage, while the power term will indicate instanta-neous energy dispensation. For the computing logic side, the energy term will definethe total power consumed over a given time interval.

1.1 Introduction: Computing is Evolving

Computing systems continue to be at the core of our everyday life – from large-scale infrastructure server systems to small-scale implanted electronics or swarms ofwireless sensing nodes pervading in smart cities. Based on design considerations,their domains can be classified into six major applications: high-performance serversystems, desktop computing, portable computing, mobile systems, embedded sys-tems and ubiquitous systems. Figure 1.1 depicts different design and optimisationrequirements of these application domains.

1School of Engineering, Newcastle University, NE1 7RU, UK2School of Engineering, Newcastle University, NE1 7RU, UK

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Figure 1.1 Major computing application domains and their typical system designand optimisation requirements [1–3].

For line supply powered computing applications, such as servers and desktopcomputing systems, performance is achieved by provisioning higher computing re-sources in the form of many cores. Maximum allowable performance for these sys-tems is formulated using the thermally safe limits of operating clock frequencies [4].As thermal behaviour is directly related to the power density of the parallel cores,design considerations are dominated by power constraints, which ranges from tens ofwatts to several mega-watts. For battery-powered systems with limited energy, suchas portable computing devices and embedded systems, extending operating lifetimeis a key requirement [5]. Performance is often compromised in favour of energyminimisation, especially when there is no strict time constraint.

For energy or power minimisation, scaling the supply voltage is a key mecha-nism as any reduction in voltage decreases power/energy quadratically [6]. However,lower voltage increases the transistor gate delay, which necessitates the operating fre-quency to be scaling down to a suitable value. This coupling between voltage andfrequency, commonly termed as voltage/frequency scaling (VFS), is fundamentalto energy-efficient computing. A key aspect of achieving energy efficiency is theability to operate with multiple supply voltages (i.e. Vdd), from sub-threshold tosuper-threshold [7, 8]. The Vdd range between minimum (Vmin) to maximum (Vmax)point also tends to be higher when more controls need to be leveraged for energyefficiency [9]. Significant research has been carried out in the past two decades thatdeeply embed VFS decisions in circuits and systems at design- and/or run-time [10].

In many embedded systems real-time constraints are common, which can eitherbe hard (i.e. the constraint must be adhered to) or soft (i.e. the constraint can beoccasionally violated) [11]. To extend operating lifetime the energy is typically min-imised within the envolope of these constraints. The key aim is to exploit the VFSopportunity dynamically to reduce slack time (i.e. the time between task executiontime and its real-time deadline) as best as possible. Figure 1.2 shows a demonstrationof performance-constrained energy minimisation in embedded systems.

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Swarms of small-scale ubiquitous computing systems, at the scale of trillions,are expected to dominate future generations of data-driven Internet of Things (IoT)devices [12, 13]. Examples include implantables or wearables, cybernetics and fire-and-forget systems in smart cities and offices. For low-cost, low-maintenance andlight-weight considerations, these systems offer limited feasibility of integrating bat-teries. In fact, with the development of new energy scavenging devices, there isnow considerable interest in developing these systems with harvested energy fromthe real-world through vibration [14], thermal [15], solar or kinetic energy [15, 16].However, harvesting sources have natural fluctuations in their physical properties,which are typically characterised by high variation of the the available energy overtime [17]. This makes the operation of these devices challenging, particularly whenthe available energy is unreliable but the device needs to complete useful computa-tions in part or in full [18].

Given the unprecedented power variations, a desirable property for these emerg-ing systems is to have natural survival instincts defined by the instantaneous energylevels. In other words, they should continue to provide a required computation capac-ity at limited energy, even if it requires gracefully degrading the computation qualityor retaining the computation states for resumption when more energy is available.Biological organisms and systems, such as microbes, work with similar principlesas they morph and adapt for carrying out useful synthesis and regenerative processesfor their survival under varying sunlight [19].

Traditional low-power computing approaches do not provide such survival in-stincts under varying supply energy levels [18]. In low energy situations, these ap-proaches react by scaling operating voltage/frequency to extend lifetime, which doesnot guarantee retention or completion of computation tasks before the system is de-pleted of energy [20]. In fact due to lack of survival instincts the direct applicationof existing approach can cause loss of computation in such an event, as shown inFigure 1.3. This calls for a change in the computing paradigm to design computingsystems with natural survivability and adaptability instincts going beyond the tra-ditional approaches for dealing with unreliable power supply. Power-driven designand run-time adaptation offer a disruptive paradigm that has promising prospectsin terms survivability and energy efficiency under variable supply envelopes. Thenext section introduces this paradigm as Real-Power Computing with its definition,manifestations and taxonomies.

1.2 Power-Driven Computing

For autonomous survivability of computing under variable power envelope, a keyquestion is: can we guarantee computation continuum under unreliable power sup-plies, mitigating computation uncertainties? One particular form of computationaluncertainty is performance uncertainty in terms of the time it takes to perform thecomputation when power is variable. While we have the definite power level whatwe can also have is a definite computation (hardware, algorithm, data and sequenceof actions) but with uncertain performance [21]. Another form would be to have bothdefinite power or energy budget and time deadlines, but then accept the possibility

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of the temporary termination of the computation when either energy or time limitshas been reached.

Existing Real-Time (compute by deadlines) and Low-Power (prolonging batterylife or throttling for power densities) approaches cannot address the computationalcertainty concerns raised above. However, a simple reversal of design thinking, frompower-efficient, performance-driven to power-driven, can address these uncertaintiesand provide with the envisioned computing continuum. We refer to this new think-ing as Real-Power Computing, akin to Real-Time Computing but different in the wayinstantaneous power is considered as a constraint rather than time constraints de-rived from the real-world. The definition and taxonomies of Real-Power Computingfollow.

1.2.1 Real-Power ComputingReal-power computing can be defined as follows [22]:Real-power computing (RPC), or energy-driven computing, describes hardware andsoftware systems subject to a “real-power constraint”, for example availability ofenergy from a power source, or restriction on power dissipation. Real-power appli-cations must guarantee performance within specified power constraints, referred toas “power bands” Systems of this type are linked to the notion of survivability, whichdepends on their power aspects as well as their ability to morph functional aspectsto ensure continued computation. Real-power systems are not simply low-powersystems which are optimised to the criterion of minimum power consumption.

Based on how energy is stored and dispensed, Real-Power Computing can beclassified as Hard and Soft Real-Power Computing as described next. The implica-tions of performance constraints are discussed following their definitions.

Hard Real-Power ComputingIn hard real-power computing systems the scavenged power is delivered directly intothe circuits and systems, i.e. the system does not have any energy storage. The inputpower is strictly budgeted by the power delivery mechanism. If the estimated compu-tation power is lower than the power budget, computation is carried out; however, ifthe estimated power is higher remaining computation tasks are deferred and currentstates are retained. Examples of hard real-power systems include autonomous cyber-netic or signal processing systems that have to carry out non-critical data sensing andcomputations. A key requirement for these systems is to have high predictability ofsupply power so that power scheduling policies can be pre-determined at design-timeagainst different power budgets, which we will refer to as power-compute co-design(See Section 1.3).

Soft Real-Power ComputingSoft real-power computing has built-in energy buffers (e.g. supercapacitors) withlimited capacity. Unlike hard real-power systems, it does not strictly control compu-tations against a power budget derived from the scavenged power. Instead, these sys-tems allow for partial computation to be carried out, even if these violate the powerbudget. Examples of soft real-power applications include data ingestion or dynamic

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Figure 1.2 (a) Hardware/software interaction in real-time embedded systems, and(b) demonstration of energy minimisation using VFS. The real-timeapplication is annotated with deadlines, which are serviced byexercising the hardware with different VFS options. The VFS optionsare either pre-characterised or determined at run-time [10].

Figure 1.3 (a) A block diagram of real-power computing consisting of feedbackbased power-constrained control of hardware and software resources,and (b) traditional low-power computing compared to real-powercomputing. Low-power computing does not guarantee the completiontasks when supply power varies dynamically, leading to lostcomputation and re-executing the computation tasks at different VFS;real-power computing has autonomous survivability that allows thesystem to guarantee completion of tasks based on power availability bysuitably choosing computation mode [22].

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Figure 1.4 An example demonstration of hard real-power computing for two tasks.When power is predicted to be available over a time, the systemformulates a strategy to control power with the aim of allowing thesetasks to be carried out, strictly meeting the power budget. However,when the available energy is low, the system skips computation andswitches to retention mode.

sensing systems, which can tolerate partial loss of periodic computations. Soft real-power computing systems can use a combination of power-compute co-design andrun-time to maximise computation continuum.

1.2.2 Performance Constraints in Power-Driven SystemsBesides delivering computation based on the incoming power, some applicationsinherently require certainty in performance. This certainty can be ensured by im-posing either hard or soft real-time deadlines. With an additional real-time deadline,the problem of devising power scheduling is reduced to identifying the least en-ergy (the product of average power budget and time deadline) that can be parsimo-niously utilised to deliver the best quality of computation (which can be application-dependent). Considering different scenarios, a number of different optimisation tax-onomies are given below.a. Hard real-power hard real-time computing: For systems with no energy storage,there exists a variant of computation functionality, when the power budget is higherthan the minimum computation power level. The choice of functionality will ensurethe best possible computation quality within the power budget and also strictly meetthe real-time deadline. When available power is low, the computation is skipped tothe next available power cycle.b. Hard real-power soft real-time computing: For systems with no energy storage,there exists a variant of computation functionality, when the power budget is higherthan the minimum computation power level. The choice of functionality will ensurethe best possible computation quality within the power budget and also approxi-

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Figure 1.5 An example demonstration of soft real-power computing showing fourtasks. When energy is available, the system proceeds with moreoptimistic power budgeting to allow for the tasks to be carried outallowing occasional violations. When energy level is low, computationstates are retained.

mately meet the real-time deadline, if necessary by completing part of the function-ality.c. Soft real-power hard real-time computing: With limited storage for scavengedenergy, there exists a variant of computation functionality, which will approximatelymeet the power budget at any given time. The choice of functionality will ensure thatenergy consumption is always less than the available stored energy, and strictly meetthe given real-time deadline, while also providing with the best possible computationquality.d. Soft real-power soft real-time computing: With some storage for scavenged en-ergy, there exists a variant of computation functionality, which will approximatelymeet the power budget at any given time. The choice of functionality will ensurethat energy consumption is always less than the available stored energy, and approx-imately meet the given real-time deadline, while also providing with the best possiblecomputation quality.

Meeting power, performance and quality requirements in real-power computingcan be challenging due to the large system space during optimisation. A systematicand cross-layer approach is needed to reduce this design space through design-timepower-compute co-design and co-optimisation, particularly for hard real-power sys-tems. In soft real-power systems, this an be coupled with run-time support for power-driven adaptation as described in Figure 1.6. The design- and run-time optimisationand adaptation aspects are described in the following two sections.

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Figure 1.6 A block diagram of the real-power computing paradigm showingdesign and run-time considerations for power-constrained controls.Design-time considerations facilitate power budget formulations atdifferent available power levels and scheduling the supply power to thehardware/software mode selection through extensive characterisationsand co-design. For soft real-power systems, this is often coupled withcontinuous run-time optimisation to ensure survivability of thecomputation tasks under variable energy availability usinghardware/software knobs and feedback monitors.

1.3 Design-Time Considerations

At design-time the available and computation power levels are modelled and co-optimised through a process called power-compute co-design. It can be defined as aset of design tools that models the available power and computation/communicationpower consumptions, thereby deriving efficient power scheduling and co-optimisationpolicies between them [22]. The co-design process requires explicitly modelling thesupply and consumption powers, followed by the power-proportional scheduling be-tween them, as follows.

1.3.1 Power Supply Models and BudgetingEnergy harvesters typically have large spatial and temporal variations in instanta-neous power levels [23]. Understanding and modelling these variations is coreto power-driven, real-power computing. Spatial variation models characterise thepower supply voltages and their variations, and determine the maximum and min-imum operating points [24]. Since harvested power is typically a function of theoperating environment, realistic assumptions must be made to derive accurate spa-tial variation models. Additionally, temporal variations also need to be modeled toestablish high predictably of the available energy over a given time. Hard real-powersystems can use more pessimistic assumptions of the available energy to avoid anypower violation. However, soft real-power computing can leverage deviations in as-sumptions to a run-time adaptation problem. Power supply models are used to designpower controllers that can suitably allocate maximum available power as the powerbudget to govern computation/communication tasks [25].

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1.3.2 Power-Proportional Systems DesignTo enable real-power computing, hardware and software systems must be designedto provide computation capability at variable power levels. In other words, the sys-tems must be designed with heterogeneity, which can offer different performance-energy-quality (PEQ) tradeoffs for a given functionality. The PEQ tradeoffs mustalso be appropriately reasoned for to facilitate power-scheduling to different compu-tation and communication tasks under different constraints [26]. In the following,the design considerations of these tasks are further detailed.

Computation TasksWith a power-driven view, the computation hardware and software must be designedto first establish proportionality in the power envelope. The basic premise is to ensurecomputation continuum by hardware/software mode selection, essentially leveragingthe PEQ tradeoffs. When there is a good power availability, it may be more con-venient to perform the tasks using high-complexity computing resources for betterquality outcomes [27]. However, when the power is scarce, they can be performedby more constrained resourcing policies, gracefully degrading the quality by usinglow-complexity computing resources [20, 27].

Alongside supply power models, the power or energy estimation of the com-putation tasks needs to be either accurate or approximate, depending on hard orsoft real-power computing. For example, hard real-power systems requires accu-rate estimation at instruction- or micro-architectural level as under-estimation canlead to violation of the power budgets imposed by the power controller. Micro-controllers and ASICs typically have deterministic computational behavior [28], andhence these are well-suited for accurate energy transparency models using worst-case power consumption (WCPC) estimations. On the other hand, soft real-powersystems can leverage approximations in energy estimations, and adapt during run-time. Microprocessors with hierarchical caches and reconfigurable logic circuits andsystems tend to exhibit variations in their energy consumptions [29], and as suchthey are suitable for power-compute co-design using expected power consumption(EPC) models.

Communication TasksCommunication tasks are carried out in parallel or in an interleaved manner alongsidecomputation [30]. In ubiquitous systems, these tasks are deterministic (in regularpatterns of sense, process and communicate data). However, the energy consump-tion of these tasks can vary due to network behaviour [31]. As such, to generatepower or energy models for these tasks a key requirement is to study the detailed net-work characteristics (including traffic, channel or network availability and conges-tion scenarios) [32]. Based on these characteristics, the expected energy consumedfor each of the communication packets can be estimated. Similar to computationtasks, these estimations can be carried out optimistically for soft real-power systemsor pessimistically for hard real-power systems.

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1.3.3 Power Scheduling and OptimisationGiven the supply and computation power/energy models, power-compute co-designneeds to identify the appropriate power scheduling and optimisation policies to en-sure a fixed power budget can be effectively allocated among the computation andcommunication task/resources. Using these policies, multiple layers of the systemarchitecture can turn on/off at different power levels (see Figure 1.7). As power goeslower computation at deeper layers (i.e. survival layers with lower accuracy andcomputation capacity) stay on, while the surface layers (i.e. higher accuracy andmore computation capacity) turn off; this is where systems’ natural survival instinctscome to effect! The more effectively the system manages these layers, the moreenergy-efficient and survivable it is [33].

Figure 1.7 Layered mode of computational functionality reacting to two differentpower budgets. The inner layers have lower computational capacityand hence less power, while the outer layers have higherpower/computation capacity.

1.4 Run-time Considerations

Run-time support is crucial for real-power systems to warrant survivability and con-tinued execution adapting to power variations (see Figure 1.6). Survivability ensuresthe capability of the system to identify the right energy-level and time to retain thestates of computation, and continuing when more energy is available. Below, weprovide further details of power adaptation and retention, two important aspects ofthe run-time system.

1.4.1 Adapting to Power VariationsA given energy, when applied to a computational device, can be converted into acorresponding amount of computation activity by selecting the appropriate mode of

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computation. Run-time adaptation ensures this through computational mode selec-tion at different power levels (see Section 1.3) and Figure 1.7).

Servicing a known functionality (a set of computation and communication tasks)in different modes and types is key to achieving power proportionality [20, 27].One mode of this could be computing (and communicating) with heterogeneous re-sources. These resources can provide similar functionality but with different energy/performance tradeoffs. When there is good energy availability, it may be more con-venient in terms of controllability, precision and programmability to perform func-tionality using traditional computing resources, such as CPUs with DSPs. However,when the energy is scarce, similar functionality can be provided through more cus-tomised resources, such as FPGAs/ASICs for better quality of service at low energy.The decision of performing computation (and communication) through a resourcewill be strictly governed by design-time rules and run-time adaptation algorithmsbuilt in the system based on the energy availability and proportionality [34, 35].

In extreme energy conditions, computing can be challenging using these tra-ditional computing resources. To ensure useful computation (and communication)tasks can still be carried out, the traditional definition of functionality, whereby theoutput data and their quality can be deterministically related to a given set of in-put data, will need to be relaxed. This leads to another mode of computing usingpower-proportional approximate computing. To enable this promising mode newcomputational units need be designed to meet the ultra low-energy computing re-quirements at gracefully degraded quality of the functionality [36]. The impact oftrading quality off in favor of energy can be strictly application-specific, and hencethese will need to carefully analyzed at design-time during power-compute co-design(see Section 1.3).

1.4.2 Dynamic RetentionWhen power levels become uncertain or scarce, retention becomes incumbent. Dur-ing such an event, the system will need to “consciously” switch between a fullfunctionality mode to a low-latency hibernating mode primarily depending on thedata processing and application requirements. In traditional computing systems,such switching is carried out through check-pointing process that requires savingthe instruction and data states in special purpose registers and memory units. Thecheck-pointing process is governed by a special software routine that is triggeredon-demand when the system encounters any known hardware/software anomalies.

In real-power computing systems, traditional approaches of check-pointing canprove challenging due to the following two reasons. First, the requirement to retaindata can be aperiodic and on-demand, and second, the typical latency of check-pointing can result in diminish returns in terms of energy efficiency and perfor-mance [37]. A promising approach to integrating dynamic retention is deeply em-bedding non-volatile logic or storage registers in the electronic system. This willrequire additional knobs and controls raised to the system software or firmware.

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1.5 A Case Study of Power-Driven Computing

In this section, we present a case study as an exemplar to demonstrate our researchin the development of real-power systems. The study represents a soft real-powersystem with the aim to maximise computation under variable power supply levelsignoring the impact of delays.

Concurrency in electronic circuits improves computing performance and/or en-ergy efficiency. In this case study, a self-timed micropipeline is designed basedon [23] to maximise the amount of compute per energy unit through dynamicallyvariable concurrency. The processing of the data tokens in the micropipeline of agiven computation functionality will be favourably completed in part or in full fol-lowing a power budget derived from the available energy.

Figure 1.8 (a) A self-timed, modified C element, and (b) micropipelinearchitecture with unrolled C elements, featuring set/reset functions.

A C-element based micropipeline architecture is shown in Figure 1.8. The ele-ments are connected in an unrolled configuration, feeding the last stage output backto the first stage input [38]. Each element can be set or reset by S1 or S0 inputs. Thedata tokens are identified as “01” or “10” input to the pair of C elements shown indashed boxes, while “00” is considered as non-data. Due to causality of events it ispossible to have an old copy of the token, called a bubble. As more tokens moveforward, the bubbles move backward. An N-stage pipeline can process (N-1) max-imum number of tokens to free one stage to hold a bubble. Token deadlock takesplace when there are N and 0 tokens.

The soft real-power micropipeline is evaluated using a 5-stage ring of C-elements.In each experiment, concurrency levels are varied (i.e. 1, 2, 3, 4 tokens) at differentvoltages (1.0V, 0.8V, 0.6V, 0.4V, 0.35V, 0.25V, 0.2V, 0.16V) with the available en-ergy of 600pJ, 700pJ and 800pJ. The resulting amount of computation is counted for

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(a)

(b)

Figure 1.9 (a) Computation at different supply voltage levels, and (b) computationlatencies for these voltage levels.

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Figure 1.10 Computations versus concurrency at different supply voltages

each run in terms of a unit, defined as one pulse generated in the pipeline. Figure 1.9shows the outcome of these experiments.

As can be seen from Figure 1.8, the micropipeline concurrency adapts to theincoming energy levels and the data availability. For example, under 600pJ @1Vwith one data item, the power budget was adjusted to ensure 1276 computations(Figure 1.9(a)). However, with two data available at the same energy and voltage ineach concurrent stage, the power budget and pipeline are set to deliver the highestconcurrency (1299 computations), which is a minor increase. However the delayreduces by more than 50%.

At the same energy, when Vdd drops to 0.8V, the amount of computations for themost concurrent case increases by 61.7%, with >50% increase in delay and a similarcomputation outcome. The power budget is 387uW at 0.8V compared to 968uW at1V, about a 60% lower. When further reducing Vdd to 0.2V, exhausting the sameamount energy, the amount of computation is increased 23x times and it takes about10,000x more time. For the same amount of computation, more than 380x time isrequired while working at the nominal Vdd . In this case, the power figure goes from968uW down to 110nW. Figure 1.9(b) shows the corresponding delay for differentcomputation voltages.

Figure 1.10 demonstrates computations versus concurrency tradeoffs at differ-ent Vdds with 1-4 tokens. As can be seen, the maximum computations happens at thesame condition of the optimum throughput, which is at N/2 tokens when N is even or

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(N-1)/2 tokens when N is odd; the higher the concurrency the greater the amount ofcomputation. At the nominal voltage, change from the lowest extreme (4 tokens) tothe optimum point (2 tokens) results in a 5% improvement in computations per unitenergy. But at a sub-threshold voltage the effect on the computation is considerable- nearly 1.7x. Theoretically, at a fixed Vdd , under the same amount energy, the opti-mum case will halve the execution time. Over a shorter period the leakage is lower,which results in the improvement.

The results (Figure 1.10) further suggest that above threshold voltage, the amountof computation per given amount of energy is practically insensitive to the degree ofconcurrency, but below threshold the dependency on the degree of concurrency andthereby also the energy efficiency goes up significantly due to the dynamic poweradaptation in this case study.

1.6 Existing Research

Power-driven computing has recently received significant attention from academicand industrial research community. Researchers have used the following terminolo-gies in similar vein: transient computing [39–41], power-/energy-neutral comput-ing [42], power-/energy-proportional computing [20,43], energy-modulated comput-ing [27], ultra low-power computing [44] and normally-off computing [45,46]. Theirresearch highlights challenges surfacing around the overall need to design electronicsystems with energy or power as the first control derivative [47]. A brief account ofprevious research works is given as follows.

Balsamo et al. proposed a power-neutral computing paradigm in [42]. The com-putation tasks in this system are instantaneously adapted based on available powerusing dynamic frequency scaling (DFS). For an uninterrupted operation, the systemalso needs to have state retention feature enabled by on-demand check-pointing [48].A variant of power-neutral computing is energy-neutral computing, which assumesthe presence of supercapacitors or small batteries with limited energy storage. Energy-neutral computing needs power controllers that interact with these supercapacitors orbatteries to ensure uninterrupted computation under varying energy situations.

Transient computing has been proposed by Gomez et al. [41], which refers toopportunistic computing for energy harvesting systems. The aim is to ensure com-putation and communication tasks can be carried out based on the available energyin the battery or the supercapacitor. Faster wake up and reaction times are criti-cal for transient computing as these allow for better predictions of harvested energyavailability [40]. To enable computation at challenging energy levels, the ability tooperate at ultra low-power is also of profound importance [44].

An ultra low power micro-controller architecture, named PULP 3, is proposedby Conti et al. in [49] using the principle of transient computing. The processorhas built-in parallelisation features, and integrated power controller that can react toenergy critical situations with check-pointing support. The check-pointing routine is

3URL: http://www.pulp-platform.org

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controlled by a run-time routine, which automatically initiates state retention modeswhen the power is low [50, 51].

Recently energy- or power-proportional computing has been proposed using thesimilar principles of transient computing. The transparency of energy usage profileof every system component is a core component for this power-proportionality [20,27]. The aim is to achieve tighter control over the energy consumption of hardware/software systems when subjected to different workloads. Liqat et al. and Kerrisonet al. proposed software energy modelling and verification approach using execu-tion statistics together with instruction set architecture (ISA) in [26, 52], showingminor deviation with from hardware energy measurements. The model elaboratedthe impact of different instructions on the hardware components, including proces-sors, arithmetic/logic units, memories and pipelines for multi-threaded XMOS-basedembedded systems.

Flinn and Satyanarayanan proposed a modelling tool in [53], called Powerscape,which can combine execution statistics and hardware instrumentation to generate adetailed energy transparency. Tools like this can reason for better hardware/softwareenergy efficiency using a number of different approaches. For example, a compilerbased approach for optimised register cache sizing for modern superscalar proces-sors is proposed in [54]. Using the energy/performance profiles from ISA simulators,the authors demonstrate energy- and performance-proportional architectural optimi-sations.

Recently, energy-modulated computing was proposed by [9, 27], which arguesthat computing systems must have the capability to adapt to input energy constraints.The computation must continue to provide intended functionality of its equivalenteven when energy is scarce. Energy-modulated computing capability can be achievedvia a layered design with heterogeneous computing resources. When more energyis available, the layer with high-complexity and high-accuracy hardware/softwareresources is active. However, at low energy the layer of low-complexity, energy-efficient and less-accurate resources becomes active, powering off the other lay-ers [55] (see Figure 1.7). A key aspect of achieving dynamic controllability in thepower-performance envelope is approximate systems design that can operate withvariable quality-compromised mode when energy is low [56].

Normally-off computing has been proposed by Nakamura et al. [45, 46]. De-sign of computing systems with faster non-volatile memories is a key concept inthis mode of computing. When circuits and systems are designed with these mem-ories, they enable aggressive shutting down the computing components when en-ergy/power is low. The power management features are incorporated at micro-architectural-level, providing the system with survivability.

We are already seeing the penetration of survivability-based systems design inindustrial products, increasingly following the real-power approach. Two relevantexamples are: a) modern smartphones, in which services are reduced progressivelywhen the battery is low or unreliable [57], and b) autonomous drones or vehicles,in which reduced flying/driving capabilities would still be required to ensure safelanding/parking when the power supply is about to fail [58]. Although these products

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do not have autonomous survival instincts reacting to instantaneous power supplyvariations, real-power approach is expected to make this possible.

1.7 Research Challenges and Opportunities

Power-driven computing in the realm of real-power computing continues to be anexciting direction for future research and development. The full-scale design and im-plementation will need concerted efforts across the entire system stack: from powersupply controllers to on-chip sensing and from computation/communication hard-ware to application/system software. In the following, we highlight some importantresearch challenges and opportunities:

1.7.1 Power-Proportional Many-Core SystemsThe current trend of many-core embedded computing is largely motivated by en-ergy/performance tradeoffs. The power envelope for the computing cores is smalland as such they do not lend themselves to dynamic power-proportionality, whichis required to leverage the wider power variations in modern ubiquitous systems.As such, we need to design new heterogeneous architectures that can offer widerpower-proportionality [59]. Approximate circuits and systems design is a promis-ing direction as low-complexity and low-accuracy circuits can drastically cut downpower/energy consumption, with meagre loss of quality [56]. The new architectureswill also need to integrate hardware/software support (such as non-volatile registersor tightly-coupled flash memories) for faster dynamic retention capabilities.

1.7.2 Design Flow and AutomationPower-driven management introduced in real-power computing is clearly a depar-ture from the existing power-agnostic controls. As such, existing electronic designautomation (EDA) tools will not be able to meet the needs of the new paradigm,largely due to the power constraints. New design flows and EDA tools will needto be developed to facilitate power-compute co-design, validation and verification.These tools will use power-compute co-design policies to integrate power budgetingas part of the power regulation systems.

1.7.3 On-Chip Sensing and ControlsReal-power systems will need careful instrumentation of on-chip sensors and knobsto tightly couple power scheduling and resource allocation policies based on the in-coming power. New knobs and monitors need to be developed to sense the incomingpower supply and accurately estimate the power consumption of the hardware andsoftware resources. Moreover, to seamlessly integrate resource allocation and con-trols, hardware-enabled context-switching methods are needed [47]. The contextswitching controls can be either reactive [60] or proactive [61, 62] using low-costmachine learning principles.

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1.7.4 Software and Programming ModelNew software and programming models are needed that can reason for power schedu-lability at hierarchical levels (i.e. more accurately at micro-architectural-level andless accurately at architectural-level). These models will consist of a set of annota-tions and run-time routines. Annotations will dictate the power budgets of modulartasks in heterogeneous computing resources, either statically (for hard real-powersystems) or dynamically (for soft real-power systems), while run-time routines willmanage the system (and its survivability) based around the given power budgets.Interacting with knobs and monitors will be exposed to the run-time through appli-cation programming interfaces.

1.8 Conclusions

Existing low-power design methods largely use performance-constrained power/energyminimisation under reliable energy supply. For new generation of ubiquitous sys-tems with highly variable and unreliable energy supply, we need to design and buildsystems that can operate uninterruptedly under a wide range of power constraints.Underpinning these motivations, we defined and proposed a new, power-driven com-puting paradigm, named Real-Power Computing. Our definitions have been com-plemented with different case studies and exemplars, coupled with reflections andexperiences from existing research efforts. Although this new paradigm has directrelevance to current and future generations of ubiquitous systems, we believe thatthere is a strong impetus for this paradigm to be useful in other computing applica-tions for cost and energy-efficiency considerations.

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