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EMT 235 DIGITAL PRINCIPLES II Chapter 1: Digital Design Concepts Part 3

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EMT 235 DIGITAL PRINCIPLES II

Chapter 1:

Digital Design Concepts

Part 3

Timing Response/ Glitches

Glitch

A glitch is any undesired (unwanted)

voltage or current spike (pulse) of

very short duration.

Happens at extremely short duration.

A glitch can be wrongly interpreted as

a valid signal by a logic circuit and

can cause incorrect system operation.

The 74HC138 used as a

3-to-8-line Decoder

conSiDer …

Figure 6.62 Decoder waveforms with output

glitches.

Figure 6.63 Decoder waveform displays showing how transitional input states produce

glitches in the output waveforms.

Figure 6.64 Application of a strobe waveform to eliminate glitches

on decoder outputs.

A Two-phase Clock

Generator

conSiDer …

Figure 7.62 Two-phase clock generator with ideal waveforms

Figure 7.63 Oscilloscope displays for the

circuit in Figure 7–62.

Glitch caused by a “race” problem between

the CLK signal and the Q and Qbar signals

Figure 7.64 Two-phase clock generator using negative edge-triggered

flip-flop to eliminate glitches.

An Asynchronous

Decade Counter

conSiDer …

© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved Floyd, Digital Fundamentals, 10th ed

Asynchronous Decade Counter

This counter uses partial decoding to recycle the count sequence to zero after the 1001 state. The flip-flops are trailing-edge triggered, so clocks are derived from the Q outputs. Other truncated sequences can be obtained using a similar technique.

Waveforms are on the following slide…

CLK

K0

J0

Q0

C C C

J1 J2

K1 K2

Q1 Q2

HIGH

C

J3

K3

Q3

CLR

© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved Floyd, Digital Fundamentals, 10th ed

Asynchronous Decade Counter

When Q1 and Q3 are HIGH together, the counter is cleared by a “glitch” on the CLR line.

1 2 3 4 5 6 7 8 9 10

Glitch

Glitch

CLK

Q0

Q1

Q2

Q3

CLR

Glitch

Glitch

Glitch & Hazard

Glitch

A short pulse (like spikes), which may

be produced in a circuit’s output, at a

time that the output should not

change.

Hazard

Exist when a circuit has the possibility

of producing glitches.

Hazards

Can happen in:

Combinational circuits

Asynchronous sequential circuits

=> Will need hazard analysis & elimination

Cannot happen in:

Well-designed synchronous circuits.