challenges in open-source risc-v implementations...challenges –possible solutions •do it...
TRANSCRIPT
Challenges in Open-source RISC-V Implementations
Differentiation & Customization
Open Source Hardware – Promises and Hopes
• Great way to collaborate
• Faster development thanks to readily available IP (e.g. peripherals, …)
• Very good for academia
• But not so much for the industry …
Codasip GmbH 2
Open Source Hardware - Challenges
… because there are still big challenges:o Is everything in place?
o Who do I call for help?
o What about physical design issues? Closing timing, etc.
o Can it be customized without breaking it?
o How can the modifications be verified?
o How do I add new instruction support to the compiler?
o …
Codasip GmbH 3
Challenges – Possible Solutions
• Do it yourselfo Requires in-house expertise
o Toolchain maintenance becomes burdensome and expensive
• License off-the-shelf RISC-V processoro Most economical from overall cost-of-ownership
• New organizations that will try to target some of the challengesChip Alliance
OpenHW
lowRISC
o But.... Customization can still be challenging or problematic
• Use professional tools to make it easiero Still lower cost than DIY
o Allows your team to focus on other critical areas of chip design
Codasip GmbH 4
Open source costs
• Creating a production worthy processor is a huge task
o Whether it is from university, govt research, or commercial IP provider
• Supporters of open cores have to extend the deliveries to add missing pieces to put the processor into silicon
o Users need documentation, support, verification reports, synthesis scripts, simulation models, integration for virtual prototyping etc.
Codasip GmbH 5
Example: Automotive and Open Source HW
• ISO 26262 requires an enormous capital investment
o Certification of design practices: ISO 9001o Independent certification of processor design
• Safety design requirements such as MPU, ECC on memories, watchdog timers, synch interface for lockstep.
o Safety certification of C compiler• Which version? Change management?
o Very long (>10 year) support and maintenance obligations
• How can this be managed by the “community”?
Codasip GmbH 6
Who is Codasip?
• The leading provider of RISC-V processor IP
• Founded in 2014 in the Czech Republic
o Based on 10 years of university research on processor design automation
o Founding member of the RISC-V Foundation, www.riscv.org
o Now Codasip GmbH, with offices in Silicon Valley and Czech Republic
• Provides unique design automation tools for easy processor
modification
o Delivers performance/power efficiency and low-cost
o Algorithm accelerators (DSP, security, audio, video, etc.)
o Profiling of embedded SW for tailoring processor IP
• Codasip Bk = portfolio of RISC-V processors
7
Codasip introduced its first RISC-V
processor in November 2015
Codasip GmbH
Bk: Customizable RISC-V Cores
✓ Available immediately
✓ Pre-verified, tape-out quality IP
o Users do not need to verify IP
✓ Industry-standard interfaces
o AMBA for instruction and data bus
o JTAG (4pin/2pin) for debugging
Codasip GmbH 8
✓ Fully customizable
o Support for all RISC-V ISA standard extensions
o Enable easy creation of performance-enhancing
resources, such as:
• Custom registers for computations
• Custom control-status registers
• Novel interfaces such as GPIO, FIFO, scratch-pad
memory
o Even pipeline modifications are possible
• Bk core CodAL source as the starting point for your own
RISC-V core
Bk = the Berkelium series, Codasip’s RISC-V processors. Multiple Options
Codasip RISC-V IP Deliverables
Hardware Development Kit (HDK)
• Verilog RTL
• SystemVerilog UVM test environment (including SystemC co-simulation)
• Automated test suite
• Sample EDA scripts
Software Development Kit (SDK)
• Eclipse IDE
• C/C++ LLVM Compiler
• C/C++ Libraries (Newlib)
• Assembler, linker, disassembler (GNU based)
• High performance instruction set and cycle accurate simulators
• Debugger (enhanced GDB interface)
9Codasip GmbH
Toolchain
• CodeSpace
o Eclipse-based cockpit for software development
• Tools
o LLVM-based C Compiler (7.0.1)
• Codasip optimization improves passes that are already there,
• or adds its own that improve code density or performance.
o Assembler is Codasip’s proprietary tool
• More powerful than LLVM-as
o Linker is based on GNU ld
• More powerful than LLVM LLD
The tools are generated by Studio, so when Studio contains a new version of LLVM or other
tools, the toolchain is updated automatically.
Codasip GmbH 10
Profiler
• Part of SDKs
• Profiling = dynamic form of analysis
o Identifies places in source code that should be
optimized. Applicable to:
• Applications running on an processor
• The processor itself
• Two main modes:
o Tracking/watching
o Instrumentation/annotations
• Codasip IP packages support both modes
• Useful for instruction set extensions
Codasip GmbH 11
Debugger
• Part of SDKs
• Works with both ISS and on-chip debugger
• Aware of custom instructions
o Disassembly view and instruction stepping
• LLDB = open-source debugger built on libraries provided by LLVM and Clang
o Clean architecture with easy-to-extend plugin system
o Its own commands – mapping to gdb commands exists
• Codasip integrates LLVM 7.0.1 in its Studio
Codasip GmbH 12
• SDK management
• You can change the SDK for a software project
with a few clicks
• Profiler perspective
• Integration with profiler tools directly with editors
• Enhanced debugging perspective
• You can view ports, signals or pipeline
• On-chip debugging
• You can move from ISS to on-chip debugging
within the same environment with the same
software project
13Codasip GmbH
CodeSpace: Eclipse-based IDE
Configuration and Custom Extensions
RISC-V offers a wide range of ISA modules:
• I/E for integer instructions
• M for multiplication and division
• C for compact instruction
• F/D for floating point operations
• WIP: B, P, V, …
RISC-V allows
custom
extensions
SDK must be aware
of the custom
extensions
High level
of automation
needed
Codasip has tools for this task:
Codasip Studio
However, it may not be enough for
your application domain or if you are
looking for a key differentiator…
Codasip GmbH 14
What is Codasip Studio?
Codasip Studio CodAL – processor description language
element i_mac {
use reg as dst, src1, src2;
assembly { “mac” dst “,” src1 “,” src2 };
binary { OP_MAC dst src1 src2 0:bit[9] };
semantics {
rf[dst] += rf[src1] * rf[src2];
};
};
Integrated processor development environment
SDK automation
Verification Automation
RTL Automation
Customization of base instruction set:• Single-cycle MAC
• Custom crypto functions
• And many more…
Complete IP package on output:• C/C++ LLVM-based compiler
• C/C++ Libraries
• Assembler, disassembler, linker
• ISS (incl. cycle accurate), debugger, profiler
• UVM SystemVerilog testbench
A unique collection of tools for fast & easy modification of RISC-V processors.
All-in-one, highly automated. Introduced in 2014, silicon-proven by major
vendors.
15Codasip GmbH
Bk Core Customization with Codasip Studio
Codasip GmbH 16
ISA extensions are quickly
implemented and analyzed during
design space exploration
Profiling of embedded application SW
enables processor optimizations
Your RISC-V
HDK
Your RISC-V CodAL
Models
Codasip Studio automatically generates all processor IP design kits and verifies for RISC-V
compliance (you still need to verify your own resources and instructions).
Hardware Design Kit
• RTL models
• Synthesis scripts
• Verification models
and simulators
• Virtual prototypes
Software Design Kit
• Compiler
• Assembler
• Linker
• Debugger
• IDE etc
Codasip Studio
Toolset
Your RISC-V
SDK
Start from Bk3/5/7 cores
1. Add instructions
2. Add resources
3. Modify pipeline
4. …
Conclusion
• Open Source Hardwareo In the early stage
o Great opportunity and it opens many doors
o Still a lot of work in front of us
o Won’t be used by everybody
• Codasip RISC-V Solutionso Reduce the cost of custom processor
development• Automation and usage of standards enable
custom processors to easily integrate into any design environment
o Simplify custom processor programming
• Generate open-source tools for any processor type to deliver powerful technology that is easy to integrate
o Enable extensible and fully custom processor methodologies
• Make small optimizations to proven processor IP, or implement a completely unique processor solution
Codasip GmbH17