CERN CMS Project

Host / SD Card Configuration Data Access

Dave OjikaAlex MadorskyDr. Darin AcostaDr. Ivan Furic

Project Description

• Design of an FPGA SD card system with support for data communication with host processor over PCIe link

• SD card stores configuration data needed to program Core FPGA

• Configuration data can be written to, or read from host via high-bandwidth link enabled by PCIe

PCIe

Host PC

PCI Controller

ConfigurationController

FLASH

Flash Memory Controller

Chip-to-Chip

AXI Bus

To Core FPGA

CURRENT SYSTEM

• Decoupled functional units into separate entities

• Simulated Configuration Controller block

• Will replace Flash Memory Controller block

• PCIe Controller not currently part of design

HostInterface Unit

SD Card

SD Card Controller

M A S T E R

S L A V E

M A S T E R

S L A V E

Wishbone Bus

Bus Arbiter

Host

SD CardInterface

Unit

General House Keeping

SD CARD SYSTEM ARCHITECTURE

• Integrated SD Card Controller IP • CRC, 4-bit data transfer, DMA

• Designed and simulated Wishbone bus and controller

• Simulating and testing Host Interface and SD Card Interface

• Next: Test hardware design on Virtex 7 with micro SD Card

Control

Data

Bus Legend

SD Card Controller

Wishbone Bus

Arbiter

External Host

InterfaceLogic

SD Card Interface

Logic

Host

DESIGN SYNTHESIS

Verification in progress…