ccu8: capture and compare unit 8 - infineon technologies

CCU8: Capture andCompare Unit 8XMC™ microcontrollersSeptember 2016

Agenda

Overview

Key feature: modular timer approach

Key feature: flexible PWM generation

Key feature: flexible capture scheme

System integration

Application examples

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Copyright © Infineon Technologies AG 2016. All rights reserved. 2

Agenda

Overview




System integration


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CCU8Capture/Compare Unit 8

Highlights

One timer architecture serves any usecase. The regular and repetitive slicestructure allows portable software anduse of code generators.

Two compare channels enable thegeneration of up to 4 complementaryPWM signals per timer (16 per CCU8).

Customer benefitsKey feature

› Adjust the timer to the wantedapplication

› Synchronize hardware events tosoftware timing for real-time control

› Generating complementary PWMsignals

› CCU8 serves as timer, counter,capture, compare

› Shadow and buffer mechanism forcoherency

› Dead-time insertion


CCU8Capture/Compare Unit 8

Highlights

The CCU8 is a flexible timer module,comprised with 4 identical timer slicestailored for multi-phase PWMgeneration and signal conditioning.

Several input functions can becontrolled externally (via pins or othermodules) enabling a powerful resourcearrangement for each application.

Customer benefitsKey feature

› Each specific application function canbe ported to any of the 4 timers

› Each timer slice can generate up to 4PWM signals (2 x complementary)

› Parallel capture and compare modes

› Modular timer approach

› Flexible PWM generation

› Flexible capture scheme

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Agenda

Overview




System integration


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CCU8Modular timer approach

› Equal structure and same availability of features for each of the 4 timer slices

› Functions controllable via external signals do not depend on the selected signal

› Portability of code is not dependent on the used timer slice

› High amount of configurable external functions (11), make each timer slice avery flexible HW resource for signal conditioning


Agenda

Overview




System integration


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CCU8Flexible PWM generation

› Each timer slice of the CCU8can operate in center alignedor edge aligned mode

› Additional operation modeslike single shot, counting ordithering modes are alsoavailable

› Complementary PWM signalgeneration with dead time

› HW asymmetric PWMgeneration

› Additional externalcontrollable functions giveanother degree of PWMmanipulation (e.g. timer gate,timer load, timer clear, etc.)

CCU8Timer slice CC 83

Timer slice CC 82Timer slice CC 81

Option: Up/down countcontrol

Start Stop

Count Input:

T1c1

Free running modeOption: reset/gate

Reset(Clear):

GateInput:

Time Time Time

Time

Time

InterruptInterrupt

0

PeriodPeriod

Period

t0 t1

t1– t0=<period>Count DownCount Up

Count Period

PWM0

PWM 0

Compare 1

Compare

Level 1

Symmetric

Asymmetric

0

0 0

U/D ControlInput:

T1N

Period N

Compare N

0

Period N+1

CompareN+1

T2N T2N+1T1N+1

Timer slice CC 80

Timer Edge aligned Edge aligned

Counting Center Aligned Single Shot

16 -bit timerExternal

functions

Period

Compare channel1

Output

functions

PWM:

Compare channel2

Deadtime

PWM 1

Compare 2

PWM 2

PWM 3

T2c1

T1 c2 T2c2

CompareLevel 2

PWM 1

Dead Time

Edge aligned modePWM generation

Period and duty cycleadjustment

Symmetric or AsymmetricPWM by HW


Agenda

Overview




System integration


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CCU8Flexible capture scheme

› Each timer slice of the CCU8 canoperate in compare and/orcapture mode

› Possibility of using the available4 capture registers in twomodes:

– 2 capture triggers

– 1 capture trigger

› A FIFO structure, with afull/empty control, decreasesthe load on the CPU whenreading back fast capture triggerinfo:

– Depth of 2

– Depth of 4

› FIFO structure will always returnthe oldest captured value

Timer Slice CC8y

Start the timerStop the timer

Gate the timer clockUp/down count directionLoad the timerCount eventsStatus bit over ride with aninput valueTRAP for fail-safe opModulate the output

Externalevent

sources

Event 0

Detect

Event 0true

false

H L

GPIOS

Othermodules

Signal

Selection

Signalselection

Event selection

Active: High/lowFalling/rising

Functionselection

Type of Functions

TimerKernel

Usage ofthe

functions

Capture+

Compare

Capture into reg . 0 & 1Capture into reg . 2 & 3

Capture Trigger1

Full /Empty

Full /Empty

Full/Empty

Full /Empty

Full /Empty

Full /Empty

Full /Empty

Full /Empty

Capture Trigger Distribution& Full-Flag Handling Logic

CaptureTrigger 0

Capture trigger distribution & full-flag handling logic


Timer

Capture register 3 Capture register 2

Capture register 0Capture register 1

shiftcapture

Captureon

differentevents

Two FIFO capture structures with a depth of 2

TimerCaptureon thesameevent



One FIFO capture structure with a depth of 4

Usage of up to3 Events in parallel

Capture Trigger1




Agenda

Overview




System integration


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CCU8System integration

› Target applications

– Motor control

– Power conversion

– Human machine interface

– Connectivity

– General purpose

The CCU8 system integration offers severaladvantages:

› Distribution bus over the ERU for complexsignal conditioning application cases

› Usage of interrupts/service requests asflexible connection for ADC conversiontriggering (signal compression)

› Synchronous control over several timers viathe SCU

› The CCU8 is agnostic to the type of signal(feature and type: level, edge)

*Several components may be present or notdepending on the device

SCU

DMA

NVIC

CCU8xTimer Slice CC 83

Timer Slice CC 82Timer Slice CC 81

Timer Slice CC 80


Functions

Period

Compare Channels

Output

Functions

PORTS PORTS

CCU4

POSIF

VADC

PWM +additionaloutputs

ERU

Interrupts/ServiceRequests

Distribution Unit for complex signal conditioning

In

pu

tfu

ncti

on

sco

ntr

ol

Sig

nal

co

mp

ressio

n


Agenda

Overview




System integration


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Application examplePWM for generic purpose (1/2)

For a standard PWM generationapplication, four major functionscan be controlled in each CCU8timer slice:

› Start PWM generation

› Type of counting scheme(edge or center aligned)

› Passive level of the PWM

› Dead time insertion forcomplementary signals

The start of the PWM can beapplied to any combination oftimers.

Additionally a TRAP signal can beconfigured to set the PWM in apre-configured passive state.

Overview

In Brief

Standard functions for generic PWM generation.

Timer Slice CC8yExternal

eventsources

H L

Externalsignals

Signal

Selection

Signalselection

Event selectionFunctionselection

Type offunctions

Timerkernel

Usage

4xPWM

Gate the timer clock

Up/down count direction

Load the Timer

Count events

Status bit override with an input value

TRAP for fail -safe op .

Modulate the output

Outputfunctions

Start

Start multiple timers atthe same time

TRAP

Forcing the

PWM topassive

ON OFF

Edgealigned

Centeraligned

Ext.

TRAP

Timer

TRAP TRPSE =1

PWM 0

TRAP exit can be synchronizedwith the PWM signal

Start the timer

TRAP for fail safe op

Center oredge aligned

PassivelevelTRAP deadtime

PWM 0

PWM1x2

Dead time

PWM1x2


Application examplePWM for generic purpose (2/2)

Application example PWM generation: detailed timing diagram

› For the two available countingschemes: edge and center aligned,different dead times can beprogrammed for the ON and OFFthresholds

› In a straightforward PWM generationit is possible to output up to 4 PWMsignals from the same timer slice:controlling up to two complementaryswitches

› It is possible to combine the twocompare channels and generate anasymmetric complementary PWMsignal by HW

› Dead time is programmable for bothcompare channels. Different dead-time for ON and OFF transition is alsoavailable for each channel


Timer slice CC 82Timer slice CC 81

Timer slice CC 80


functions

Period

Compare channel1

Output

functions

Compare channel2

Deadtime

Compare level

channel 1

Period (PR)

0<(CR1)<(PR)

(CR1)>(PR)

(CR1) == 0

PWM 0

from channel 1 Duty cycle = 0 %

PWM1from channel 1 Duty cycle = 0 %

Compare levelchannel 2

PWM 2

from channel 2

PWM3

from channel 2

Duty cycle =100%

Duty cycle =100%

Dead time OFF > Dead time ON

No dead

timeselected


Asymm.PWM0

from channel1

Symmetric PWM

CR value1

time


Period (PR)

CR value 2

Asymm .PWM 1

from channel 1

Dead time

Asymetric shift

Dead time


Application examplePWM for power conversion (1/4)

Controlling half-bridges

With each CCU8 timer slice, it ispossible to control up to two half-bridges with the same switchingfrequency.

Each of the compare channels isgenerating 2 complementary PWMsignals with configurable dead time.

Dead time values for half-bridge1 can be different from the deadtime values of half-bridge 2.

In this application example, a secondtimer slice (CC83), is being used togenerate the needed ADC conversiontriggers.

Overview

In brief

C1 L1Q3 D1

CoNs

Np

D2

NsQ4C2

CCU8Timer slice CC83

Timer slice CC82Timer slice CC81

Timer slice CC80

16- bit timerExternalfunctions

Period

Compare channel 1

Outputfunctions

Compare channel 2

Deadtime

C1 L1Q1 D1

CoNs

Np

D2

Ns

Q2C2

Half-bridge 1

2xPWM

2xPWM

ADC

CPUTrig

ger(

s)

Conversion

values

New Duty Cycle

Half-bridge 2



Application example two half-bridges with different fs: detailed block diagram

When several half-bridges do not havethe same fs, one timerslice per bridge isneeded.

In this applicationcase, the secondcompare channel isused to generate theconversion trigger(s)for the ADC. With thisa very good resourceutilization isguaranteed.

Different triggerstamp can be used forON and OFF timeframe.

C1 L1Q3 D1

CoNs

Np

D2

NsQ4C2

CCU 8Timer slice CC 81

16 -bit timerExternalfunctions

Period

Compare channel 1

Outputfunctions

Compare channel 2

Deadtime

C1 L1Q1 D1

CoNs

Np

D2

Ns

Q2C2

Half-bridge 1

ADC

CPU

Conversion values

New

du

tycycle

Timer slice CC 80


Period

Compare channel 1

Outputfunctions

DeadtimeCompare channel 2

2xPWM

Conversion triggers

PWM time

Period(PR)

PWM time

Period(PR)

fs1

fs2

Compare level

channel 1

PWM 0

from channel1

time

Compare level

channel 2

Period (PR)

PWM 1from channel 1

Dead timeDead time

CR value (n)

CR value (n+1)

Value for compare of channel 2is updated to a new value

ADC trigger ADC trigger

Half-bridge 2

2xPWM



› Phase shift control

There are several powerconverter topologies thatimplement phase shift betweenone or more signals(complementary or not).

A known topology is the 2 or 3phase buck converter or aphase shift full bridge.

While for a 3 phase buckconverter the phase shift isfixed, this is not true for aphase shift full bridge.

With the CCU8 timers it iseasier to control a phaseshift mechanism, for fixedand/or variable phase shift.

Overview

In brief

Interleaved PFC



Period

Compare channel 1

Outputfunctions

Compare channel 2

Deadtime

Timer slice CC81


Period

Compare channel 1

Outputfunctions


2xPWM

Phase shift

Timer slice CC82


Period

Compare channel 1

Outputfunctions


Phase shift

› Compare channel 2 controls the phase shift:it can be a fixed phase shift or updated on acycle-by-cycle way

› Each timer can then generate theappropriate phase shifted signals with dead-time

First phase

Second phase= [0º, >360º]

Phase shift full bridge

N- phase converter

L1

L2

L3

=120º

=120º

...

Second phase= [0º, >360º]

2xPWM

2xPWM



Application example phase shiftfull bridge: timing diagram

CC80 timer is generatingthe PWM signals for Q1and Q2 switches. Theseare complementary signalswith dead time.

With compare channel 2 ofthe CC80 timer it is possibleto start the CC81 timer.This will dictate then thephase shift of CC81regarding to CC80.

Due to the fact that it ispossible to update thecompare channel 2 value on-the-fly, the phase shiftcan be from 0 to > 360°.



functions

Period

Compare channel 1

Outputfunctions

Compare channel 2

Deadtime

ADC

CPU

Conversion values

New

ph

ase

sh

ift

valu

e

Timer slice CC81


functions

Period Outputfunctions

Deadtime 2xPWM

2xPWM

Conversion triggers

L1

Q1

D1

CoNs

Np

D2

Ns

Q2

Full bridge

Q3

Q4

VIN

GND

Ip

Dead time

Ip

Q1

Q2

Q3

Q4

time

Phase shift

Compare level

channel 1

Q1 time

Compare level

channel 2

Period(PR)

Q2

Dead timeDeadtime

Phase shiftvalue

Start CC 81Timer If phase shift is >180º

Compare level

channel 1

Q3time

Period(PR)

Q4

Dead timeDead time

Phase shift value

Compare channel 1

Compare channel 2


Application examplePWM for motor control (1/3)

› Motor control PWM

Controlling a 3-phase motor isa common application withinthe motor control world, thatcan be simply done by theCCU8.

Each CCU8 timer cancontrol a motor phase withcomplementary switches.

If a higher resource utilizationdensity is needed, it ispossible to control with justone timer, two phases inparallel.

The CCU8 timers are able togenerate the proper PWMpatterns for SVM and blockcommutation.

Overview

In brief

C+

C-

B+

B-

A+

A-

+

-

N

S

A

C

B

Phase A

Phase B

Phase C

Phase C

Phase A + Phase B

Independent timers perphaseMore flexibility

Only 2 timers needed

More motors in parallel


16-bit timerExternalfunctions

Period

Compare channel 1

Outputfunctions

Compare channel 2

Deadtime

Timer slice CC81


Period

Compare channel 1

Outputfunctions


2xPWM

Timer slice CC82


Period

Compare channel 1

Outputfunctions


2xPWM

2xPWM



Period

Compare channel 1

Outputfunctions

Compare channel 2

Deadtime

Timer slice CC81


Period

Compare channel 1

Outputfunctions


OR

4xPWM

2xPWM



Application example SVM pattern generation: timing diagram

SVM patterngeneration can bedone in asymmetric orasymmetric way.

In asymmetricfashion one timerper phase isneeded.

Asymmetric waygives moreflexibility forsampling shuntcurrents via theADC.

PWM A+time

Period (PRy)

Timer (CC80)

PWM A-

PWM B+

PWM B-

Timer (CC 81)

PWM C+

PWM C-

Timer (CC 82)

time

time

Compare 1

PWM A +time

Period (PRy)

Timer (CC80)

PWM A -

PWM B +

PWM B -

Timer (CC81)

PWM C +

PWM C -

Timer (CC82 )

time

time

More time forADC samplingLess time for

ADC sampling

Symmetric SVM PWM Asymmetric SVM PWM

Compare 1

Compare 1 Compare 1

Compare 1

Compare 1

Compare 2



Application example block commutation PWM generation: timing diagram

› Several blockcommutationpatternschemes canbe controlledby the CCU8

› Link betweenCCU8 andPOSIFinterface givesflexibility forany type ofoutput patterngeneration.

time

PWM A+

PWM A-

PWM B+

PWM B-

PWM C+

PWM C-

time

PWM A+

PWM A-

PWM B+

PWM B-

PWM C+

PWM C-

time

PWM A+

PWM A-

PWM B+

PWM B-

PWM C+

PWM C-

Different block commutation patterns



Period

Compare channel 1

Output

functions

Compare channel 2

Deadtime

Timer slice CC 81

16-bit timerExternal

functions

Period Output

functions

Deadtime

2xPWM

Timer slice CC 82


functions

Period Output

functions

Deadtime

Phase A

Phase B

Phase C

POSIFMulti -channel pattern

Controlling synchronously and inparallel all the PWM outputs

Phase A+/A- passive

Compare channel 1

Compare channel 2

Compare channel 1

Compare channel 2

2xPWM

2xPWM

Phase B+/B- passive

Phase C+/C- passive


Application exampleADC triggering with service requests (1/2)

It may be necessary in someapplications to generateseveral ADC conversiontriggers synchronized with aPWM signal.

In a motor control applicationit may be necessary tomeasure several shuntcurrents in each PWM cycle.

The CCU8 offers a way tocompress all the conversiontriggers to the ADC via justone signal. This enables abetter optimization ofresources and connectivity.

Overview

In brief

› Using the service requests tocompress ADC triggers

CCU 8

Interrupt logic OR

Timer slice CC 80


functions

Period

Compare channel

Deadtime

Timer slice CC 81


functions

Period

Compare channel

Deadtime

ADC

conversion

PORTS

A-/A+

Conversions

Servicerequest

Timer slice CC 82


functions

Period

Compare channel

Deadtime

PORTS

B-/B+

PORTS

C-/C+

IA IBIC

C+

C-

B+

B-

A+

A-

+

-

N

S

A

C

B


Application example: signal compression with

service requests (2/2)

Application example grouped conversion triggers: timing diagram

In this example, we are usingthe second compare of eachtimer slice to trigger adelayed conversion trigger tothe ADC.

All the triggers are groupedtogether in a service requestline.

Additionally, the conversiontimestamp for the second180° part of the signals canalso be used to trigger aconversion. This timestamp canbe different from the first one.

Compare 1

PWM A+time

Period (PRy)

PWM A-

PWM B+

PWM B-

Compare 1

PWM C+

PWM C-

time

time

Compare 1

To ADC via one

conversion signal

Compare 2

Compare 2

Compare 2

Two triggers per cycle.

Trigger timestamp can be

updated on-the-fly

conversions

Service request X


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Infineon Technologies hereby disclaims any and all warranties andliabilities of any kind (including without limitation warranties of non-infringement of intellectual property rights of any third party) withrespect to any and all information given in this training material.

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ccu8: capture and compare unit 8 - infineon technologies

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