c26a2 compal la-8941p

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Intel Sandy Bridge ULV Processor + Panther Point PCHQ1VZC M/B Schematics Document

REV:1.0

Compal Confidential

2012-04-19

Model Name : Q1VZCFile Name :LA-8941P

Compal Confidential

BOM P/N:43

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

1.0

Cover PageCustom

1 45Friday, April 20, 2012

2011/11/22 2012/11/22Compal Electronics, Inc.

Q1VZC M/B LA-8941P Schematic

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ZZZ4

LS-8943PDA2@

ZZZ5

PCBDAZ@

ZZZ1

LA-8941PDA2@

ZZZ2

LS-8941PDA2@

ZZZ3

LS-8942PDA2@

AA

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

LVDS/eDP Conn.page 22page 23

HDMI Conn.

LVDS(UMA)TMDS(UMA)

CLK=100MHz

CLK=33MHz

2.5GB/s x4

DMI x4

100MHz

FDI x8

page 13

SPISATA x 6 (GEN2 3.0GT/S ,GEN3 6GT/S)

RTC CKT.page 13

3.3V 24MHz

CMOSCamera

PCI-Express x 8(PCIE2.0 5GT/s)

Dual Channel

2.7GT/s

Power On/Off CKT.Touch Pad

LPC BUS

Processor

BANK 0, 1, 2, 3

USB 2.0conn x1(Option for USB3.0)

DC/DC Interface CKT.

Sandy Bridge ULV

page 29

Power Circuit DC/DC

page 36

204pin DDRIII-SO-DIMM X2

page 33

Intel

1.5V DDRIII 1066/1333

Memory BUS(DDRIII)

PCHHD Audio

page 4~10

Panther Point-M

page 11,12

page 30

ENE KB9012

page 34 page 22

BGA1023

Intel

SPI ROM x2

page 34~43

USBx14 3.3V 48MHz

page 13~21 SATA HDDConn.

989pin BGA

LAN(GbE)/CardReaderBroadcom 57785page 25

CLK=100MHz

eDP(UMA)

page 28IO/B

USB 2.0 conn x2

page 30

page 24

GEN3

LS-8942P

Port 1

100MHz

MINI CardWLAN

page 36

Port 8

Port 2,3 Port 10

Port 3 Port 2

page 31

page 31ALC271X-VB6HDA Codec

Int. Speaker

Port 0

17W

Model Name : Q1VZCFile Name :LA-8941P

Compal Confidential

page 30LED/BLS-8941P

LS-8943P

page 24HDD/B

CRT Connpage 24

RGB(UMA)

Int.KBDpage 30

TPMpage 30

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AA

B

B

C

C

D

D

E

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1 1

2 2

3 3

4 4

ON OFF OFF

+0.75VS +0.75VP to +0.75VS switched power rail for DDR terminator

+RTCVCC RTC power

+1.5VS+1.8VS (+5VALW or +3VALW) to 1.8V switched power rail to PCH & GPU

+3VS+5VALW

+3VALW +3VALW always on power rail

+VSB +VSBP to +VSB always on power rail for sequence control ON ON*ONON

ONON

OFF+1.5V to +1.5VS switched power rail

+CPU_CORE

Voltage Rails

VIN

B+

+1.05VS_VTT

Adapter power supply (19V)

AC or battery power rail for power circuit.Core voltage for CPU

+1.05VS_VTTP to +1.05VS_VTT switched power rail for CPU

ONOFF

ON

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

ON

ONON ON*

OFF

OFFON ON*

+VCCSUS3_3 +3VALW to +VCCSUS3_3 power rail for PCH (Short Jump) ON ON

S1

+5VREF_SUS

S3 S5

ON

ON ON

N/A N/A N/A

N/AN/AN/A

Power Plane Description

OFF

+1.5VP to +1.5V power rail for DDRIII ON ON OFF

OFF

+1.5V

ON OFF OFFON OFF OFF

+VGFX_CORE Core voltage for UMA graphic ON OFF OFF

BATT+ Battery power supply (12.6V) N/A N/A N/A

ON*+3VALW to +3VS power rail +5VALWP to +5VALW power rail +5VALW to +5VREF_SUS power rail for PCH (Short resister)

+5VS +5VALW to +5VS switched power rail OFFON OFFON*

EC SM Bus1 addressDevice

PCH SM Bus addressDevice Address

AddressSmart Battery 0001 011X b

ChannelA DIMM0 A0 1010 000X JDIMM1(STD)

1.453 V 1.650 V 1.759 V1.935 V2.500 V

2.200 V3.300 V

2.341 V

1.185 V 1.264 V

STATESIGNAL

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

ON

ON

ON

ON

ON

ON

ON ON

ON

ON

ON

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

LOW

LOW LOW LOW LOW

LOWLOWLOW

LOW

LOW

LOW

HIGH HIGH HIGH HIGH

HIGHHIGHHIGH

HIGH

HIGH

HIGH

USB 2.0(Options for USB3.0)

USB Port(Left 2.0)

USB 2.0 USB 1.1 Port 3 ExternalUSB Port

Camera

0123456789

10111213

UHCI0

UHCI1

UHCI2

UHCI3

UHCI4

UHCI5

UHCI6

EHCI1

EHCI2

USB Port Table

BOARD ID Table Board ID

01234567

PCB Revision0.1

USB port(Left 2.0)

Mini Card(WLAN)

Board ID / SKU ID Table for AD channelVcc 3.3V +/- 5%

100K +/- 5%Ra/Rc/ReBoard ID Rb / Rd / Rf V min

0123

08.2K +/- 5%

0 V0.216 V 0.250 V 0.289 V0.436 V0.712 V

0.503 V0.819 V

0.538 V0.875 V

AD_BID V typAD_BID VAD_BID max

18K +/- 5%33K +/- 5%56K +/- 5%100K +/- 5%200K +/- 5%

3.300 V

0 V 0 V

4567 NC

1.036 V

eDP PanelLVDS@EDP@

LVDS Panel

Unpop @

CONN@Connector

BTO Option TableBTO Item BOM Structure

XHCI

1234

PortUSB 3.0

USB Port(Right 3.0)

USB3@USB3 Only

ChannelB DIMM0 B0 1010 010X JDIMM2(REV)

Celeron 867Pentium 977

C867@P977@

Normal S3 S3@Deep S3 DS3@

0.2

Intel i5/i7 CPU onlyCeleron/Pentium/i3CPU only

I57@

CP3@

0.31.0

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C

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PEG_ICOMPI and RCOMPO signals should beshorted and routedwith - max length = 500 mils - typicalimpedance = 43 mohmsPEG_ICOMPO signals should be routed with -max length = 500 mils- typical impedance = 14.5 mohms

eDP_COMPIO and ICOMPO signalsshould be shorted near balls androuted with typical impedance

AA

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Buffered reset to CPUFollow DG 1.5 & Tacoma_Fall2 1.0 Use open drain logic gate:

+1.05VS_VTT PU pop 75ohmseries resister pop 43ohm

reserve XBOX

CPU

RESET#:

ok

CPU

reset

PROC_SELECT#PH VCPLL and connect to PCH DF_TVSPCH->CPU

UNCOREPWRGOOD:

CORE

OKSM_DRAMPWROK:DRAM power okRESET#:

ok

CPU

reset

DDR3 Compensation Signals

Use open drain logic gate:+1.5V_CPU_VDDQ PU pop 200ohmseries resister pop 130ohm

follow Checklist 1.5

Follow DG 1.5 & Tacoma_Fall2 1.0

SM_DRAMPWROK:DRAM power ok

UNCOREPWRGOOD:

CORE

OK

Follow DG 1.5& Tacoma_Fall2 1.0SM_RCOMP0,SM_RCOMP1W=20mil L=500mil S=13mil

SM_RCOMP2W=15mil L=500mil S=13mil

Checklist1.5 P.67 Graphis Disable GuideeDP disable:DPLL_REF_SSCLK PD 1K_5% to GNDDPLL_REF_SSCLK# PU 1K_5% to +1.05VS_VTT

0921 LVDS@->@

Tacoma_Fall2 1.0 PU 1K +3VSCheck list 1.5 PU 1K +3VSDebug port DG1.1-1.3 50~5K ohm

12/22 Add(ESD request)

XDP_TDIXDP_TDO

BUF_CPU_RST#

PM_SYS_PWRGD_BUF

H_CATERR#

CLK_CPU_DPLL#CLK_CPU_DPLL

H_CPUPWRGD_R

XDP_TCKXDP_TMSXDP_TRST#

XDP_DBRESET#

SM_RCOMP1SM_RCOMP2

SM_RCOMP0

BUFO_CPU_RST#

H_CPUPWRGD

H_PROCHOT#_RH_PROCHOT#

PM_DRAM_PWRGD_R

PLT_RST# PM_DRAM_PWRGD_R

BUF_CPU_RST#

SM_DRAMRST#H_PECI

CLK_CPU_DPLL

CLK_CPU_DPLL#

XDP_DBRESET#

H_CPUPWRGD_R

+1.05VS_VTT

+1.5V_CPU_VDDQ

+1.05VS_VTT

+3VALW

+3VS

+1.05VS_VTT

+3VS

H_SNB_IVB#

H_PECI

H_PROCHOT#

H_THRMTRIP#

H_PM_SYNC

H_CPUPWRGD

PLT_RST#

SYS_PWROK

PM_DRAM_PWRGD

CLK_CPU_DMI CLK_CPU_DMI#

CLK_CPU_DPLL CLK_CPU_DPLL#

SM_DRAMRST#

XDP_DBRESET#

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R17 1K_0402_5%12

[email protected]_0402_16V4Z

1

2

R10 25.5_0402_1%12

R856_0402_5%

1 2

R140_0402_5%

@1 2

R9 140_0402_1%12

R13 0_0402_5%1 2

R1543_0402_1%1 2

R5 1K_0402_5%LVDS@ 12

C

L

O

C

K

S

MISC

THERMAL

PWR MANAGEMENT

D

D

R

3

M

I

S

C

J

T

A

G

&

B

P

M

UCPU1B

IVY-BRIDGE_BGA1023C867@

SM_RCOMP[1] BE43SM_RCOMP[2] BG43

SM_DRAMRST# AT30

SM_RCOMP[0] BF44

BCLK# H2BCLK J3

DPLL_REF_CLK# AG1DPLL_REF_CLK AG3

CATERR#C49

PECIA48

PROCHOT#C45

THERMTRIP#D45

SM_DRAMPWROKBE45

RESET#D44

PRDY# N53PREQ# N55

TCK L56TMS L55

TRST# J58

TDI M60TDO L59

DBR# K58

BPM#[0] G58BPM#[1] E55BPM#[2] E59BPM#[3] G55BPM#[4] G59BPM#[5] H60BPM#[6] J59BPM#[7] J61

PM_SYNCC48

PROC_DETECT#C57

PROC_SELECT#F49

UNCOREPWRGOODB46

C670.1U_0402_16V4Z

1

2

T4PAD@

R4 1K_0402_5%LVDS@ 12

T1 PAD @

T5PAD@

C476

180P_0402_50V8J

@12

R7 62_0402_5%12

R11 200_0402_1%12

R16200_0402_5%

1

2

C65 0.1U_0402_16V4Z@

12

U1

SN74LVC1G07DCKR_SC70-5

NC1

A2

G

3

Y 4

P

5

R6 10K_0402_5%12

R18 130_0402_5%1 2

U2

MC74VHC1G09DFT2G_SC70-5

B1

A2Y 4

V

C

C

5

G

3

T3PAD@T2PAD@

R1275_0402_5%

1

2

AA

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

CPUDIMMreset

S0DRAMRST_CNTRL_PCH hgih ,MOS ONSM_DRAMRST# HIGH,DDR3 DRAMRST# HIGHDimm not resetS3DRAMRST_CNTRL_PCH Low ,MOS OFFSM_DRAMRST# lo,DDR3 DRAMRST# HIGHDimm not resetS4,5DRAMRST_CNTRL_PCH Low ,MOS OFFSM_DRAMRST# lo,DDR3 DRAMRST# lowDimm reset

Follow CRB1.0

DDR_A_D63DDR_A_D62

DDR_A_D8

DDR_A_D3DDR_A_D4

DDR_A_D7

DDR_A_D5DDR_A_D6

DDR_A_D59DDR_A_D58DDR_A_D57DDR_A_D56

DDR_A_D47DDR_A_D46

DDR_A_D42DDR_A_D43

DDR_A_D34

DDR_A_D39

DDR_A_D44DDR_A_D45

DDR_A_D35

DDR_A_D41DDR_A_D40

DDR_A_D38

DDR_A_D36DDR_A_D37

DDR_A_D32DDR_A_D33

DDR_A_D61DDR_A_D60

DDR_A_D2DDR_A_D1DDR_A_D0

DDR_A_D55DDR_A_D54

DDR_A_D51

DDR_A_D48

DDR_A_D50DDR_A_D49

DDR_A_D52DDR_A_D53

DDR_A_D31

DDR_A_D14DDR_A_D15

DDR_A_D25DDR_A_D24

DDR_A_D26DDR_A_D27

DDR_A_D30

DDR_A_D9

DDR_A_D13DDR_A_D12

DDR_A_D10DDR_A_D11

DDR_A_D29DDR_A_D28

DDR_A_D19DDR_A_D20

DDR_A_D16

DDR_A_D21

DDR_A_D17

DDR_A_D22

DDR_A_D18

DDR_A_D23

DDR_A_MA15

DDR_A_MA0

DDR_A_MA14

DDR_A_MA5DDR_A_MA4

DDR_A_MA1DDR_A_MA2DDR_A_MA3

DDR_A_MA9

DDR_A_MA7DDR_A_MA6

DDR_A_MA12DDR_A_MA13

DDR_A_MA8

DDR_A_MA11DDR_A_MA10

DDR_B_D33

DDR_B_D14

DDR_B_D42

DDR_B_D59

DDR_B_D63

DDR_B_D43

DDR_B_D55

DDR_B_D53

DDR_B_D29

DDR_B_D24

DDR_B_D34

DDR_B_D4

DDR_B_D26

DDR_B_D13

DDR_B_D10

DDR_B_D21

DDR_B_D11

DDR_B_D57

DDR_B_D44

DDR_B_D0

DDR_B_D7

DDR_B_D46

DDR_B_D3

DDR_B_D15

DDR_B_D27

DDR_B_D30

DDR_B_D35

DDR_B_D40

DDR_B_D49

DDR_B_D23

DDR_B_D25

DDR_B_D19

DDR_B_D37

DDR_B_D48

DDR_B_D36

DDR_B_D18

DDR_B_D8

DDR_B_D47

DDR_B_D9

DDR_B_D60

DDR_B_D50

DDR_B_D62

DDR_B_D52

DDR_B_D2

DDR_B_D51

DDR_B_D56

DDR_B_D39

DDR_B_D22

DDR_B_D28

DDR_B_D6

DDR_B_D45

DDR_B_D17

DDR_B_D58

DDR_B_D61

DDR_B_D31

DDR_B_D54

DDR_B_D1

DDR_B_D41

DDR_B_D5

DDR_B_D12

DDR_B_D20

DDR_B_D38

DDR_B_D32

DDR_B_D16

DDR_B_MA15

DDR_B_MA0

DDR_B_MA9

DDR_B_MA7

DDR_B_MA13

DDR_B_MA2

DDR_B_MA4

DDR_B_MA11

DDR_B_MA3

DDR_B_MA5DDR_B_MA6

DDR_B_MA10

DDR_B_MA8

DDR_B_MA1

DDR_B_MA12

DDR_B_MA14

DIMM_DRAMRST#_RSM_DRAMRST#

DDR_A_DQS#7

DDR_A_DQS#0

DDR_A_DQS#2

DDR_A_DQS#5

DDR_A_DQS#3

DDR_A_DQS#1

DDR_A_DQS#4

DDR_A_DQS#6

DDR_A_DQS0

DDR_A_DQS2DDR_A_DQS1

DDR_A_DQS6DDR_A_DQS5DDR_A_DQS4DDR_A_DQS3

DDR_A_DQS7DDR_B_DQS7

DDR_B_DQS0DDR_B_DQS1

DDR_B_DQS5DDR_B_DQS4DDR_B_DQS3DDR_B_DQS2

DDR_B_DQS6

DDR_B_DQS#1

DDR_B_DQS#7

DDR_B_DQS#5DDR_B_DQS#4

DDR_B_DQS#0

DDR_B_DQS#3

DDR_B_DQS#6

DDR_B_DQS#2

RST_GATE_R

+1.5V

DDR_A_D[0..63]

SA_CLK_DDR0 SA_CLK_DDR#0 DDRA_CKE0_DIMMA

DDR_B_D[0..63]

SA_CLK_DDR1 SA_CLK_DDR#1 DDRA_CKE1_DIMMA

DDRA_CS0_DIMMA# DDRA_CS1_DIMMA#

SA_ODT0 SA_ODT1

DDR_A_DQS#[0..7]

DDR_A_DQS[0..7]

DDR_A_MA[0..15]

DIMM_DRAMRST#

DDR_A_BS1DDR_A_BS2

DDR_A_BS0

DDR_A_RAS#DDR_A_WE#

DDR_A_CAS#

SM_DRAMRST#

RST_GATE

EC_RST_GATE

RST_GATE_R

DDR_B_BS1DDR_B_BS2

DDR_B_BS0

DDR_B_RAS#DDR_B_WE#

DDR_B_CAS#

DDR_B_DQS#[0..7]

DDR_B_DQS[0..7]

DDR_B_MA[0..15]

SB_CLK_DDR0 SB_CLK_DDR#0 DDRB_CKE0_DIMMB

SB_CLK_DDR1 SB_CLK_DDR#1 DDRB_CKE1_DIMMB

DDRB_CS0_DIMMB# DDRB_CS1_DIMMB#

SB_ODT0 SB_ODT1

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R201K_0402_5%

1

2

D

D

R

S

Y

S

T

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M

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O

R

Y

B

UCPU1D


SB_CK[0] BA34

SB_CK[1] BA36

SB_CK#[0] AY34

SB_CK#[1] BB36

SB_CKE[0] AR22

SB_CKE[1] BF27

SB_ODT[0] AT43SB_ODT[1] BG47

SB_DQS[4] BE51

SB_DQS#[4] BG51

SB_DQS[5] BA61

SB_DQS#[5] BA59

SB_DQS[6] AR59

SB_DQS#[6] AT60

SB_DQS[7] AK61

SB_DQS#[7] AK59

SB_DQS[0] AM2

SB_DQS#[0] AL3

SB_DQS[1] AV1

SB_DQS#[1] AV3

SB_DQS[2] BE11

SB_DQS#[2] BG11

SB_DQS[3] BD18

SB_DQS#[3] BD17

SB_MA[0] BF32SB_MA[1] BE33SB_MA[2] BD33SB_MA[3] AU30SB_MA[4] BD30SB_MA[5] AV30SB_MA[6] BG30SB_MA[7] BD29SB_MA[8] BE30SB_MA[9] BE28

SB_MA[10] BD43SB_MA[11] AT28SB_MA[12] AV28SB_MA[13] BD46SB_MA[14] AT26SB_MA[15] AU22

SB_DQ[0]AL4SB_DQ[1]AL1SB_DQ[2]AN3SB_DQ[3]AR4SB_DQ[4]AK4SB_DQ[5]AK3SB_DQ[6]AN4SB_DQ[7]AR1SB_DQ[8]AU4SB_DQ[9]AT2SB_DQ[10]AV4SB_DQ[11]BA4SB_DQ[12]AU3SB_DQ[13]AR3SB_DQ[14]AY2SB_DQ[15]BA3SB_DQ[16]BE9SB_DQ[17]BD9SB_DQ[18]BD13SB_DQ[19]BF12SB_DQ[20]BF8SB_DQ[21]BD10SB_DQ[22]BD14SB_DQ[23]BE13SB_DQ[24]BF16SB_DQ[25]BE17SB_DQ[26]BE18SB_DQ[27]BE21SB_DQ[28]BE14SB_DQ[29]BG14SB_DQ[30]BG18SB_DQ[31]BF19SB_DQ[32]BD50SB_DQ[33]BF48SB_DQ[34]BD53SB_DQ[35]BF52SB_DQ[36]BD49SB_DQ[37]BE49SB_DQ[38]BD54SB_DQ[39]BE53SB_DQ[40]BF56SB_DQ[41]BE57SB_DQ[42]BC59SB_DQ[43]AY60SB_DQ[44]BE54SB_DQ[45]BG54SB_DQ[46]BA58SB_DQ[47]AW59SB_DQ[48]AW58SB_DQ[49]AU58SB_DQ[50]AN61SB_DQ[51]AN59SB_DQ[52]AU59SB_DQ[53]AU61SB_DQ[54]AN58SB_DQ[55]AR58SB_DQ[56]AK58SB_DQ[57]AL58SB_DQ[58]AG58SB_DQ[59]AG59SB_DQ[60]AM60SB_DQ[61]AL59SB_DQ[62]AF61SB_DQ[63]AH60

SB_CS#[0] BE41SB_CS#[1] BE47

SB_CAS#AV43SB_RAS#BF40SB_WE#BD45

SB_BS[0]BG39SB_BS[1]BD42SB_BS[2]AT22

D

D

R

S

Y

S

T

E

M

M

E

M

O

R

Y

A

UCPU1C


SA_CK[0] AU36

SA_CK[1] AT40

SA_CK#[0] AV36

SA_CK#[1] AU40

SA_CKE[0] AY26

SA_CKE[1] BB26

SA_CS#[0] BB40SA_CS#[1] BC41

SA_ODT[0] AY40SA_ODT[1] BA41

SA_DQS[0] AJ11

SA_DQS#[0] AL11

SA_DQS[1] AR10

SA_DQS#[1] AR8

SA_DQS[2] AY11

SA_DQS#[2] AV11

SA_DQS[3] AU17SA_DQS[4] AW45

SA_DQS#[4] AV45

SA_DQS[5] AV51

SA_DQS#[5] AY51

SA_DQS[6] AT56

SA_DQS#[6] AT55

SA_DQS[7] AK54

SA_DQS#[7] AK55

SA_MA[0] BG35SA_MA[1] BB34SA_MA[2] BE35SA_MA[3] BD35SA_MA[4] AT34SA_MA[5] AU34SA_MA[6] BB32SA_MA[7] AT32SA_MA[8] AY32SA_MA[9] AV32

SA_MA[10] BE37SA_MA[11] BA30SA_MA[12] BC30SA_MA[13] AW41SA_MA[14] AY28SA_MA[15] AU26

SA_DQ[0]AG6SA_DQ[1]AJ6SA_DQ[2]AP11SA_DQ[3]AL6SA_DQ[4]AJ10SA_DQ[5]AJ8SA_DQ[6]AL8SA_DQ[7]AL7SA_DQ[8]AR11SA_DQ[9]AP6SA_DQ[10]AU6SA_DQ[11]AV9SA_DQ[12]AR6SA_DQ[13]AP8SA_DQ[14]AT13SA_DQ[15]AU13SA_DQ[16]BC7SA_DQ[17]BB7SA_DQ[18]BA13SA_DQ[19]BB11SA_DQ[20]BA7SA_DQ[21]BA9SA_DQ[22]BB9SA_DQ[23]AY13SA_DQ[24]AV14SA_DQ[25]AR14SA_DQ[26]AY17SA_DQ[27]AR19SA_DQ[28]BA14SA_DQ[29]AU14SA_DQ[30]BB14SA_DQ[31]BB17SA_DQ[32]BA45SA_DQ[33]AR43SA_DQ[34]AW48SA_DQ[35]BC48SA_DQ[36]BC45SA_DQ[37]AR45SA_DQ[38]AT48SA_DQ[39]AY48SA_DQ[40]BA49SA_DQ[41]AV49SA_DQ[42]BB51SA_DQ[43]AY53SA_DQ[44]BB49SA_DQ[45]AU49SA_DQ[46]BA53SA_DQ[47]BB55SA_DQ[48]BA55SA_DQ[49]AV56SA_DQ[50]AP50SA_DQ[51]AP53SA_DQ[52]AV54SA_DQ[53]AT54SA_DQ[54]AP56SA_DQ[55]AP52SA_DQ[56]AN57SA_DQ[57]AN53SA_DQ[58]AG56SA_DQ[59]AG53SA_DQ[60]AN55SA_DQ[61]AN52SA_DQ[62]AG55SA_DQ[63]AK56

SA_CAS#BE39SA_RAS#BD39SA_WE#AT41

SA_BS[0]BD37SA_BS[1]BF36SA_BS[2]BA28

SA_DQS#[3] AT17

G

DS

Q1BSS138_NL_SOT23-3

2

13

R230_0402_5%

DS3@1 2

R190_0402_5%

@1 2

R224.99K_0402_1%

1

2

R21 1K_0402_5%1 2

C680.047U_0402_16V7K

1

2

R240_0402_5%

DS3@1 2

AA

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

These pins are for solder joint reliability and non-critical to function. For BGA only.

10: 2x8 PCI Express

PCIE Port Bifurcation Straps

CFG[6:5]11: (Default) 1x16 PCI Express

CFG7

PEG DEFER TRAINING

0: PEG Wait for BIOS for training

1: (Default) PEG Train immediately following xxRESETB de assertion

CFG4

eDP enable

0:Enable1:Disable

CFG Straps for Processor

01: Reserved00: 1x8,2x4 PCI Express

PEG Static Lane Reversal - CFG2 is for the 16x

CFG20:Lane Reversed

1: Normal Operation; Lane # definition matchessocket pin map definition

*

*

*

UMA,Optimus eDP

DISO eDP

Tacoma_Fall2 1.0 P.12

VAXG_VAL_SENSE

VCC_VAL_SENSEVSS_VAL_SENSE

CFG2

CFG4CFG5CFG6CFG7

VSSAXG_VAL_SENSE

DC_TEST_C4_D3

DC_TEST_A59_C59

DC_TEST_A61_C61

DC_TEST_BE59_BE61

DC_TEST_BG59_BG61

DC_TEST_BE3_BG3

DC_TEST_BE1_BG1

CFG4

CFG5

CFG2

CFG7

CFG0

CFG6

Title


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PROCESSOR(4/7) RSVD,CFGCustom




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T38 PAD @

T7 PAD @

R311K_0402_1%

@

1

2

R331K_0402_1%@

1

2

R

E

S

E

R

V

E

D

UCPU1E


CFG[0]B50CFG[1]C51CFG[2]B54CFG[3]D53CFG[4]A51CFG[5]C53CFG[6]C55CFG[7]H49CFG[8]A55CFG[9]H51CFG[10]K49CFG[11]K53CFG[12]F53CFG[13]G53CFG[14]L51CFG[15]F51CFG[16]D52CFG[17]L53

DC_TEST_A4 A4

DC_TEST_A58 A58DC_TEST_A59 A59

DC_TEST_A61 A61

DC_TEST_BD1 BD1

DC_TEST_BD61 BD61

DC_TEST_BE1 BE1DC_TEST_BE3 BE3

DC_TEST_BE59 BE59DC_TEST_BE61 BE61

DC_TEST_BG1 BG1DC_TEST_BG3 BG3DC_TEST_BG4 BG4

DC_TEST_BG58 BG58DC_TEST_BG59 BG59DC_TEST_BG61 BG61

DC_TEST_C4 C4

DC_TEST_C59 C59

DC_TEST_C61 C61

DC_TEST_D1 D1DC_TEST_D3 D3

DC_TEST_D61 D61

VCC_VAL_SENSEH43VSS_VAL_SENSEK43

VAXG_VAL_SENSEH45VSSAXG_VAL_SENSEK45

VCC_DIE_SENSEF48

RSVD41 AH2RSVD42 AG13RSVD43 AM14RSVD44 AM15

RSVD8BA19RSVD9AV19RSVD10AT21RSVD11BB21RSVD12BB19RSVD13AY21RSVD14BA22RSVD15AY22RSVD16AU19RSVD17AU21RSVD18BD21RSVD19BD22RSVD20BD25RSVD21BD26RSVD22BG22RSVD23BE22RSVD24BG26RSVD25BE26RSVD26BF23RSVD27BE24

RSVD45 N50

RSVD30 N42RSVD31 L42RSVD32 L45RSVD33 L47

RSVD34 M13RSVD35 M14RSVD36 U14RSVD37 W14RSVD38 P13

RSVD39 AT49RSVD40 K24

RSVD6H48RSVD7K48

BCLK_ITP N59BCLK_ITP# N58

T39 PAD @

R281K_0402_1%

EDP@

1

2

R251K_0402_1%@

1

2

T40 PAD @

R321K_0402_1%@

1

2

T8 PAD @

T37 PAD @

AA

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

8.5A

Should change to connect formpower cirucit & layout differentialwith VCCIO_SENSE.

ULV typeDC 33A

Place the PUresistors close to CPU

Place the PUresistors close to VR

*BC22

VCCIO_SEL after Ivy bridge ES2 Voltage support

0: +1.0VS_VTT1/NC : (Default) +1.05VS_VTT

INTEL Recommend VCC4*470UF,12*22uF(0805) and 35*2.2uF(0402) PD0.8CAP at P.51

INTEL Recommend VCCIO2*330UF,10*10uF(0603) and 26*1uF(0402) PD0.8CAP at P.51

Check list 1.5

For DDR

For PEG

VSSIO_SENSE

VSSSENSE_RVCCSENSE_R

H_CPU_SVIDALRT#H_CPU_SVIDCLKH_CPU_SVIDDAT

VCCIO_SEL

VCCIO_SEL

+CPU_CORE

+1.05VS_VTT+1.05VS_VTT

+1.05VS_VTT

+1.05VS_VTT

+1.05VS_VTT

+CPU_CORE

+3VS

+1.05VS_VTT

SVID_ALERT# SVID_CLK SVID_DATA

VCCSENSE VSSSENSE

VCCIO_SENSE

Title


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1.0

PROCESSOR(5/7) PWR,BYPASSCustom




Title


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R38 43_0402_1%1 2

R40 0_0402_5%1 2

POWER

C

O

R

E

S

U

P

P

L

Y

P

E

G

I

O

A

N

D

D

D

R

I

O

S

E

N

S

E

L

I

N

E

S

S

V

I

D

Q

U

I

E

T

R

A

I

L

S

UCPU1F


VCC_SENSE F43VSS_SENSE G43

VIDALERT#A44

VIDSCLK B43VIDSOUT C44

VSS_SENSE_VCCIO AN17

VCC[1]A26VCC[2]A29VCC[3]A31VCC[4]A34VCC[5]A35VCC[6]A38VCC[7]A39VCC[8]A42VCC[9]C26VCC[10]C27VCC[11]C32VCC[12]C34VCC[13]C37VCC[14]C39VCC[15]C42VCC[16]D27VCC[17]D32VCC[18]D34VCC[19]D37VCC[20]D39VCC[21]D42VCC[22]E26VCC[23]E28VCC[24]E32VCC[25]E34VCC[26]E37VCC[27]E38VCC[28]F25VCC[29]F26VCC[30]F28VCC[31]F32VCC[32]F34VCC[33]F37VCC[34]F38VCC[35]F42VCC[36]G42VCC[37]H25VCC[38]H26VCC[39]H28VCC[40]H29VCC[41]H32VCC[42]H34VCC[43]H35VCC[44]H37VCC[45]H38VCC[46]H40VCC[47]J25VCC[48]J26VCC[49]J28VCC[50]J29VCC[51]J32VCC[52]J34VCC[53]J35VCC[54]J37VCC[55]J38VCC[56]J40VCC[57]J42VCC[58]K26VCC[59]K27VCC[60]K29VCC[61]K32VCC[62]K34VCC[63]K35VCC[64]K37VCC[66]K39VCC[67]K42VCC[68]L25VCC[69]L28VCC[70]L33VCC[71]L36VCC[72]L40VCC[73]N26VCC[74]N30VCC[75]N34VCC[76]N38

VCCIO[1] AF46VCCIO[3] AG48VCCIO[4] AG50VCCIO[5] AG51VCCIO[6] AJ17VCCIO[7] AJ21VCCIO[8] AJ25VCCIO[9] AJ43

VCCIO[10] AJ47VCCIO[11] AK50VCCIO[12] AK51VCCIO[13] AL14VCCIO[14] AL15VCCIO[15] AL16VCCIO[16] AL20VCCIO[17] AL22VCCIO[18] AL26VCCIO[19] AL45VCCIO[20] AL48VCCIO[21] AM16VCCIO[22] AM17VCCIO[23] AM21VCCIO[24] AM43VCCIO[25] AM47VCCIO[26] AN20VCCIO[27] AN42VCCIO[28] AN45VCCIO[29] AN48

VCCIO[30] AA14VCCIO[31] AA15VCCIO[32] AB17VCCIO[33] AB20VCCIO[34] AC13VCCIO[35] AD16VCCIO[36] AD18VCCIO[37] AD21VCCIO[38] AE14VCCIO[39] AE15VCCIO[40] AF16VCCIO[41] AF18VCCIO[42] AF20VCCIO[43] AG15VCCIO[44] AG16VCCIO[45] AG17VCCIO[46] AG20VCCIO[47] AG21VCCIO[48] AJ14VCCIO[49] AJ15

VCCIO50 W16VCCIO51 W17

VCCPQE[1] AM25VCCPQE[2] AN22

VCCIO_SENSE AN16

VCCIO_SEL BC22

R36130_0402_5%

1

2

R43 0_0402_5%1 2

R44 10_0402_5%1 2

R39 0_0402_5%1 2

R3410K_0402_5%

@

1

2

R4610_0402_5%

1

2

R45100_0402_1%

1

2

R3510K_0402_5%

@

1

2

C691U_0402_6.3V6K

1 2

R41100_0402_1%

1

2

R3775_0402_5%

1

2

R42 0_0402_5%1 2

AA

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

DC 16A

INTEL Recommend VCCPLL1*330uF,2*1uF(0402) PD0.8

5A

6A

CPU EDS1.3 P.93VCCSA_VID0 Must PD

1.2A

Place BOT OUT Conn

1

HR CR0

00 X1

1 1

VV V

VVVX

Vout0.9V0.85V0.775V

VCCSAVID0

0.75V

VID10

SGA20331E10 S POLY C 330U2V Y D2 LESR9M EEFSX H1.9

INTEL Recommend VAXG2*470uF,6*22uF(0805) and 6*10uF(0603) 11*1U(0402)PD0.8 INTEL Recommend VDDQ1*330uF,8*10uF(0603) ,10*1uF(0402)

PD0.8

INTEL Recommend VCCSA1*330uF,5*10uF(0603) ,5*1uF(0402)PD0.8

+V_SM_VREF shouldhave 20 mil trace width

Place BOT OUT BGA

SGA20331E10 S POLY C 330U2V Y D2 LESR9M EEFSX H1.9

SA_DIMM_VREFDQSB_DIMM_VREFDQCheck list1.5 P18 M1 default M3 no stuff

SGA00001700 S POLY C 220U220U 2.5V M B2 ESR35 TPE H1.9

CR CheckList Rev1.5

Place TOP IN BGA

Place BOT OUT BGA

Place TOP IN BGA

H_VCCSA_VID0H_VCCSA_VID1

+V_SM_VREF

SA_DIMM_VREFDQSB_DIMM_VREFDQ

+VCCSA

+VGFX_CORE

+VCCSA

+1.5VS

+1.8VS

+VGFX_CORE

+1.5V_CPU_VDDQ

+1.5V_CPU_VDDQ

+1.5V_CPU_VDDQ

VCC_GFXSENSEVSS_GFXSENSE

H_VCCSA_VID0 H_VCCSA_VID1

VCCSA_SENSE

SA_DIMM_VREFDQ SB_DIMM_VREFDQ

Title


Date: Sheet of




1.0

PROCESSOR(6/7) PWRCustom




Title


Date: Sheet of




1.0





Title


Date: Sheet of




1.0





C951U_0402

_6.3V6K

1

2

C961U_0402

_6.3V6K

1

2

R481K_0402_5%

1

2

C8910U_0603

_6.3V6M

1

2

C731U_0402

_6.3V6K

1

2

C10410U_0603

_6.3V6M

1

2

C791U_0402

_6.3V6K

1

2

R52

100_0402_5%

1

2

C8610U_0603

_6.3V6M

1

2

C761U_0402

_6.3V6K

1

2

R530_0402_5%

@1

2

C981U_0402

_6.3V6K

1

2

C771U_0402

_6.3V6K

1

2

+ C94330U_D2_2V_Y

1

2

C991U_0402

_6.3V6K

1

2

C931U

_0402_6

.3V6K

1

2

C921U

_0402_6

.3V6K

1

2

C801U_0402

_6.3V6K

1

2

C741U_0402

_6.3V6K

1

2

C751U_0402

_6.3V6K

1

2

R501K_0402_1%@

1

2

R471K_0402_5%

1

2

R51

100_0402_5%

1

2

+ C81330U_D2_2V_Y

1

2

C10110U_0603

_6.3V6M

1

2

C8510U_0603

_6.3V6M

1

2

J1

JUMP_43X118@

1 2

C10310U_0603

_6.3V6M

1

2

C901U_0402_6.3V6K

1

2

C781U_0402

_6.3V6K

1

2

C8210U_0603

_6.3V6M

1

2

C721U_0402

_6.3V6K

1

2

C8410U_0603

_6.3V6M

1

2

C10210U_0603

_6.3V6M

1

2

C700.1U_0402_16V4Z

1

2

C8310U_0603

_6.3V6M

1

2

C8810U_0603

_6.3V6M

1

2

POWER

G

R

A

P

H

I

C

S

D

D

R

3

-

1

.

5

V

R

A

I

L

S

1

.

8

V

R

A

I

L

S

E

N

S

E

L

I

N

E

S

S

A

R

A

I

L

S

E

N

S

E

L

I

N

E

S

Q

U

I

E

T

R

A

I

L

S

V

R

E

F

V

C

C

S

A

V

I

D

l

i

n

e

s

UCPU1G


SM_VREF AY43VAXG[1]AA46VAXG[2]AB47VAXG[3]AB50VAXG[4]AB51VAXG[5]AB52VAXG[6]AB53VAXG[7]AB55VAXG[8]AB56VAXG[9]AB58VAXG[10]AB59VAXG[11]AC61VAXG[12]AD47VAXG[13]AD48VAXG[14]AD50VAXG[15]AD51VAXG[16]AD52VAXG[17]AD53VAXG[18]AD55VAXG[19]AD56VAXG[20]AD58VAXG[21]AD59VAXG[22]AE46VAXG[23]N45VAXG[24]P47VAXG[25]P48VAXG[26]P50VAXG[27]P51VAXG[28]P52VAXG[29]P53VAXG[30]P55VAXG[31]P56VAXG[32]P61VAXG[33]T48VAXG[34]T58VAXG[35]T59VAXG[36]T61VAXG[37]U46VAXG[38]V47VAXG[39]V48VAXG[40]V50VAXG[41]V51VAXG[42]V52VAXG[43]V53VAXG[44]V55VAXG[45]V56VAXG[46]V58VAXG[47]V59VAXG[48]W50VAXG[49]W51VAXG[50]W52VAXG[51]W53VAXG[52]W55VAXG[53]W56VAXG[54]W61

VDDQ[11] AM40VDDQ[12] AN30VDDQ[13] AN34VDDQ[14] AN38VDDQ[15] AR26

VDDQ[1] AJ28VDDQ[2] AJ33VDDQ[3] AJ36VDDQ[4] AJ40VDDQ[5] AL30VDDQ[6] AL34VDDQ[7] AL38VDDQ[8] AL42VDDQ[9] AM33

VDDQ[10] AM36

VCCPLL[1]BB3VCCPLL[2]BC1

VCCSA_SENSE U10

VCCSA_VID[1] D49

VAXG[55]Y48VAXG[56]Y61

VCCPLL[3]BC4

VAXG_SENSEF45VSSAXG_SENSEG45

VCCSA[1]L17

VCCSA[10]R21

VCCSA[12]V16VCCSA[13]V17VCCSA[14]V18

VCCSA[4]N20VCCSA[5]N22VCCSA[6]P17

VCCSA[9]R18

VDDQ[16] AR28VDDQ[17] AR30VDDQ[18] AR32VDDQ[19] AR34VDDQ[20] AR36VDDQ[21] AR40VDDQ[22] AV41VDDQ[23] AW26VDDQ[24] BA40VDDQ[25] BB28VDDQ[26] BG33

VCCSA[11]U15

VCCSA[15]V21VCCSA[16]W20

VCCSA[2]L21VCCSA[3]N16

VCCDQ[1] AM28VCCDQ[2] AN26

VCCSA[7]P20VCCSA[8]R16

VDDQ_SENSE BC43VSS_SENSE_VDDQ BA43

VCCSA_VID[0] D48

SA_DIMM_VREFDQ BE7SB_DIMM_VREFDQ BG7

C10010U_0603

_6.3V6M

1

2

R491K_0402_1%

@

1

2

C711U_0402

_6.3V6K

1

2

C971U_0402

_6.3V6K

1

2

+ C91

220U_B2_2.5VM_R35@

1

2

C8710U_0603

_6.3V6M

1

2

AA

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Title


Date: Sheet of




1.0

PROCESSOR(7/7) VSSCustom




Title


Date: Sheet of




1.0





Title


Date: Sheet of




1.0





VSS

UCPU1H


VSS[1]A13VSS[2]A17VSS[3]A21VSS[4]A25VSS[5]A28VSS[6]A33VSS[7]A37VSS[8]A40VSS[9]A45VSS[10]A49VSS[11]A53VSS[12]A9VSS[13]AA1VSS[14]AA13VSS[15]AA50VSS[16]AA51VSS[17]AA52VSS[18]AA53VSS[19]AA55VSS[20]AA56VSS[21]AA8VSS[22]AB16VSS[23]AB18VSS[24]AB21VSS[25]AB48VSS[26]AB61VSS[27]AC10VSS[28]AC14VSS[29]AC46VSS[30]AC6VSS[31]AD17VSS[32]AD20VSS[33]AD4VSS[34]AD61VSS[35]AE13VSS[36]AE8VSS[37]AF1VSS[38]AF17VSS[39]AF21VSS[40]AF47VSS[41]AF48VSS[42]AF50VSS[43]AF51VSS[44]AF52VSS[45]AF53VSS[46]AF55VSS[47]AF56VSS[48]AF58VSS[49]AF59VSS[50]AG10VSS[51]AG14VSS[52]AG18VSS[53]AG47VSS[54]AG52VSS[55]AG61VSS[56]AG7VSS[57]AH4VSS[58]AH58VSS[59]AJ13VSS[60]AJ16VSS[61]AJ20VSS[62]AJ22VSS[63]AJ26VSS[64]AJ30VSS[65]AJ34VSS[66]AJ38VSS[67]AJ42VSS[68]AJ45VSS[69]AJ48VSS[70]AJ7VSS[71]AK1VSS[72]AK52VSS[73]AL10VSS[74]AL13VSS[75]AL17VSS[76]AL21VSS[77]AL25VSS[78]AL28VSS[79]AL33VSS[80]AL36VSS[81]AL40VSS[82]AL43VSS[83]AL47VSS[84]AL61VSS[85]AM13VSS[86]AM20VSS[87]AM22VSS[88]AM26VSS[89]AM30VSS[90]AM34

VSS[91] AM38VSS[92] AM4VSS[93] AM42VSS[94] AM45VSS[95] AM48VSS[96] AM58VSS[97] AN1VSS[98] AN21VSS[99] AN25

VSS[100] AN28VSS[101] AN33VSS[102] AN36VSS[103] AN40VSS[104] AN43VSS[105] AN47VSS[106] AN50VSS[107] AN54VSS[108] AP10VSS[109] AP51VSS[110] AP55VSS[111] AP7VSS[112] AR13VSS[113] AR17VSS[114] AR21VSS[115] AR41VSS[116] AR48VSS[117] AR61VSS[118] AR7VSS[119] AT14VSS[120] AT19VSS[121] AT36VSS[122] AT4VSS[123] AT45VSS[124] AT52VSS[125] AT58VSS[126] AU1VSS[127] AU11VSS[128] AU28VSS[129] AU32VSS[130] AU51VSS[131] AU7VSS[132] AV17VSS[133] AV21VSS[134] AV22VSS[135] AV34VSS[136] AV40VSS[137] AV48VSS[138] AV55VSS[139] AW13VSS[140] AW43VSS[141] AW61VSS[142] AW7VSS[143] AY14VSS[144] AY19VSS[145] AY30VSS[146] AY36VSS[147] AY4VSS[148] AY41VSS[149] AY45VSS[150] AY49VSS[151] AY55VSS[152] AY58VSS[153] AY9VSS[154] BA1VSS[155] BA11VSS[156] BA17VSS[157] BA21VSS[158] BA26VSS[159] BA32VSS[160] BA48VSS[161] BA51VSS[162] BB53VSS[163] BC13VSS[164] BC5VSS[165] BC57VSS[166] BD12VSS[167] BD16VSS[168] BD19VSS[169] BD23VSS[170] BD27VSS[171] BD32VSS[172] BD36VSS[173] BD40VSS[174] BD44VSS[175] BD48VSS[176] BD52VSS[177] BD56VSS[178] BD8VSS[179] BE5VSS[180] BG13

VSS

N

C

T

F

UCPU1I


VSS[181]BG17VSS[182]BG21VSS[183]BG24VSS[184]BG28VSS[185]BG37VSS[186]BG41VSS[187]BG45VSS[188]BG49VSS[189]BG53VSS[190]BG9VSS[191]C29VSS[192]C35VSS[193]C40VSS[194]D10VSS[195]D14VSS[196]D18VSS[197]D22VSS[198]D26VSS[199]D29VSS[200]D35VSS[201]D4VSS[202]D40VSS[203]D43VSS[204]D46VSS[205]D50VSS[206]D54VSS[207]D58VSS[208]D6VSS[209]E25VSS[210]E29VSS[211]E3VSS[212]E35VSS[213]E40VSS[214]F13VSS[215]F15VSS[216]F19VSS[217]F29VSS[218]F35VSS[219]F40VSS[220]F55VSS[221]G51VSS[222]G6VSS[223]G61VSS[224]H10VSS[225]H14VSS[226]H17VSS[227]H21VSS[228]H4VSS[229]H53VSS[230]H58VSS[231]J1VSS[232]J49VSS[233]J55VSS[234]K11VSS[235]K21VSS[236]K51VSS[237]K8VSS[238]L16VSS[239]L20VSS[240]L22VSS[241]L26VSS[242]L30VSS[243]L34VSS[244]L38VSS[245]L43VSS[246]L48

VSS[268] P14VSS[269] P16VSS[270] P18VSS[271] P21VSS[272] P58VSS[273] P59VSS[274] P9VSS[275] R17VSS[276] R20VSS[277] R4VSS[278] R46VSS[279] T1VSS[280] T47VSS[281] T50VSS[282] T51VSS[283] T52VSS[284] T53VSS[285] T55VSS[286] T56VSS[287] U13VSS[288] U8VSS[289] V20VSS[290] V61

VSS_NCTF_1 A5VSS_NCTF_2 A57VSS_NCTF_3 BC61VSS_NCTF_4 BD3VSS_NCTF_5 BD59VSS_NCTF_6 BE4VSS_NCTF_7 BE58VSS_NCTF_8 BG5VSS_NCTF_9 BG57

VSS_NCTF_10 C3VSS_NCTF_11 C58VSS_NCTF_12 D59VSS_NCTF_13 E1VSS_NCTF_14 E61

VSS[250] M4VSS[251] M58VSS[252] M6VSS[253] N1VSS[254] N17VSS[255] N21VSS[256] N25VSS[257] N28VSS[258] N33VSS[259] N36VSS[260] N40VSS[261] N43VSS[262] N47VSS[263] N48VSS[264] N51VSS[265] N52VSS[266] N56VSS[267] N61

VSS[247]L61VSS[248]M11

VSS[291] W13VSS[292] W15VSS[293] W18VSS[294] W21VSS[295] W46VSS[296] W8VSS[297] Y4VSS[298] Y47VSS[299] Y58VSS[300] Y59

VSS[249]M15

VSS[301] G48

AA

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

All VREF traces shouldhave 10 mil trace width

Layout Note:Place near JDIMM1.203,204

Layout Note:Place near JDIMM1

Channel A

SGA20331E10330U 2V H1.9 9mohm POLY

M3 support(unpop)

SP07000JN10

DIMM_1 Standard H:4.0mm1/3 Modify

D_CK_SDATAD_CK_SCLK

+VREF_CA

+V_DDR_REFA

DDRA_CS0_DIMMA#SA_ODT0

SA_ODT1

SA_CLK_DDR1SA_CLK_DDR#1

DDR_A_MA2DDR_A_MA0

DDR_A_MA4DDR_A_MA6

DDR_A_MA7DDR_A_MA11

DDR_A_MA14

DDR_A_BS1DDR_A_RAS#

DDR_A_MA15

DDRA_CKE1_DIMMA

DDR_A_D4DDR_A_D5

DDR_A_D6DDR_A_D7

DDR_A_D21

DDR_A_D28DDR_A_D29

DDR_A_DQS0

DDR_A_DQS3

DDR_A_DQS#0

DDR_A_DQS#3

DIMM_DRAMRST#

DDR_A_D23

DDR_A_D31

DDR_A_D13

DDR_A_D20

DDR_A_D30

DDR_A_D14DDR_A_D15

DDR_A_D12

DDR_A_D22

DDR_A_D36DDR_A_D37

DDR_A_D45

DDR_A_D46

DDR_A_D52DDR_A_D53

DDR_A_D55

DDR_A_D60DDR_A_D61

DDR_A_D62

DDR_A_DQS5

DDR_A_DQS7

DDR_A_DQS#5

DDR_A_DQS#7

DDR_A_D63

DDR_A_D39

DDR_A_D54

DDR_A_D38

DDR_A_D47

DDR_A_D44

DDR_A_D32

DDR_A_D34DDR_A_D35

DDR_A_D40DDR_A_D41

DDR_A_D42DDR_A_D43

DDR_A_D49

DDR_A_D50DDR_A_D51

DDR_A_D56DDR_A_D57

DDR_A_D58DDR_A_D59

DDR_A_DQS4

DDR_A_DQS6

DDR_A_DQS#4

DDR_A_DQS#6

DDR_A_D48

DDR_A_D33

DDRA_CS1_DIMMA#

DDR_A_MA1DDR_A_MA3

DDR_A_MA5DDR_A_MA8

DDR_A_MA9

DDR_A_MA10

DDR_A_MA12

DDR_A_MA13

DDR_A_BS0

DDR_A_BS2

DDR_A_CAS#DDR_A_WE#

DDRA_CKE0_DIMMA


DDR_A_D0

DDR_A_D2

DDR_A_D1

DDR_A_D3

DDR_A_D8

DDR_A_D10DDR_A_D11

DDR_A_D18DDR_A_D19

DDR_A_D26DDR_A_D27

DDR_A_DQS1

DDR_A_DQS2

DDR_A_DQS#1

DDR_A_DQS#2

DDR_A_D17

DDR_A_D9

DDR_A_D16

DDR_A_D25DDR_A_D24

+3VS

+0.75VS

+0.75VS

+0.75VS

+1.5V

+1.5V

+1.5V

+1.5V

+1.5V +1.5V+V_DDR_REFA+1.5V

SA_DIMM_VREFDQ

RST_GATE_R

DDRA_CKE0_DIMMA

DDR_A_BS2


DDR_A_BS0

DDR_A_WE#DDR_A_CAS#

DDRA_CS1_DIMMA#

DDR_A_DQS#[0..7] DDR_A_DQS[0..7]

DDR_A_D[0..63] DDR_A_MA[0..15]

DIMM_DRAMRST#

DDRA_CKE1_DIMMA

SA_CLK_DDR1 SA_CLK_DDR#1

DDR_A_BS1 DDR_A_RAS#

DDRA_CS0_DIMMA# SA_ODT0

SA_ODT1

D_CK_SCLK D_CK_SDATA

Title


Date: Sheet of




1.0

DDRIII DIMMACustom




Title


Date: Sheet of




1.0

DDRIII DIMMACustom




Title


Date: Sheet of




1.0

DDRIII DIMMACustom




C106

0.1U

_0402_16V4Z

1

2

C124

1U_0402

_6.3V6K

1

2

R59

10K_0402

_5%

1

2

C111

10U_0603

_6.3V6M

1

2

R550_0402_5%

@1 2

R561K_0402_1%

1

2

C115

10U_0603

_6.3V6M

1

2

C126

2.2U

_0603_6

.3V6K

1

2

C107

1U_0402

_6.3V6K

1

2

JDIMM1

TYCO_2-2013022-1CONN@

VREF_DQ1 VSS1 2VSS23 DQ4 4DQ05 DQ5 6DQ17 VSS3 8VSS49 DQS#0 10DM0

11DQS0 12

VSS513 VSS6 14DQ215 DQ6 16DQ317 DQ7 18VSS719 VSS8 20DQ821 DQ12 22DQ923 DQ13 24VSS925 VSS10 26DQS#127 DM1 28DQS129 RESET# 30VSS1131 VSS12 32DQ1033 DQ14 34DQ1135 DQ15 36VSS1337 VSS14 38DQ1639 DQ20 40DQ1741 DQ21 42VSS1543 VSS16 44DQS#245 DM2 46DQS247 VSS17 48VSS1849 DQ22 50DQ1851 DQ23 52DQ1953 VSS19 54VSS2055 DQ28 56DQ2457 DQ29 58DQ2559 VSS21 60VSS2261 DQS#3 62DM3

63DQS3 64

VSS2365 VSS24 66DQ2667 DQ30 68DQ2769 DQ31 70VSS2571 VSS26 72

A12/BC#83 A11 84A9

85A7

86

VDD587

VDD688

A889

A690

CKE073 CKE1 74VDD1

75VDD2

76

NC177 A15 78BA2

79A14

80

VDD381

VDD482

A591

A492

VDD793

VDD894

A395

A296

A197

A098

VDD999

VDD10100

CK0101 CK1 102CK0#103 CK1# 104VDD11

105VDD12

106

A10/AP107 BA1 108BA0

109RAS# 110

VDD13111

VDD14112

WE#113 S0# 114

CAS#115 ODT0 116VDD15

117VDD16

118

A13119 ODT1 120

S1#121 NC2 122VDD17

123VDD18

124

NCTEST125 VREF_CA 126VSS27127 VSS28 128DQ32129 DQ36 130DQ33131 DQ37 132VSS29133 VSS30 134DQS#4135 DM4 136DQS4137 VSS31 138VSS32139 DQ38 140DQ34141 DQ39 142DQ35143 VSS33 144VSS34145 DQ44 146DQ40147 DQ45 148DQ41149 VSS35 150VSS36151 DQS#5 152DM5

153DQS5 154

VSS37155 VSS38 156DQ42157 DQ46 158DQ43159 DQ47 160VSS39161 VSS40 162DQ48163 DQ52 164DQ49165 DQ53 166VSS41167 VSS42 168DQS#6169 DM6 170DQS6171 VSS43 172VSS44173 DQ54 174DQ50175 DQ55 176DQ51177 VSS45 178VSS46179 DQ60 180DQ56181 DQ61 182DQ57183 VSS47 184VSS48185 DQS#7 186DM7

187DQS7 188

VSS49189 VSS50 190DQ58191 DQ62 192DQ59193 DQ63 194VSS51195 VSS52 196SA0197 EVENT# 198VDDSPD199 SDA 200SA1201 SCL 202VTT1

203VTT2

204

G1205 G2 206

C113

10U_0603

_6.3V6M

1

2

C122

1U_0402

_6.3V6K

1

2

C119

2.2U

_0603_6

.3V6K

1

2

C116

10U_0603

_6.3V6M

1

2

C125

0.1U

_0402_16V4Z

1

2

R571K_0402_1%

1

2

C105

2.2U

_0603_6

.3V6K

1

2

C114

10U_0603

_6.3V6M

1

2

R581K_0402_1%

1

2

C108

1U_0402

_6.3V6K

1

2

G

DS

Q2BSS138_NL_SOT23-3

@

2

13

C110

1U_0402

_6.3V6K

1

2

C120

0.1U

_0402_16V4Z

1

2

R541K_0402_1%

1

2

C121

1U_0402

_6.3V6K

1

2

R60

10K_0402_5%

1

2

+ C118330U_D2_2V_Y

1

2

C109

1U_0402

_6.3V6K

1

2

C117

10U_0603

_6.3V6M

@

1

2

C123

1U_0402

_6.3V6K

1

2

C112

10U_0603

_6.3V6M

1

2

AA

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

SGA20331E10330U 2V H1.9 9mohm POLY

All VREF traces shouldhave 10 mil trace width

M3 support(unpop)

Layout Note:Place near JDIMM2.203,204

Layout Note:Place near JDIMM2

Channel B12/21 Modify

DIMM_2 Reverse H:4.0mm

SP07000KW00

DDR_B_D0

DDR_B_D2

DDR_B_D1

DDR_B_D3

DDR_B_D8

DDR_B_D10DDR_B_D11

DDR_B_D18DDR_B_D19

DDR_B_D26DDR_B_D27

DDR_B_DQS1

DDR_B_DQS2

DDR_B_DQS#1

DDR_B_DQS#2

DDR_B_D17

DDR_B_D9

DDR_B_D16

DDR_B_D25DDR_B_D24

+V_DDR_REFBDDR_B_D4DDR_B_D5

DDR_B_D6DDR_B_D7

DDR_B_D21

DDR_B_D28DDR_B_D29

DDR_B_DQS0

DDR_B_DQS3

DDR_B_DQS#0

DDR_B_DQS#3

DIMM_DRAMRST#

DDR_B_D23

DDR_B_D31

DDR_B_D13

DDR_B_D20

DDR_B_D30

DDR_B_D14DDR_B_D15

DDR_B_D12

DDR_B_D22

DDRB_CKE0_DIMMB

DDR_B_BS2

DDR_B_MA9DDR_B_MA12

DDR_B_MA8DDR_B_MA5

DDR_B_MA1DDR_B_MA3

SB_CLK_DDR0SB_CLK_DDR#0

DDR_B_MA10DDR_B_BS0

DDR_B_CAS#DDR_B_WE#

DDRB_CS1_DIMMB#DDR_B_MA13

DDR_B_D32DDR_B_D33

DDR_B_DQS4DDR_B_DQS#4

DDR_B_D34DDR_B_D35

DDR_B_D40DDR_B_D41

DDR_B_D43

DDR_B_D49DDR_B_D48


DDR_B_D50DDR_B_D51

DDR_B_D56DDR_B_D57

DDR_B_D58DDR_B_D59

DDR_B_D42

DDRB_CKE1_DIMMB

DDR_B_MA14DDR_B_MA15

DDR_B_MA7DDR_B_MA11

DDR_B_MA4DDR_B_MA6

DDR_B_MA2DDR_B_MA0


DDR_B_BS1DDR_B_RAS#

DDRB_CS0_DIMMB#SB_ODT0

SB_ODT1

+VREF_CB

DDR_B_D36DDR_B_D37

DDR_B_D39DDR_B_D38

DDR_B_D45


DDR_B_D46DDR_B_D47

DDR_B_D44

DDR_B_D52DDR_B_D53

DDR_B_D55DDR_B_D54

DDR_B_D61


DDR_B_D62DDR_B_D63

D_CK_SDATAD_CK_SCLK

DDR_B_D60

+0.75VS

+1.5V

+1.5V

+1.5V

+1.5V +1.5V+V_DDR_REFB+1.5V

+3VS

+0.75VS

+1.5V

+0.75VS

DDR_B_DQS[0..7]

DDR_B_MA[0..15]

SB_DIMM_VREFDQ

DIMM_DRAMRST#

DDR_B_DQS#[0..7]

DDR_B_D[0..63]

RST_GATE_R

DDRB_CKE0_DIMMB

DDR_B_BS2


DDR_B_BS0

DDR_B_CAS#DDR_B_WE#

DDRB_CS1_DIMMB#

DDRB_CKE1_DIMMB

SB_CLK_DDR1 SB_CLK_DDR#1

DDR_B_BS1 DDR_B_RAS#

DDRB_CS0_DIMMB# SB_ODT0

SB_ODT1

D_CK_SCLK D_CK_SDATA

Title


Date: Sheet of




1.0

DDRIII DIMMBCustom




Title


Date: Sheet of




1.0

DDRIII DIMMBCustom




Title


Date: Sheet of




1.0

DDRIII DIMMBCustom




C140

1U_0402

_6.3V6K

1

2

C135

0.1U

_0402_16V4Z

1

2

C141

1U_0402

_6.3V6K

1

2

R6410K

_0402_5%

1

2

C133

10U_0603

_6.3V6M

1

2

C142

10U_0603

_6.3V6M

1

2

C129

0.1U

_0402_16V4Z

1

2

C127

2.2U

_0603_6

.3V6K

1

2

C143

1U_0402

_6.3V6K

1

2

C136

2.2U

_0603_6

.3V6K

1

2

C128

1U_0402

_6.3V6K

1

2

R651K_0402_1%

1

2

C137

10U_0603

_6.3V6M

1

2

R671K_0402_1%

1

2

R661K_0402_1%

1

2

R61 10K_0402_5%1 2

JDIMM2

TYCO_2-2013287-1CONN@

VREF_DQ1VSS3DQ05DQ17VSS9DM0

11

VSS13DQ215DQ317VSS19DQ821DQ923VSS25DQS1#27DQS129VSS31DQ1033DQ1135VSS37DQ1639

VSS 2DQ4 4DQ5 6VSS 8

DQS0# 10DQS0 12

VSS 14DQ6 16DQ7 18VSS 20

DQ12 22DQ13 24

VSS 26DM1

28

RESET# 30VSS 32

DQ14 34DQ15 36

VSS 38DQ20 40

DQ1741VSS43DQS2#45DQS247VSS49DQ1851DQ1953VSS55DQ2457DQ2559VSS61DM3

63

VSS65DQ2667DQ2769VSS71

CKE073VDD

75

NC77BA2

79

VDD81

A12/BC#83A9

85

VDD87

A889

A591

VDD93

A395

A197

VDD99

CK0101CK0#103VDD

105

A10/AP107BA0

109

VDD111

WE#113

CAS#115VDD

117

A13119

S1#121VDD

123

TEST125VSS127DQ32129DQ33131VSS133DQS4#135DQS4137VSS139DQ34141DQ35143VSS145DQ40147DQ41149VSS151DM5

153

VSS155DQ42157DQ43159VSS161DQ48163DQ49165VSS167DQS6#169DQS6171VSS173DQ50175DQ51177VSS179DQ56181DQ57183VSS185DM7

187

VSS189DQ58191DQ59193VSS195SA0197VDDSPD199

DQ21 42VSS 44DM2

46

VSS 48DQ22 50DQ23 52

VSS 54DQ28 56DQ29 58

VSS 60DQS3# 62DQS3 64

VSS 66DQ30 68DQ31 70

VSS 72

CKE1 74VDD

76

A1578

A1480

VDD82

A1184

A786

VDD88

A690

A492

VDD94

A296

A098

VDD100

CK1 102CK1# 104VDD

106

BA1108

RAS# 110VDD

112

S0# 114ODT0 116

VDD118

ODT1 120NC 122

VDD124

VREF_CA 126VSS 128

DQ36 130DQ37 132

VSS 134DM4

136

VSS 138DQ38 140DQ39 142

VSS 144DQ44 146DQ45 148

VSS 150DQS5# 152DQS5 154

VSS 156DQ46 158DQ47 160

VSS 162DQ52 164DQ53 166

VSS 168DM6

170

VSS 172DQ54 174DQ55 176

VSS 178DQ60 180DQ61 182

VSS 184DQS7# 186DQS7 188

VSS 190DQ62 192DQ63 194

VSS 196EVENT#

198

SDA 200SA1201VTT

203

GND1205

SCL 202VTT

204

GND2 206BOSS1207 BOSS2 208

G

DS

Q3BSS138_NL_SOT23-3

@

2

13

C145

1U_0402

_6.3V6K

1

2

C138

1U_0402

_6.3V6K

1

2

C146

1U_0402

_6.3V6K

1

2

C130

10U_0603

_6.3V6M

@

1

2

C147

10U_0603

_6.3V6M

1

2

C131

10U_0603

_6.3V6M

1

2

C148

0.1U

_0402_16V4Z

1

2

+ C139330U_D2_2V_Y@

1

2

R631K_0402_1%

1

2

R620_0402_5%

@1 2

C149

10U_0603

_6.3V6M

1

2

C134

2.2U

_0603_6

.3V6K

1

2

C132

1U_0402

_6.3V6K

1

2

AA

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

H

Integrated VRM enableL

Integrated VRM disable

INTVRMEN*

LOW= Disable (Default internal PD)HIGH= Enable ( No Reboot)Disable TCO timer system reboot feature

*

* Low = Disabled (Default)

This signal has a weak internal pull-down

On Die PLL VR Select is supplied by

*

(INTVRMEN should always be pull high.)

Prevent back drive issue.

ME debug mode,this signal has a weak internal PDHDA_SDO

Boot BIOS GPIO19

01

GPIO51Boot BIOS Strap

0 010

SPI-

ReservedLPC

1 1

GPIO19 has internal Pull up

RTCRST close RAM door J1

High = Enabled [Flash Descriptor Security Overide]

1.5V when sampled high 1.8V when sampled lowNeeds to be pulled High for Huron River platfrom

*

No use PU 10K +3VSDebug Port DG 1.2 PU 4.7K +3VS

SPI ROM FOR ME (4MB)Footprint 200mil

20mil

20mil

20mil

Reserve for EMI

L=500mil S=15mil

L=500mil S=15mil

HM70 not support SATA for port1/port3

HDD1

11/30 Add

11/30 Add (EMI request)

12/1 Del

SPI ROM FOR ME (1MB)Footprint 200mil

12/7 Change symbol of U18 from SA00000XT00 to SA000041O00

3/7 Add

SA00005MQ60

PCH_RTCX1

PCH_RTCRST#

PCH_SRTCRST#

SM_INTRUDER#

PCH_INTVRMEN

SM_INTRUDER#

PCH_SPKR

PCH_SPI_CLK

PCH_SPI_MISO

PCH_SPI_CS0#

PCH_JTAG_TCK

PCH_SATALED#

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

HDA_SYNC_PCH

HDA_RST_PCH#

HDA_SDIN0

HDA_SDOUT_PCH

PCH_GPIO21

PCH_RTCX2

HDA_BITCLK_PCH

LPC_AD2

LPC_FRAME#

LPC_AD0

LPC_AD3

LPC_AD1

SERIRQ

PCH_GPIO19

SATA_COMP

RBIAS_SATA3

SATA3_COMP

HDA_BITCLK_PCH

HDA_RST_PCH#

HDA_SDOUT_PCH

PCH_INTVRMEN

PCH_SPKR

HDA_SDOUT_PCH

HDA_SYNC_PCH

HDA_SYNC_PCH_R

PCH_SPI_CLK_1

PCH_SPI_CS0#_1

PCH_SPI_MOSI_1

PCH_SPI_MISO_1

HDA_SYNC_PCH

SERIRQ

PCH_SATALED#

PCH_RTCX1

PCH_RTCX2

PCH_RTCRST#

PCH_SRTCRST#

PCH_GPIO21

PCH_GPIO19

SPI_WP1#

PCH_SPI_MISO_1

PCH_SPI_CS0#_1

SPI_HOLD1#PCH_SPI_CLK_1PCH_SPI_MOSI_1

PCH_SPI_CS1#_2 PCH_SPI_CS1#

PCH_SPI_MOSIPCH_SPI_MOSI_2

PCH_SPI_MISO_2

PCH_SPI_CLK_2

PCH_SPI_CLK

PCH_GPIO23

PCH_SPI_CLK_1

PCH_SPI_CLK_2

HDA_BITCLK_AUDIO

PCH_SPI_MISO_2

PCH_SPI_MOSI_2

PCH_SPI_CS1#_2

PCH_SPI_CLK_2SPI_WP2#SPI_HOLD2#

PCH_GPIO23

+RTCVCC

+1.05VS_VTT

+1.05VS_VTT

+3VS

+VCCSUS3_3

+VCCSUS3_3

+3VS

+RTCVCC

+3VS

+3VS

+3VS

+3VS

+5VS

+CHGRTC

+RTCBATT

+RTCVCC

+3VS+3VS +3VS

+3VS

HDA_SDO

PCH_SPKR

HDA_SDIN0

HDA_BITCLK_AUDIO

HDA_SYNC_AUDIO

HDA_SDOUT_AUDIO

HDA_RST_AUDIO#

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

LPC_FRAME#

SERIRQ

SATA_PRX_DTX_N0 SATA_PRX_DTX_P0

SATA_PTX_DRX_N0 SATA_PTX_DRX_P0

Title


Date: Sheet of




1.0

PCH (1/9) SATA,HDA,SPI, LPC, XDPCustom




Title


Date: Sheet of




1.0





Title


Date: Sheet of




1.0





R8833_0402_5%

1 2

R94 37.4_0402_1%1 2

R2341K_0402_5%

@

1

2

U17

MX25L3206EM2I-12G_SO8SA000041P00

CS#1

SO 2WP#

3

GND4SI 5

SCLK 6HOLD#7

VCC 8 R11033_0402_5% @1 2

R96 33_0402_5%12

R75 20K_0402_5%1 2

R830_0402_5%

12

R10433_0402_5%12

R109 3.3K_0402_5%1 2

R1113.3K_0402_5%1 2

R103 33_0402_5%12

R105 33_0402_5%12

R106 33_0402_5%12

R9233_0402_5%

1 2

R46633_0402_5% @1 2

R740_0603_5%@

1

2

R9533_0402_5%

1 2

R841K_0402_5%

@ 12

C1650.1U_0402_16V4Z

1

2

C16818P_0402_50V8J

1

2

C167

18P_0402

_50V8J

1

2

R931M_0402_5%

1

2

R81 10K_0402_5%12

G

DS

Q4BSS138_NL_SOT23-3

2

13

R8933_0402_5%

1 2

R100 33_0402_5%12

C1631U_0603_10V6K

1

2

R8610K_0402_5% @

1

2

R98 33_0402_5%12

T10PAD @

T11PAD @

U18

MX25L8006EM2I-12G_SO8SA000041O00

CS#1SO2

SI 5SCLK 6VCC 8

WP#3

GND4HOLD# 7

R97 49.9_0402_1%1 2

C46522P_0402_50V8J

@1 2

R9151_0402_5%

12

U16

BD82HM70HM70@

R78 1M_0402_5%1 2

T9PAD @

R99 750_0402_1%1 2

R79 330K_0402_5%1 2

R112

3.3K_0402_5%1 2

C1641U_0603_10V6K

1

2

R80 10K_0402_5%12

R101 33_0402_5%12

R8510K_0402_5%

1

2

R82 1K_0402_5%@1 2

R76 20K_0402_5%1 2

C16610P_0402_50V8J

@1 2

R107 10M_0402_5%1 2

C46622P_0402_50V8J

@1 2

R90

0_0402_5%@1 2

R1024.7K_0402_5%

1

2

R87 1K_0402_5%12

R

T

C

I

H

D

A

S

A

T

A

L

P

C

S

P

I

J

T

A

G

S

A

T

A

6

G

U16A

COUGARPOINT_FCBGA989HM77@

RTCX1A20

RTCX2C20

INTVRMENC17

INTRUDER#K22

HDA_BCLKN34

HDA_SYNCL34

HDA_RST#K34

HDA_SDIN0E34

HDA_SDIN1G34

HDA_SDIN2C34

HDA_SDOA36

SATALED# P3

FWH0 / LAD0 C38FWH1 / LAD1 A38FWH2 / LAD2 B37FWH3 / LAD3 C37

LDRQ1# / GPIO23 K36

FWH4 / LFRAME# D36

LDRQ0# E36

RTCRST#D20

HDA_SDIN3A34

HDA_DOCK_EN# / GPIO33C36

HDA_DOCK_RST# / GPIO13N32

SRTCRST#G22

SATA0RXN AM3SATA0RXP AM1SATA0TXN AP7SATA0TXP AP5

SATA1RXN AM10SATA1RXP AM8SATA1TXN AP11SATA1TXP AP10

SATA2RXN AD7SATA2RXP AD5SATA2TXN AH5SATA2TXP AH4

SATA3RXN AB8SATA3RXP AB10SATA3TXN AF3SATA3TXP AF1

SATA4RXN Y7SATA4RXP Y5SATA4TXN AD3SATA4TXP AD1

SATA5RXN Y3SATA5RXP Y1SATA5TXN AB3SATA5TXP AB1

SATAICOMPI Y10

SPI_CLKT3

SPI_CS0#Y14

SPI_CS1#T1

SPI_MOSIV4

SPI_MISOU3SATA0GP / GPIO21 V14

SATA1GP / GPIO19 P1

JTAG_TCKJ3

JTAG_TMSH7

JTAG_TDIK5

JTAG_TDOH1

SERIRQ V5

SPKRT10

SATAICOMPO Y11

SATA3COMPI AB13SATA3RCOMPO AB12

SATA3RBIAS AH1

R46733_0402_5% @1 2

R23010K_0402_5%

1

2

Y1

32.768KHZ_12.5PF_1TJF125DP1A000D

1 2

C46722P_0402_50V8J

@

1

2

D1BAS40-04_SOT23-3

1

23

R108 3.3K_0402_5%1 2

R770_0603_5%@

1

2

AA

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

WLAN

Reserve for EMI please close to PCH

120MHz for eDP.

WLAN

PCIE LAN

Pull up at EC side.

Pull down 10K ohm for using internal Clock

For DDR , TP

No use PU 10K +3VALW




No use PU 10K +3VALWS3 reduse

No use PU 10K +3VALWS3 reduse


DDR,WLAN,SMBUSPU 2.2K +3VALW

EC-PCH SMBUSPU 2.2K +3VALW

No use PU 10K +3VS



No use PU 10K +3VS


W=12mil S=15mil

HM70 not support PCIE port 5-8

PCIE LAN

SMB_ALERT#

PCH_SMBCLK

PCH_SMBDATA

XTAL25_INXTAL25_OUT

PCH_SML1CLK

PCH_SML1DATA

XCLK_RCOMP

CLK_CPU_DMICLK_CPU_DMI#

PCH_GPIO46

PCIE_PTX_DRX_N2PCIE_PRX_DTX_P2PCIE_PRX_DTX_N2

PCIE_PTX_DRX_P2

MINI1_CLKREQ#

PCH_GPIO45

RST_GATE

PCH_SML1CLK

PCH_SML1DATA

EC_SMB_CK2

EC_SMB_DA2

CLKIN_GND1#CLKIN_GND1

LAN_CLKREQ#

PCH_GPIO56

PCH_GPIO73

PCH_GPIO47

SMB_ALERT#

PCH_SMBCLK

PCH_SMBDATA

PCH_SML1CLK

PCH_SML1DATA

PCH_GPIO47

PCH_GPIO20

PCH_GPIO74

PCH_GPIO74

D_CK_SCLK

D_CK_SDATAPCH_SMBDATA

PCH_SMBCLK

PCH_GPIO26

CLK_BUF_CPU_DMI#CLK_BUF_CPU_DMI

CLK_BUF_DREF_96MCLK_BUF_DREF_96M#

CLK_BUF_PCIE_SATACLK_BUF_PCIE_SATA#

CLK_BUF_ICH_14M

CLK_PCI_LPBACK

RST_GATE

CLK_FLEX1

CLK_CPU_DPLLCLK_CPU_DPLL#

PCH_GPIO20

PCH_GPIO73

PCH_GPIO45

MINI1_CLKREQ#

PCH_GPIO46

LAN_CLKREQ#

PCH_GPIO26

PCH_GPIO44

PCH_GPIO44

CLK_FLEX0

CLK_FLEX2

XTAL25_OUT

XTAL25_IN

PCH_GPIO56

CLK_FLEX3

PCIE_PTX_DRX_P3PCIE_PTX_DRX_N3PCIE_PRX_DTX_P3PCIE_PRX_DTX_N3

+1.05VS_VTT

+3VS

+3VS

+3VS

+3VS

+3VS

+VCCSUS3_3

+VCCSUS3_3

PCIE_PRX_DTX_N2PCIE_PRX_DTX_P2

PCIE_PTX_C_DRX_N2PCIE_PTX_C_DRX_P2

CLK_PCIE_MINI1#CLK_PCIE_MINI1

MINI1_CLKREQ#

CLK_PCIE_LAN#CLK_PCIE_LAN

LAN_CLKREQ#

PCH_SMBCLK

PCH_SMBDATA

RST_GATE

CLK_CPU_DMI# CLK_CPU_DMI

CLK_CPU_DPLL# CLK_CPU_DPLL

CLK_PCI_LPBACK

D_CK_SDATA

D_CK_SCLK

EC_SMB_DA2

EC_SMB_CK2

SMB_ALERT#

PCIE_PRX_DTX_N3PCIE_PRX_DTX_P3

PCIE_PTX_C_DRX_N3PCIE_PTX_C_DRX_P3

Title


Date: Sheet of




1.0

PCH (2/9) PCIE, SMBUS, CLKCustom




Title


Date: Sheet of




1.0





Title


Date: Sheet of




1.0





C17612P_0402_50V8J

1

2

R132 10K_0402_5%1 2

T33 PAD@

R131 10K_0402_5%1 2Q6B

DMN66D0LDW-7_SOT363-6

3 4

5

R126 10K_0402_5%@ 12

T12 PAD@

R121 10K_0402_5%12

R134 10K_0402_5%1 2

R144 1M_0402_5%1 2

R138 10K_0402_5%1 2

C175 22P_0402_50V8J@1 2

R119 2.2K_0402_5%1 2

P

C

I

-

E

*

C

L

O

C

K

S

F

L

E

X

C

L

O

C

K

S

S

M

B

U

S

C

o

n

t

r

o

l

l

e

r

L

i

n

k

U16B

COUGARPOINT_FCBGA989HM77@

PERN1BG34PERP1BJ34

PERN2BE34PERP2BF34

PERN3BG36PERP3BJ36

PERN4BF36PERP4BE36

PERN5BG37PERP5BH37

PERN6BJ38PERP6BG38

PERN7BG40PERP7BJ40

PERN8BE38PERP8BC38

PETN1AV32PETP1AU32

PETN2BB32PETP2AY32

PETN3AV34PETP3AU34

PETN4AY34PETP4BB34

PETN5AY36PETP5BB36

PETN6AU36PETP6AV36

PETN7AY40PETP7BB40

PETN8AW38PETP8AY38

CLKOUT_PCIE0NY40CLKOUT_PCIE0PY39

CLKOUT_PCIE1NAB49CLKOUT_PCIE1PAB47

CLKOUT_PCIE2NAA48CLKOUT_PCIE2PAA47



CLKOUT_PCIE5NV45CLKOUT_PCIE5PV46

CLKIN_DMI2_N BJ30CLKIN_DMI2_P BG30

CLKIN_DMI_N BF18CLKIN_DMI_P BE18

CLKIN_DOT_96N G24CLKIN_DOT_96P E24

CLKIN_SATA_N / CKSSCD_N AK7CLKIN_SATA_P / CKSSCD_P AK5

XTAL25_IN V47

XTAL25_OUT V49

REFCLK14IN K45

CLKIN_PCILOOPBACK H45

CLKOUT_PEG_A_N AB37CLKOUT_PEG_A_P AB38

PEG_A_CLKRQ# / GPIO47 M10

PCIECLKRQ0# / GPIO73J2

PCIECLKRQ1# / GPIO18M1

PCIECLKRQ2# / GPIO20V10

PCIECLKRQ3# / GPIO25A8

PCIECLKRQ4# / GPIO26L12

PCIECLKRQ5# / GPIO44L14

CLKOUTFLEX0 / GPIO64 K43

CLKOUTFLEX1 / GPIO65 F47

CLKOUTFLEX2 / GPIO66 H47

CLKOUTFLEX3 / GPIO67 K49

CLKOUT_DMI_N AV22CLKOUT_DMI_P AU22

PEG_B_CLKRQ# / GPIO56E6CLKOUT_PEG_B_PAB40CLKOUT_PEG_B_NAB42

XCLK_RCOMP Y47

CLKOUT_DP_P / CLKOUT_BCLK1_P AM13CLKOUT_DP_N / CLKOUT_BCLK1_N AM12


PCIECLKRQ7# / GPIO46K12


CLKOUT_BCLK0_N / CLKOUT_PCIE8NAK14CLKOUT_BCLK0_P / CLKOUT_PCIE8PAK13

SMBALERT# / GPIO11 E12

SMBCLK H14

SMBDATA C9

SML0ALERT# / GPIO60 A12

SML0CLK C8

SML0DATA G12

SML1ALERT# / PCHHOT# / GPIO74 C13

SML1CLK / GPIO58 E14

SML1DATA / GPIO75 M16

CL_CLK1 M7

CL_DATA1 T11

CL_RST1# P10

PCIECLKRQ6# / GPIO45T13

R137 10K_0402_5%1 2

Y2

25MHZ_10PF_7V25000014

GND

2

33 1 1

GND

4

Q5BDMN66D0LDW-7_SOT363-6

3 4

5

C170 0.1U_0402_16V7K1 2

R120 10K_0402_5%1 2

R14190.9_0402_1%1 2

R116 1K_0402_5%1 2

Q6ADMN66D0LDW-7_SOT363-6

6 1

2

R130 10K_0402_5%12

R127 10K_0402_5%12

R142 10K_0402_5%12

R1254.7K_0402_5%1 2

R139 10K_0402_5%1 2

R14033_0402_5%

@12

T13 PAD@

R118 2.2K_0402_5%1 2

R136 10K_0402_5%1 2

R124 10K_0402_5%12

R129 10K_0402_5%12

R114 2.2K_0402_5%1 2

C174 0.1U_0402_16V7K1 2

T14 PAD@

R133 10K_0402_5%1 2

R123 10K_0402_5%12

C17712P_0402_50V8J

1

2

C169 0.1U_0402_16V7K1 2

Q5ADMN66D0LDW-7_SOT363-6

6 1

2

R113 10K_0402_5%1 2

C171 0.1U_0402_16V7K1 2

R115 2.2K_0402_5%1 2

R1224.7K_0402_5%1 2

R117 10K_0402_5%1 2

R128 10K_0402_5%12

R135 10K_0402_5%1 2

AA

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

4mil width and placewithin 500mil of the PCH

Can be left NCwhen IAMT is notsupport on theplatfrom

*

not support AMT APWROK can mux with PWROK (check list1.5 P.47)

L

DisableMust always PU at +RTCVCC

DSWODVREN - On Die DSW VR EnableH

Enable internal DSW +1.05VS

ALL power OKtell PCH all power ok but cpu core

not support Deep S4,S5 can NC PCH EDS1.5 P.75

not support Deep S4,S5can be left unconnected. Check list1.5 P.81

not support Deep S4,S5 DPWROK mux withRSMRST#check list1.5 P.50

No use PU 10K +3VS



Ring Indicator CRB1.0 PU 10K +3VALW

Follow Tacoma 1.0L=500mil S=15mil

1/11 Add "ACPRESENT" signal. (follow Q5LJ1)

DMI_IRCOMP

DMI_CRX_PTX_N1

DMI_CRX_PTX_P0

DMI_CRX_PTX_P3

DMI_CTX_PRX_P0

DMI_CRX_PTX_N2

DMI_CRX_PTX_P1

DMI_CTX_PRX_P2

DMI_CTX_PRX_N2DMI_CTX_PRX_N3

DMI_CTX_PRX_P3

c26a2 compal la-8941p

Documents

compal confidential2012

page 24gen3ls

q1vzc mb la

page 31alc271xvb6hda

date deciphered date1

cover pagecustom1

hdmi conn

lvdsedp conn