Assignment on CSE

Submitted by Submitted to

Name: Md Jahid Hasan Name: Tania sultana

Id: 152-15-5588 Dep: of CSE

Sec: A Daffopdil International University

MICROPROCESSOR

Reference

Ramesh S. Goankar, “Microprocessor Architecture, Programming and Applications 5thEdition, Prentice Hall (B00k)

Basic Concept and Ideas about Microprocessor

onwards –Peripherals

Addressing Modes and Instruction

Wikipedia Blog

PC Magazine Encyclopedia Other website by internet

Basic Concepts of Microprocessors

Differences between:

Microcomputer –a computer with a microprocessor as its CPU. Includes memory, I/O etc.

Microprocessor –silicon chip which includes ALU, register circuits & control circuits.

Microcontroller –silicon chip which includes microprocessor, memory & I/O in a single package.

What is a Microprocessor?

The word comes from the combination micro and processor. Processor means a device that processes whatever. In this context processor means a device that processes numbers, specifically binary numbers, 0’s and 1’s.To process means to manipulate. It is a general term that describes all manipulation. Again in this content, it means to perform certain operations on the numbers that depend on the microprocessor’s design.

What about micro?

Micro is a new addition. In the late 1960’s, processors were built using discrete elements. These devices performed the required operation, but were too large and too slow.

In the early 1970’s the microchip was invented. All of the components that made up the processor were now placed on a single piece of silicon. The size became several thousand times smaller and the speed became several hundred times faster. The “Micro”Processor was born.

Was there ever a “mini”-processor?

No.It went directly from discrete elements to a single chip. However, comparing today’s microprocessors to the ones built in the early 1970’s you find an extreme increase in the amount of integration.

Definition of the Microprocessor

The microprocessor is a programmable devicethat takes innumbers, performs on them arithmetic or logical operationsaccording to the programstored in memoryand then producesother numbers as a result.

Definition (Contd.)

Lets expand each of the underlined words:

Programmable device: The microprocessor can perform different sets of operations on the data it receives depending on the sequence of instruction ssupplied in the given program.By changing the program, the microprocessor manipulates the data in different ways.

Instructions: Each microprocessor is designed to execute a specific group of operations. This group of operations is called an instruction set. This instruction set defines what the microprocessor can and cannot do.

Takes in: The data that the microprocessor manipulates must come from somewhere. It comes from what is called “input devices”.These are devices that bring data into the system from the outside world.These represent devices such as a keyboard, a mouse, switches, and the like.

Numbers: The microprocessor has a very narrow view on life. It only understands binary numbers.A binary digit is called a bit (which comes from binary digit).The microprocessor recognizes and processes a group of bits together. This group of bits is called a “word”.The number of bits in a Microprocessor’s word, is a measure of its “abilities”.

Words, Bytes, etc. The earliest microprocessor (the Intel 8088 and Motorola’s 6800)

recognized 8-bit words. They processed information 8-bits at a time. That’s why they are called “8-bit processors”. They can handle large numbers, but in order to process these numbers, they broke them into 8-bit pieces and processed each group of 8-bits separately.

Later microprocessors (8086 and 68000) were designed with 16-bit words.A group of 8-bits were referred to as a “half-word” or “byte”.A group of 4 bits is called a “nibble”.Also, 32 bit groups were given the name “long word”.

Today, all processors manipulate at least 32 bits at a time and there exists microprocessors that can process 64, 80, 128 bits.

Arithmetic and Logic Operations:

Every microprocessor has arithmetic operations such as add and subtract as part of its instruction set. Most microprocessors will

have operations such as multiply and divide.Some of the newer ones will have complex operations such as square root.

In addition, microprocessors have logic operations as well. Such as AND, OR, XOR, shift left, shift right, etc.

Again, the number and types of operations define the microprocessor’s instruction set and depends on the specific microprocessor.

Stored in memory :

First, what is memory?

Memory is the location where information is kept while not in current use. Memory is a collection of storage devices. Usually, each storage device holds one bit. Also, in most kinds of memory, these storage devices are grouped into groups of 8. These 8 storage locations can only be accessed together. So, one can only read or write in terms of bytes to and form memory. Memory is usually measured by the number of bytes it can hold. It is measured in Kilos, Megas and lately Gigas. A Kilo in computer language is 210 =1024. So, a KB (KiloByte) is 1024 bytes. Mega is 1024 Kilos and Giga is 1024 Mega.

When a program is entered into a computer, it is stored in memory. Then as the microprocessor starts to execute the instructions, it brings the instructions from memory one at a time.

Memory is also used to hold the data. The microprocessor reads (brings in) the data from memory when it needs it and writes (stores) the results into memory when it is done.

Produces: For the user to see the result of the execution of the program, the results must be presented in a human readable form.

The results must be presented on an output device.

This can be the monitor, a paper from the printer, a simple LED or many other forms.

A Microprocessor-based system

From the above description, we can draw the following block diagram to represent a microprocessor-based system:

Input Microprocessor

Memory

Inside The Microprocessor

Internally, the microprocessor is made up of 3 main units.

The Arithmetic/Logic Unit (ALU)

The Control Unit.

An array of registers for holding data while it is being manipulated.

Output

Organization of a microprocessor-based system

Let’s expand the picture a bit.

Memory

Memory stores information such as instructions and data in binary format (0 and 1). It provides this information to the microprocessor whenever it is needed

Usually, there is a memory “sub-system” in a microprocessor-based system. This sub-system includes:

The registers inside the microprocessor

Read Only Memory (ROM)

used to store information that does not change.

Random Access Memory (RAM) (also known as Read/Write Memory).

used to store information supplied by the user. Such as programs and data

Memory Map and Addresses

The memory map is a picture representation of the address range and shows where the different memory chips are located within the address range.

Memory

The number of bits that form the “word” of a microprocessor is fixed for that particular processor.These bits define a maximum number of combinations

For example an 8-bit microprocessor can have at most 28 = 256 different combinations

However, in most microprocessors, not all of these combinations are used.

Certain patterns are chosen and assigned specific meanings

Each of these patterns forms an instruction for the microprocessor

The complete set of patterns makes up the microprocessor’s machine language

The 8085 Machine Language

The 8085 (from Intel) is an 8-bit microprocessor. The 8085 uses a total of 246 bit patterns to form its instruction set.These 246 patterns represent only 74 instructions. The reason for the difference is that some (actually most) instructions have multiple different formats

Because it is very difficult to enter the bit patterns correctly, they are usually entered in hexadecimal instead of binary.

For example, the combination 0011 1100 which translates into “increment the number in the register called the accumulator is usually entered as 3C.

Assembly Language Entering the instructions using hexadecimal is quite easier than

entering the binary combinations. However, it still is difficult to understand what a program written in hexadecimal does.So, each company defines a symbolic codefor the instructions.These codes are called “mnemonics”.

The mnemonic for each instruction is usually a group of letters that suggest the operation performed.

Using the same example from before,00111100 translates to 3C in hexadecimal (OPCODE).Its mnemonic is: “INR A”.INR stands for “increment register” and A is short for accumulator.

Another example is: 1000 0000,Which translates to 80 in hexadecimal. Its mnemonic is “ADD B”. “Add register B to the accumulator and keep the result in the accumulator”.

It is important to remember that a machine language and its associated assembly language are completely machine dependent

In other words, they are not transferable from one microprocessor to a different one

For example, Motorolla has an 8-bit microprocessor called the 6800.The 8085 machine language is very different from that of the 6800. So is the assembly language.A program written for the 8085 cannot be executed on the 6800 and vice versa

“Assembling” The Program

How does assembly language get translated into machine language?There are two ways: 1st there is “hand assembly”.The programmer translates each assembly language instruction into its equivalent

hexadecimal code (machine language). Then the hexadecimal code is entered into memory.The other possibility is a program called an “assembler”, which does the translation automatically.

8085 MicroprocessorArchitecture

8-bit general purpose μp

Capable of addressing 64 k of memory

Has 40 pins

Requires +5 v power supply

Can operate with 3 MHz clock

8085 upward compatible

System Bus –wires connecting memory & I/O to microprocessor.

Address Bus

Unidirectional

Identifying peripheral or memory location

Data Bus

Bidirectional

Transferring data

Control Bus

Synchronization signals

Timing signals

Control signal

Architecture of Intel 8085 Microprocessor

Intel 8085 Microprocessor

Microprocessor consists of:

Control unit: control microprocessor operations.

ALU: performs data processing function

Registers: provide storage internal to CPU.

Interrupts

Internal data bus

The ALU

In addition to the arithmetic & logic circuits, the ALU includes the accumulator, which is part of every arithmetic & logic operation

Also, the ALU includes a temporary register used for holding data temporarily during the execution of the operation. This temporary register is not accessible by the programmer

RegistersGeneral Purpose Registers

B, C, D, E, H& L(8 bit registers)

Can be used singly

Or can be used as 16 bit register pairsBC, DE, HL

H & L can be used as a data pointer (holds memory address)

Special Purpose Registers

Accumulator(8 bit register)

-Store 8 bit data–Store the result of an operation–Store 8 bit data during I/O transfer

Flag Register

-8 bit register –shows the status of the microprocessor before/after an operation

-S (sign flag), Z (zero flag), AC (auxillary carry flag), P (parity flag) & CY (carry flag)

Sign Flag

Used for indicating the sign of the data in the accumulator

The sign flag is set if negative (1 –negative)

The sign flag is reset if positive (0 –positive

Zero Flag

Is set if result obtained after an operation is 0

Is set following an increment or decrement operation of that register

10110011+ 01001101---------------

1 00000000

Carry FlagIs set if there is a carry or borrow from arithmetic operation

1011 0101+ 0110 1100---------------

Carry 1 0010 0001

1011 0101-1100 1100

Borrow 1 1110 1001

Auxillary Carry Flag

- Is set if there is a carry out of bit 3

Parity Flag

- Is set if parity is even- Is cleared if parity is odd

The Internal Architecture We have already discussed the general purpose registers, the

Accumulator, and the flags.

The Program Counter (PC)

- This is a register that is used to control the sequencing of the execution of instructions.

- This register always holds the address of the next instruction.

- Since it holds an address, it must be 16 bits wide.

The Stack pointer

- The stack pointer is also a 16-bit register that is used to point into memory.

- The memory this register points to is a special area called the stack.

- The stack is an area of memory used to hold data that will be retreived soon

- The stack is usually accessed in a Last In First Out (LIFO) fashion

Non Programmable Registers

Instruction Register & Decoder

- Instruction is stored in IR after fetched by processor

- Decoder decodes instruction in IR

Internal Clock generator

- 3.125 MHz internally

- 6.25 MHz externall

The Address and Data Busses The address bus has 8 signal lines A8 –A15which are

unidirectional

The other 8 address bits are multiplexed(time shared) with the 8 data bits.

So, the bits AD0 –AD7are bi-directionaland serve as A0 –A7and D0 –D7at the same time.

During the execution of the instruction, these lines carry the address bits during the early part, then during the late parts of the execution, they carry the 8 data bits.

In order to separate the address from the data, we can use a latch to save the value before the function of the bits changes

Demultiplexing AD7-AD0

From the above description, it becomes obvious that the AD7–AD0lines are serving a dual purposeand that they need to be demultiplexed to get all the information.

The high order bitsof the address remain on the bus for three clock periods. However, the low order bitsremain for only one clock periodand they would be lost if they are not saved externally. Also, notice that the low order bitsof the address disappearwhen they are needed most

To make sure we have the entire address for the full three clock cycles, we will use an external latchto save the value of AD7–AD0

when it is carrying the address bits. We use the ALEsignal to enable this latch.

Demultiplexing AD7-AD0

Demultiplexing the Bus AD7–AD

The high order address is placed on the address bus and hold for 3 clk periods

The low order address is lost after the first clk period, this address needs to be hold however we need to use latch

The address AD7 –AD0 is connected as inputs to the latch 74LS373

The ALE signal is connected to the enable (G) pin of the latch and the OC –Output control –of the latch is grounded

Introduction to 8085 Instructions

The 8085 Instructions

Since the 8085 is an 8-bit device it can have up to 28 (256) instructions. However, the 8085 only uses 246 combinations that represent a total of 74 instructions.Most of the instructions have more than one format.

These instructions can be grouped into five different groups:

Data Transfer Operation•Arithmetic Operations

•Logic Operations

•Branch Operations

•Machine Control Operations

Instruction and Data Formats Each instruction has two parts.The first part is the task or operation

to be performed

This part is called the “opcode” (operation code

The second part is the data to be operated onCalled the “operand”.

Data Transfer Operations

These operations simply COPYthe data from the source to the destination.–MOV, MVI, LDA, and STA

They transfer:

Data between registers.

Data Byte to a register or memory location.

Data between a memory location and a register.

Data between an I\O Device and the accumulator

- The data in the source is not changed

The LXI instruction The 8085 provides an instruction to place the 16-bit data into the

register pair in one step

LXI Rp, <16-bit address> (Load eXtended Immediate)

The instruction LXI B 4000Hwill place the 16-bit number 4000 into the register pair B, C.

The upper two digits are placed in the 1st register of the pair and the lower two digits in the 2nd .

The Memory “Register” Most of the instructions of the 8085 can use a memory location in

place of a register.The memory location will become the “memory” register M. MOV M B copy the data from register B into a memory location.

The memory location is identified by the contents of the HL register pair.The 16-bit contentsof the HL register pairare treatedas a 16-bit address and used to identify the memory location.

Using the Other Register Pairs

There is also an instruction for moving data from memory to the accumulatorwithout disturbing the contents of the Hand L register.

LDAX Rp (LoaDAccumulator eXtended)

Copythe 8-bitcontentsof the memory locationidentifiedby the Rp register pairinto the Accumulator.This instruction only uses the BCor DEpair.It does not accept the HLpair.

Indirect Addressing Mode

Using data in memory directly (without loading first into a Microprocessor’s register) is called Indirect Addressing.

Indirect addressing uses the datain a register pairas a 16-bit addressto identifythe memory locationbeing accessed.The HL register pair is alwaysused in conjunction with the memory register “M”.The BC and DE register pairs can be used to load data into the Accumultorusing indirect addressing

Arithmetic OperationsAddition(ADD, ADI):

- Any 8-bit number.

–The contents of a register.

–The contents of a memory location Can be added to the contents of the accumulator and the result is

stored in the accumulato.

Subtraction(SUB, SUI):

- Any 8-bit number- The contents of a register- The contents of a memory location

Can be subtracted from the contents of the accumulator. The result is stored in the accumulator

.

Arithmetic Operations Related to Memory These instructions perform an arithmetic operation using the

contents of a memory location while they are still in memory.

ADD M

Add the contents of M to the Accumulator

SUB M

Sub the contents of M from the Accumulator

INR M / DCR M

Increment/decrement the contents of the memory location in place

All of these use the contents of the HL register pair to identify the memory location being used.

Arithmetic Operations

Increment (INR) and Decrement(DCR):

The 8-bit contents of any memory location or any register can be directly incrementedor decremented by 1.

No need to disturb the contents ofthe accumulator

Manipulating AddressesNow that we have a 16-bit address register pair,how do we manipulateit?

It is possible to manipulate a 16-bit address storedina register pair as one entity using some specia linstructions.

• INXRp (Increment the 16-bit number in the register pair) •DCXRp (Decrement the 16-bit number in the register pair) –

The register pair is incremented or decremented as one entity. No need to worry about a carry from the lower 8-bits to the upper. It is taken care of automatically.

Logic Operations These instructions perform logic operations onthe contents of the

accumulator.

ANA, ANI, ORA, ORI, XRA and XRI

Source: Accumulator and

An 8-bit number

The contents of a register The contents of a memory location

Destination: Accumulator

ANA R/M AND Accumulator With Reg/MemANI # AND Accumulator With an 8-bit numberORA R/M OR Accumulator With Reg/MemORI # OR Accumulator With an 8-bit numberXRA R/M XOR Accumulator With Reg/MemXRI # XOR Accumulator With an 8-bit number

Logic OperationsComplement:

1’s complement of the contents of the accumulator.CMA No operand

Additional Logic Operations Rotate

Rotate the contents of the accumulator one position to the left or right

RLC Rotate the accumulator left.Bit 7 goes to bit 0ANDthe Carry flag.

RAL Rotate the accumulator left through the carry.Bit 7 goes to the carryand carrygoes to bit 0.

RRC Rotate the accumulator right.Bit 0 goes to bit 7 ANDthe Carry flag.

RAR Rotate the accumulator right through the carry.Bit 0 goes to the carryand carrygoes to bit 7.

Rlc

Ral

Logical Operations

• Compare • Compare the contents of a register or memory location with the contents of the accumulator. – CMPR/MCompare the contents of the register or memory location to the contents of the accumulator. – CPI#Compare the 8-bit number to the contents of the accumulator. • The compare instruction sets the flags (Z, Cy, and S). • The compare is done using an internal subtraction that does not change the contents of the accumulator. A –(R / M / #)

Branch Operations

• Two types: – Unconditional branch. • Go to a new location no matter what. – Conditional branch. • Go to a new location if the condition is true.

Unconditional Branch

– JMP Address • Jump to the address specified (Go to). – CALL Address • Jump to the address specified but treat it as a subroutine. – RET • Return from a subroutine. – The addresses supplied to all branch operations must be 16-bits.

Conditional Branch

Go to new location if a specified condition is met. • JZAddress(Jump on Zero) – Go to address specified if the Zero flag is set. • JNZAddress(Jump on NOT Zero) – Go to address specified if the Zero flag is not set. • JCAddress(Jump on Carry) – Go to the address specified if the Carry flag is set. • JNCAddress(Jump on No Carry) – Go to the address specified if the Carry flag is not set. • JPAddress(Jump on Plus) – Go to the address specified if the Sign flag is not set • JMAddress(Jump on Minus) – Go to the address specified if the Sign flag is set.

Machine Control

HLT • Stop executing the program. – NOP • No operation • Exactly as it says, do nothing. • Usually used for delay or to replace instructions during debugging.

Operand Types

Operand Types

• There are different ways for specifying the operand: – There may not be an operand (implied operand)

• CMA – The operand may be an 8-bit number (immediate data)

• ADI4FH – The operand may be an internal register (register)

• SUBB – The operand may be a 16-bit address (memory address)

• LDA 4000H

Instruction Size

• Depending on the operand type, the instruction may have different sizes. It will occupy a different number of memory bytes. – Typically, all instructions occupy one byteonly. – The exception is any instruction that contains immediate dataor a memory address.

• Instructions that include immediate data use two bytes. – One for the opcode and the other for the 8-bit data.

• Instructions that include a memory address occupy three bytes. – One for the opcode, and the other two for the 16-bit address.

Instruction with Immediate Date

• Operation: Load an 8-bit number into the accumulator. – MVIA, 32

• Operation: MVIA

• Operand: The number 32

• Binary Code: 0011 1110 3E 1st byte.

0011 0010 32 2nd byte.

Instruction with a Memory Address

Operation:

go to address 2085.

– Instruction: JMP 2085

• Opcode: JMP

• Operand: 2085

• Binary code: 1100 0011 C3 1st byte.

1000 0101 85 2nd byte

0010 0000 20 3rd byte

Addressing Modes

• The microprocessor has different ways of specifying the data for the instruction. These are called “addressing modes”.

• The 8085 has four addressing modes: – Implied CMA – Immediate MVI B, 45 – DirectL DA 4000 – Indirect LDAX B

• Load the accumulator with the contents of the memory location whose address is stored in the register pair BC).

Data Formats

• In an 8-bit microprocessor, data can be represented in one of four formats:

• ASCII

• BCD

• Signed Integer

• Unsigned Integer. – It is important to recognize that the microprocessor deals with 0’s and 1’s.

• It deals with values as strings of bits.

• It is the job of the user to add a meaning to these strings.

• Assume the accumulator contains the following value: 0100 0001.

There are four ways of reading this value:

• It is an unsigned integer expressed in binary, the equivalent decimal number would be 65.

• It is a number expressed in BCD (Binary Coded Decimal) format. That would make it, 41

. • It is an ASCIIrepresentation of a letter. That would make it the letter A.

• It is a string of 0’s and 1’s where the 0th and the 6th bits are set to 1 while all other bits are set to 0.

ASCII stands for American Standard Code for Information Interchange.

The Stack

The stack is an area of memory identified by the programmer for temporary storage of information.

• The stack is a LIFO structure.

– Last In First Out.

• The stack normally grows backwards into memory.

– In other words, the programmer defines the bottom of the stack and the stack grows up into reducing address range. Memory Bottom of theStack The Stack grows backwards into memory

• Given that the stack grows backwards into memory, it is customary to place the bottom of the stack at the end of memory to keep it as far away from user programs as possible.

• the stack is defined by setting the SP (Stack Pointer) register. LXI SP, FFFFH

• This sets the Stack Pointer to location FFFFH.

Saving Information on the Stack

• Information is saved on the stack by PUSHing it on.

– It is retrieved from the stack by POPing it off.

• The 8085 provides two instructions: PUSH and POP for storing information on the stack and retrieving it back.

– Both PUSH and POP work with register pairs ONLY.

The PUSH Instruction

PUSH B

– Decrement SP

– Copy the contents of register B to the memory location pointed to by SP – Decrement SP

– Copy the contents of register C to the memory location pointed to by SP B C SP FFFF FFFE FFFD FFFC FFFB F3 12 F3 12

The POP Instruction

POP D

– Copy the contents of the memory location pointed to by the SP to register E

– Increment SP

– Copy the contents of the memory location pointed to by the SP to register D

– Increment SP D E SP FFFF FFFE FFFD FFFC FFFB F3 12 F3 12

Operation of the Stack

• During pushing, the stack operates in a “decrement then store” style.

– The stack pointer is decremented first, then the information is placed on the stack.

• During poping, the stack operates in a “use then increment” style.

– The information is retrieved from the top of the the stack and then the pointer is incremented.

• The SP pointer always points to “the top of the stack”.

LIFO

• The order of PUSHs and POPs must be opposite of each other in order to retrieve information back into its original location. PUSH B PUSH D ... POP D POP B

The PSW Register Pair

• The 8085 recognizes one additional register pair called the PSW (Program Status Word).

– This register pair is made up of the Accumulator and the Flags registers.

• It is possible to push the PSW onto the stack, do whatever operations are needed, then POP it off of the stack.

– The result is that the contents of the Accumulator and the status of the Flags are returned to what they were before the operations were executed.

Subroutines

A subroutine is a group of instructions that will be used repeatedly in different locations of the program.

– Rather than repeat the same instructions several times, they can be grouped into a subroutine that is called from the different locations.

• In Assembly language,a subroutine can exist any where in the code.

– However,it is customary to place subroutines separately from the main program.

The CALL Instruction• CALL 4000H

– Push the address of the instruction immediately following the CALL onto the stack

– Load the program counter with the 16-bit address supplied with the CALL instruction. PC SP FFFF FFFE FFFD FFFC FFFB 2 0 0 3 03 20 2000CALL 40002003

Cautions

• The CALL instruction places the return address at the two memory locations immediately before where the Stack Pointer is pointing.

– You must set the SP correctly BEFORE using the CALL instruction.

• The RTE instruction takes the contents of the two memory locations at the top of the stack and uses these as the return address.

– Do not modify the stack pointer in a subroutine. You will loose the return address.

Passing Data to a Subroutine

• In Assembly Language data is passed to a subroutine through registers.

– The data is stored in one of the registers by the calling program and the subroutine uses the value from the register.

• The other possibility is to use agreed upon memory locations.

– The calling program stores the data in the memory location and the subroutine retrieves the data from the location and uses it.

Call by Reference and Call by Value

• If the subroutine performs operations on the contents of the registers, then these modifications will be transferred back to the calling program upon returning from a subroutine.

– Call by reference

• If this is not desired, the subroutine should PUSH all the registers it needs on the stack on entry and POP them on return.

– The original values are restored before execution returns to the calling program.

Cautions with PUSH and POP

• PUSH and POP should be used in opposite order.

• There has to be as many POP’s as there are PUSH’s. – If not, the RET statement will pick up the wrong information from the top of the stack and the program will fail.

• It is not advisable to place PUSH or POP inside a loop.

Conditional CALL and RTE Instructions

– The same conditions used with conditional JUMP instructions can be used.

– CC, call subroutine if Carry flag is set.

– CNC, call subroutine if Carry flag is not set

– RC, return from subroutine if Carry flag is set

– RNC, return from subroutine if Carry flag is not set

– Etc.

The Design and Operation of Memory Memory in a microprocessor system is where information (data

and instructions) is kept. It can be classified into two main types: Main memory (RAM and ROM) Storage memory (Disks , CD ROMs, etc.) The simple view of RAM is that it is made up of registersthat are

made up of flip-flops (or memory elements). The number of flip-flops in a “memory register” determines the

size of the memory word. ROM on the other hand uses diodesinstead of the flip-flops to

permanentlyhold the information.

Accessing Information in Memory For the microprocessor to access (Read or Write) information in

memory (RAM or ROM), it needs to do the following:

Select the right memory chip (using part of the address bus).

Identify the memory location (using the rest of the address bus). Access the data (using the data bus).

The Tri-State Buffer This circuit has two inputs and one output. The first input behaves like the normal input for the circuit. The second input is an “enable”. If it is set high, the output follows the proper circuit behavior. If it is set low, the output looks like a wire connected to nothing.

A group of memory registers Expanding on this scheme to add more memory registers we get the

diagram to the right

Externally Initiated Operations External devices can initiate (start) one of the 4 following

operations: Reset

All operations are stopped and the program counter is reset to 0000.

Interrupt The microprocessor’s operations are interrupted and the

microprocessor executes what is called a “service routine”. This routine “handles” the interrupt, (perform the necessary

operations). Then the microprocessor returns to its previous operations and continues.

The steps of writing into Memory The microprocessor would turn onthe WR control (WR = 0) and turn

offthe RD control (RD = 1). The address is applied to the address decoder which generates a single

Enable signal to turn on only one of the memory registers.

The data is then applied on the data lines and it is stored into the enabled register

Dimensions of MemoryMemory is usually measured by two numbers: its length and its width (Length X Width).

The length is the total number of locations.

The width is the number of bits in each location.

The length (total number of locations) is a function of the number of address lines.

# of memory locations = 2( # of address lines)

So, a memory chip with 10 address lines would have

2^10 = 1024 locations (1K)

Looking at it from the other side, a memory chip with 4K locations would need

Log2 4096=12 address lines

High-Order vs. Low-Order Address LinesThe address lines from a microprocessor can be classified into two types:

High-Order

Used for memory chip selection

Low-Order

Used for location selection within a memory chip.

This classification is highly dependent on the memory system design.

Data Lines

All of the above discussion has been regarding memory length. Lets look at memory width. We said that the width is the number of bits in each memory word. We have been assuming so far that our memory chips have the right width. What if they don’t?It is very common to find memory chips that have only 4 bits per location. How would you design a byte wide memory system using these chips?We use two chips for the same address range. One chip will supply 4 of the data bits per address and the other chip supply the other 4 data bits for the same address.

Special-purpose designs

A microprocessor is a general purpose system. Several specialized processing devices have followed from the technology. microcontrollers integrate a microprocessor with peripheral devices in embedded systems. A digital signal processor (DSP) is specialized for signal processing. Graphics processing units may have no limited or general programming facilities. For example, GPUs through the 1990s were mostly non-programmable and have only recently gained limited facilities like programmable vertex shaders.

32-bit processors have more digital logic than narrower processors, so 32-bit (and wider) processors produce more digital noise and have higher static consumption than narrower processors.So, 8-bit or 16-bit processors are better than 32-bit processors for system on a chip and microcontrollers that require extremely low-power electronics. Nevertheless, trade-offs apply: running 32-bit arithmetic on an 8-bit chip could end up using more power, as the chip must execute software with multiple instructions. Modern microprocessors go into low power states when possible, and a 8-bit chip running 32-bit software is active most of the time. This creates a delicate balance between software, hardware and use patterns, plus costs.

When manufactured on a similar process, 8-bit microprocessors use less power when operating and less power when sleeping than 32-bit microprocessors.

However, some people say a 32-bit microprocessor may use less average power than an 8-bit microprocessor when the application requires certain operations such as floating-point math that take many more clock cycles on an 8-bit microprocessor than a 32-bit microprocessor so the 8-bit microprocessor spends more time in high-power operating mode.

Embedded Applications

Thousands of items that were traditionally not computer-related include microprocessors. These include large and small household appliances, cars (and their accessory equipment units), car keys, tools and test instruments, toys, light switches/dimmers and electrical circuit breakers, smoke alarms, battery packs, and hi-fi audio/visual components (from DVD players to phonograph turntables). Such products as cellular telephones, DVD video system and HDTV broadcast systems fundamentally require consumer devices with powerful, low-cost, microprocessors. Increasingly stringent pollution control standards effectively require automobile manufacturers to use microprocessor engine management systems, to allow optimal control of emissions over widely varying operating conditions of an automobile. Non-programmable controls would require complex, bulky, or costly implementation to achieve the results possible with a microprocessor.

A microprocessor control program (embedded software) can be easily tailored to different needs of a product line, allowing upgrades in performance with minimal redesign of the product. Different features can be implemented in different models of a product line at negligible production cost.Microprocessor control of a system can provide control strategies that would be impractical to implement using electromechanical controls or purpose-built electronic controls. For example, an engine control system in an automobile can adjust ignition timing based on engine speed, load on the engine, ambient temperature, and any observed tendency for knocking—allowing an automobile to operate on a range of fuel grades.

History

The advent of low-cost computers on integrated circuits has transformed modern society. General-purpose microprocessors in personal computers are used for computation, text editing, multimedia display, and communication over the Internet. Many more microprocessors are part of embedded systems, providing digital control over myriad objects from appliances to automobiles to cellular phones and industrial process control.

The first use of the term "microprocessor" is attributed to Viatron Computer Systems describing the custom integrated circuit used in their System 21 small computer system announced in 1968.

Intel introduced its first 4-bit microprocessor 4004 in 1971 and its 8-bit microprocessor 8008 in 1972. During the 1960s, computer processors were constructed out of small and

medium-scale ICs—each containing from tens of transistors to a few hundred. These were placed and soldered onto printed circuit boards, and often multiple boards were interconnected in a chassis. The large number of discrete logic gates used more electrical power—and therefore produced more heat—than a more integrated design with fewer ICs. The distance that signals had to travel between ICs on the boards limited a computer's operating speed.

In the NASA Apollo space missions to the moon in the 1960s and 1970s, all onboard computations for primary guidance, navigation and control were provided by a small custom processor called "The Apollo Guidance Computer". It used wire wrap circuit boards whose only logic elements were three-input NOR gates.

The first microprocessors emerged in the early 1970s and were used for electronic calculators, using binary-coded decimal (BCD) arithmetic on 4-bit words. Other embeddeduses of 4-bit and 8-bit microprocessors, such as terminals, printers, various kinds of automation etc., followed soon after. Affordable 8-bit microprocessors with 16-bit addressing also led to the first general-purpose microcomputers from the mid-1970s on.

Since the early 1970s, the increase in capacity of microprocessors has followed Moore's law; this originally suggested that the number of components that can be fitted onto a chip doubles every year. With present technology, it is actually every two years,[9] and as such Moore later changed the period to two years.[1

CADC

In 1968, Garrett AiResearch (which employed designers Ray Holt and Steve Geller) was invited to produce a digital computer to compete with electromechanical systems then under development for the main flight control computer in the US Navy's new F-14 Tomcat fighter. The design was complete by 1970, and used a MOS-based chipset as the core CPU. The design was significantly (approximately 20 times) smaller and much more reliable than the mechanical systems it competed against, and was used in all of the early Tomcat models. This system contained "a 20-bit, pipelined, parallel multi-microprocessor". The Navy refused to allow publication of the design until 1997. For this reason theCADC, and the MP944 chipset it used, are fairly unknown. Ray Holt graduated from California Polytechnic University in 1968, and began his computer design career with the CADC. From its inception, it was shrouded in secrecy until 1998 when at Holt's request, the US Navy allowed the documents into the public domain. Since then people have debated whether this was the first microprocessor. Holt has stated that no one has compared this microprocessor with those that came later.[12] According to Parab et al. (2007),"The scientific papers and literature published around 1971 reveal that the MP944 digital processor used for the F-14 Tomcat aircraft of the US Navy qualifies as the first microprocessor. Although interesting, it was not a single-chip processor, as was not the Intel 4004 – they both were more like a set of parallel building blocks you could use to make a general-purpose form. It contains a CPU, RAM, ROM, and two other support chips like the Intel 4004. It was made from the same P-channel technology, operated atmilitary specifications and had larger chips -- an excellent computer engineering design by any standards. Its design indicates a major advance over Intel, and two year earlier. It actually worked and was flying in the F-14 when the Intel 4004 was announced. It indicates that today’s industry theme of converging DSP-microcontroller architectures was started in 1971. This

convergence of DSP and microcontroller architectures is known as a digital signal controller.

Gilbert HyattGilbert Hyatt was awarded a patent claiming an invention pre-dating both TI and Intel, describing a "microcontroller".The patent was later invalidated, but not before substantial royalties were paid out.

TMS 1000

The Smithsonian Institution says TI engineers Gary Boone and Michael Cochran succeeded in creating the first microcontroller (also called a microcomputer) and the first single-chip CPU in 1971. The result of their work was the TMS 1000, which went on the market in 1974.[18] TI stressed the 4-bit TMS 1000 for use in pre-programmed embedded applications, introducing a version called the TMS1802NC on September 17, 1971 that implemented a calculator on a chip.

TI filed for a patent on the microprocessor. Gary Boone was awarded U.S. Patent 3,757,306 for the single-chip microprocessor architecture on September 4, 1973. In 1971 and again in 1976, Intel and TI entered into broad patent cross-licensing agreements, with Intel paying royalties to TI for the microprocessor patent. A history of these events is contained in court documentation from a legal dispute between Cyrix and Intel, with TI as inventor and owner of the microprocessor patent.

A computer-on-a-chip combines the microprocessor core (CPU), memory, and I/O (input/output) lines onto one chip. The computer-on-a-chip patent, called the "microcomputer patent" at the time, U.S. Patent 4,074,351, was awarded to Gary Boone and Michael J. Cochran of TI. Aside from this patent, the standard meaning of microcomputer is a computer using one or more microprocessors as its CPU(s), while the concept defined in the patent is more akin to a microcontroller.

Intel 4004

The Intel 4004 is generally regarded as the first commercially available microprocessor, and cost $60. The first known advertisement for the 4004 is dated November 15, 1971 and appeared in Electronic News. The project that produced the 4004 originated in 1969, when Busicom, a Japanese calculator manufacturer, asked Intel to build a chipset for high-performance desktop calculators. Busicom's original design called for a programmable chip set consisting of seven different chips. Three of the chips were to make a special-purpose CPU with its program stored in ROM and its data stored in shift register read-write memory. Ted Hoff, the Intel engineer assigned to evaluate the project, believed the Busicom design could be simplified by using dynamic RAM storage for data, rather than shift register memory, and a more traditional general-purpose CPU architecture. Hoff came up with a four–chip architectural proposal: a ROM chip for storing the programs, a dynamic RAM chip for storing data, a simple I/O device and a 4-bit central processing unit

(CPU). Although not a chip designer, he felt the CPU could be integrated into a single chip, but as he lacked the technical know-how the idea remained just a wish for the time being.

While the architecture and specifications of the MCS-4 came from the interaction of Hoff with Stanley Mazor, a software engineer reporting to him, and with Busicom engineerMasatoshi Shima, during 1969, Mazor and Hoff moved on to other projects. In April 1970, Intel hired Italian-born engineer Federico Faggin as project leader, a move that ultimately made the single-chip CPU final design a reality (Shima meanwhile designed the Busicom calculator firmware and assisted Faggin during the first six months of the implementation). Faggin, who originally developed the silicon gate technology (SGT) in 1968 at Fairchild Semiconductor and designed the world’s first commercial integrated circuit using SGT, the Fairchild 3708, had the correct background to lead the project into what would become the first commercial general purpose microprocessor. Since SGT was his very own invention, Faggin also used it to create his new methodology for random logic design that made it possible to implement a single-chip CPU with the proper speed, power dissipation and cost. The manager of Intel's MOS Design Department was Leslie L. Vadász at the time of the MCS-4 development but Vadász's attention was completely focused on the mainstream business of semiconductor memories so he left the leadership and the management of the MCS-4 project to Faggin, who was ultimately responsible for leading the 4004 project to its realization. Production units of the 4004 were

first delivered to Busicom in March 1971 and shipped to other customers in late 1971.

Pico/General Instrument

In 1971 Pico Electronicsand General Instrument (GI) introduced their first collaboration in ICs, a complete single chip calculator IC for the Monroe/Litton Royal Digital III calculator. This chip could also arguably lay claim to be one of the first microprocessors or microcontrollers having ROM, RAM and a RISC instruction set on-chip. The layout for the four layers of the PMOS process was hand drawn at x500 scale on mylar film, a significant task at the time given the complexity of the chip.

Pico was a spinout by five GI design engineers whose vision was to create single chip calculator ICs. They had significant previous design experience on multiple calculator chipsets with both GI and Marconi-Elliott. The key team members had originally been tasked by Elliott Automation to create an 8-bit computer in MOS and had helped establish a MOS Research Laboratory in Glenrothes, Scotland in 1967.

Calculators were becoming the largest single market for semiconductors so Pico and GI went on to have significant success in this burgeoning market. GI continued to innovate in microprocessors and microcontrollers with products including the CP1600, IOB1680 and PIC1650. In 1987 the

GI Microelectronics business was spun out into the Microchip PIC microcontroller business.

8-bit designs

The Intel 4004 was followed in 1972 by the Intel 8008, the world's first 8-bit microprocessor. The 8008 was not, however, an extension of the 4004 design, but instead the culmination of a separate design project at Intel, arising from a contract with Computer Terminals Corporation, of San Antonio TX, for a chip for a terminal they were designing, the Datapoint 2200 — fundamental aspects of the design came not from Intel but from CTC. In 1968, CTC's Vic Poor and Harry Pyle developed the original design for theinstruction set and operation of the processor. In 1969, CTC contracted two companies, Intel and Texas Instruments, to make a single-chip implementation, known as the CTC 1201. In late 1970 or early 1971, TI dropped out being unable to make a reliable part. In 1970, with Intel yet to deliver the part, CTC opted to use their own implementation in the Datapoint 2200, using traditional TTL logic instead (thus the first machine to run “8008 code” was not in fact a microprocessor at all and was delivered a year earlier). Intel's version of the 1201 microprocessor arrived in late 1971, but was too late, slow, and required a number of additional support chips. CTC had no interest in using it. CTC had originally contracted Intel for the chip, and would

have owed them $50,000 for their design work. To avoid paying for a chip they did not want (and could not use), CTC released Intel from their contract and allowed them free use of the design. Intel marketed it as the 8008 in April, 1972, as the world's first 8-bit microprocessor. It was the basis for the famous "Mark-8" computer kit advertised in the magazine Radio-Electronics in 1974. This processor had an 8-bit data bus and a 14-bit address bus.

The 8008 was the precursor to the successful Intel 8080 (1974), which offered improved performance over the 8008 and required fewer support chips. Federico Faggin conceived and designed it using high voltage N channel MOS. The Zilog Z80 (1976) was also a Faggin design, using low voltage N channel with depletion load and derivative Intel 8-bit processors: all designed with the methodology Faggin created for the 4004. Motorola released the competing 6800 in August 1974, and the similar MOS Technology 6502 in 1975 (both designed largely by the same people). The 6502 family rivaled the Z80 in popularity during the 1980s.

A low overall cost, small packaging, simple computer bus requirements, and sometimes the integration of extra circuitry (e.g. the Z80's built-in memory refresh circuitry) allowed the home computer "revolution" to accelerate sharply in the early 1980s. This delivered such inexpensive machines as the Sinclair ZX-81, which sold for US$99. A variation of the 6502, the MOS Technology 6510 was used in the Commodore 64 and yet another variant, the 8502, powered the Commodore 128.

The Western Design Center, Inc (WDC) introduced the CMOS 65C02 in 1982 and licensed the design to several

firms. It was used as the CPU in the Apple IIe and IIc personal computers as well as in medical implantable grade pacemakers and defibrillators, automotive, industrial and consumer devices. WDC pioneered the licensing of microprocessor designs, later followed by ARM (32-bit) and other microprocessor intellectual property (IP) providers in the 1990s.

Motorola introduced the MC6809 in 1978. It was an ambitious and well thought-through 8-bit design that was source compatible with the 6800, and implemented using purely hard-wired logic (subsequent 16-bit microprocessors typically used microcode to some extent, as CISC design requirements were becoming too complex for pure hard-wired logic).

Another early 8-bit microprocessor was the Signetics 2650, which enjoyed a brief surge of interest due to its innovative and powerful instruction set architecture.

A seminal microprocessor in the world of spaceflight was RCA's RCA 1802 (aka CDP1802, RCA COSMAC) (introduced in 1976), which was used on board the Galileo probe to Jupiter (launched 1989, arrived 1995). RCA COSMAC was the first to implement CMOS technology. The CDP1802 was used because it could be run at very low power, and because a variant was available fabricated using a special production process, silicon on sapphire (SOS), which provided much better protection against cosmic radiation andelectrostatic discharge than that of any other processor of the era. Thus,

the SOS version of the 1802 was said to be the first radiation-hardened microprocessor.

The RCA 1802 had what is called a static design, meaning that the clock frequency could be made arbitrarily low, even to 0 Hz, a total stop condition. This let the Galileo spacecraft use minimum electric power for long uneventful stretches of a voyage. Timers or sensors would awaken the processor in time for important tasks, such as navigation updates, attitude control, data acquisition, and radio communication. Current versions of the Western Design Center 65C02 and 65C816 have static cores, and thus retain data even when the clock is completely halted.

12-bit designs

The Intersil 6100 family consisted of a 12-bit microprocessor (the 6100) and a range of peripheral support and memory ICs. The microprocessor recognised the DEC PDP-8 minicomputer  instruction set. As such it was sometimes referred to as the CMOS-PDP8. Since it was also produced by Harris Corporation, it was also known as the Harris HM-6100. By virtue of its CMOS technology and associated benefits, the 6100 was being incorporated into some military designs until the early 1980s.

16-bit designs

The first multi-chip 16-bit microprocessor was the National Semiconductor IMP-16, introduced in early 1973. An 8-bit version of the chipset was introduced in 1974 as the IMP-8.

Other early multi-chip 16-bit microprocessors include one that Digital Equipment Corporation (DEC) used in the LSI-11 OEM board set and the packaged PDP 11/03 minicomputer —and the Fairchild Semiconductor MicroFlame 9440, both introduced in 1975–1976. In 1975, National introduced the first 16-bit single-chip microprocessor, theNational Semiconductor PACE, which was later followed by an NMOS version, the INS8900.

Another early single-chip 16-bit microprocessor was TI's TMS 9900, which was also compatible with their TI-990 line of minicomputers. The 9900 was used in the TI 990/4 minicomputer, the TI-99/4A home computer, and the TM990 line of OEM microcomputer boards. The chip was packaged in a large ceramic 64-pin DIP package, while most 8-bit microprocessors such as the Intel 8080 used the more common, smaller, and less expensive plastic 40-pin DIP. A follow-on chip, the TMS 9980, was designed to compete with the Intel 8080, had the full TI 990 16-bit instruction set, used a plastic 40-pin package, moved data 8 bits at a time, but could only address 16 KB. A third chip, the TMS 9995, was a new design. The family later expanded to include the 99105 and 99110.

The Western Design Center (WDC) introduced the CMOS 65816 16-bit upgrade of the WDC CMOS 65C02 in 1984. The 65816 16-bit microprocessor was the core of the Apple IIgs and later the Super Nintendo Entertainment System, making it one of the most popular 16-bit designs of all time.

Intel "upsized" their 8080 design into the 16-bit Intel 8086, the first member of the x86 family, which powers most modern PC type computers. Intel introduced the 8086 as a cost-effective way of porting software from the 8080 lines, and succeeded in winning much business on that premise. The 8088, a version of the 8086 that used an 8-bit external data bus, was the microprocessor in the first IBM PC. Intel

then released the 80186 and 80188, the 80286 and, in 1985, the 32-bit 80386, cementing their PC market dominance with the processor family's backwards compatibility. The 80186 and 80188 were essentially versions of the 8086 and 8088, enhanced with some onboard peripherals and a few new instructions. Although Intel's 80186 and 80188 were not used in IBM PC type designs, second source versions from NEC, the V20 and V30 frequently were. The 8086 and successors had an innovative but limited method of memory segmentation, while the 80286 introduced a full-featured segmented memory management unit (MMU). The 80386 introduced a flat 32-bit memory model with paged memory management.

The 16-bit Intel x86 processors up to and including the 80386 do not include floating-point units (FPUs). Intel introduced the 8087, 80187, 80287 and 80387 math coprocessors to add hardware floating-point and transcendental function capabilities to the 8086 through 80386 CPUs. The 8087 works with the 8086/8088 and 80186/80188,[35] the 80187 works with the 80186 but not the 80188,[36] the 80287 works with the 80286 and the 80387 works with the 80386. The combination of an x86 CPU and an x87 coprocessor forms a single multi-chip microprocessor; the two chips are programmed as a unit using a single integrated instruction set.[37] The 8087 and 80187 coprocessors are connected in parallel with the data and address buses of their parent processor and directly execute instructions intended for them. The 80287 and 80387 coprocessors are interfaced to the CPU through I/O ports in the CPU's address space, this is transparent to the program, which does not need to know about or access these I/O ports directly; the program accesses the coprocessor and its registers through normal instruction opcodes.

32-bit designs

16-bit designs had only been on the market briefly when 32-bit implementations started to appear.The most significant of the 32-bit designs is the Motorola MC68000, introduced in 1979. The 68k, as it was widely known, had 32-bit registers in its programming model but used 16-bit internal data paths, three 16-bit Arithmetic Logic Units, and a 16-bit external data bus (to reduce pin count), and externally supported only 24-bit addresses (internally it worked with full 32 bit addresses). In PC-based IBM-compatible mainframes the MC68000 internal microcode was modified to emulate the 32-bit System/370 IBM mainframe. Motorola generally described it as a 16-bit processor, though it clearly has 32-bit capable architecture. The combination of high performance, large (16 megabytes or 224 bytes) memory space and fairly low cost made it the most popular CPU design of its class. TheApple Lisa and Macintosh designs made use of the 68000, as did a host of other designs in the mid-1980s, including the Atari ST andCommodore Amiga.The world's first single-chip fully 32-bit microprocessor, with 32-bit data paths, 32-bit buses, and 32-bit addresses, was the AT&T Bell LabsBELLMAC-32A, with first samples in 1980, and general production in 1982. After the divestiture of AT&T in 1984, it was renamed the WE 32000 (WE for Western Electric), and had two follow-on generations, the WE 32100 and WE 32200. These microprocessors were used in the AT&T 3B5 and 3B15 minicomputers; in the 3B2, the world's first desktop super microcomputer; in the "Companion", the world's first 32-bit laptop computer; and in "Alexander", the world's first book-sized super microcomputer, featuring ROM-pack memory cartridges similar to

today's gaming consoles. All these systems ran the UNIX System V operating system.The first commercial, single chip, fully 32-bit microprocessor available on the market was the HP FOCUS.Intel's first 32-bit microprocessor was the iAPX 432, which was introduced in 1981 but was not a commercial success. It had an advanced capability-based object-orientedarchitecture, but poor performance compared to contemporary architectures such as Intel's own 80286 (introduced 1982), which was almost four times as fast on typical benchmark tests. However, the results for the iAPX432 was partly due to a rushed and therefore suboptimal Ada compiler. Motorola's success with the 68000 led to the MC68010, which added virtual memory support. The MC68020, introduced in 1984 added full 32-bit data and address buses. The 68020 became hugely popular in the Unix supermicrocomputer market, and many small companies (e.g., Altos, Charles River Data Systems, Cromemco) produced desktop-size systems. The MC68030 was introduced next, improving upon the previous design by integrating the MMU into the chip. The continued success led to the MC68040, which included an FPU for better math performance. A 68050 failed to achieve its performance goals and was not released, and the follow-up MC68060 was released into a market saturated by much faster RISC designs. The 68k family faded from the desktop in the early 1990s.Other large companies designed the 68020 and follow-ons into embedded equipment. At one point, there were more 68020s in embedded equipment than there were IntelPentiums in PCs. The ColdFire processor cores are derivatives of the venerable 68020.During this time (early to mid-1980s), National Semiconductor introduced a very similar 16-bit pinout, 32-bit internal microprocessor called the NS 16032 (later renamed

32016), the full 32-bit version named the NS 32032. Later, National Semiconductor produced the NS 32132, which allowed two CPUs to reside on the same memory bus with built in arbitration. The NS32016/32 outperformed the MC68000/10, but the NS32332—which arrived at approximately the same time as the MC68020—did not have enough performance. The third generation chip, the NS32532, was different. It had about double the performance of the MC68030, which was released around the same time. The appearance of RISC processors like the AM29000 and MC88000 (now both dead) influenced the architecture of the final core, the NS32764. Technically advanced—with a superscalar RISC core, 64-bit bus, and internally overclocked—it could still execute Series 32000 instructions through real-time translation.When National Semiconductor decided to leave the Unix market, the chip was redesigned into the Swordfish Embedded processor with a set of on chip peripherals. The chip turned out to be too expensive for the laser printer market and was killed. The design team went to Intel and there designed the Pentium processor, which is very similar to the NS32764 core internally. The big success of the Series 32000 was in the laser printer market, where the NS32CG16 with microcoded BitBlt instructions had very good price/performance and was adopted by large companies like Canon. By the mid-1980s, Sequent introduced the first SMP server-class computer using the NS 32032. This was one of the design's few wins, and it disappeared in the late 1980s. The MIPS R2000 (1984) and R3000 (1989) were highly successful 32-bit RISC microprocessors. They were used in high-end workstations and servers by SGI, among others. Other designs included the Zilog Z80000, which arrived too late to market to stand a chance and disappeared quickly.The ARM first appeared in 1985.[42] This is a RISC processor design, which has since come to dominate the 32-bit embedded systems processor space due in large part to its power efficiency,

its licensing model, and its wide selection of system development tools. Semiconductor manufacturers generally license cores and integrate them into their ownsystem on a chip products; only a few such vendors are licensed to modify the ARM cores. Most cell phones include an ARM processor, as do a wide variety of other products. There are microcontroller-oriented ARM cores without virtual memory support, as well as symmetric multiprocessor (SMP) applications processors with virtual memory.In the late 1980s, "microprocessor wars" started killing off some of the microprocessors. Apparently, with only one bigger design win, Sequent, the NS 32032 just faded out of existence, and Sequent switched to Intel microprocessors. From 1993 to 2003, the 32-bit x86 architectures became increasingly dominant in desktop, laptop, and server markets, and these microprocessors became faster and more capable. Intel had licensed early versions of the architecture to other companies, but declined to license the Pentium, so AMD and Cyrix built later versions of the architecture based on their own designs. During this span, these processors increased in complexity (transistor count) and capability (instructions/second) by at least three orders of magnitude. Intel's Pentium line is probably the most famous and recognizable 32-bit processor model, at least with the public at broad.

64-bit designs in personal computers

While 64-bit microprocessor designs have been in use in several markets since the early 1990s (including the Nintendo 64 gaming console in 1996), the early 2000s saw the introduction of 64-bit microprocessors targeted at the PC market.With AMD's introduction of a 64-bit architecture backwards-compatible with x86, x86-64 (also called AMD64), in September 2003, followed by Intel's near fully compatible 64-bit extensions (first called IA-32e or EM64T, later renamed Intel 64), the 64-bit desktop era began. Both versions can run 32-bit legacy applications without any performance penalty as well as new 64-bit software. With operating systems Windows XP x64, Windows Vista x64, Windows 7 x64, Linux, BSD, and Mac OS X that run 64-bit native, the software is also geared to fully utilize the capabilities of such processors. The move to 64 bits is more than just an increase in register size from the IA-32 as it also doubles the number of general-purpose registers.

The move to 64 bits by PowerPC processors had been intended since the processors' design in the early 90s and was not a major cause of incompatibility. Existing integer registers are extended as are all related data pathways, but, as was the case with IA-32, both floating point and vector units had been operating at or above 64 bits for several years. Unlike what happened when IA-32 was extended to x86-64, no new general purpose registers were added in 64-bit PowerPC, so any performance gained when using the 64-bit mode for applications making no use of the larger address space is minimal. In 2011, ARM introduced a new 64-bit ARM architecture.

Interrupts

• Interrupt is a process where an external device can get the attention of the microprocessor.

– The process startsfrom the I/O device

– The process is asynchronous.

• Interrupts can be classified into two types: • Maskable(can be delayed)

• Non-Maskable(can not be delayed)

• Interrupts can also be classified into:

• Vectored(the address of the service routine is hard-wired)

• Non-vectored(the address of the service routine needs to be supplied externally)• An interrupt is considered to be an emergencysignal.

– The Microprocessor should respond to it as soon as possible.

• When the Microprocessor receives an interrupt signal, it suspends the currently executing program and jumps to an Interrupt Service Routine(ISR) to respond to the incoming interrupt.

– Each interrupt will most probably have its own ISR.

Responding to Interrupts

• Responding to an interrupt may be immediateor delayeddepending on whether the interrupt is maskable or non-maskable and whether interrupts are being masked or not.

• There are two ways of redirecting the execution to the ISR depending on whether the interrupt is vectored or non-vectored. – The vector is already knownto the Microprocessor – The device will have to supplythe vector to the Microprocessor.

The 8085 Interrupts

• The maskableinterrupt process in the 8085 is controlled by a single flip flop inside the microprocessor. This Interrupt Enableflip flopis controlled using the two instructions “EI” and “DI”. • The 8085 has a single Non-Maskableinterrupt.

– The non-maskable interrupt is notaffectedby the value of the Interrupt Enable flip flop.

• The 8085 has 5 interrupt inputs.

– The INTR input.

• The INTR input is the only non-vectoredinterrupt.

• INTR is maskableusing the EI/DI instruction pair.

– RST 5.5, RST 6.5, RST 7.5 are all automatically vectored.

• RST 5.5, RST 6.5, and RST 7.5 are all maskable.

– TRAP is the only non-maskableinterrupt in the 8085

• TRAP is also automatically vectored

The 8085 Interrupts

Restart Sequence

• The restart sequence is made up of three machine cycles

– In the 1st machine cycle:

• The microprocessor sends the INTA signal.

• While INTA is active the microprocessor reads the data lines expecting to receive, from the interrupting device, the opcode for the specific RST instruction. – In the 2nd and 3rd machine cycles:

• the 16-bit address of the next instruction is saved on the stack.

• Then the microprocessor jumps to the address associated with the specified RST instruction.

• The location in the IVT associated with the RST instruction can not hold the complete service routine.

Interrupt name Maskable VectoredINTR Yes No

RST 5.5 Yes YesRST 6.5 Yes YesRST 7.5 Yes YesTRAP No Yes

– The routine is written somewhere else in memory.

– Only a JUMP instruction to the ISR’s location is kept in the IVT block.

TRAP

• TRAP is the only non-maskableinterrupt.

– It does not need to be enabled because it cannot be disabled.

• It has the highest priorityamongst interrupts.

• It is edge and level sensitive.

– It needs to be high and stay high to be recognized.

– Once it is recognized, it won’t be recognized again until it goes low, then high again.

• TRAP is usually used for power failure and emergency shutoff.

Operating of the 8259A

• The 8259A requires the microprocessor to provide 2 control words to set up its operation. After that, the following sequence occurs:

1. One or more interrupts come in. 2. The 8259A resolves the interrupt priorities based on its internal settings

3. The 8259A sends an INTRsignal to the microprocessor. 4. The microprocessor responds with an INTAsignal and turns offthe interrupt enable flip flop. 5. The 8259A responds by placing the op-code for the CALL instruction (CDH)on the data bus.

6.When the microprocessor receives the op-code for CALL instead of RST, it recognizes that the device will be sending 16 more bits for the address.7.The microprocessor sends a second INTAsignal.

8.The 8259A sends the high order byteof the ISR’s address.9.The microprocessor sends a third INTAsignal.10. The 8259A sends the low order byteof the ISR’s address.11.The microprocessor executes the CALL instructionand jumps to the ISR.

Direct Memory Access

• This is a process where data is transferred between two peripherals directly without the involvement of the microprocessor. – This process employs the HOLD pin on the microprocessor • The external DMA controller sends a signal on the HOLD pin to the microprocessor. • The microprocessor completes the current operation and sends a signal on HLDA and stops using the buses. • Once the DMA controller is done, it turns off the HOLD signal and the microprocessor takes back control of the buses.

Synchronous Data Transmission

• The transmitter and receiver are synchronized. – A sequence of synchronization signals is sent before the communication begins. • Usually used for high speed transmission. • More than 20 K bits/sec. • Message based. – Synchronization occurs at the beginning of a long message.

Asynchronous Data Transmission

• Transmission occurs at any time. • Character based. – Each character is sent separately. • Generally used for low speed transmission. – Less the 20 K bits/sec.• Follows agreed upon standards: – The line is normally at logic one (mark). • Logic 0 is known as space. – The transmission begins with a start bit (low). – Then the seven or eight bits representing the character are transmitted. – The transmission is concluded with one or two stop bits. D0 D1 D2 D3 D4 D5 D6 D7 Start Stop Time One Character

Mode 0 ( Simple Input or Output )

PROBLEM 1

Interface 8255a to a 8085 microprocessor using I/O-mapped - I/O technique so that Port a have address 80H in the system.

Determine addresses of Ports B,C and control register.

Write an ALP to configure port A and port CLas output ports and port B and port CU as input ports in mode 0.

Connect DIP switches connected to the to input ports and LEDs to the output ports .

Read switch positions connected to port A and turn on the respective LEDs of port b. Read switch positions of port CLand display the reading at port CU

Problem 2

Write an ALP to set bits PC7 and PC 3 and reset them after 10 ms in BSR mode.

Problem 3

Initialize 8255A in mode 1 to configure Port A as an input port and Port B as an output port.

Assuming that an A-to-d converter is connected with port A as an interrupt I/O and a printer is connected with port B as a status check I/O

8086 Pins

8086 Pins In the minimum modethe following pins are available. HOLDWhen this pin is high, another master is requesting control of the local bus, e.g., a DMA controller. HLDAHOLD Acknowledge: the 8086 signals that it is going to float the local bus. WR’Write: the processor is performing a write memory or I/O operation. M/IO’Memory or I/O operation. DT/R’Data Transmit or Receive. DEN’Data Enable: data is on the multiplexed address/data pins. ALEAddress Latch Enable: the address is on the address/data pins. This signal is used to capture the address in latches to establish the address bus. INTA’Interrupt acknowledge: acknowledges external interrupt requests. I-48

The following are pins are available in both minimum and maximum modes. VCC+ 5 volt power supply pin. GNDGroundRD’READ: the processor is performing a read memory or I/O operation. READYAcknowledgement from wait-state logic that the data transfer will be completed. RESETStops processor and restarts execution from FFFF:0. Must be highfor 4 clocks. CS = 0FFFFH, IP = DS = SS = ES = Flags = 0000H, noother registers are affected. TEST’The WAIT instruction waits for this pin to go low. Used with 8087. NMINon Maskable Interrupt: transition from low to high causes aninterrupt. Used for emergencies such as power failure. INTRInterrupt request: masked by the IF bit in FLAG register. CLKClock: 33% duty cycle, i.e., high 1/3 the time. I-49

8086 Features

• 16-bit Arithmetic Logic Unit• 16-bit data bus (8088 has 8-bit data bus) • 20-bit address bus -220= 1,048,576 = 1 meg

The address refers to a byte in memory. In the 8088, these bytes come in on the 8-bit data bus. In the 8086, bytes at even addresses come in on the low half of the data bus (bits 0-7) and bytes at odd addresses come in on the upper half of the data bus (bits 8-15).

The 8086 can read a 16-bit word at an even address in one operation and at an odd address in two operations. The 8088 needs two operations in either case. The least significant byte of a word on an 8086 family microprocessor is at the lower address. I-8 8086 Features

8086 Architecture

• The 8086 has two parts, the Bus Interface Unit (BIU) and the Execution Unit (EU). • The BIU fetches instructions, reads and writes data, and computes the 20-bit address. • The EU decodes and executes the instructions using the 16-bit ALU. • The BIU contains the following registers:

IP -the Instruction PointerCS -the Code Segment RegisterDS -the Data Segment RegisterSS -the Stack Segment RegisterES -the Extra Segment Register

The BIU fetches instructions using the CS and IP, written CS:IP, to contructthe 20-bit address. Data is fetched using a segment register (usually the DS) and an effective address (EA) computed by the EU depending on the addressing mode.

RISC

In the mid-1980s to early 1990s, a crop of new high-performance reduced instruction set computer (RISC) microprocessors appeared, influenced by discrete RISC-like

CPU designs such as the IBM 801 and others. RISC microprocessors were initially used in special-purpose machines and Unix workstations, but then gained wide acceptance in other roles.

In 1986, HP released its first system with a PA-RISC CPU. The first commercial RISC microprocessor design was released in 1984 by MIPS Computer Systems, the 32-bit R2000(the R1000 was not released). In 1987 in the non-Unix Acorn computers' 32-bit, then cache-less, ARM2-based Acorn Archimedes became the first commercial success using theARM architecture, then known as Acorn RISC Machine (ARM); first silicon ARM1 in 1985. The R3000 made the design truly practical, and the R4000 introduced the world's first commercially available 64-bit RISC microprocessor. Competing projects would result in the IBM POWER and Sun SPARC architectures. Soon every major vendor was releasing a RISC design, including the AT&T CRISP, AMD 29000, Intel i860 and Intel i960, Motorola 88000, DEC Alpha.

In the late 1990s, only two 64-bit RISC architectures were still produced in volume for non-embedded applications: SPARC and Power ISA, but as ARM has become increasingly powerful, in the early 2010s, it became the third RISC architecture in the general computing segment.