atmega48a, atmega48pa, atmega88a, atmega88pa,...
TRANSCRIPT
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Rev. 8271G-02/2013, 8271GJ2-11/2013
4/8/16/32K Atmel 8
ATmega48A, ATmega48PA, ATmega88A, ATmega88PA,ATmega168A, ATmega168PA, ATmega328, ATmega328P
Atmel[]
Atmel AVR 8 RISC 129(1) 321 20MHz20MIPS 2 4K/8K/16K/32K(2K/4K/8K/16K) 256/512/512/1KEEPROM 512/1K/1K/2KSRAM : 10,000/, 100,000/EEPROM : 20/85, 100/25 Atmel QTouch QTouchQMatrix 64 28 / 116 / 8 /(RTC) 6PWM 6(PDIP,QFN/MLF28), 8(TQFP,QFN/MLF32)10 A/D USART /SPI 2(Philips I2C) ON(BOD) RC A/D 6 I/O 23I/O 28PDIP28QFN/MLF32TQFP32QFN/MLF -4085 1.85.5V 04MHz/1.85.5V 010MHz/2.75.5V 020MHz/4.55.5V (1MHz,1.8V,25) 0.2mA () 0.1A () 0.75A (,32kHz RTC)
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ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 2
1.
12345678
2423222120191817
26
28
30
32
31
29
27
25
15
13
119 10
12
14
16
PD
2(IN
T0/PC
INT
18)
(PC
INT
0/C
LK
O/IC
P1)PB
0(P
CIN
T1/O
C1A
)PB
1
(PCINT6/XTAL1/TOSC1) PB6(PCINT7/XTAL2/TOSC2) PB7
(PC
INT
3/M
OSI/
OC
2A
)PB
3
(PCINT19/OC2B/INT1) PD3(PCINT20/XCK/T0) PD4
GNDVCC
(PC
INT
21/O
C0B
/T
1)PD
5(P
CIN
T22/O
C0A
/A
IN0)PD
6(P
CIN
T23/A
IN1)PD
7
VCC
PC
3(A
DC
3/PC
INT
11)
PC
2(A
DC
2/PC
INT
10)
(PC
INT
4/M
ISO
)PB
4
PC1 (ADC1/PCINT9)PC0 (ADC0/PCINT8)ADC7GNDAREF
AVCCPB5 (SCK/PCINT5)
ADC6
PD
1(T
XD
/PC
INT
17)
PD
0(R
XD
/PC
INT
16)
PC
6(R
ESET
/PC
INT
14)
PC
5(A
DC
5/SC
L/PC
INT
13)
PC
4(A
DC
4/SD
A/PC
INT
12)
(PC
INT
2/SS/O
C1B
)PB
2
TQFP32QFN/MLF32
GND()
: QFN/MLFGND
1234567
21201918171615
22
24
26
28
27
25
23
14
12
108 9 11
13
PD
2(IN
T0/PC
INT
18)
(PC
INT
1/O
C1A
)PB
1(P
CIN
T2/SS/O
C1B
)PB
2
(PCINT21/OC0B/T1) PD5
(PC
INT
4/M
ISO
)PB
4
(PCINT19/OC2B/INT1) PD3(PCINT20/XCK/T0) PD4
VCCGND
(PC
INT
22/O
C0A
/A
IN0)PD
6(P
CIN
T23/A
IN1)PD
7(P
CIN
T0/C
LK
O/IC
P1)PB
0
(PCINT7/XTAL2/TOSC2) PB7
PC
3(A
DC
3/PC
INT
11)
PC2 (ADC2/PCINT10)PC1 (ADC1/PCINT9)PC0 (ADC0/PCINT8)GNDAREF
PB5 (SCK/PCINT5)AVCC
PD
1(T
XD
/PC
INT
17)
PD
0(R
XD
/PC
INT
16)
PC
6(R
ESET
/PC
INT
14)
PC
5(A
DC
5/SC
L/PC
INT
13)
PC
4(A
DC
4/SD
A/PC
INT
12)
(PC
INT
3/M
OSI/
OC
2A
)PB
3
QFN/MLF28
(PCINT6/XTAL1/TOSC1) PB6()
PDIP28
123456789
(PCINT14/RESET) PC6(PCINT16/RXD) PD0(PCINT17/TXD) PD1(PCINT18/INT0) PD2
(PCINT19/OC2B/INT1) PD3(PCINT20/XCK/T0) PD4
VCCGND
(PCINT6/XTAL1/TOSC1) PB6
(PCINT0/CLKO/ICP1) PB0
10
28272625242322212019(PCINT7/XTAL2/TOSC2) PB7
PC5 (ADC5/SCL/PCINT13)PC4 (ADC4/SDA/PCINT12)PC3 (ADC3/PCINT11)PC2 (ADC2/PCINT10)PC1 (ADC1/PCINT9)PC0 (ADC0/PCINT8)GNDAREFAVCC
(PCINT22/OC0A/AIN0) PD6(PCINT23/AIN1) PD7
(PCINT21/OC0B/T1) PD5PB5 (SCK/PCINT5)PB4 (MISO/PCINT4)PB3 (MOSI/OC2A/PCINT3)PB2 (SS/OC1B/PCINT2)PB1 (OC1A/PCINT1)
11121314
18171615
1-1. 32UFBGA (ATmega328/328P)
1 2 43 5 6
A PD2 PD1 PC4PC6 PC2 PC1
B PD3 PD4 PC5PD0 PC3 PC0
C GND GND ADC7 GND
D VCC VCC AREF ADC6
E PB6 PD6 PB2PB0 AVCC PB5
F PB7 PD5 PB1PD7 PB3 PB4
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ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 3
1.1.
1.1.1. VCC
1.1.2. GND
1.1.3. PB7PB0 (B) XTAL1/XTAL2 TOSC1/TOSC2
1.1.4. PC5PC0 (C)
1.1.5. PC6/RESET
1.1.6. PD7PD0 (D)
1.1.7. AVCC
1.1.8. AREF
1.1.9. ADC7,6 (TQFP,QFN/MLF32)
B()8B/LowBBHi-Z
PB6
PB7
RC() (ASSR)(AS2)(1)PB7,6/2TOSC2,1
B48B17
C()7C/LowCCHi-Z
RSTDISBL(0)PC6I/OPC6C
RSTDISBL(1)PC6Low19729-12.
C51C
D()8D/LowDDHi-Z
D53D
AVCCADC7,6C(30)A/D()A/DVCCA/DVCCC(5,4)(:VCC)
AREFA/D()
TQFPQFN/MLF32ADC7,ADC6A/D10A/D
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ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 4
2. ATmega48A/48PA/88A/88PA/168A/168PA/328/328PAVR RISCCMOS 8 1MHz1MIPS
2.1.
2-1.
AVR CPU
RC
POR/BOD
WIRE
SRAM
EEPROM
/0(8)
/1(16)
/2(8)
A/D
USART SPI2
D (8) B (8) C (7)
8bit DATA BUS
XTAL1,XTAL2
GND VCC
AVCC
GNDAREF
RESET
PD0PD7 PC0PC6PB0PB7 ADC6,7(32P)
AVR3232ALU(Arithmetic Logic Unit)1AVRCISC 10
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P4K/8K/16K/32K 256/512/512/1KEEPROM512/1K/1K/2KSRAM23323/USART2SPI8(32), 6(28)10 A/D 5SRAM/SPI ()A/DA/DA/DCPU/
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ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 5
AtmelAVR QTouch(AKS)QTouch Suite
Atmel(ISP) SPIAVR 8RISCCPUAtmel ATmega48A/48PA/88A/88PA/168A/168PA/328/ 328P
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P AVRC
2.2.
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P 2-1.
2-1.
SRAMEEPROM
2564KATmega48A/48PA 512 1/
5128KATmega88A/88PA 1K 1/
51216KATmega168A/168PA 1K 2/
1K32KATmega328/328P 2K 2/
ATmega88A/88PA/168A/168PA/328/328PSPMATmega48A/48PA SPM
3. http://www.atmel.com/avr
4. 20/85100/251PPM
5. CCC
I/OI/OIN, OUT, SBIS, SBIC, CBI, SBII/OSBRS, SBRC, SBR, CBRLDS, STS
6. AtmelQTouchAtmelAVR QTouchQTouchQMatrix
QTouchAPIAPI
QTouchAtmelwww.atmel.com/qtouchlibraryAtmelQTouch
http://www.atmel.com/qtouchlibraryhttp://www.atmel.com/dyn/resources/prod_documents/doc8207.pdf -
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 6
7. AVR CPU
7.1.
AVRCPUCPU
AVR 1
13281ALU(Arithmetic Logic Unit)ALU2 1
326316 1 16X,Y,Z
ALUALU (SREG)
/AVR16() (:)1632
2 SPM ()
(PC)SRAMSRAMSRAM() (SP)SPI/OSRAMAVR5
AVR
I/O (SREG)(I)
I/OSPII/OCPU64I/O $20$5FATmega48A/48PA/88A/88PA/168A/168PA/328/328PST/STS/STDLD/LDS/LDDSRAM$60$FFI/O
7.2. ALU (Arithmetic Logic Unit)
AVRALU32ALU3()()
/
SPI
2
8-bit Data Bus
328
ALU
SRAM
EEPROM
7-1. AVR MCU
n
1
(Indirect)
(D
irect)
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ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 7
7.3.
ALU
()
7.3.1. SREG - (Status Register)
AVR (SREG)
I T H S V N Z C7 6 5 4 3 2 1 0
SREG$3F ($5F)
R/WR/WR/WR/WR/WR/WR/WR/W
00000000Read/Write
7 - I : (Global Interrupt Enable)
(1)(0)I(0)RETI(1)ISEICLI()(1)(0)
6 - T : (Bit Copy Storage)
BLD(Bit LoaD)BST(Bit STore)T BSTTTBLD
5 - H : (Half Carry Flag)
(H)BCD
4 - S : (Sign Bit, S= N Ex-OR V)
S(N)2(V)
3 - V : 2 (2's Complement Overflow Flag)
2(V)2
2 - N : (Negative Flag)
(N)(MSB=1)
1 - Z : (Zero Flag)
(Z)(0)
0 - C : (Carry Flag)
(C)()
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ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 8
7.4.
AVRRISC
1818 2818 28116 116116
7-2.CPU32
7-2.32 SRAMX,Y,Z()
R0R1R2
R13R14R15R16R17
R26R27R28R29R30R31
$00$01$02
$0D$0E$0F$10$11
$1A$1B$1C$1D$1E$1F
7 0
X
Y
Z
7-2. AVR CPU
7.4.1. X, Y, Z
R26R3116 3X,Y,Z 7-3.
()
R27 ($1B)7 0 7 0R26 ($1A)15 0
X XH () XL ()
R29 ($1D)7 0 7 0R28 ($1C)15 0
Y YH () YL ()
R31 ($1F)7 0 7 0R30 ($1E)15 0
Z ZH () ZL ()
7-3. X,Y,Z
7.5.
(:) SRAMPUSH
SRAM SRAM SRAM118-3.
7-1.
7-1.
PUSH -1
CALL,ICALL,RCALL -2
POP +1
RET,RETI +2
AVR I/O28 ()SPLAVR()SPH
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ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 9
7.5.1. SPH,SPL (SP) - (Stack Pointer)
15 14 13 12 11 10 9 8SPH$3E ($5E)
R/WR/WR/WR/WRRRR
RAMENDRAMENDRAMENDRAMENDRAMENDRAMENDRAMENDRAMENDRead/Write
7 6 5 4 3 2 1 0SPL$3D ($5D)
R/WR/WR/WR/WR/WR/WR/WR/W
RAMENDRAMENDRAMENDRAMENDRAMENDRAMENDRAMENDRAMENDRead/Write
- - - - (SP11) (SP10) SP9 SP8
SP7 SP6 SP5 SP4 SP3 SP2 SP1 SP0
() SRAMATmega48A/48PA512($0100$02FF)ATmega88A/88PA/168A/168PA1K($0100$04FF)ATmega328/328P2K($0100$08FF)ATmega48A/48PASPHSP11,10ATmega88A/88PA/168A/ 168PASP11RAMENDATmega48A/48PA$02FF(0000 0010 1111 1111)ATmega88A/88PA/16 8A/168PA$04FF(0000 0100 1111 1111)ATmega328/328P$08FF(0000 1000 1111 1111)
7.6.
AVR CPU()CPU(clkCPU)
7-4. MHz1MIPS
7-5. 2 ALU
CPU clkCPU
/2
2/3
3/4
T1 T2 T3 T4
7-4.
CPU clkCPU
ALU
T1 T2 T3 T4
7-5. 1ALU
7.7.
AVR (SREG)(I)1BLB02BLB12 (0) 181
340(INT0)MCU(MCUCR)(IVSEL)(1) 34 BOOTRST(0) 171 ()
[]
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ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 10
(I)(0)(I)1(I)(RETI)(1)
21(I) (0)(0)1(0)(0)(1)(0)()(I)(0)1(1)(I)(1)(I=1)
2()
AVR1
(SREG)
CLICLICLIEEPROM
IN R16,SREG ; CLI ;EEPROM SBI EECR,EEMPE ;EEPROM SBI EECR,EEPE ;EEPROM OUT SREG,R16 ;
C
char cSREG; /* */ cSREG = SREG; /* */ __disable_interrupt(); /* EEPROM */ EECR |= (1
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ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 11
8. AVR
8.1. ATmega48A/48PA/88A/88PA/168A/168PA/328/328PAVR 2EEPROM3
8.2.
4 K/8K/16K/32K AVR1632 2K/4K/8K/16K16 ATmega88A/88 PA/168A/168PA/328/328P 2180SPM/SPM(SPMEN)
10,000/ATmega48A/48PA/88A/88PA/168A/168PA/328/328P (PC)11/12/13/142K/4K/8K/16K 166 - ATmega48A/48PA171 ()181 SPI
(LPM)
9
$0000
$07FF
8-1. ATmega48A/48PA
$0000
$0FFF/$1FFF/$3FFF
8-2. ATmega88A/88PA/168A/ 168PA/328/328P
8.3. SRAM
8-3.ATmega48A/48PA/88A/88PA/168A/168PA/328/32 8PSRAM
ATmega48A/48PA/88A/88PA/168A/168PA/328/328PINOUT64 SRAM()$60$FFI/OLD/LDS/LDDST/STS /STD
768/1280/1280/2304 I/OI/OSRAM32 64I/O160I/O512/1024/1024/2048SRAM
5 () R26R31
YZ63
()X,Y,Z (-1)(+1)
3264I/O160I/O512/1K/1K/2KSRAM 8
8-3.
R0R31$00$3F
$0100
$0xFF
(328)
I/O(648)
SRAM(512/1K/1K/2K8)
$0000
$001F$0020
$005F
$0100
$02FF/$04FF/$04FF/$08FF
: I/O
$0060
$00FF
I/O(1608)
$0060
$00FF
CPU clkCPU
WR
T1 T2 (T1)
8-4. SRAM
RD
8.3.1.
SRAM8-4.2clkCPU
() SRAMT1,T22T1/()/T2(T1)T1
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ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 12
8.4. EEPROM
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P256/512/512/1KEEPROMEEPROM100,000/CPUEEPROMEEPROM EEPROM EEPROM
181 SPI
8.4.1. EEPROM
EEPROM I/O
EEPROM/(:)8-1.()EEPROM/VCCEEPROM
EEPROMEEPROM14(:)
EEPROMCPU4EEPROMCPU2
8.4.2. EEPROM
VCCCPUEEPROMEEPROMEEPROM
EEPROM21EEPROM2CPU
EEPROM
AVRRESET(Low)(BOD)BODVCC()
8.5. I/O ()
ATmega48A/48PA/88A/88PA/168A/168PA/328/328PI/O405
ATmega48A/48PA/88A/88PA/168A/168PA/328/328PI/OI/OI/OI/O32LD/LDS/LDDST/STS/STD$00$1FI/OSBICBI SBISSBICI/OINOUTI/O$00$3FLDSTI/O$20ATmega48A/48PA/88A/88PA/168A/168PA/328/328PINOUT64 SRAM( )$60$FFI/OLD/LDS/LDDST/STS/STD
0I/O
1(0)CBISBIAVRCBISBI(I/O)$00$1F
I/O
8.5.1. I/O
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P3I/O(I/O)$00$1FI/OSBI,CBI,SBIS,SBIC
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ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 13
8.6.
8.6.1. EEARH,EEARL (EEAR) - EEPROM (EEPROM Address Register)
15 14 13 12 11 10 9 8EEARH$22 ($42)
R/WR/WRRRRRR
000000Read/Write
7 6 5 4 3 2 1 0EEARL$21 ($41)
R/WR/WR/WR/WR/WR/WR/WR/W
Read/Write
EEAR6 EEAR5 EEAR4 EEAR3 EEAR2 EEAR1 EEAR0EEAR7
(EEAR8)- - - - - - (EEAR9)
1510 - (Reserved)
0
90 - EEAR90 : EEPROM (EEPROM Address)
EEPROM (EEARHEEARL)256/512/512/1KEEPROMEEPROMEEPROM 0255/511/511/1023EEAREEPROM
: EEAR9ATmega48A/48PA/88A/88PA/168A/168PAEEAR8ATmega48A/48PA0
8.6.2. EEDR - EEPROM (EEPROM Data Register)
(MSB) (LSB)7 6 5 4 3 2 1 0
EEDR$20 ($40)
R/WR/WR/WR/WR/WR/WR/WR/W
00000000Read/Write
70 - EEDR70 : EEPROM (EEPROM Data)
EEPROMEEDREEPROM (EEAR)EEPROMEEPROMEEDREEAREEPROM
8.6.3. EECR - EEPROM (EEPROM Control Register)
- - EEPM1 EEPM0 EERIE EEMPE EEPE EERE7 6 5 4 3 2 1 0
EECR$1F ($3F)
R/WR/WR/WR/WR/WR/WRR
00000Read/Write
7,6 - (Reserved)
0
5,4 - EEPM1,0 : EEPROM (EEPROM Programing Mode Bits)
EEPROMEEPROM (EEPE)1()2()8-1.EEPE(1)EEPMnEEPMnEEPROM'00'
3 - EERIE : EEPROM (EEPROM Ready Interrupt Enable)
EERIE1 (SREG)(I)(1)EEPROMEERIE0EEPROM( EEPROM)EEPROMSPM
8-1. EEPROM
EEPM0 EEPM1
0 1()3.4ms0
1 1.8ms0
0 1.8ms1
1 -1
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ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 14
2 - EEMPE : EEPROM (EEPROM Master Program Enable)
EEMPEEEPROM(EEPE)1EEMPE(1)4EEPE(1)EEPROMEEMPE0EEPE(1)EEMPE(1)40EEPROMEEPE
1 - EEPE : EEPROM (EEPROM Program Enable)
EEPROM(EEPE)EEPROMEEPE(1)EEPROMEEPMn1EEPEEEPROM(EEMPE)1EEPROM()EEPROM()
EEPROM(EEPE)0
SPM/(SPMCSR)SPM(SPMEN)0
EEPROMEEPROM (EEAR)()
EEPROMEEPROM (EEDR)()
EEPROM(EECR)EEPROM(EEMPE)1EEPROM(EEPE)0
EEMPE4EEPROM(EEPE)1
CPU EEPROM()EEPROM ()CPU CPU 171 ()
: EEPROMEEPROMEEPROMEEAREEDREEPROM (SREG)(I)(0)
()EEPROM(EEPE)(0)EEPE(1)CPU2
0 - EERE : EEPROM (EEPROM Read Enable)
EEPROM(EERE)EEPROMEEAREEPROMEERE1EEPROM()1EEPROMCPU4
EEPE()EEPROM (EEAR)EEPROM
EEPROMRC8-2.CPUEEPROM
8-2. EEPROM
EEPROM(CPU) 3.3ms
RC
26,368
Typ
() EEPROM
8.6.a.
EEPROMEEAREEDREEPMn'00'(EEMPE14)EEPE1/18-1.EEPE(1)EEPROM
8.6.b.
2()()
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ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 15
CEEPROM() EEPROMSPM (:)
EEPROM_WR: SBIC EECR,EEPE ;EEPROM RJMP EEPROM_WR ;EEPROM; LDI R19,(0
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ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 16
8.6.4. GPIOR2 - I/O2 (General Purpose I/O Register 2)
(MSB) (LSB)7 6 5 4 3 2 1 0
GPIOR2$2B ($4B)
R/WR/WR/WR/WR/WR/WR/WR/W
00000000Read/Write
8.6.5. GPIOR1 - I/O1 (General Purpose I/O Register 1)
(MSB) (LSB)7 6 5 4 3 2 1 0
GPIOR1$2A ($4A)
R/WR/WR/WR/WR/WR/WR/WR/W
00000000Read/Write
8.6.6. GPIOR0 - I/O0 (General Purpose I/O Register 0)
(MSB) (LSB)7 6 5 4 3 2 1 0
GPIOR0$1E ($3E)
R/WR/WR/WR/WR/WR/WR/WR/W
00000000Read/Write
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ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 17
9.
9.1.
9-1.AVR23
9.1.1. CPU clkCPU
9.1.2. I/O clkI/O
9.1.3. clkFLASH
9.1.4. clkASY
9.1.5. A/D clkADC
CPUAVR CPU
I/O/SPIUSARTI/OI/OI/O2(TWI)clkI/OTWI(:)
CPU
32kHz//
A/DCPUI/OA/D
9.2.
AVR
9-1.
AVR
/
A/D CPU SRAM EEPROM
RC
RC
/
clkADC clkCPUclkFLASH
clkI/OclkASY
9-1.
01110110
: 1=0=
CKSEL30
11111000
01010100
128kHz(WDT) 0011
RC 0010
0000
() 0001
9.2.1.
8.0MHzRCCKDIV8(0)1.0MHz (CKSEL=0010, SUT=10, CKDIV8=(0))
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ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 18
9.2.2.
VCC
VCC (tTOUT)28(tTOUT)SUTCKSEL9-2.206
AVRVCCAVRVCC(BOD)BODVCC(BOD)
()632K
VCC
9-2. WDT
0ms 00ms
VCC=3.0V VCC=5.0V
4.3ms 5124.1ms
69ms 8K (8192)65ms
9.3.
XTAL1XTAL29-2.
XTAL219
C1C29-3.
39-3.CKSEL31
CKSEL0SUT1,09-4.
9-2.
XTAL2/TOSC2
C2
C1XTAL1/TOSC1GND
9-3.
C1,2
-
1222pF
0.40.9MHz100 (1)
101 0.93.0MHz
1222pF3.08.0MHz
1222pF8.016MHz
110
111
CKSEL31
: CKSEL
: (VCC)CKDI V8=0
1:
9-4. /
CKSEL0,
(VCC=5.0V)
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1
258CK
258CK
1KCK
1KCK
1KCK
16KCK
16KCK
16KCK
14CK+4.1ms
14CK+65ms
14CK
14CK+4.1ms
14CK+65ms
14CK
14CK+4.1ms
14CK+65ms
(BOD)
(BOD)
(1)
(1)
(2)
(2)
(2)
SUT1,0
0
1
1:
2:
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 19
9.4.
XTAL1XTAL29-3.
XTAL218VCC=2.75.5V
C1C29-5.
9-5.CKSEL31
CKSEL0SUT1,09-6.
9-5.
C1,2
1222pF
0.420MHz011
CKSEL31: (VCC)CKDI
V8=0
9-3.
XTAL2/TOSC2
C2
C1XTAL1/TOSC1GND
9-6. /
CKSEL0,
(VCC=5.0V)
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1
258CK
258CK
1KCK
1KCK
1KCK
16KCK
16KCK
16KCK
14CK+4.1ms
14CK+65ms
14CK
14CK+4.1ms
14CK+65ms
14CK
14CK+4.1ms
14CK+65ms
(BOD)
(BOD)
(1)
(1)
(2)
(2)
(2)
SUT1,0
0
1
1:
2:
9.5.
32.768kHz(ESR)ATmega48A/48PA/88A/88PA/168A/ 168PA/328/328P6.5pF,9pF,12.5pFESR9-7.
TOSC9-8.
9-7. 32.768kHzESR
1: ESR
ESR (k) (1) (CL:pF)
6.5 75
9.0 65
12.5 30
9-8.
(pF)32kHz
XTAL1/TOSC1 XTAL2/TOSC2
18 8
/ 18 8
TOSC(C)
Ce+Ci = 2CL-Cs
Ce : 189-2.Ci : 9-8.CL : 32.768kHzCs : 1TOSC
9-8.(CL)189-2.()
9-10.CKSEL'0100''0101'9-9.SUT
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 20
9-9.
(VCC=5.0V)
0 0
0 1
1 0
1 1
14CK
14CK+4.1ms
14CK+65ms
()
BOD
SUT1,0
9-10.
,
0 1 0 0
0 1 0 1
1KCK
32KCK
(1)
CKSEL30
1:
9.6. RC
RC8.0MHz19729-10.CKDIV8(0)21
9-11.CKSEL (OSCCAL)RC29-10.
OSCCAL((OSCCAL))29-10.
() 183
9-12.SUTPB6(XTAL1/TOSC1)PB7(XTAL2/TOSC2)I/O/(:)
9-11. RC
(MHz)
7.38.10 0 1 0
CKSEL30:
: 8MHz(VCC)8CKDIV8(0)
9-12. RC
,
(VCC=5.0V)
0 0
0 1
1 0
1 1
6CK
6CK
6CK
14CK
14CK+4.1ms
14CK+65ms
(BOD)
(1)
SUT1,0
()
1:
2: RSTDISBL(0)14CK+4.1ms
(2)
9.7. 128kHz
128kHz128kHz3V,259-13.CKSEL'0011'()
9-14.SUT
9-13. 128kHz
128kHz0 0 1 1
CKSEL30
: 128kHz
9-14. 128kHz
,
0 0
0 1
1 0
1 1
6CK
6CK
6CK
14CK
14CK+4ms
14CK+64ms
()
(BOD)
SUT1,0
(1)
1: RSTDISBL(0)14CK+4.1ms
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 21
9.8.
XTAL19-4.CKSEL'0000'()(9-15.)
9-16.SUT
9-15.
020MHz0 0 0 0
CKSEL30
9-4.
XTAL2
XTAL1
GND
PB7
9-16.
,
(VCC=5.0V)
0 0
0 1
1 0
1 1
6CK
6CK
6CK
14CK
14CK+4.1ms
14CK+65ms
()
(BOD)
SUT1,0
MCU2%MCU
9.9. ()
CLKOCKOUT(0)(0)I/OCLKORC CKOUT(0)
9.10. /
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P/19
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P/(TOSC1TOSC2)XTA1,XTAL2/ 4/ RC
(ASSR)(EXCLK)1TOSC132.768kHz98/2
9.11.
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P (CL KPR)()CPUclkCPUclkFLASHclkI/OclkADC9-17.
() CPU()1CLKPS()T1+T2T1+2T22T1T2
CLKPS
(CLKPCE)1CLKPR0
()4CLKPCE0CLKPS
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 22
9.12.
9.12.1. OSCCAL - (Oscillator Calibration Register)
CAL7 CAL07 6 5 4 3 2 1 0
OSCCAL($66)
R/WR/WR/WR/WR/WR/WR/WR/W
Read/Write
CAL6 CAL5 CAL4 CAL3 CAL2 CAL1
70 - CAL70 : (Oscillator Calibration Value)
19729-10.29-10.
EEPROM EEPROM8.8MHz EEPROM
CAL7(0)(1)2OSCCAL=$7FOSCCAL=$80
CAL60$00$7F
9.12.2. CLKPR - (Clock Prescale Register)
CLKPCE - - - CLKPS3 CLKPS2 CLKPS1 CLKPS07 6 5 4 3 2 1 0
CLKPR($61)
R/WR/WR/WR/WRRRR/W
0000Read/Write
7 - CLKPCE : (Clock Prescaler Change Enable)
CLKPSCLKPCE1CLKPCECLKPR0CLKPCE4CLKPS(0)(4)CLKPCECLKPCE(0)
30 - CLKPS30 : (Clock Prescaler Select Bits 30)
MCU9-17.
CKDIV8CLKPSCKDIV8(1)CLKPS'0000'CKDIV8(0)CLKPS8'0011'CKDIV8CLKPSCKDIV8(0)
9-17.
CLKPS3
() 1 4 16 64 256 ()
CLKPS2
CLKPS1 0 1 0 1 0 1 0 1
CLKPS0 0 0 0 0 0 0 0 0
2
0 1
8 32 128
0 1 0 1
1 1 1 1 1 1 1 1
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 23
10. MCUAVR
(BOD)BOD(BOD)
10.1.
179-1.ATmega48A/48PA/88A/88PA/168A/168PA/328/328P10-1.BOD()
: (BOD)ATmega48PA/88PA/168PA/328P
10-1.
()
INT1INT0
clkC
PU
clkF
LA
SH
clkI
O
clkA
DC
clkA
SY /
2
SPMEEPROM
TWI
A/D
I/O
BOD
A/D
(1)
(1)
1: /2(ASSR)(AS2)(1) INT1INT0
6(SMCR)(SE)1SLEEPSMCR(SM20)SLEEP()(A/D)2610-2.
MCUMCUMCU4SLEEP SRAMMCU
10.2. (BOD) (: ATmega48PA/88PA/168PA/328PpicoPower)
(BOD)18228-6.28-7.BODLEVELBODBOD10-1.BODBODBODOFFBODVCC
BODMCUBOD60s
BODMCU(MCUCR)6BOD(BODS)26MCUCR - MCU1BODOFF0BOD()BODBODS0
BODS26MCUCR - MCU
10.3.
(SM20)'000'SLEEPMCUCPUSPIUSAR TA/D2/clkCPUclkFLASH
MCUUSART/(ACSR)(ACD)(1)A/D
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 24
10.4. A/D
(SM20)'001'SLEEPMCUA/DCPUA/D2/2()()clkI/O, clkCPU, clkFLASH
A/DA/DA/D (BOD)2/2SPM/EEPROMINT0INT1A/DMCU
: /28 /2 (PWM)
10.5.
SM20'010'SLEEPMCU2() (BOD)2INT0INT1MCU
: MCUMCU4017 SUTCKSEL
()17CKSEL
10.6.
SM20'011'SLEEPMCU()1
/2() (SREG)(I)(1)/2(TIMSK2)/2(TOIE2)x(OCIE2 x)(1)
/2()
/2/2//2/2
10.7.
/SM20'110'SLEEPMCU()()6
10.8.
/SM20'111'SLEEPMCU()()6
10.9.
(27(PRR))I/O (PRR)(0)
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 25
10.10.
AVR
10.10.1. A/D (ADC)
A/DA/DA/DOFFON()()A/D155A/D
10.10.2.
A/D153
10.10.3. (BOD)
(BOD)OFFBODLEVEL(BOD)29(BOD)
10.10.4.
(BOD)A/D()ON30
10.10.5.
OFF 30
10.10.6.
I/O(clkI/O)A/D(clkADC)46VCC/2
VCC/2(DIDR0DIDR1)154DIDR1 - 1164DIDR0 - 0
10.10.7. (dW)
DWEN
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 26
10.11.
10.11.1. SMCR - (Sleep Mode Control Register)
- - - - SM2 SM1 SM0 SE7 6 5 4 3 2 1 0
SMCR$33 ($53)
R/WR/WR/WR/WRRRR
00000000Read/Write
74 - (Reserved)
0
31 - SM20 : (Sleep Mode Select Bit 2, 1 and 0)
10-2.61
10-2.
SM2
0
A/D
0
SM0
0
0
0
1
0
1
SM1
0
1
0
1
1 ()
()1
0
1
0
0
1
1
0
1
1
1
()
()
:
0 - SE : (Sleep Enable)
SLEEPMCU(SE)1MCUSLEEP(SE)(1)(0)
10.11.2. MCUCR - MCU (MCU Control Register)
- BODS() BODSE() PUD - - (IVSEL) (IVCE)7 6 5 4 3 2 1 0
MCUCR$35 ($55)
R/WR/WRRR/WR/WR/WR
00000000Read/Write
: ATmega48PA/88PA/164PA/328P
6 - BODS : BOD (BOD Sleep) ()
BODOFFBODS12310-1.BODSMCUCRBOD(BODSE)BODBODSBODSE1BODS BODS14BODSE0
BODS3()SLEEPBODOFFBODS()BODS3(0)
5 - BODSE : BOD (BOD Sleep Enable) ()
BODSEBOD(BODS)BODSBOD
: ATmega48PA/88PA/168PA/328PpicoPower
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 27
10.11.3. PRR - (Power Reduction Register)
PRTWI PRTIM2 PRTIM0 - PRTIM1 PRSPI PRUSART0 PRADC7 6 5 4 3 2 1 0
PRR($64)
R/WR/WR/WR/WRR/WR/WR/W
00000000Read/Write
7 - PRTWI : 2 (Power Reduction TWI)
12(TWI)TWITWI
6 - PRTIM2 : /2 (Power Reduction Timer/Counter2)
1((AS2)=0)/2/2
5 - PRTIM0 : /0 (Power Reduction Timer/Counter0)
1/0/0
4 - (Reserved)
0
3 - PRTIM1 : /1 (Power Reduction Timer/Counter1)
1/1/1
2 - PRSPI : (Power Reduction Serial Peripheral Interface)
WIRE1
1(SPI)SPISPI
1 - PRUSART0 : USART0 (Power Reduction USART0)
1USARTUSARTUSART
0 - PRADC : A/D (Power Reduction ADC)
1A/D(ADC)A/DA/DADC
: 154ACSR - /(ACD)(:)
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 28
11.
11.1. AVR
I/O ATmega168A/168PA/328/3 28P JMP()ATmega48A/48PA/88A/88P A RJMP() (ATmega88A/88PA/168A/168PA/328/328P)11-1.29-12.
AVRI/O
()CKSEL17
11.2.
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P4
ON ON(VPOT)MCU
RESETLowMCU
MCU
(VCC)(VBOT)MCU
11-1.
ON
Q
R
S
Q
3060k
RESET
VCC
PO
RF
BO
RF
EX
TRF
WD
RF
MCU(MCUSR)
8-bit D
ata
Bus
CKSEL30
CK
BODLEVEL20
WDTRC
SUT1,0
RSTDISBL
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 29
11.3. ON
ON(POR)197PORVCC()POR
ONON(VPOT)VCC()VCC
11-2. ON (RESETVCC)
VCC
RESET
VPOT
VRST
tTOUT
11-3. RESETON
VCC
RESET
VPOT
VRST
tTOUT
11.4.
RESETLow(197) (VRST)()(tTOUT)MCURSTDISBL18228-6.28-7.
11-4.
VRST
VCC
RESET
tTOUT
11.5. ()
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P()VCC(BOD)BODBODLEVELBODVBOT+= VBOT +VHYST/2VBOT-=VBOT-VHYST/ 2
BODVCC(11-5.VBOT-)VCC(11-5.VBOT+)()(tTOUT)MCU
BOD197tBODVCC
11-5.
VBOT+VCC
RESET
VBOT-
tTOUT
11.6.
()1CK (tTOUT) 30
11-6.
VCC
RESET
1 CK
tTOUT
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 30
11.7.
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P(BOD)A/D
11.7.1.
197ONON
(BODLEVEL(0)) ( /(ACSR)(ACBG)=1)A/D (A/D/A(ADCSRA)A/D(ADEN)=1)
(BOD)ACBG(=1)A/D(ADEN=1)A/DOFF3
11.8.
11.8.1.
3
16ms8s ON
11.8.2.
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P (WDT) (WDT)128kHzWDT (WDR)
WDT 1 WDT3 2
ON(WDTON)(0) (0) (WDE)(WDIE)'1''0'
(WDE)
()(WDCE)WDE1WDE1WDE
4()WDE (WDP30)WDCE(0)1()
11-7.
OSC
/32k
OSC
/64k
OSC
/128k
OSC
/256k
MCU
WDE
WDP0WDP1WDP2
OSC
/16k
OSC
/8k
OSC
/4k
OSC
/2k
(128kHz)R
OSC
/512k
OSC
/1024k
WDP3
WDIF
WDIE
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 31
OFFC()
WDT_OFF: CLI ; WDR ; IN R16,MCUSR ;MCUSR ANDI R16,~(1
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 32
11.9.
11.9.1. MCUSR - MCU (MCU Status Register)
MCUMCU
- - - - WDRF BORF EXTRF PORF7 6 5 4 3 2 1 0
MCUSR$34 ($54)
R/WR/WR/WR/WRRRR
0000Read/Write
74 - (Reserved)
0
3 - WDRF : (Watchdog Reset Flag)
(1)ON0(0)
2 - BORF : (Brown-Out Reset Flag)
(1)ON0(0)
1 - EXTRF : (External Reset Flag)
(1)ON0(0)
0 - PORF : ON (Power-on Reset Flag)
ON(1)0(0)
MCUSR(0)(0)
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 33
11.9.2. WDTCSR - (Watchdog Timer Control Register)
WDIF WDIE WDP3 WDCE WDE WDP2 WDP1 WDP07 6 5 4 3 2 1 0
WDTCSR($60)
R/WR/WR/WR/WR/WR/WR/WR/W
0000000Read/Write
7 - WDIF : (Watchdog Interrupt Flag)
(1)WDIF(0)WDIF1(0) (SREG)(I)(WDIE)(1)
6 - WDIE : (Watchdog Interrupt Enable)
1 (SREG)(I)(1)(=1) (WDE)(0)
WDE(1) (WDIF)(1)WDIEWDIF(0) WDIE(1) ()
11-1.
WDE WDIEWDTON
0 01
0 11
1 01
1 11
x x0
: WDTON01
4 - WDCE : (Watchdog Change Enable)
(WDE)WDE(0)WDCE(1)
14WDCE(0)
3 - WDE : (Watchdog System Reset Enable)
WDEMCU(MCUSR) (WDRF)WDRF(1)WDE(1)WDE(0)WDRF(0)
5,20 - WDP30 : (Watchdog Timer Prescaler 3,2,1 and 0)
WDP30 11-2.
11-2.
WDP3 0 1
WDP2 10 0 1
WDP1 1 00 0 11 10
WDP0 0 00 1 11 0 00 1 11 00 11
WDT 2k 4k 8k 16k 32k 64k 128k 256k 512k 1024k
() (VCC=5V)
16ms 32ms 64ms 0.125s 0.25s 0.5s 1.0s 2.0s 4.0s 8.0s
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 34
12. ATmega48A/48PA/88A/88PA/168A/168PA/328/328PAVR9
ATmega48A/48PA,ATmega88A/88PA,ATmega168A/168PA,ATmega328/328P
ATmega168A/168PAATmega328/328P2ATmega48A/48PAATmega88A/88PA1
ATmega48A/48PA ATmega88A/88PA,ATmega168A/168PAATmega328/328P BOOTRSTMCU(MCUCR)(IVSEL)
12.1.
12-1.
ATmega48P/48PA
ATmega168A/168PA/
328/328P(2)
ATmega88A/88PA
(2)
1 $0000 ON, WDT, BOD$0000 (1)$0000 (1)
2 $0001 INT0 0$0002$0001
3 $0002 INT1 1$0004$0002
4 $0003 PCINT0 (PCI0) 0$0006$0003
5 $0004 PCINT1 (PCI1) 1$0008$0004
6 $0005 PCINT2 (PCI2) 2$000A$0005
7 $0006 WDT $000C$0006
8 $0007 /2 COMPA /2A$000E$0007
9 $0008 /2 COMPB /2B$0010$0008
10 $0009 /2 OVF /2$0012$0009
11 $000A /1 CAPT /1$0014$000A
12 $000B /1 COMPA /1A$0016$000B
13 $000C /1 COMPB /1B$0018$000C
14 $000D /1 OVF /1$001A$000D
15 $000E /0 COMPA /0A$001C$000E
16 $000F /0 COMPB /0B$001E$000F
17 $0010 /0 OVF /0$0020$0010
18 $0011 SPI STC SPI $0022$0011
19 $0012 USART RX USART $0024$0012
20 $0013 USART UDRE USART $0026$0013
21 $0014 USART TX USART $0028$0014
22 $0015 A/D ADC A/D$002A$0015
23 $0016 EEPROM EE_RDY EEPROM $002C$0016
24 $0017 ANA_COMP $002E$0017
25 $0018 2 TWI 2$0030$0018
26 $0019 SPM SPM_RDY SPM$0032$0019
1: BOOTRST(0) 171 ()
2: MCU(MCUCR)(IVSEL)(1) ()
() 12-1.,12-2.,12-4.,12-6.12-1.
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 35
12-3.BOOTRST()IVSEL( )
12-3.
BOOTRST IVSEL
ATmega88A/88PA ATmega168A/168PA/328/328P
$0001$00000 $0002(1)
$0001$00001 $0002
$00010 $0002(0)
$00011 $0002
: 17927-7.
() 12-3.,12-5.12-7.12-3. ATmega88A/88PA/168A/168PA/328/328P
ATmega48A/48PA/88A/88PA
$0000 RJMP RESET ;$0001 RJMP EXT_INT0 ;0$0002 RJMP EXT_INT1 ;1$0003 RJMP PCINT0 ;0$0004 RJMP PCINT1 ;1$0005 RJMP PCINT2 ;2$0006 RJMP WDT_OVF ;$0007 RJMP TIM2_COMPA ;/2A$0008 RJMP TIM2_COMPB ;/2B$0009 RJMP TIM2_OVF ;/2$000A RJMP TIM1_CAPT ;/1$000B RJMP TIM1_COMPA ;/1A$000C RJMP TIM1_COMPB ;/1B$000D RJMP TIM1_OVF ;/1$000E RJMP TIM0_COMPA ;/0A$000F RJMP TIM0_COMPB ;/0B$0010 RJMP TIM0_OVF ;/0$0011 RJMP SPI_STC ;SPI$0012 RJMP USART_RXC ;USART $0013 RJMP USART_UDRE ;USART $0014 RJMP USART_TXC ;USART $0015 RJMP ADC ;ADC$0016 RJMP EE_RDY ;EEPROM$0017 RJMP ANA_COMP ;$0018 RJMP TWI ;2$0019 RJMP SPM_RDY ;SPM;$001A RESET: LDI R16,HIGH(RAMEND) ;RAM$001B OUT SPH,R16 ; $001C LDI R16,LOW(RAMEND) ;RAM$001D OUT SPL,R16 ; ;I/O
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 36
ATmega88A/88PABOOTRST(1)2KMCU(MCUCR)(IVSEL)(1)
; (BOOTRST=1)$0000 RESET: LDI R16,HIGH(RAMEND) ;RAM ()$0001 OUT SPH,R16 ; $0002 LDI R16,LOW(RAMEND) ;RAM$0003 OUT SPL,R16 ; ;I/O
.ORG $0C01 ; 2K
$0C01 RJMP EXT_INT0 ;0$0C02 RJMP EXT_INT1 ;1
$0C19 RJMP SPM_RDY ;SPM
ATmega88A/88PABOOTRST(0)2K
.ORG $0001 ;
$0001 RJMP EXT_INT0 ;0$0002 RJMP EXT_INT1 ;1
$0019 RJMP SPM_RDY ;SPM ;
.ORG $0C00 ; 2K
; (BOOTRST=0)$0C00 RESET: LDI R16,HIGH(RAMEND) ;RAM ()$0C01 OUT SPH,R16 ; $0C02 LDI R16,LOW(RAMEND) ;RAM$0C03 OUT SPL,R16 ; ;I/O
ATmega88A/88PABOOTRST(0)2KMCU(MCUCR)(IVSEL)(1)
.ORG $0C00 ; 2K
$0C00 RJMP RESET ; (BOOTRST=0)$0C01 RJMP EXT_INT0 ;0$0C02 RJMP EXT_INT1 ;1
$0C19 RJMP SPM_RDY ;SPM;$0C1A RESET: LDI R16,HIGH(RAMEND) ;RAM ()$0C1B OUT SPH,R16 ; $0C1C LDI R16,LOW(RAMEND) ;RAM$0C1D OUT SPL,R16 ; ;I/O
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 37
ATmega168A/168PA/328/328P
$0000 JMP RESET ;$0002 JMP EXT_INT0 ;0$0004 JMP EXT_INT1 ;1$0006 JMP PCINT0 ;0$0008 JMP PCINT1 ;1$000A JMP PCINT2 ;2$000C JMP WDT_OVF ;$000E JMP TIM2_COMPA ;/2A$0010 JMP TIM2_COMPB ;/2B$0012 JMP TIM2_OVF ;/2$0014 JMP TIM1_CAPT ;/1$0016 JMP TIM1_COMPA ;/1A$0018 JMP TIM1_COMPB ;/1B$001A JMP TIM1_OVF ;/1$001C JMP TIM0_COMPA ;/0A$001E JMP TIM0_COMPB ;/0B$0020 JMP TIM0_OVF ;/0$0022 JMP SPI_STC ;SPI$0024 JMP USART_RXC ;USART $0026 JMP USART_UDRE ;USART $0028 JMP USART_TXC ;USART $002A JMP ADC ;ADC$002C JMP EE_RDY ;EEPROM$002E JMP ANA_COMP ;$0030 JMP TWI ;2$0032 JMP SPM_RDY ;SPM;$0034 RESET: LDI R16,HIGH(RAMEND) ;RAM$0035 OUT SPH,R16 ; $0036 LDI R16,LOW(RAMEND) ;RAM$0037 OUT SPL,R16 ; ;I/O
ATmega168A/168PA/328/328PBOOTRST(1)2KMCU(MCUCR)(IVSEL)(1)
; (BOOTRST=1)$0000 RESET: LDI R16,HIGH(RAMEND) ;RAM ()$0001 OUT SPH,R16 ; $0002 LDI R16,LOW(RAMEND) ;RAM$0003 OUT SPL,R16 ; ;I/O
.ORG $1C02/$3C02 ; 2K
$1C02/$3C02 JMP EXT_INT0 ;0$1C04/$3C04 JMP EXT_INT1 ;1
$1C32/$3C32 JMP SPM_RDY ;SPM
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 38
ATmega168A/168PA/328/328PBOOTRST(0)2K
.ORG $0002 ;
$0002 JMP EXT_INT0 ;0$0004 JMP EXT_INT1 ;1
$0032 JMP SPM_RDY ;SPM ;
.ORG $1C00/$3C00 ; 2K
; (BOOTRST=0)$1C00/$3C00 RESET: LDI R16,HIGH(RAMEND) ;RAM ()$1C01/$3C01 OUT SPH,R16 ; $1C02/$3C02 LDI R16,LOW(RAMEND) ;RAM$1C03/$3C03 OUT SPL,R16 ; ;I/O
ATmega168A/168PA/328/328PBOOTRST(0)2KMCU(MCUCR)(IVSEL)(1)
.ORG $1C00/$3C00 ; 2K
$1C00/$3C00 JMP RESET ; (BOOTRST=0)$1C02/$3C02 JMP EXT_INT0 ;0$1C04/$3C04 JMP EXT_INT1 ;1
$1C32/$3C32 JMP SPM_RDY ;SPM;$1C34/$3C34 RESET: LDI R16,HIGH(RAMEND) ;RAM ()$1C35/$3C35 OUT SPH,R16 ; $1C36/$3C36 LDI R16,LOW(RAMEND) ;RAM$1C37/$3C37 OUT SPL,R16 ; ;I/O
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 39
12.2.
12.2.1. - ATmega88A/88PA/168A/168PA/328/328P
MCU(MCUCR)
12.2.2. MCUCR - MCU (MCU Control Register)
- BODS() BODSE() PUD - - (IVSEL) (IVCE)7 6 5 4 3 2 1 0
MCUCR$35 ($55)
R/WR/WRRR/WR/WR/WR
00000000Read/Write
: ATmega48PA/88PA/168PA/328PpicoPower
1 - IVSEL : (Interrupt Vector Select)
IVSEL(0) (1) BOOTSZ171 ()IVSEL
(IVCE)1 4IVSEL0IVCE
IVCE(1)IVSELIVSEL4 (SRE G)(I)
: BLB02(0)BLB12(0) 171 ()
0 - IVCE : (Interrupt Vector Change Enable)
IVCE(IVSEL)1IVCEIVSELIVCE4(0)IVSELIVCE(1)()
MOVE_IVT: IN R16,MCUCR ;MCUCR MOV R17,R16 ;MCUCR ORI R16,(1
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 40
13. INT0,INT1PCINT023INT0,1PCINT023 PCI2PCINT1623PCI1PCINT814PCI0PCINT07(PCMSK0,PCMSK1,PCMSK2)PCINT023
INT0INT1()LowA(EICRA)INT0INT1Low()INT0INT117I/OINT0INT1LowI/O
: MCUMCU17 SUTCKSEL
13.1.
13-1.
13-1.
PCINTn
clk
QD
E
QD
PCMSKmPCINTn
QD QD QD PCIFm
A B C
D E
PCINTn
A:
B:
C:
D:
E:
clk
PCIFm
- - - - ISC11 ISC10 ISC01 ISC007 6 5 4 3 2 1 0
EICRA($69)
R/WR/WR/WR/WRRRR
00000000Read/Write
74 - (Reserved)
0
3,2 - ISC11,0 : 1 (Interrupt Sense Control 1 bit1 and 0)
1 (SREG)(I)(EIMSK)1(INT1)(1)INT1()INT113-1.INT11LowLow
13.2.
13.2.1. EICRA - A (External Interrupt Control Register A)
A
13-1. 1(INT1)
ISC11
0 INT1Low
INT1()
1 INT1
INT1
ISC10
0
1
0
1
0
1
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 41
1,0 - ISC01,0 : 0 (Interrupt Sense Control 0 bit1 and 0)
0 (SREG)(I)(EIMSK)0(INT0)(1)INT0()INT013-2.INT01LowLow
13-2. 0(INT0)
ISC01
0 INT0Low
INT0()
1 INT0
INT0
ISC00
0
1
0
1
0
1
13.2.2. EIMSK - (External Interrupt Mask Register)
- - - - - - INT1 INT07 6 5 4 3 2 1 0
EIMSK$1D ($3D)
R/WR/WRRRRRR
00000000Read/Write
72 - (Reserved)
0
1 - INT1 : 1 (External Interrupt Request 1 Enable)
(SREG)(I)(1)INT1(1)INT1A(EICRA)110(ISC11,ISC10)INT1Low()INT11INT1
0 - INT0 : 0 (External Interrupt Request 0 Enable)
(SREG)(I)(1)INT0(1)INT0A(EICRA)010(ISC01,ISC00)INT0Low()INT00INT0
13.2.3. EIFR - (External Interrupt Flag Register)
- - - - - - INTF1 INTF07 6 5 4 3 2 1 0
EIFR$1C ($3C)
R/WR/WRRRRRR
00000000
Read/Write
72 - (Reserved)
0
1 - INTF1 : 1 (External Interrupt Flag 1)
INT1INTF1(1) (SREG)(I)(EIMSK)1(INT1)(1)MCU(0)1(0)INT1(0)
0 - INTF0 : 0 (External Interrupt Flag 0)
INT0INTF0(1) (SREG)(I)(EIMSK)0(INT0)(1)MCU(0)1(0)INT0(0)
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 42
13.2.4. PCICR - (Pin Change Interrupt Control Register)
- - - - - PCIE2 PCIE1 PCIE07 6 5 4 3 2 1 0
PCICR($68)
R/WR/WR/WRRRRR
00000000Read/Write
73 - (Reserved)
0
2 - PCIE2 : 2 (Pin Change Interrupt Enable 2)
(SREG)(I)(1)PCIE2(1)2PCINT1623PCI2PCINT16232 (PCMSK2)
1 - PCIE1 : 1 (Pin Change Interrupt Enable 1)
(SREG)(I)(1)PCIE1(1)1PCINT814PCI1PCINT8141 (PCMSK1)
0 - PCIE0 : 0 (Pin Change Interrupt Enable 0)
(SREG)(I)(1)PCIE0(1)0PCINT07PCI0PCINT070 (PCMSK0)
13.2.5. PCIFR - (Pin Change Interrupt Flag Register)
- - - - - PCIF2 PCIF1 PCIF07 6 5 4 3 2 1 0
PCIFR$1B ($3B)
R/WR/WR/WRRRRR
00000000
Read/Write
73 - (Reserved)
0
2 - PCIF2 : 2 (Pin Change Interrupt Flag 2)
PCINT1623PCIF2(1) (SREG)(I)(PCICR)2(PCIE2)(1)MCU(0)1(0)
1 - PCIF1 : 1 (Pin Change Interrupt Flag 1)
PCINT814PCIF1(1) (SREG)(I)(PCICR)1(PCIE1)(1)MCU(0)1(0)
0 - PCIF0 : 0 (Pin Change Interrupt Flag 0)
PCINT07PCIF0(1) (SREG)(I)(PCICR)0(PCIE0)(1)MCU(0)1(0)
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 43
13.2.6. PCMSK2 - 2 (Pin Change Enable Mask 1623)
PCINT23 PCINT22 PCINT21 PCINT20 PCINT19 PCINT18 PCINT17 PCINT167 6 5 4 3 2 1 0
PCMSK2($6D)
R/WR/WR/WR/WR/WR/WR/WR/W
00000000Read/Write
70 - PCINT23PCINT16 : 2316 (Pin Change Enable Mask 2316)
PCINT1623I/OPCINT1623(PCICR)PCIE2(1)I/OPCINT1623(0)I/O
13.2.7. PCMSK1 - 1 (Pin Change Enable Mask 814)
- PCINT14 PCINT13 PCINT12 PCINT11 PCINT10 PCINT9 PCINT87 6 5 4 3 2 1 0
PCMSK1($6C)
R/WR/WR/WR/WR/WR/WR/WR
00000000Read/Write
7 - (Reserved)
0
60 - PCINT14PCINT8 : 148 (Pin Change Enable Mask 148)
PCINT814I/OPCINT814(PCICR)PCIE1(1)I/OPCINT814(0)I/O
13.2.8. PCMSK0 - 0 (Pin Change Enable Mask 07)
PCINT7 PCINT6 PCINT5 PCINT4 PCINT3 PCINT2 PCINT1 PCINT07 6 5 4 3 2 1 0
PCMSK0($6B)
R/WR/WR/WR/WR/WR/WR/WR/W
00000000Read/Write
70 - PCINT7PCINT0 : 70 (Pin Change Enable Mask 70)
PCINT07I/OPCINT07(PCICR)PCIE0(1)I/OPCINT07(0)I/O
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 44
14.
14.1.
AVRI/O--( )SBICBI1 ()()/()()LED() I/O14-1.VCCGND193
'x''n'(PORTxnB3PORTB3)I/O55I/O
1(PORTx)(DDRx)(PINx)3I/O I/O()PINx1(1/0)MCU(MCUCR)(PUD)(1)
I/OI/O 47
14.2.
I/O14-2.PxnI/O 1
14-1.
PxnCpin
Rpu
I/O
VCCVCC
14-2.
8-bit D
ata
Bus
Q
R
D
PxnQ
R
D
RRx:x
RESET:
RESET:
RDx:DDRx
WRx:PORTx
WDx:DDRx
VCC
DDxn:
PORTxn:
RPx:x
SLEEP:
clkI/O:I/O
DQ DQ
E
PUD:
: WRx, WPx WDx, RRx, RPx, RDx clkI/O,SLEEP, PUD
PINxn:
10
WPx:PINx
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 45
14.2.1.
3 DDxnPORTxnPINxn55I/ODDxnDDRx I/OPORTxnPORTx I/OPINxPINx I/O
DDRxDDxnDDxn1PxnDDxn0Pxn
PORTxn1()OFFPORTxn0 ()Hi-Z
PORTxn1 High(1)PORTxn0 Low(0)
14.2.2.
PINxn1DDRxnPORTxnSBI1
14.2.3.
Hi-Z(DDxn=0, PORTxn=0)High(DDxn=1, PORTxn=1)(DDxn=0, PORTxn=1)Low(DDxn=1, PORTxn=0) High()MCU(MCUCR)(PUD)(1)
LowHi-Z(DDxn=0, PORTxn=0)High(DDxn=1, PORTxn=1)
14-1.
14-1.
DDxn
PORTxn
0
1
1
0
0
0
0
1
(Hi-Z)
PxnLow
(Hi-Z)
Low ()
11 High ()
PUD (MCUCR)
X
0
1
X
X
14.2.4.
DDxn PINxn 14-2.PINxn ( )14-3.tpd,mintpd,max
(14-3.) LowHigh() Low()PINxn2tpd,mintpd,max0.51.5
14-4.NOPOUT (tpd)1
PINxn
R16
tpd,mintpd,max
14-3.
XXX XXX IN R16,PINx XXX
PINxn
R16
tpd
14-4.
OUT PORTx NOP IN R16,PINx XXX
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 46
B01High23Low6747NOP
; LDI R16,(1
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 47
14.3.
14-5.14-2. AVR
14-5.
8-bit D
ata
Bus
Q
R
D
PxnQ
R
D
RRx:x
RESET:
RESET:
RDx:DDRx
WRx:PORTx
WDx:DDRx
VCC
DDxn:
PORTxn:
RPx:x
SLEEP:
clkI/O:I/O
DQ DQ
E
PUD:
: WRx, WPx, WDx, RRx, RPx, RDx clkI/O,SLEEP, PUD
PINxn:
10
PUOExn:
PUOVxn:
DIEOExn:
DIEOVxn: 10
10
PVOExn:
PVOVxn:
10
DDOExn:
DDOVxn:
DIxn:AIOxn:
10
WPx:PINx
PTOExn:
14-2.()14-5.()
14-2.
PUOE1PUOV0DDxn=0, PORTxn=1, PUD=0
PUOV PUOE=1DDxn, PORTxn, PUD(1)/(0)
DDOE 1DDOV0DDxn
DDOV DDOE=1DDxnON(1)/OFF(0)
PVOE1ONPVOVON0PORTxn
PVOV PVOE=1PORTxn(1/0)
PTOE PTOE=1PORTxn
DIEOE1DIEOV0MCU()
OIEOVDIEOE=1MCU()(1)/(0)
DI
AIO
()
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 48
14.3.1. B
B14-3.
14-3. B
XTAL2 ( )TOSC2 ()PCINT7 (7)
PB7
PB6XTAL1 ( )TOSC1 ()PCINT6 (6)
PB5SCK (SPI /)PCINT5 (5)
PB4MISO (SPI /)PCINT4 (4)
PB3MOSI (SPI /)OC2A (/2 A)PCINT3 (3)
SS (SPI )OC1B (/1 B)PCINT2 (2)
PB2
PB1OC1A (/1 A)PCINT1 (1)
PB0ICP1 (/1 )CLKO ( )PCINT0 (0)
XTAL2/TOSC2/PCINT7 - B 7 : PB7
XTAL2 : () 2 I/O
TOSC2 : 2 RC(ASSR)/2ASSR(AS2)(1)(EXCLK)(0)PB7I/O
PCINT7 : 7PB7
PB7 PORTB7, DDB7, PINB70
XTAL1/TOSC1/PCINT6 - B 6 : PB6
XTAL1 : () 1 I/O
TOSC1 : 1 RC(ASSR)/2ASSR(AS2)(1)(EXCLK)(0)PB6I/O
PCINT6 : 6PB6
PB6 PORTB6, DDB6, PINB60
SCK/PCINT5 - B 5 : PB5
SCK : SPISPIB(DDRB)DDB5SPIDDB5SPIB(PORTB)PORTB5
PCINT5 : 5PB5
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 49
MISO/PCINT4 - B 4 : PB4
MISO : SPISPIB(DDRB)DDB4SPIDDB4SPIB(PORTB)PORTB4
PCINT4 : 4PB4
MOSI/OC2A/PCINT3 - B 3 : PB3
MOSI : SPISPIB(DDRB)DDB3SPIDDB3SPIB(PORTB)PORTB3
OC2A : /2APB3/2APB 3(DDB3=1)OC2APWM
PCINT3 : 3PB3
SS/OC1B/PCINT2 - B 2 : PB2
SS : SPISPIB(DDRB)DDB2LowSPI()()SPIDDB2SPIB(POR TB)PORTB2
OC1B : /1BPB2/1BPB 2(DDB2=1)OC1BPWM
PCINT2 : 2PB2
OC1A/PCINT1 - B 1 : PB1
OC1A : /1APB1/1APB 1(DDB1=1)OC1APWM
PCINT1 : 1PB1
ICP1/CLKO/PCINT0 - B 0 : PB0
ICP1 : /1PB0/1
CLKO : PB0 CKOUT(0)PORTB0DDB0
PCINT0 : 0PB0
-
14-4.14-5.B4714-5.SPISPIMISOMOSISPISPI
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 50
14-4. B74
14-5. B30
PB5/SCK/PCINT5 PB4/MISO/PCINT4PB7/XTAL2/
TOSC2/PCINT7PB6/XTAL1/
TOSC1/PCINT6
SPEMSTRINTRCEXTCK+AS2PUOE SPEMSTRINTRC+AS2
PORTB5PUD0PUOV PORTB4PUD0
SPEMSTRINTRCEXTCK+AS2DDOE SPEMSTRINTRC+AS2
00DDOV 00
SPEMSTR0PVOE SPEMSTR0
SCK0PVOV SPI0
--PTOE --
PCINT5PCIE0INTRCEXTCK+AS2+
PCINT7PCIE0DIEOE PCINT4PCIE0
INTRC+AS2+PCINT6PCIE0
1(INTRC+EXTCK)AS2DIEOV 1INTRC+AS2
SCK/PCINT5PCINT7DI SPI/PCINT4PCINT6
-AIO -/
: 1. INTRCRC(CKSEL) 2. EXTCK(CKSEL)
PB1/OC1A/PCINT1 PB0/ICP1/CLKO/PCINT0PB3/MOSI/OC2A/PCINT3 PB2/SS/OC1B/PCINT2
0SPEMSTRPUOE 0SPEMSTR
0PORTB3PUDPUOV 0PORTB2PUD
0SPEMSTRDDOE 0SPEMSTR
00DDOV 00
OC1ASPEMSTR+OC2APVOE 0OC1B
OC1ASPI+OC2APVOV 0OC1B
--PTOE --
PCINT1PCIE0PCINT3PCIE0DIEOE PCINT0PCIE0PCINT2PCIE0
11DIEOV 11
PCINT1SPI/PCINT3DI ICP1/PCINT0SPI SS/PCINT2
--AIO --
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 51
14.3.2. C
C14-6.
14-6. C
RESET ( )PCINT14 (14)
PC6 PC3ADC3 (A/D3)PCINT11 (11)
ADC5 (A/D5)SCL (2 )PCINT13 (13)
PC5 PC2ADC2 (A/D2)PCINT10 (10)
PC4ADC4 (A/D4)SDA (2 )PCINT12 (12)
PC1ADC1 (A/D1)PCINT9 (9)
PC0ADC0 (A/D0)PCINT8 (8)
RESET/PCINT14 - C 6 : PC6
RESET : RSTDISBL(0)I/OON RSTDISBL(1)I/O
PC6 PORTC6, DDC6, PINC60
PCINT14 : 14PC6
SCL/ADC5/PCINT13 - C 5 : PC5
SCL : 2 22(TWCR)2 (TWEN)(1)PC5()250ns()(/)
ADC5 : PC5A/D5A/D5
PCINT13 : 13PC5
SDA/ADC4/PCINT12 - C 4 : PC4
SDA : 2 22(TWCR)2 (TWEN)(1)PC4()250ns()(/)
ADC4 : PC4A/D4A/D4
PCINT12 : 12PC4
ADC3/PCINT11 - C 3 : PC3
ADC3 : PC3A/D3A/D3
PCINT11 : 11PC3
ADC2/PCINT10 - C 2 : PC2
ADC2 : PC2A/D2A/D2
PCINT10 : 10PC2
ADC1/PCINT9 - C 1 : PC1
ADC1 : PC1A/D1A/D1
PCINT9 : 9PC1
ADC0/PCINT8 - C 0 : PC0
ADC0 : PC0A/D0A/D0
PCINT8 : 8PC0
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 52
14-7.14-8.C4714-5.
14-7. C64
PC5/SCL/ADC5/PCINT13 PC4/SDA/ADC4/PCINT12PC6/RESET/PCINT14
TWENPUOE TWENRSTDISBL
PORTC5PUDPUOV PORTC4PUD1
TWENDDOE TWENRSTDISBL
SCLDDOV SDA0
TWENPVOE TWEN0
0PVOV 00
-PTOE --
ADC5D+PCINT13PCIE1DIEOE ADC4D+PCINT12PCIE1RSTDISBL+PCINT14
PCIE1
PCINT13PCIE1DIEOV PCINT12PCIE1RSTDISBL
PCINT13DI PCINT12PCINT14
ADC5/SCLAIO ADC4/SDA
: 2PC4PC5 AIO2(TWI)
14-8. C30
PC1/ADC1/PCINT9 PC0/ADC0/PCINT8PC3/ADC3/PCINT11 PC2/ADC2/PCINT10
00PUOE 00
00PUOV 00
00DDOE 00
00DDOV 00
00PVOE 00
00PVOV 00
--PTOE --
ADC1D+PCINT9PCIE1ADC3D+PCINT11PCIE1DIEOE ADC0D+PCINT8PCIE1ADC2D+PCINT10PCIE1
PCINT9PCIE1PCINT11PCIE1DIEOV PCINT8PCIE1PCINT10PCIE1
PCINT9PCINT11DI PCINT8PCINT10
ADC1ADC3AIO ADC0ADC2
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 53
14.3.3. D
D14-9.
14-9. D
AIN1 ()PCINT23 (23)
PD7PD3
INT1 (1 )OC2B (/2 B)PCINT19 (19)AIN0 ()
OC0A (/0 A)PCINT22 (22)
PD6
PD2INT0 (0 )PCINT18 (18)
PD5T1 (/1 )OC0B (/0 B)PCINT21 (21) PD1
TXD (USART )PCINT17 (17)
PD4XCK (USART )T0 (/0 )PCINT20 (20)
PD0RXD (USART )PCINT16 (16)
AIN1/PCINT23 - D 7 : PD7
AIN1 : OFF
PCINT23 : 23PD7
AIN0/OC0A/PCINT22 - D 6 : PD6
AIN0 : OFF
OC0A : /0APD6/0APD6(DDD6=1)OC0APWM
PCINT22 : 22PD6
T1/OC0B/PCINT21 - D 5 : PD5
T1 : /1
OC0B : /0BPD5/0BPD5 (DDD5=1)OC0BPWM
PCINT21 : 21PD5
XCK/T0/PCINT20 - D 4 : PD4
XCK : USART
T0 : /0
PCINT20 : 20PD4
INT1/OC2B/PCINT19 - D 3 : PD3
INT1 : 1PD3
OC2B : /2BPD3/2BPD3 (DDD3=1)OC2BPWM
PCINT19 : 19PD3
INT0/PCINT18 - D 2 : PD2
INT0 : 0PD2
PCINT18 : 18PD2
TXD/PCINT17 - D 1 : PD1
TXD : (USART)USARTD(DDRD)DDD1
PCINT17 : 17PD1
RXD/PCINT16 - D 0 : PD0
RXD : (USART)USARTDDRDDDD0USARTPORTD0
PCINT16 : 16PD0
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 54
14-10.14-11.D4714-5.
14-10. D74
PD5/T1/OC0B/PCINT21 PD4/XCK/T0/PCINT20PD7/AIN1/PCINT23 PD6/AIN0/OC0A/PCINT22
00PUOE 00
00PUOV 00
00DDOE 00
00DDOV 00
OC0B0PVOE UMSELOC0A
OC0B0PVOV XCKOC0A
--PTOE --
PCINT21PCIE2PCINT23PCIE2DIEOE PCINT20PCIE2PCINT22PCIE2
00DIEOV 00
T1/PCINT21PCINT23DI XCK/T0/PCINT20PCINT22
-AIN1AIO -AIN0
14-11. D30
PD1/TXD/PCINT17 PD0/RXD/PCINT16PD3/INT1/OC2B/PCINT19 PD2/INT0/PCINT18
TXEN0PUOE RXEN0
00PUOV PORTD0PUD0
TXEN0DDOE RXEN0
10DDOV 00
TXENOC2BPVOE 00
TXDOC2BPVOV 00
--PTOE --
PCINT17PCIE2INT1+PCINT19PCIE2DIEOE PCINT16PCIE2INT0+PCINT18PCIE2
11DIEOV 11
PCINT17INT1/PCINT19DI RXD/PCINT16INT0/PCINT18
--AIO --
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 55
14.4. I/O
14.4.1. MCUCR - MCU (MCU Control Register)
- BODS() BODSE() PUD - - (IVSEL) (IVCE)7 6 5 4 3 2 1 0
MCUCR$35 ($55)
R/WR/WRRR/WR/WR/WR
00000000Read/Write
: ATmega48PA/88PA/168PA/328PpicoPower
4 - PUD : (Pull-up Disable)
1DDxnPORTxn(DDxn=0, PORTxn=1)I/O 45
14.4.2. PORTB - B (Port B Data Register)
PORTB7 PORTB07 6 5 4 3 2 1 0
PORTB$05 ($25)
R/WR/WR/WR/WR/WR/WR/WR/W
00000000Read/Write
PORTB6 PORTB5 PORTB4 PORTB3 PORTB2 PORTB1
14.4.3. DDRB - B (Port B Data Direction Register)
DDB7 DDB07 6 5 4 3 2 1 0
DDRB$04 ($24)
R/WR/WR/WR/WR/WR/WR/WR/W
00000000Read/Write
DDB6 DDB5 DDB4 DDB3 DDB2 DDB1
14.4.4. PINB - B (Port B Input Address) ()
PINB7 PINB07 6 5 4 3 2 1 0
PINB$03 ($23)
R/WR/WR/WR/WR/WR/WR/WR/W
Read/Write
PINB6 PINB5 PINB4 PINB3 PINB2 PINB1
14.4.5. PORTC - C (Port C Data Register)
- PORTC07 6 5 4 3 2 1 0
PORTC$08 ($28)
R/WR/WR/WR/WR/WR/WR/WR
00000000Read/Write
PORTC6 PORTC5 PORTC4 PORTC3 PORTC2 PORTC1
14.4.6. DDRC - C (Port C Data Direction Register)
- DDC07 6 5 4 3 2 1 0
DDRC$07 ($27)
R/WR/WR/WR/WR/WR/WR/WR
00000000Read/Write
DDC6 DDC5 DDC4 DDC3 DDC2 DDC1
14.4.7. PINC - C (Port C Input Address) ()
- PINC07 6 5 4 3 2 1 0
PINC$06 ($26)
R/WR/WR/WR/WR/WR/WR/WR
0Read/Write
PINC6 PINC5 PINC4 PINC3 PINC2 PINC1
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 56
14.4.8. PORTD - D (Port D Data Register)
PORTD7 PORTD07 6 5 4 3 2 1 0
PORTD$0B ($2B)
R/WR/WR/WR/WR/WR/WR/WR/W
00000000Read/Write
PORTD6 PORTD5 PORTD4 PORTD3 PORTD2 PORTD1
14.4.9. DDRD - D (Port D Data Direction Register)
DDD7 DDD07 6 5 4 3 2 1 0
DDRD$0A ($2A)
R/WR/WR/WR/WR/WR/WR/WR/W
00000000Read/Write
DDD6 DDD5 DDD4 DDD3 DDD2 DDD1
14.4.10. PIND - D (Port D Input Address) ()
PIND7 PIND07 6 5 4 3 2 1 0
PIND$09 ($29)
R/WR/WR/WR/WR/WR/WR/WR/W
Read/Write
PIND6 PIND5 PIND4 PIND3 PIND2 PIND1
: PINxI/O(45)
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 57
15. 8 /0 (PWM)
15.1.
2 2 / () (PWM) PWM 3 (TOV0, OCF0A, OCF0B)
15.2.
/02PWM8 /()
8 /15-1.I/O2CPU(I/OI/O)I/O(:)I/O658 /0
27PRR - PRTIM0/00
15-1. 8 /
TCCRnA
OCRnA
8-bit Data Bus
Tn
TOVn ()
()
TCNTn
OCRnB
=
=
= =0
TOP
TOP BOTTOM
clkTn
OCnA
OCnB
OCFnA ()
OCFnB ()
TCCRnB
15.2.1.
/(TCNT0)(OCR0AOCR0B)8/0(TIFR0)/0(TIMSK0)()TIFR0TIMSK 0
/T0/()// (clkT0)
2(OCR0AOCR0B)/(OC0AOC0B)PWM59(OCF0AOCF0B)(1)
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 58
15.2.2.
'n'/0xAB(/0TCNT0)
15-1.
15-1.
BOTTOM /$00
/$FF(255)MAX
/($FF)OCR0A(TOP)
TOP
15.3. /
//B(TCCR0B)(CS020)88/0/1
15.4.
8 /15-2.
15-2.
BOTTOM
TCNTn(/)
8-bit Data Bus TOVn ()
count TCNT01direction ()clear TCNT0($00)clkTn clkT0/ TOP TCNT0BOTTOM TCNT0($00)
count
direction
clear
TOP
clkTn
Tn
()
()
/ (clkT0)($00)(+1)(-1)clkT0(CS020)(CS020=000)/TCNT0/ (clkT0)CPUCPU()
()/0A(TCCR0A)(WGM010)/0B(TC CR0B)(WGM02)()OC0A/OC0B61
/(TOV0)WGM020(=1)TOV0CPU
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 59
15.5.
8TCNT0(OCR0AOCR0B)TCNT0OCR0AOCR0B/ (OCF0AOCF0B)(1)(I=1, OCIE0AOCIE0B=1)(0)I/O1(0)(WGM020)(COM0x10)MAXBOTTOM(61)
15-3.
OCR0x(PWM)2/(CTC)22TOPBOTTOMOCR0xPWM
OCR0x2CPUOCR0xOCR0x
15-3.
8-bit Data Bus
OCFnx ()
OCnxBOTTOMTOP
WGMn20 COMnx10
OCRnx
= (8)
OCRnx TCNTn
FOCnx
() nxOCR0xOCR0xOCR0xOCR0x
15.5.1.
PWM(FOC0x)1()(OCF0x)(1)//OC0x(COM0x10OC0x(1)(0)1/0)
15.5.2. TCNT0
TCNT0CPU// / TCNT0OCR0x
15.5.3.
TCNT01/ /TCNT0TCNT0OCR0x()/BOTTOMTCNT0
OC0x OC0x(FOC0x) OC0x()
(COM0x10)(OCR0x)2COM0x10
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 60
15.6.
(COM0x10)2(OC0x)COM0x 10COM0x10OC0x15-4.COM0x10I/OI/OI/O(:)COM0x10I/O(PORTDDR)OC0xOC0xOC0x OC0x'0'
15-4.
OCnx
QD
OCnx
QD
PORT
QD
DDR
1
0
8-bit D
ata
Bus
clkI/O
COMnx1COMnx0
FOCnx
COM0x10(1)I/O(OC0x)OC0x() (DDR)OC0x(DDR_OC0x)OC0x
OC0xCOM0x10658 /0
15.6.1.
CTCPWMCOM0x10COM0x10=00OC0xPWM6515-2.15-5.PWM6515-3.15-6.PWM6515-4.15-7.
COM0x10PWM(FOC0x)
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 61
15.7.
/(WGM020)(COM0x10)()COM0x10PWM(PWM)PWMCOM0x10(0)(1)1/0(60)
64/0
15.7.1.
(WGM020=000)(+)8(TOP=$FF)$00(BOTTOM)/(TOV0)TCNT0$00/ (1)TOV0(1)(0)9TOV0(0)/0/
CPU
15.7.2. /(CTC)
/(CTC)(WGM020=010)OCR0ACTC(TCNT0)OCR0A$00OCR0ATOP
CTC15-5.(TCNT0)TCNT0OCR0A(TCNT0)($00)
OCnx()
TCNTn
15-5. CTC
1 4 52 3
OCFnx(TOP)
TOP
: COMnx10=01
OCF0A/TOPTOPBOTTOMTOPCTC2OCR0ATCNT0()/()($FF)$00
CTCOC0A(COM0A10)(=01)OC0A(DDR_OC0A=1) OCR0A0($00) fOC0A= fclk_I/O/2
N(1,8,64,256,1024)
/(TOV0)MAX$00/ (1)
fOCnx =fclk_I/O
2N(1OCRnx)
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 62
15.7.3. PWM
(PWM)(WGM020=011111)PWMPWM()PWMBOTTOMTOPBOTTOMTOPWGM020=011$FFWGM020=111OCR0A(COM0x10=10)(OC0x)TCNT0OCR0x(0)BOTTOM(1)(COM0x10=11)(1)BOTTOM(0)PWM()PWM2D/APWM()
PWM//TOP/()/ ($00)PWM15-6.TCNT0()PWMOCR0xTCNT0()TCNT0OCR0x(:)(OCF0x)OCR0x= TOP(1)(:)
OCnx()(COMnx10=10)
TCNTn
15-6. PWM
1 42 3
OCRnxTOVn
OCRnx
OCnx()(COMnx10=11)
5 6 7
OCFnx
/(TOV0)TOP(1)
PWMOC0xPWMCOM0x10'10'PWMPWMCOM0x10'11'WGM02(1)COM0A10'01'OC0AOC0B(6515-3.15-6.)OC0x (DDR_OC0x)PWMTCNT0OCR0xOC0x()(1)((0))($00,TOPBOTTOM)/ OC0x(0)(1)
PWM
N(1,8,64,256,1024)
OCR0xPWMPWMOCR0xBOTTOM($00)TOP+1 / ()OCR0xTOP(COM0x10)LowHigh
(:WGM020=111)PWM(50%)OC0A(COM0A10=01)OCR0A0($00) fOC0x= fclk_I/O/2PWM2CTCOC0A(COM0A10=01)
fOCnxPWM =fclk_I/O
N(1+TOP)
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 63
15.7.4. PWM
(PWM)(WGM020=001101)PWMPWM()BOTTOMTOPTOPBOTTOMTOPWGM020=001$FFWGM020=101OCR0A(COM0x10= 10)(OC0x)TCNT0OCR0x(0)(1)(COM0x10=11)()()()
PWMTOPTOPTCNT01/ TOPPWM15-7.TCNT0()PWMOCR0xTCNT0()TCNT0OCR0x(:)
OCnx()(COMnx10=10)
TCNTn
15-7. PWM
21
OCFnx
OCRnx
OCnx()(COMnx10=11)
3
TOVn
OCRnx
/(TOV0)/BOTTOM(1)BOTT OM
PWMOC0xPWMCOM0x10'10'PWMPWMCOM0x10'11'WGM02(1)COM0A10'01'OC0AOC0B(6515-4.15-7.)OC0x (DDR_OC0x)PWMTCNT0OCR0xOC0x()(1)((0))TCNT0OCR0xOC0x(0)((1))PWMPWM
N(1,8,64,256,1024)
OCR0xPWMPWMPWMOCR0xBOTTOM($00)LowTOPHighPWM
15-7.2OCnxHighLowBOTTOM2
15-7.OCR0xTOPOCR0xTOPOCnx(: LHHH)BOTTOM()TOP()OCnx(HL)
/OCR0xOCn x(: TOP(H)HL)
fOCnxPCPWM =fclk_I/O
2NTOP
-
15.8. /
// (clkT0)(1)15-8./ PWMMAX
clkTn (clkI/O/1)
TCNT0
TOVn
clkI/O
15-8. (1/1)/
MAX-1 MAX BOTTOM BOTTOM+1
15-9.
clkTn (clkI/O/8)
TCNT0
clkI/O
15-9. (fclk_I/O/8)/
MAX-1 MAX BOTTOM BOTTOM+1
TOVn
15-10.CTCOCR0ATOPPWMOCF0AOCF0B
clkTn (clkI/O/8)
TCNT0
clkI/O
15-10. (fclk_I/O/8)/OCF0x
OCRnx-1 OCRnx OCRnx+1 OCRnx+2
OCRnx
OCFnx
OCRnx
15-11.OCR0ATOPPWMCTCTCNT0OCF0A
clkTn (clkI/O/8)
TCNT0 (CTC)
clkI/O
15-11. (fclk_I/O/8)/OCF0A
TOP-1 TOP BOTTOM BOTTOM+1
OCRnx
OCFnx
TOP
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 64
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 65
15.9. 8 /0
15.9.1. TCCR0A - /0A (Timer/Counter 0 Control Register A)
COM0A1 COM0A0 COM0B1 COM0B0 - - WGM01 WGM007 6 5 4 3 2 1 0
TCCR0A$24 ($44)
R/WR/WRRR/WR/WR/WR/W
00000000Read/Write
7,6 - COM0A1,0 : A (Compare Match A Output Mode bit 1 and 0)
OC0ACOM0A1011OC0AI/OI/OOC0A(DDR)(1)
OC0ACOM0A10WGM020
15-2.WGM020CTC(PWM)COM0A10
15-3.WGM020PWMCOM0A10
15-4.WGM020PWMCOM0A10
15-2. PWMA
COM0A1
0 (OC0A)
OC0A ()
1 OC0A Low
OC0A High
COM0A0
0
1
0
1
0
1
15-3. PWMA ()
COM0A1
0 (OC0A)
WGM02=0 : (OC0A)WGM02=1 : OC0A ()
1LowBOTTOMHighOC0A ()
HighBOTTOMLowOC0A ()
COM0A0
0
1
0
1
0
1
15-4. PWMA ()
COM0A1
0 (OC0A)
WGM02=0 : (OC0A)WGM02=1 : OC0A ()
1LowHighOC0A
HighLowOC0A
COM0A0
0
1
0
1
0
1
5,4 - COM0B1,0 : B (Compare Match B Output Mode bit 1 and 0)
OC0BCOM0B1011OC0BI/OI/OOC0B(DDR)(1)
OC0BCOM0B10WGM020
15-5.WGM020CTC(PWM)COM0B10
15-6.WGM020PWMCOM0B10
15-7.WGM020PWMCOM0B10
15-5. PWMB
COM0B1
0 (OC0B)
OC0B ()
1 OC0B Low
OC0B High
COM0B0
0
1
0
1
0
1
15-6. PWMB ()
COM0B1
0 (OC0B)
()
1LowBOTTOMHighOC0B ()
HighBOTTOMLowOC0B ()
COM0B0
0
1
0
1
0
1
15-7. PWMB ()
COM0B1
0 (OC0B)
()
1LowHighOC0B
HighLowOC0B
COM0B0
0
1
0
1
0
1
: COM0x1(1)OCR0xTOPBOTTOMTOP(1)(0)62PWM63PWM (15-3,4,6,7.:)
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 66
3,2 - (Reserved)
0
1,0 - WGM01,0 : (Waveform Generation Mode bit 1 and 0)
/B(TCCR0B)WGM02()(TOP)(15-8.)/()/(CTC)2(PWM)61
15-8.
TOP/
$FF
$FF
OCR0A
$FF
OCR0xWGM02
0
0
0
0
TOP
BOTTOM
8PWM
/(CTC)
8PWM
-1 -()
WGM00
0
1
0
1
0
0
1
2
3
4
WGM01
0
0
1
1
0
TOV0
MAX
BOTTOM
MAX
MAX
-
OCR0A1 TOPPWM15 0 BOTTOM
-1 -()06 1 -
OCR0A1 BOTTOMPWM17 1 TOP
: MAX=$FFBOTTOM=$00
FOC0A FOC0B - - WGM02 CS02 CS01 CS007 6 5 4 3 2 1 0
TCCR0B$25 ($45)
R/WR/WR/WR/WRRWW
00000000Read/Write
15.9.2. TCCR0B - /0B (Timer/Counter0 Control Register B)
7 - FOC0A : OC0A (Force Output Compare A)
FOC0AWGM020PWM
PWMTCCR0B0FOC0A1OC0ACOM0A10FOC0ACOM0A10
FOC0ATOPOCR0A(CTC)/($00)
FOC0A0
6 - FOC0B : OC0B (Force Output Compare B)
FOC0BWGM020PWM
PWMTCCR0B0FOC0B1OC0BCOM0B10FOC0BCOM0B10
FOC0B
FOC0B0
5,4 - (Reserved)
0
3 - WGM02 : (Waveform Generation Mode bit 2)
65TCCR0A - /AWGM010
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 67
20 - CS020 : 0 (Clock Select0, bit 2,1 and 0)
3/(TCNT0)
15-9. /0
CS02
0 (/0)
clkI/O ()1 clkI/O/8 (8)
clkI/O/64 (64)
CS01
0
1
0
1
0
1
CS00
0
1
0
1
0
1
0
1
0
0
0
0
1
1
1
1
clkI/O/256 (256)clkI/O/1024 (1024)T0 ()
T0 ()
()/0T0T0
15.9.3. TCNT0 - /0 (Timer/Counter0)
(MSB) (LSB)7 6 5 4 3 2 1 0
TCNT0$26 ($46)
R/WR/WR/WR/WR/WR/WR/WR/W
00000000Read/Write
/ /8 TCNT0/ ()(TCNT0)TCNT0OCR0x
15.9.4. OCR0A - /0 A (Timer/Counter0 Output Compare A Register)
(MSB) (LSB)7 6 5 4 3 2 1 0
OCR0A$27 ($47)
R/WR/WR/WR/WR/WR/WR/WR/W
00000000Read/Write
(TCNT0)8OC0A
15.9.5. OCR0B - /0 B (Timer/Counter0 Output Compare B Register)
(MSB) (LSB)7 6 5 4 3 2 1 0
OCR0B$28 ($48)
R/WR/WR/WR/WR/WR/WR/WR/W
00000000Read/Write
(TCNT0)8OC0B
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 68
15.9.6. TIMSK0 - /0 (Timer/Counter 0 Interrupt Mask Register)
- - - - - OCIE0B OCIE0A TOIE07 6 5 4 3 2 1 0
TIMSK0($6E)
R/WR/WR/WRRRRR
00000000Read/Write
73 - (Reserved)
0
2 - OCIE0B : /0B (Timer/Counter0 Output Compare Match B Interrupt Enable)
OCIE0B1 (SREG)(I)(1)/0B/0B/0 (TIFR0)B(OCF0B)(1)
1 - OCIE0A : /0A (Timer/Counter0 Output Compare Match A Interrupt Enable)
OCIE0A1 (SREG)(I)(1)/0A/0A/0 (TIFR0)A(OCF0A)(1)
0 - TOIE0 : /0 (Timer/Counter0 Overflow Interrupt Enable)
TOIE01 (SREG)(I)(1)/0/0/0 (TIFR0)/0(TOV0)(1)
15.9.7. TIFR0 - /0 (Timer/Counter 0 Interrupt Flag Register)
- - - - - OCF0B OCF0A TOV07 6 5 4 3 2 1 0
TIFR0$15 ($35)
R/WR/WR/WRRRRR
00000000Read/Write
73 - (Reserved)
0
2 - OCF0B : /0B (Timer/Conter0, Output Compare B Match Flag)
OCF0B/(TCNT0)(OCR0B)(1)OCF0B(0)1OCF0B(0) (SREG)(I)/0(TIMSK0)/0B(OCIE0B)OCF0B(1)/0B
1 - OCF0A : /0A (Timer/Conter0, Output Compare A Match Flag)
OCF0A/(TCNT0)(OCR0A)(1)OCF0A(0)1OCF0A(0) (SREG)(I)/0(TIMSK0)/0A(OCIE0A)OCF0A(1)/0A
0 - TOV0 : /0 (Timer/Counter0 Overflow Flag)
TOV0/(TCNT0)(1)TOV0(0)1TOV0(0) (SREG)(I)/0(TIMSK0)/0(TOIE0)TOV0(1)/0PWM/0$00(1)
WGM0206615-8.
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 69
16. 16 /1
16.1.
16 (16PWM) 2 2 1 / () (PWM) PWM 4 (TOV1, OCF1A, OCF1B, ICF1)
16.2.
16 /()
'n'/'x'(/1TCNT1)
16 /16-1.I/O2CPU(I/OI/O)I/O(: )I/O8316 /1
27PRR - PRTIM1/10
16-1. 16 /
TCCRnA
OCRnA
8-bit Data Bus
Tn
TOVn ()
()
TCNTn
OCRnB
=
=
= =0
ICRn
TOP
TOP BOTTOM
clkTn
()
ICPn
OCnA
OCnB
OCFnA ()
OCFnB ()
ICFn ()
TCCRnB TCCRnC
: /124814-3.5314-9.
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 70
16.2.1.
/(TCNT1)(OCR1A,OCR1B)(ICR1)16 16 7116 /1 (TCCR1A,TCCR1B,TCCR1C)8 CPU/1(TIFR1)/1(TIMSK1)()TIFR1TIMSK1
/T1/()// (clkT1)
2(OCR1A,OCR1B)/(OC1A,OC1B)PWM75(OCF1A,OCF1B)(1)
(ICR1)(ICP1)(153)()/()()
TOP/OCR1AICR1PWMTOPOCR1AOCR1APWMTOPTOP2TOPICR1PWMOCR1A
16.2.2.
16-1.
BOTTOM $0000
$FFFF(65535)MAX
TOP()TOP($00FF,$01FF,$03FF)OCR1AICR11
TOP
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 71
16.3. 16
TCNT1,OCR1A,OCR1B,ICR18 AVR CPU16 16 2 16 /16 18 16 /16 1616 CPU16 16 CPU16
16 OCR1AOCR1B16
1616
16 / OCR1A, OCR1B, ICR1C16
; ;[16($01FF)] LDI R17,$01 ;$01FF LDI R16,$FF ;$01FF OUT TCNT1H,R17 ;() OUT TCNT1L,R16 ;() ;[16] IN R16,TCNT1L ;() IN R17,TCNT1H ;() ;
C
unsigned int i; /* */ TCNT1 = 0x1FF; /* 16($01FF) */ i = TCNT1; /* 16 */ /* */
: 5
R17:R16TCNT1
16 16 216 / 16
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 72
TCNT1OCR1A,OCR1B,ICR1
RD_TCNT1: IN R18,SREG ;(I) CLI ; IN R16,TCNT1L ;TCNT1() IN R17,TCNT1H ;TCNT1() OUT SREG,R18 ;(I) RET ;
C
unsigned int TIM16_Read_TCNT1(void){ unsigned char sreg; /* */ unsigned int i; /* TCNT1 */ sreg = SREG; /* (I) */ __disable_interrupt(); /* */ i = TCNT1; /* TCNT1 */ SREG = sreg; /* (I) */ return i; /* TCNT1 */}
: 5
R17:R16TCNT1
TCNT1OCR1A,OCR1B,ICR1
WR_TCNT1: IN R18,SREG ;(I) CLI ; OUT TCNT1H,R17 ;TCNT1() OUT TCNT1L,R16 ;TCNT1() OUT SREG,R18 ;(I) RET ;
C
void TIM16_Write_TCNT1(unsigned int i){ unsigned char sreg; /* */ unsigned int i; /* TCNT1 */ sreg = SREG; /* (I) */ __disable_interrupt(); /* */ TCNT1 = i; /* TCNT1 */ SREG = sreg; /* (I) */}
: 5
R17:R16TCNT1
16.3.1.
16 1
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 73
16.4. /
//B(TCCR1B)(CS120)88/0/1
16.5.
16 /1616-2.
16-2.
BOTTOM
TCNTnH(8)
8-bit Data Bus
clkTn
Tn
TOVn ()
()
count
count TCNT11direction ()clear TCNT1($0000)clkTn clkT1/ TOP TCNT1BOTTOM TCNT1($0000)TEMP
direction
clearTCNTn(16 /)
TCNTnL(8)
TOP
TEMP(8)
()
16 8(TCNT1H)8(TCNT1L)28 I/OTCNT1HCPUCPUTCNT1H I/OCPU(TEMP)TCNT1LTCNT1HTCNT1LTCNT1H8 116 CPUTCNT1
/ (clkT1)($0000)(+1)(-1)clkT1(CS120)(CS120=000)TCNT1/ (clkT1)CPUCPU()
()/A(TCCR1A)/B(TCCR1B)(WGM130) ()OC1x78
/(TOV1)WGM130(1)TOV1CPU
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 74
16.6.
/(/)ICP1
16-3.(:)'n'/
16-3.
ICRnH(8)
8-bit Data Bus
ICFn ()
ICRn(16 )
ICRnL(8)
TEMP(8)
TCNTnH(8)
TCNTn(16 /)
TCNTnL(8)
+-
ICPn
ACOACIC
WR
ICNC ICES
: ACO,ACIC/(ACSR)
(ICP1)(ACO)()(TCNT1)16(ICR1)(ICF1)TCNT1ICR1 (1)(I=1,ICIE1=1)ICF1(0)I/O 1(0)
(ICR1)16(ICR1L)(ICR1H)(TEMP)CPUICR1H I/O
ICR1TOPICR1TOPICR1(WGM130)ICR1ICR1LICR1H I/O
16 7116
16.6.1.
(ICP1)/1/(ACSR)(ACIC)(=1)(ICF1)(0)
(ICP1)(ACO)T1(8817-1.)4 /TOPICR1
ICP1
16.6.2.
44
/B(TCCR1B)(ICNC1)(1)ICR14
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 75
16.6.3.
()2(ICR1)ICR1
ICR1
TOP()
ICR1(ICF1)(I/O1)(0)(:ICF1(1))()ICF1(0)
16.7.
16TCNT1(OCR1x)TCNT1OCR1x/ (OCF1x)(1)(I=1,OCIE1x=1)OCF1x(0)OCF1xI/O1(0)(WGM130)(COM1x10)TOPBOTTOM(78)
A/TOP()TOP
16-4.'n'/(/1n=1)'x'(AB)(:)
16-4.
OCRnxH(8)
8-bit Data Bus
OCFnx ()
OCRnx(16 )
OCRnxL(8)
TEMP(8)
TCNTnH(8)
TCNTn(16 /)
TCNTnL(8)
OCnxBOTTOM
TOP
WGMn30 COMnx10
OCRnxH (8)
OCRnx (16 )
OCRnxL (8)
= (16)
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 76
OCR1x12(PWM)2/(CTC)22TOPBOTTOMOCR1xPWM
OCR1x2CPUOCR1xOCR1xOCR1x()(/TCNT1ICR1OCR1x)OCR1x(TEMP)16 OCR1x16(OCR1xH)I/OCPU(OCR1xL)8()() OCR1xOCR1x
16 7116
() nxOCRnxOCRnxOCRnxOCRnx
16.7.1.
PWM(FOC1x)1()(OCF1x)(1)//OC1x(COM1x10OC1x(1)(0)1/0)
16.7.2. TCNT1
TCNT1CPU// / TCNT1OCR1x
16.7.3.
TCNT11/ /TCNT1TCNT1OCR1x()TOPPWMTOPTCNT1()TOP$FFFF()BOTTOMTCNT1
OC1x OC1x(FOC1x) OC1x()
(COM1x10)(OCR1x)2COM1x10
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 77
16.8.
(COM1x10)2(OC1x)COM1x 10COM1x10OC1x16-5.COM1x10I/OI/OI/O(:)COM1x10I/O(PORTDDR)OC1xOC1xOC1x OC1x0
16-5.
OCnx
QD
OCnx
QD
PORT
QD
DDR
1
0
8-bit D
ata
Bus
clkI/O
COMnx1COMnx0
FOCnx
COM1x10(1)I/O(OC1x)OC1x() (DDR)OC1x(DDR_OC1x)OC1x16-2.16-3.16-4.
OC1xCOM1x108316 /1
COM1x10
16.8.1.
CTCPWMCOM1x10COM1x10=00OC1xPWM8316-2.PWM8316-3.PWM/PWM8316-4.
COM1x10PWM(FOC1x)
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 78
16.9.
/(WGM130)(COM1x10)()COM1x10PWM(PWM)PWMCOM1x10(0)(1)1/077
82/1
16.9.1.
(WGM130=0000)(+)16(MAX=$FFFF)$0000(BOTTOM)/(TOV1)TCNT1$0000/ (1)TOV1(1)(0)17TOV1(0)/1/
/(16)/
CPU
16.9.2. /(CTC)
/(CTC)(WGM130=01001100)OCR1AICR1CTC(TCNT1)OCR1A(WGM130=4)ICR1(WGM130=12)$0000OCR1AICR1TOP
CTC16-6.(TCNT1)OCR1AICR1(TCNT1)($0000)
OCnA()
TCNTn
16-6. CTC
1 4 52 3
OCFnAICFn(TOP)
TOP
: COMnA10=01
TOPOCF1AICF1TOPTOPBOTTOMTOPCTC2OCR1AICR1TCNT1()()($FFFF)$0000OCR1A2TOPOCR1APWM(WGM130=1111)
CTCOC1A(COM1A10)(=01)OC1A(DDR_OC1A=1) OCR1A0($0000) fOC1A= fclk_I/O/2
N(1,8,64,256,1024)
/(TOV1)MAX$0000/ (1)
fOCnA =fclk_I/O
2N(1OCRnA)
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 79
16.9.3. PWM
(PWM)(WGM130=0101,0110,0111,1110,1111)PWMPWM()PWMBOTTOMTOPBOTTOM(COM1x10=10)(OC1x)TCNT1OCR1x(0)BOTTOM(1)(COM1x10=11)(1)BOTTOM(0)PWM()/PWM2D/APWM()
PWMPWM8,9,10OCR1AICR12(OCR1AICR1$0003)16(OCR1AICR1MAX)PWM
PWM$00FF,$01FF,$03FF(WGM130=0101,0110,0111)ICR1(WGM130=1110)OCR1A(WGM130=1111)()/ ($0000)PWM16-7.OCR1AICR1TOPPWMTCNT1()PWMOCR1xTCNT1()TCNT1OCR1x(:)(OCF1x)(1)
/(TOV1) TOP(1)OCR1AICR1TOPOCF1AIC F1TOV1(1)/ (1)1TOP
TOPTOPTOPTCNT1OCR1 xTOPOCR1x0()
ICR1TOPICR1OCR1AICR12ICR1ICR1TCNT1()TOPMAX($FFFF)$0000OCR1A2OCR1AI/OOCR1A I/OOCR1AOCR1A()TCNT1TOP/ OCR1ATCNT1($0000)TOV1(1)/
TOPICR1TOPICR1OC1APWMOCR1APWM(TOP)OCR1A2TOPOCR1A
PWMOC1xPWMCOM1x10'10'PWMPWMCOM1x10'11'8316-3.OC1x (DDR_OC1x=1)PWMTCNT1OCR1xOC1x()(1)((0))($0000TOPBOTTOM)/ OC1x(0)((1))
PWMN(1,8,64,256,1024)
OCR1xPWMPWMOCR 1xBOTTOM($0000)TOP+1 / ()TOPOCR1x(COM1x10)LowHigh
PWM(50%)OC1A(COM1A10=01)OCR1A0($0000) fOC1A= fclk_I/O/2PWM2CTCOC1A(COM1A10=01)
RFPWM =log (TOP1)
log 2
OCnx()(COMnx10=10)
TCNTn
16-7. PWM
1 4 82 3
OCRnx/TOPTOVnOCFnAICFn(TOP)
OCRnx
OCnx()(COMnx10=11)
5 6 7
fOCnxPWM =fclk_I/O
N(1TOP)
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 80
16.9.4. PWM
(PWM)(WGM130=0001,0010,0011,1010,1011)PWMPWM()/PWMBOTTOM($0000)TOPTOPBOTTOM(COM1x10=10)(OC1x)TCNT1OCR1x(0)(1)(COM1x10=11)()()()PWM
PWMPWM8,9,10OCR1AICR12(OCR1AICR1$0003)16(OCR1AICR1MAX)PWM
PWM$00FF,$01FF,$03FF(WGM130=0001,0010, 0011)ICR1(WGM130=1010)OCR1A(WGM130=1011)TOPTCNT11/
TOPPWM16-8.OCR1AICR1TOPPWMTCNT1()PWMOCR1xTCNT1()TCNT1OCR1x(:)(OCF1x)(1)
RPCPWM =log (TOP1)
log 2
OCnx()(COMnx10=10)
TCNTn
16-8. PWM
2 41
OCRnx/TOPOCFnAICFn(TOP)
OCRnx
OCnx()(COMnx10=11)
3
TOP
TOVn(BOTTOM)
/(TOV1)BOTTOM(1)OCR1AICR1TOPOCF1AICF1OCR1x(TOP)2 / (1)TOPBOTTOM
TOPTOPTOPTCNT1OCR1xTOPOCR1 x0()16-8.3/ PWMTOPOCR1xOCR1xTOPPWMTOPTOPTOP2(TOP)2
/TOPPWM/PWMTOP2
PWMOC1xPWMCOM1x10'10'PWMPWMCOM1x10'11'(8316-4.)OC1x (DDR_OC1x=1)PWMTCNT1OCR1xOC1x()(1)((0))TCNT1OCR1xOC1x(0)((1))
PWMPWMN(1,8,64,256,1024)
OCR1xPWMPWMPWMOCR1xBOTTOMLowTOPHighPWMTOPOCR1A(WGM130=1011)COM1A10=01OC1A50%
fOCnxPCPWM =fclk_I/O
2NTOP
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 81
16.9.5. /PWM
/(PWM)(WGM130=1000,1001)PWM/PWM()PWMBOTTOM($0000)TOPTOPBOTTOM(COM1x10=10)(OC1x)TCNT1OCR1x(0)(1)(COM1x10=11)()()()PWM
/PWMOCR1xOCR1x(:TOPBOTTO M)(16-8.16-9.)
/PWMPWMOCR1AICR12(OCR1AICR1$0003)16(OCR1AICR1MAX)PWM
/PWM//ICR1(WGM130=1000)OCR1A(WGM130=1001)TOPTCNT11/ TOP/
PWM16-9.OCR1AICR1TOP/PWMTCNT1()PWMOCR1xTCNT1()TCNT1OCR1x (:)(OCF1x)(1)
RPFCPWM =log (TOP1)
log 2
OCnx()(COMnx10=10)
TCNTn
16-9. /PWM
2 41
OCFnAICFn(TOP)
OCRnx
OCnx()(COMnx10=11)
3
TOP
OCRnx/TOPTOVn(BOTTOM)
/(TOV1)OCR1x(BOTTOM)2/ (1)OCR1AICR1TOPOCF1AICF1/TOP(1)TOPBOTTOM
TOPTOPTOPTCNT1OCR1x
16-9.PWMOCR1xBOTTOM
TOPICR1TOPICR1OC1APWMOCR1APWM(TOP)OCR1A2TOPOCR1A
/PWMOC1xPWMCOM1x10'10'PWMPWMCOM1x10'11'(8316-4.)OC1x (DDR_OC1x=1)PWMTCNT1OCR1xOC1x()(1)((0))TCNT1OCR1 xOC1x(0)((1))
/PWMPWMN(1,8,64,256,1024)
OCR1x/PWMPWMPWMOCR1xBOTTOMLowTOPHighPWMTOPOCR1A(WGM130 =1001)COM1A10=01OC1A50%
fOCnxPFCPWM =fclk_I/O
2NTOP
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 82
16.10. /
// (clkT1)(1)OCR1xOCR1x(2)16-10.OCF1x
16-11.
16-12.TOP/PWMOCRnxBOTTOMTOPBOTTOMTOP-1BOTTOM+1BOTT OMTOV1(1)
clkTn (clkI/O/1)
TCNT1
OCRnx
clkI/O
16-10. (1/1)/OCF1x
OCRnx-1 OCRnx OCRnx+1 OCRnx+2
OCFnx
OCRnx
clkTn (clkI/O/8)
TCNT1
clkI/O
16-11. (fclk_I/O/8)/OCF1x
OCRnx-1 OCRnx OCRnx+1 OCRnx+2
OCRnx
OCFnx
OCRnx
clkTn (clkI/O/1)
TCNT1 (CTC,FPWM)
OCRnx(TOP)
clkI/O
16-12. (1/1)/TOP
TOP-1 TOP BOTTOM BOTTOM+1
TOVn(FPWM)ICFn(TOP)
OCRnx
TCNT1 (PCPWM,PFCPWM) TOP-1 TOP TOP-1 TOP-2
OCRnx
16-13.
clkTn (clkI/O/8)
TCNT1 (CTC,FPWM)
OCRnx(TOP)
clkI/O
16-13. (fclk_I/O/8)/TOP
TOP-1 TOP BOTTOM BOTTOM+1
TOVn(FPWM)ICFn(TOP)
OCRnx
TCNT1 (PCPWM,PFCPWM) TOP-1 TOP TOP-1 TOP-2
OCRnx
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 83
16.11. 16 /1
16.11.1. TCCR1A - /1A (Timer/Counter1 Control Register A)
COM1A1 COM1A0 COM1B1 COM1B0 - - WGM11 WGM107 6 5 4 3 2 1 0
TCCR1A($80)
R/WR/WRRR/WR/WR/WR/W
00000000Read/Write
7,6 - COM1A1,0 : 1A (Compare Output Mode1A bit 1 and 0)
5,4 - COM1B1,0 : 1B (Compare Output Mode1B bit 1 and 0)
COM1A10COM1B10OC1AOC1BCOM1A1011OC1AI/OI/OCOM1B1011OC1BI/OI/OOC1AOC1B(DDR)(1)
OC1AOC1BCOM1x10WGM13016-2.WGM130CTC(PWM)COM1x10
16-2. PWM (: xAB)
COM1x1
0 (OC1x)
OC1x ()
1 OC1x Low
OC1x High
COM1x0
0
1
0
1
0
1
16-3.WGM130PWMCOM1x10
16-3. PWM (: xAB, X01)
COM1x1
0 (OC1x)
WGM130=111X : OC1A ()OC1B(OC1B)WGM130 : (OC1x)
1 LowBOTTOMHighOC1x ()
HighBOTTOMLowOC1x ()
COM1x0
0
1
0
1
0
1
: COM1x1(1)OCR1xTOPBO TTOM(1)(0)79PWM
16-4.WGM130/PWMCOM1x10
16-4. /PWM (: xAB, X01)
COM1x1
0 (OC1x)
WGM130=10X1 : OC1A ()OC1B(OC1B)WGM130 : (OC1x)
1 LowHighOC1x
HighLowOC1x
COM1x0
0
1
0
1
0
1
: COM1x1(1)OCR1xTOP80P WM
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 84
1,0 - WGM11,0 : (Waveform Generation Mode bit 1 and 0)
/B(TCCR1B)WGM132()(TOP)(16-5.)/()/(CTC)3(PWM)78
16-5.
WGM13 TOP/
$FFFF
$00FF
$01FF
$03FF
OCR1x
WGM12(CTC1)
0
0
0
0
0
0
0
0
TOP
TOP
TOP
8PWM
9PWM
10PWM
OCR1A10 /(CTC)
WGM10(PWM10)
0
1
0
1
0
0
1
2
3
4
WGM11(PWM11)
0
0
1
1
0
TOV1
MAX
BOTTOM
BOTTOM
BOTTOM
MAX
$00FF10 BOTTOM8PWM15 0 TOP
$01FF10 BOTTOM9PWM06 1 TOP
$03FF10 BOTTOM10PWM17 1 TOP
ICR101 BOTTOM/PWM08 0 BOTTOM
OCR1A01 BOTTOM/PWM19 0 BOTTOM
ICR101 TOPPWM010 1 BOTTOM
OCR1A01 TOPPWM111 1 BOTTOM
ICR111 /(CTC)012 0 MAX
-11 -()113 0 -
ICR111 BOTTOMPWM014 1 TOP
OCR1A11 BOTTOMPWM115 1 TOP
: CTC1PWM110WGM120/
16.11.2. TCCR1B - /1B (Timer/Counter1 Control Register B)
ICNC1 ICES1 - WGM13 WGM12 CS12 CS11 CS107 6 5 4 3 2 1 0
TCCR1B($81)
R/WR/WR/WR/WR/WRR/WR/W
00000000Read/Write
7 - ICNC1 : 1 (Input Capture1 Noise Canceler)
(1)()(ICP1)4ICP14( )
6 - ICES1 : (Input Capture1 Edge Select)
(ICP1)ICES10()ICES11()
ICES1(ICR1)(ICF1)(1)
ICR1TOP(TCCR1ATCCR1BWGM130)ICP1
5 - (Reserved)
TCCR1B0
4,3 - WGM13,2 : (Waveform Generation Mode bit 3 and 2)
TCCR1AWGM110
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 85
20 - CS120 : 1 (Clock Select1, bit 2,1 and 0)
3/(TCNT1)16-10.16-11.
16-6. /1
CS12
0 (/1)
clkI/O ()1 clkI/O/8 (8)
clkI/O/64 (64)
CS11
0
1
0
1
0
1
CS10
0
1
0
1
0
1
0
1
0
0
0
0
1
1
1
1
clkI/O/256 (256)clkI/O/1024 (1024)T1 ()
T1 ()
/1()T1T1
16.11.3. TCCR1C - /1C (Timer/Counter1 Control Register C)
FOC1A FOC1B - - - - - -7 6 5 4 3 2 1 0
TCCR1C($82)
RRRRRRWW
00000000Read/Write
7 - FOC1A : OC1A (Force Output Compare 1A)
6 - FOC1B : OC1B (Force Output Compare 1B)
FOC1A/FOC1BWGM130PWMFOC1A/FOC1B1OC1xCOM1x10FOC1A/FOC1BCOM1x10
FOC1A/FOC1BTOPOCR1A(CTC)/($0000)
FOC1A/FOC1B0
16.11.4. TCNT1H,TCNT1L (TCNT1) - /1 (Timer/Counter1)
(MSB)15 14 13 12 11 10 9 8
TCNT1H($85)
R/WR/WR/WR/WR/WR/WR/WR/W
00000000
Read/Write
(LSB)7 6 5 4 3 2 1 0
TCNT1L($84)
R/WR/WR/WR/WR/WR/WR/WR/W
00000000
Read/Write
2/ I/O(TCNT1HTCNT1LTCNT1)/16 CPU8(TEMP)16 7116
(TCNT1)OCR1x1TCNT1
TCNT1/ ()
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 86
16.11.5. OCR1AH,OCR1AL (OCR1A) - /1 A (Timer/Counter1 Output Compare Register A)
(MSB)15 14 13 12 11 10 9 8
OCR1AH($89)
R/WR/WR/WR/WR/WR/WR/WR/W
00000000Read/Write
(LSB)7 6 5 4 3 2 1 0
OCR1AL($88)
R/WR/WR/WR/WR/WR/WR/WR/W
00000000Read/Write
16.11.6. OCR1BH,OCR1BL (OCR1B) - /1 B (Timer/Counter1 Output Compare Register B)
(MSB)15 14 13 12 11 10 9 8
OCR1BH($8B)
R/WR/WR/WR/WR/WR/WR/WR/W
00000000Read/Write
(LSB)7 6 5 4 3 2 1 0
OCR1BL($8A)
R/WR/WR/WR/WR/WR/WR/WR/W
00000000Read/Write
(TCNT1)16OC1x
16CPU8(TEMP)16 7116
16.11.7. ICR1H,ICR1L (ICR1) - /1 (Timer/Counter1 Input Capture Register)
(MSB)15 14 13 12 11 10 9 8
ICR1H($87)
R/WR/WR/WR/WR/WR/WR/WR/W
00000000Read/Write
(LSB)7 6 5 4 3 2 1 0
ICR1L($86)
R/WR/WR/WR/WR/WR/WR/WR/W
00000000Read/Write
ICP1(/1)(TCNT1)/TOP
16CPU8(TEMP)16 7116
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 87
16.11.8. TIMSK1 - /1 (Timer/Counter1 Interrupt Mask Register)
- - ICIE1 - - OCIE1B OCIE1A TOIE17 6 5 4 3 2 1 0
TIMSK1($6F)
R/WR/WR/WRRR/WRR
00000000Read/Write
5 - ICIE1 : /1 (Timer/Counter1 Input Capture Interrupt Enable)
1 (SREG)(I)(1)/1/1 (TIFR1)(ICF1)(1)(34)
2 - OCIE1B : /1B (Timer/Counter1 Output Compare B Match Interrupt Enable)
1 (SREG)(I)(1)/1B/1 (TIFR1)1B(OCF1B)(1)(34)
1 - OCIE1A : /1A (Timer/Counter1 Output Compare A Match Interrupt Enable)
1 (SREG)(I)(1)/1A/1 (TIFR1)1A(OCF1A)(1)(34)
0 - TOIE1 : /1 (Timer/Counter1 Overflow Interrupt Enable)
1 (SREG)(I)(1)/1/1 (TIFR1)/1(TOV1)(1)(34)
16.11.9. TIFR1 - /1 (Timer/Counter1 Interrupt Flag Register)
- - ICF1 - - OCF1B OCF1A TOV17 6 5 4 3 2 1 0
TIFR1$16 ($36)
R/WR/WR/WRRR/WRR
00000000Read/Write
5 - ICF1 : /1 (Timer/Conter1, Input Capture Flag)
ICP1(1)(ICR1)WGM130TOPICF1TOP(1)
ICF1(0)1ICF1(0)
2 - OCF1B : /1B (Timer/Conter1, Output Compare B Match Flag)
(TCNT1)B(OCR1B)()/ (1)
(FOC1B)OCF1B(1)
BOCF1B(0)1OCF1B(0)
1 - OCF1A : /1A (Timer/Conter1, Output Compare A Match Flag)
(TCNT1)A(OCR1A)()/ (1)
(FOC1A)OCF1A(1)
AOCF1A(0)1OCF1A(0)
0 - TOV1 : /1 (Timer/Counter1 Overflow Flag)
(1)WGM130CTCTOV1/1(1)WGM130TOV18416-5.
/1TOV1(0)1TOV1(0)
() 7,6,4,30
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 88
17. /0/157/0(PWM)69/1(PWM)//0/1
17.1.
/ (CSn20=001) (fclk_I/O)/41fclk_I/O/8, fclk_I/O/64, fclk_I/O/256, fclk_I/O/1024
17.2.
(/)/0/1//(CSn20=52)/ N(8, 64, 256, 1024)1N+1
///
17.3.
T0/T1/ (fclk_T0/fclk_T1)T0/T1 ()17-1.T0/T1 (fclk_I/O) High(Low)
(CSn20=111)(CSn20=110)1clkT0/clkT1
17-1. T0/T1
QD
E
QD QD1
0
(/)
Tn
clkI/O
Tn_sync()
T0/T12.53.5
T0/T11 /
1 50%/50% (fEXTclk
-
17-2. /0/1
10clkI/O
clk I
/O
/8
clk I
/O
/64
clk I
/O
/256
clk I
/O
/1024
0 0T0
T1
CS10CS11CS12
CS00CS01CS02
clkT1/1
clkT0/0
/1
/0
/
/
R
PSRSYNC
: (T0/T1)/17-1.
17.4. /
17.4.1. GTCCR - / (General Timer/Counter Control Register)
TSM - - - - - PSRASY PSRSYNC7 6 5 4 3 2 1 0
GTCCR$23 ($43)
R/WR/WRRRRRR/W
00000000Read/Write
7 - TSM : / (Timer/Counter Synchronization Mode)
TSM1/()PSRASYPSRSYNC/1TSM0PSRASYPSRSYNC(0)/
0 - PSRSYNC : / (Prescaler Reset Timer/Counter 1,0)
1/0/1TSM(1)(0)/0/1/
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 89
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 90
18. 8 /2 (PWM, )
18.1.
2 / () (PWM) 10 (TOV2, OCF2A, OCF2B) I/O()32kHz
18.2.
/22PWM8 /8 /18-1.I/O2CPU(I/OI/O)I/O(:)I/O1008 /2
27PRR - PRTIM2/20
/
TOSC1
ASSR
TOSC2
clkI/O
(ASn)
clkASYclkI/O
18-1. 8 /
TCCRnA
OCRnA
8-bit Data Bus
TOVn ()
TCNTn
OCRnB
=
=
= =0
TOP
TOP BOTTOM
clkTn
OCnA
OCnB
OCFnA ()
OCFnB ()
TCCRnB
18.2.1.
/(TCNT2)(OCR2AOCR2B)8/2(TIFR2)/2(TIMSK2)()TIFR2TIMSK 2
/TOSC1/2(ASSR)/()// (clkT2)
2(OCR2AOCR2B)/(OC2AOC2B)PWM92(OCF2AOCF2B)(1)
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 91
18.2.2.
'n'/2xAB(/2TCNT2)
18-1.
18-1.
BOTTOM /$00
/$FF(255)MAX
/($FF)OCR2A(TOP)
TOP
18.3. /
/(clkT2)MCU(clkI/O)(ASSR)(AS2)1TOSC1TOSC2/104ASSR - 99/2
18.4.
8 /18-2.
18-2.
BOTTOM
TCNTn(/)
8-bit Data Bus
clkTn
TOVn ()
count TCNT21direction ()clear TCNT2($00)clkTn clkT2/ TOP TCNT2BOTTOM TCNT2($00)
count
direction
clear
TOP
/
TOSC1
TOSC2
clkI/O
()
/ (clkT2)($00)(+1)(-1)clkT2(CS220)(CS220=000)/TCNT2/ (clkT2)CPUCPU()
()/2A(TCCR2A)(WGM210)/2B(TC CR2B)(WGM22)()OC2A/OC2B94
/(TOV2)WGM220(1)TOV2CPU
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 92
18.5.
8TCNT2(OCR2AOCR2B)TCNT2OCR2AOCR2B/ (OCF2AOCF2B)(1)(I=1,OCIE2AOCIE2B=1)(0)I/O1(0)(WGM220)(COM2x10)MAXBOTTOM(94)
18-3.
OCR2x(PWM)2/(CTC)22TOPBOTTOMOCR2xPWM
OCR2x2CPUOCR2xOCR2x
18-3.
8-bit Data Bus
OCFnx ()
OCnxBOTTOMTOP
WGMn20 COMnx10
OCRnx
= (8)
OCRnx TCNTn
FOCnx
() nxOCR2xOCR2xOCR2xOCR2x
18.5.1.
PWM(FOC2x)1()(OCF2x)(1)//OC2x(COM2x10OC2x(1)(0)1/0)
18.5.2. TCNT2
TCNT2CPU// / TCNT2OCR2x
18.5.3.
TCNT21/ /TCNT2TCNT2OCR2x()/BOTTOMTCNT2
OC2x OC2x(FOC2x) OC2x()
(COM2x10)(OCR2x)2COM2x10
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 93
18.6.
(COM2x10)2(OC2x)COM2x 10COM2x10OC2x18-4.COM2x10I/OI/OI/O(:)COM2x10I/O(PORTDDR)OC2xOC2xOC2x
18-4.
OCnx
QD
OCnx
QD
PORT
QD
DDR
1
0
8-bit D
ata
Bus
clkI/O
COMnx1COMnx0
FOCnx
COM2x10(1)I/O(OC2x)OC2x() (DDR)OC2x(DDR_OC2x)OC2x
OC2xCOM2x101008 /2
18.6.1.
CTCPWMCOM2x10COM2x10=00OC2xPWM10018-2.18-5.PWM10018-3.18-6.PWM10018-4.18-7.
COM2x10PWM(FOC2x)
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 94
18.7.
/(WGM220)(COM2x10)()COM2x10PWM(PWM)PWMCOM2x10(0)(1)1/0(93)
97/2
18.7.1.
(WGM220=000)(+)8(TOP=$FF)$00(BOTTOM)/(TOV2)TCNT2$00/ (1)TOV2(1)(0)9TOV2(0)/2/
CPU
18.7.2. /(CTC)
/(CTC)(WGM220=010)OCR2ACTC(TCNT2)OCR2A$00OCR2ATOP
CTC18-5.(TCNT2)TCNT2OCR2A(TCNT2)($00)
OCnx()
TCNTn
18-5. CTC
1 4 52 3
OCFnx(TOP)
TOP
: COMnx10=01
OCF2A/TOPTOPBOTTOMTOPCTC2OCR2ATCNT2()/()($FF)$00
CTCOC2A(COM2A10)(=01)OC2A(DDR_OC2A=1) OCR2A0($00) fOC2A= fclk_I/O/2
N(1,8,32,64,128,256,1024)
/(TOV2)MAX$00/ (1)
fOCnx =fclk_I/O
2N(1OCRnx)
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 95
18.7.3. PWM
(PWM)(WGM220=011111)PWMPWM()PWMBOTTOMTOPBOTTOMTOPWGM220=011$FFWGM220=111OCR2A(COM2x10=10)(OC2x)TCNT2OCR2x(0)BOTTOM(1)(COM2x10 =11)(1)BOTTOM(0)PWM()PWM2D/APWM()
PWM//TOP/()/ ($00)PWM18-6.TCNT2()PWMOCR2xTCNT2()TCNT2OCR2x(:)(OCF2x)OCR2x= TOP(1)(:)
OCnx()(COMnx10=10)
TCNTn
18-6. PWM
1 42 3
OCRnxTOVn
OCRnx
OCnx()(COMnx10=11)
5 6 7
OCFnx
/(TOV2)TOP(1)
PWMOC2xPWMCOM2x10'10'PWMPWMCOM2x10'11'WGM22(1)COM2A10'01'OC2AOC2B(10018-3.18-6.) (:2)OC2x (DDR_OC2x)PWMTCNT2OCR2xOC2x()(1)((0))($00TOPBOTTOM)/ OC2x(0)(1)
PWM
N(1,8,32,64,128,256,1024)
OCR2xPWMPWMOCR2xBOTTOM($00)TOP+1 / ()OCR2xTOP(COM2x10)LowHigh
(:WGM220=111)PWM(50%)OC2A(COM2A10=01)OCR2A0($00) fOC2x= fclk_I/O/2PWM2CTCOC2A(COM2A10=01)
fOCnxPWM =fclk_I/O
N(1+TOP)
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 96
18.7.4. PWM
(PWM)(WGM220=001101)PWMPWM()BOTTOMTOPTOPBOTTOMTOPWGM220=001$FFWGM220=101OCR2A(COM2x10= 10)(OC2x)TCNT2OCR2x(0)(1)(COM2x10=11)()()()
PWMTOPTOPTCNT21/ TOPPWM18-7.TCNT2()PWMOCR2xTCNT2()TCNT2OCR2x(:)
OCnx()(COMnx10=10)
TCNTn
18-7. PWM
21
OCFnx
OCRnx
OCnx()(COMnx10=11)
3
TOVn
OCRnx
/(TOV2)/BOTTOM(1)BOTT OM
PWMOC2xPWMCOM2x10'10'PWMPWMCOM2x10'11'WGM02(1)COM0A10'01'OC0AOC0B(10018-4.18-7.) (:2)OC2x (DDR_OC2x)PWMTCNT2OCR2xOC2x()(1)((0))TCNT2OCR2xOC2x(0)((1))PWMPWM
N(1,8,32,64,128,256,1024)
OCR2xPWMPWMPWMOCR2xBOTTOM($00)LowTOPHighPWM
18-7.2OCnxHighLowBOTTOM2
18-7.OCR2xTOPOCR2xTOPOCnx(: LHHH)BOTTOM()TOP()OCnx(HL)
/OCR2xOC nx(: TOP(H)HL)
fOCnxPCPWM =fclk_I/O
2NTOP
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 97
18.8. /
// (clkT2)clkI/O/(TOSC)(1)18-8./ PWMMAX
clkTn (clkI/O/1)
TCNT2
TOVn
clkI/O
18-8. (1/1)/
MAX-1 MAX BOTTOM BOTTOM+1
18-9.
clkTn (clkI/O/8)
TCNT2
clkI/O
18-9. (fclk_I/O/8)/
MAX-1 MAX BOTTOM BOTTOM+1
TOVn
18-10.CTCOCF2A
clkTn (clkI/O/8)
TCNT2
clkI/O
18-10. (fclk_I/O/8)/OCF2A
OCRnx-1 OCRnx OCRnx+1 OCRnx+2
OCRnx
OCFnx
OCRnx
18-11.CTCTCNT2OCF2A
clkTn (clkI/O/8)
TCNT2 (CTC)
clkI/O
18-11. (fclk_I/O/8)/OCF2A
TOP-1 TOP BOTTOM BOTTOM+1
OCRnx
OCFnx
TOP
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 98
18.9. /2
/2
: /2//2(TCNT2)/2(OCR2x)/2(TCCR2x)
/2(TIMSK2)OCIE2xTOIE2(0)/2 (ASSR)(AS2) TCNT2,OCR2x,TCCR2x TCN2UB, OCR2xUB, TCR2xUB(=0) /2 (TIFR2)OCF2xTOV2(0)
CPU4
TCNT2,OCR2x,TCCR2x1TOSC12()3TCNT2OCR2x(ASSR)
TCNT2,OCR2x,TCCR2xA/D/2MCU/2TCNT2OCR2xOCR2xUB0MCUMCU
A/D/2()1TOSC11TOSC1A/D1TOSC1
TCNT2,OCR2x,TCCR2x (ASSR)0 A/D
/232.768kHz1/21TOSC/2
/2A/D/ /1MCU4SLEEP
TCNT2TCNT2TOSCTCNT2I/OTOSCI/O(clkI/O)()TCNT2TOSC()TOSCTCNT2
OCR2xTCCR2x (ASSR)(0) TCNT2
3+11
-
ATmega48A/48PA/88A/88PA/168A/168PA/328/328P [] 99
18.10. /2
/2clkT2SclkT2SI/O(clkI/O)/2(ASSR)(AS2)(1)/2TOSC1(RTC)/2AS2(1)TOSC1TOSC 2/2TOSC1TOSC232.768kHzTOSC1ASSR(EXCLK)(1)(:)
/2clkT2S/8, clkT2S/32, clkT2S/64, clkT2S/128, clkT2S/256, clkT2S/10240()clkT2S
/(GTCCR)/(PSRASY)(1)
18-12. /2
10
clkI/O
clk T
2S/32
clk T
2S/64
clk T
2S/256
clk T
2S/1024
0
TOSC1
AS2