asubar - part 20_computer

7/26/2019 Asubar - Part 20_computer

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COMPUTER (Asubar)

Questions:

1. It is also called the all or nothing gate.a. NAND gateb. OR gatec. AND gated. NOR gate

2. It is also called any or all gate.a. NAND gateb. OR gatec. AND gated. NOR gate

3. It also called any but not all gate.a. NAND gateb. XOR gatec. AND gated. NOR gate

4. hat is the logic circuit ha!ing 2 or "ore in#uts but only one out#ut$ith high out#ut i% any or all in#ut are high& $ith lo$ out#ut only i% allin#uts are lo$'

a. NAND gateb. AND gatec. NOR gated. OR gate

(. A solid de!ice $hich only gi!es 1 out#ut i% all in#uts are also 1 iscalled

a. an AND gateb. an OR gatec. a NAND gated. a NOR gate

). A solid state logical de!ice $hich only gi!es a 1 out#ut i% all in#utsare * is called a +++++ gate.

a. NO,b. ORc. NORd. NAND

-. +++++++++ is a gate $hich has t$o or "ore lo$ in#uts signals to get alo$ out#ut.

a. NANDb. ANDc.

ORd. In!erter. ++++++++ is a single bit co"#arator

a. e/clusi!ely NORb. $ired ORc. NOR gated. 0/clusi!e OR

. hat logic circuit is analogous to a single #ole "echanical selectors$itch'

a. 0/clusi!e ORb. Decoder


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c. ulti#le/erd. 0ncoder

1*.,he "ini"u" nu"ber o% 2in#ut NAND gates needed to construct anin!erter'

a. 1b. 3c. 2d. 4

11.,he "ini"u" nu"ber o% 2in#ut NAND gates needed to construct a 2in#ut AND gate.

a. 1b. 3c. 2d. 4

12.,he "ini"u" nu"ber o% 2in#ut NAND gates needed to construct a 2in#ut OR gate.

a. 1b. 3

c. 2d. 4

13.,he "ini"u" nu"ber o% 2in#ut NAND gates needed to construct a 2in#ut NOR gate.

a. 1b. 3c. 2d. 4

14.,he "ini"u" nu"ber o% 2in#ut NAND gates needed to construct a 2in#ut XOR gate.

a. -b. (c. )d. 4

1(.,he "ini"u" nu"ber o% 2in#ut NAND gates needed to construct a 2in#ut XNOR gate.

a. -b. (c. )d. 4

1).or a su##ly !oltage o% ( 5& $hat is the "ini"u" !oltage at the in#uta ,,6 I7 re#resenting logic 1'

a. 25b.

2.45c. *.5d. *.45

1-.or a su##ly !oltage o% ( 5& $hat is the "a/i"u" !oltage at the in#uta ,,6 I7 re#resenting logic *'

a. 25b. 2.45c. *.5d. *.45

1.or a su##ly !oltage o% ( 5& $hat is the "ini"u" !oltage at theout#ut a ,,6 I7 re#resenting logic 1'


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a. 25b. 2.45c. *.5d. *.45

1.or a su##ly !oltage o% ( 5& $hat is the "ini"u" !oltage at theout#ut a ,,6 I7 re#resenting logic *'

a. 25b. 2.45c. *.5d. *.45

2*.or a su##ly !oltage o% 1* 5& $hat is the "ini"u" !oltage at thein#ut o% a 7O8 4*** and -47** I7 series re#resenting logic 1'

a. -5b. .(5c. 35d. *.*(5

21.or a su##ly !oltage o% 1* 5& $hat is the "a/i"u" !oltage at thein#ut o% a 7O8 4*** and -47** I7 series re#resenting logic *'

a. -5b. .(5c. 35d. *.*(5

22.or a su##ly !oltage o% 1* 5& $hat is the "ini"u" !oltage at theout#ut o% a 7O8 4*** and -47** I7 series re#resenting logic 1'

a. -5b. .(5c. 35d. *.*(5

23.or a su##ly !oltage o% 1* 5& $hat is the "a/i"u" !oltage at theout#ut o% a 7O8 4*** and -47** I7 series re#resenting logic *'

a. -5b. .(5c. 35d. *.*(5

24.,o cause a threestate bu9er to out#ut *1 le!els& the %ollo$ing "ustbe true:

a. ,he signal O0 "ust be at logic 1b. ,he out#ut enable "ust be %alsec. ,he in%or"ation "ust ha!e been stored in the bu9erd. ,he out#ut enable "ust be true

2(.Another na"e %or noise "argina.

Noise i""unityb. 8electi!ityc. 8ensiti!ityd. an out

2).hich o% the %ollo$ing state"ent is not true $hen #ro#agation delayo% a digital I7 decreases'

a. 8#eed is increasedb. ;eat generation increasesc.


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a. ;igh le!elb. lo$ le!elc. negati!e transition le!eld. #ositi!e transition le!el

2.hat do you call the li>uid crystal used in 67D'a. ercuryb. In?c. 8il!erd. Ne"atic @uid

2.hat is the "e"ory ele"ent used in cloc?ed se>uential logic circuit'a. Readonly "e"oryb. atesc. 8taticRAd. li#@o#

3*.hat is the higher !oltage le!el in digital gates and @i#@o# circuits'a. Bes or Oneb. Bes or Noc. One or Cero

d. Cero or No31.hat le!el is used to re#resent logic * in a negati!e logic circuit'a. Negati!e transition le!elb. uentiald. 6inear3).A E @i#@o# $hose 2 in#uts are both logical 1 is o#erating in $hat

"ode'a. ;oldb. ,ogglec. Resetd. 8et

3-.A E @i#@o# $hose 2 in#uts are both logical * is o#erating in $hat"ode'

a. ;old


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b. ,ogglec. Resetd. 8et

3.A E @i#@o# $hose in#ut is logical 1 and E in#ut is logical 1 iso#erating in $hat "ode'

a. ;oldb. ,ogglec. Resetd. 8et

3.A E @i#@o# $hose in#ut is logical * and E in#ut is logical 1 iso#erating in $hat "ode'

a. ;oldb. ,ogglec. Resetd. 8et

4*.A "e"ory circuit that has address in#uts has ho$ "any storagelocations'

a. Not deter"ined by sets o% in#ut

b. 1*24c. (12d. 2()

41.7loc? #eriods are "easured %ro" +++++++.a. ro" the lo$ le!el to the high le!elb. 8i"ilar #oints on the cloc? $a!e%or"c. ro" the high le!el to the lo$ le!eld. ro" the ti"e the cloc? #ulses at (*F o% its lo$tohigh

transition until it is at (*F o% its hightolo$ transition42.,he binary out#ut a%ter 1**1 o% the "od1* ri##le counter is

a. 1*1*b. 1*c. ****d. A

43.A hal%adder is co"#osed o%a. 2 OR gatesb. 1 AND and 1 OR gatesc. 2 AND gatesd. 1XOR and 1 AND gates

44.A logic gate $hose uni>ue out#ut is 1 and ha##ens only $hen allthe in#uts are 1

a. ANDb. NANDc.

ORd. NOR4(.A logic gate $hose uni>ue out#ut is * and ha##ens only $hen all

the in#uts are *a. ANDb. NANDc. ORd. NOR

4).A logic gate $hose uni>ue out#ut is 1 and ha##ens only $hen allthe in#uts are *

a. AND


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b. NANDc. ORd. NOR

4-.A logic gate $hose uni>ue out#ut is * and ha##ens only $hen allthe in#uts are 1

a. ANDb. NANDc. ORd. NOR

4.It is an odd #arity chec?er gate.a. ANDb. ORc. XORd. XNOR

4.It is an e!en #arity chec?er gate.a. ANDb. ORc. XOR

d. XNOR(*.++++++++++ signal re#resent the true signal in the truth table.a. ,$ob. ourc. Oned. Cero

(1.hat is the e>ui!alent o% deci"al nu"ber 11 in binary'a. 11*1b. 1*11c. 111*d. 1111

(2.hat is the e>ui!alent o% deci"al nu"ber 14 in binary'a. 1111b. 111*c. 11*1d. 1*11

(3.hat is the deci"al e>ui!alent o% 143.44(to deci"al'a. 4.)b. 4.)c. 4.)d. 4.)

(4.,he deci"al 3)*2* is e>ui!alent to he/adeci"al++++++++.a. 7G4b.

47c. G7d. G7

((.ind the su" o% binary nu"ber 1*1* and **11.a. 1111b. 1*21c. 1*11d. 11*1

().hat is the binary e>ui!alent o% 3-.)-('a. 1**1*1.1*112b. 1*11*1.11*12


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c. 1*1**1.1*112d. 1*1**1.11*12

(-.hat is the e>ui!alent o% deci"al - in octal'a. 21b. 14c. 4d. -

(.hat is the e>ui!alent o% deci"al 1( in octal'a. 1(b. 1)c. 1d. 1-

(.7on!ert 1-G.71)to deci"al.a. 3-.(4)-(b. -3.(-)4(c. -3.(4)-(d. 3-.(-)4(

)*.hat is the e>ui!alent o% deci"al 4- in binary'

a. 111*11b. 11*111c. 1111*1d. 1*1111

)1.7on!ert 3-.(4)-( to base- nu"ber syste".a. 1*(1.3((4-b. 1*(1.4((3-c. 1(*1.3((4-d. 1(*1.4((3-

)2.hich o% the %ollo$ing is not used in he/adeci"al digital sy"bols'a. Ab. c. 7d. ;

)3.hat is the he/adeci"al e>ui!alent o% 11-.44)'a. 4.31)b. 4.31)c. 4.31)d. 4.31)

)4.;o$ "any sy"bols do he/adeci"al digital nu"ber syste" used'a. 1)b. 32c. 4d.

)(.,he code 1*11 in G7D isa. In!alidb. 24c. 11d. 6etter A

)).hat is the Hs co"#le"ent o% 3**'a. (b. )**c. )d. -**


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)-.hat is the Hs co"#le"ent o% 3**'a. (b. )**c. )d. -**

).hat is the e>ui!alent o% he/adeci"al 1A in deci"al'a. 2-b. 4*c. 2)d. 42

).hich o% the %ollo$ing is not a G7D code'a. 421 codeb. ray codec. 0/cess o% 3 coded. Gi>uinary code

-*.hat is the binary e>ui!alent o% 3('a. 1***112b. 11***12

c. 1**11*2d. 111**12

-1.hat is the 421 code %or 3('a. 1***11b. *1*11*11c. **11*1*1d. 11***1

-2.hat is the )421 code %or 3('a. 1***11b. *1*11*11c. **11*1*1d. 11***1

-3.hat is the ray code %or 3('a. 1***11b. *1*11*11c. **11*1*1d. 11***1

-4.hat is the e/cess o% 3 codes %or 3('a. *11*1***b. 1*1*1*11c. 1**11*d. 11***1

-(.In binary counting& the nu"ber right a%ter *&1&1*&11 isa.

1**b. 11*c. 12d. 111

-).hat does A6 $hich carries arith"etic and logic o#erations #rocess'a. Ginary nu"bersb. Ginary coded deci"alc. Octal nu"bersd. ;e/adeci"al nu"bers

--.A 4bit digital $ord is calleda. Juarter


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b. Nibblec. Dibitd. Gyte

-.++++++ is a byte data stored in a "e"ory location.a. bitsb. e"ory $ordc. 7haracterd. 4 bits

-.A digital $ord consisting o% only 4bits is called aa. Nibbleb. Dibitc. ui!alent o% binary nu"ber 1*1*11** isa. 1-2b. 3)-c. 2(4d. A71)

2.;o$ "any sy"bols are used in octal digital nu"ber syste"'a. 2b. 1)c. d. 4

3.6ogical o#eration 1K1 yieldsa. *b. 1*c. 2d. 1

4.Ginary arith"etic o#eration 1K1 yieldsa. *b. 1*c. 2d. 1

(.A su" ter" that contains all the !ariables o% a %unction in eitherco"#le"ent or unco"#le"ented %or".

a. a/ter"b.


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a. 8LRL1b. 8L1&RL*c. 8LRL*d. 8L*&RL1

.or an R8 @i#@o# "ade o% NOR gates the race condition ha##ens$hen

a. 8LRL1b. 8L1&RL*c. 8LRL*d. 8L*&RL1

.Another na"e %or "ulti#le/er.a. Data selectorb. ,rans"ission linec. registerd. distributor

*.Another na"e %or de"ulti#le/er.a. Data selectorb. ,rans"ission line

c. registerd. distributor

1.A logic circuit $hich acce#ts 2n in#uts and directs one o% the" to theout#ut in accordance to condition o% the n select lines.

a. 0ncoderb. ulti#le/erc. Decoderd. De"ulti#le/er

2.A logic circuit $hich acce#ts one in#ut and directs it to one o% the 2nout#ut lines in accordance to condition o% the n select lines.


3.It is a circuit that con!erts a 2nbits standard ring code to nbitsre>uired code.


4.It is a circuit that con!erts n bits code to 2nbits standard ring code.a. 0ncoderb. ulti#le/erc.

Decoderd. De"ulti#le/er(.According to distributi!e la$ o% Goolean algebra& / K y= is e>ual to

a. /y K /=b. / K y K =c. /d. M/KyM/K=

).According to absor#tion la$ o% Goolean algebra& / K /y is e>ual toa. 1b. /c. *


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d. / K y-.According to identity la$ o% Goolean algebra& / K /y is e>ual to

a. 1b. /c. *d. / K y

.According to consensus la$ o% Goolean algebra& /y Ky= K /= is e>ualto

a. /yK/=b. /KyK=c. /yKy=d. M/KyM/K=

.De organHs theore" states that /Ky is e>ual toa. 1b. / yc. *d. / K y

1**.hich o% the %ollo$ing can be used in #ro!ing De organHs theore"'a. ani#ulating o% Goolean e/#ressionb. Dualityc. ui!alent

1*1.+++++++ is called retrie!ing data %ro" "e"ory.a. Readingb. Accessingc. 0ncodingd. etting

1*2.A dyna"ic "e"ory $ill store in%or"ationa. $hen #o$er is a##lied at regular inter!al

b. as long as #o$er is a##lied to the "e"oryc. e!en $hen #o$er is not a##lied to the "e"oryd. as long as #o$er is a##lied and the "e"ory is re%reshed

#eriodically1*3.A static "e"ory $ill store in%or"ation

a. $hen #o$er is a##lied at regular inter!alb. as long as #o$er is a##lied to the "e"oryc. e!en $hen #o$er is not a##lied to the "e"oryd. as long as #o$er is a##lied and the "e"ory is re%reshed

#eriodically1*4.,he ty#ical nu"ber o% bits #er dyna"ic "e"ory location is

a. 1b. 1)c. d. 2

1*(.A static "e"ory generally containsa. Ro$ and colu"n decodersb. 7olu"n decodersc. No decodersd. Ro$ decoders

1*).+++++++++ can erase 0


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b. Glo$ing %usec. A##lying ultra!iolet raysd. ,urning o9 the #o$er

1*-.+++++++ is called a "e"ory de!ice $hich holds /ed o% data in acircuit.

a. ROb. RAHc. logicd. register

1*.+++++++ is a ?ind o% "e"ory $here only "anu%acturers can store#rogra" and has a grou# o% "e"ory locations each #er"anentlystoring a $ord.

a. ROb. ;ard "e"oryc. 8O8 "e"oryd. RA

1*.An inter!al re>uired to address and read out "e"ory $ord.a. uency di!iderd. 8hi%t register

113.hat is the reason $hy "ore cells can be stored in a gi!en area $ithdyna"ic cells'

a. ,hey tra!el %asterb. ,hey consu"e less #o$erc.

,hey are largerd. ,hey are s"aller114.hat do you call the duration $ithin it ta?es to read the content o% a

"e"ory location a%ter it has been addressed'a. 0/ecution ti"eb. Access ti"ec. Data rated. 7ycle ti"e

11(.Re%ers to the #art o% co"#uter that #er%or"s "athe"aticalo#erations.

a. 7


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b. A6c. li#@o#d. Asse"bly language

11).A detailed ste# by ste# o% direction telling a co"#uter e/actly ho$to #roceed to sol!e a s#ecic #roble" or #rocess a s#ecic tas?

a. 8e>uenceb. ui#"entc. 6inear circuitd. 7o"#uters

12*.hat is a grou# circuit that #ro!ides ti"ing and signals to allo#eration in the co"#uter'

a. In#ut unitb. Out#ut unitc. 7ontrol unitd. e"ory unit

121.+++++++ is an out#ut to Read Only e"ory MRO.a. Datab. ulti#le/erc. In#ut coded. Address

122.A++++++ is an instruction is a source language that is to be re#lacedby a dene se>uence o% instruction in the sa"e source language.

a. 8tate"entb. 8ource codec.

acroinstructiond. ne"onic123.+++++++ is a de!ice that stays on once triggered and store one or

"ore conditions as a digital circuit.a. oscillatorb. atec. Integratord. 6atch

124.hat do you call a circuit that changes #ure binary code into A87II'a. Decoderb. 7ode con!erter


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c. 0ncoderd. De"ulti#le/er

12(.In shi%t registers "ade u# o% se!eral @i#@o#s& the cloc? signalindicates

a. A bit o% in%or"ation stored in the @i#@o#b. In%or"ation o% ti"ec. hen to shi%t a bit o% data %ro" in#ut o% the @i#@o# to the

out#utd. hat ti"e is it

12).8#eed o% a logic circuit is nor"ally e/#ressed as ++++++.a. uencea. deci"al counterb. binary counterc. shi%t counterd. si"#le/ counter

131.or a #rocessor that uses 4bit $ords& the largest nu"ber that canbe re#resented using double #recision is

a. 12-b. 2((c. )(& (3(d.

1(132.++++++ are nonse"iconductor de!ices still used in digital "e"ories.a. atesb. agnetic coresc. li#@o#sd. Relay

133.Data selector is also calleda. 0ncoderb. De"ulti#le/erc. Decoderd. ulti#le/er


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134.,he #ur#ose o% the %etch cycle in a co"#uter is to +++++.a. Obtain instructionb. I"#le"ent a s#ecic o#erationc. Obtain in#ut datad. Obtain "e"ory data

13(.hat is the ti"e inter!al to underta?e a re%resh o#eration in aty#ical dyna"ic RA'

a. 22 "icrosec.b. 2 "sc. (* "icrosec.d. 2** "s

13).,he out#ut #ulses o% the logic #ulses +++++++.a. 7an da"age logic circuitsb. 7an be used to o!erdri!e logic nodes high or lo$c. Are too narro$ %or the logic #robe to res#ond tod. 7an only %orce high nodes to lo$

13-.+++++++is a storage de!ice used to acco""odate a di9erence in rateo% @o$ o% data or ti"e o% occurrence o% e!ents $hen trans"itting %ro"

one de!ice to another.a. Accu"ulatorb. Registerc. Gu9erd. ode"

13.A ++++++++ is a solid state "e"ory de!ice& $hich de#ends on the"agnetic #olari=ation o% do"ains& usually in a garnet ty#e "aterial.

a. agnetic dru"b. agnetic dis?c. agnetic bubbled. agnetic core

13.,he 1streci#ient in 0"ail co""unicationa. ;ostb. 7o"#uterc. ail bo/d. Dis?

14*.hat do you call the de!ices that allo$ co"#uters to co""unicate$ith other co"#uters through tele#hone lines or radio %re>uency'

a. ode"sb. 8u#er co"#utersc. Dis?d. ouse

141.hat is the #rocess used to describe analogtodigital con!ersion'a.

Ginari=eb. Analogi=ec. 6ineari=ed. Digiti=e

142. hat is the #rocess o% con!erting "ulti#le analog in#ut signalsse>uentially to digital out#ut'

a.


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a. Gusb. 7able ribbonc. ire $ra#d. ulti#le/ed cable

144.+++++++ is a so%t$are that con!erts a high le!el language #rogra"into "achine or asse"bly language #rogra"

a. A6b. 7


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1(2.hat is a #rogra" that translates 0nglish li?e $ords o% high le!ellanguage into the "achine language o% a co"#uter'

a. 7o"#ilerb. Inter#reterc. Asse"blerd. onitor #rogra"

1(3.Deter"ine $hich ite" is not a storage de!ice.a. 7ard readersb. agnetic ta#ec. 7DROd. Dis?ettes

1(4.irst co""ercial co"#uter introduced in 1(3 that uses !al!esa. 0NIA7b. IG14**c. IG-*1d. NI5A7

1((.Guilt a co"#uter in 14) at the institute o% ad!ance study MIA8&

asubar - part 20_computer

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