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DC Lab. Assembly Coding for Implementing in DSP Procedure for assembly coding Special instructions for modem floating point simulation fixed point simulation assembly programming debugging performance verification instruction instruction 6 instructions 2 instructions 8 MIPS minimum condition 6 instructions 2 instructions 3 MIPS square distance 7 instructions 3 instructions 5 MIPS ! "#$ %&’ bits () shift 2 instructions 1 instruction 2 MIPS *+, -. memory /0 data $ cyclic &1 234’ 4 instructions 1 instruction 1 MIPS Hamming distance 7 instructions 1 instruction 2 MIPS

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Page 1: Assembly Coding for Implementing in DSP · DC Lab. Assembly Coding for Implementing in DSP Procedure for assembly coding Special instructions for modem floating point simulation fixed

DC Lab.

Assembly Coding for Implementing in DSP

❏ Procedure for assembly coding

● Special instructions for modem

floating pointsimulation

fixed pointsimulation

assemblyprogramming

debugging performanceverification

�� �� �� instruction � instruction � ������ �� �

� ��� �� ��6 instructions 2 instructions 8 MIPS

��� minimum ��� condition �� ��

6 instructions 2 instructions 3 MIPS

� ���� squaredistance �

7 instructions 3 instructions 5 MIPS

�� ! "#$ %&'bits () shift

2 instructions 1 instruction 2 MIPS

*+, -.� memory/0 data $ cyclic &1

234' ��

4 instructions 1 instruction 1 MIPS

Hamming distance � 7 instructions 1 instruction 2 MIPS

Page 2: Assembly Coding for Implementing in DSP · DC Lab. Assembly Coding for Implementing in DSP Procedure for assembly coding Special instructions for modem floating point simulation fixed

DC Lab.

❏ IS-136 modem �������� �������� ������������

● modulation/demodulation : 0.5MIPS

● pulse shaping filter : 2MIPS

● channel coding/decoding : 4MIPS

● timing recovery : 1.5MIPS

● MLSE equalizer : 5MIPS

● total 13MIPS

Page 3: Assembly Coding for Implementing in DSP · DC Lab. Assembly Coding for Implementing in DSP Procedure for assembly coding Special instructions for modem floating point simulation fixed

DC Lab.

Introduction to IS-95 CDMA system (1)

❏ Multiple access: DS-CDMA/FDD

❏ Frequency band (USA): 869-894MHz (Reverse), 824-849MHz (Forward)

❏ Channel spacing: 1.25MHz

❏ Modulation● Q-Spread BPSK (Forward)

● Orthogonal modulation with noncoherent detection (Reverse)

❏ Speech coding: QCELP (Qualcomm Code-Excited Linear Prediction)

❏ Data rate: 9.6k, 4.8k, 2.4k, 1.2kbps (Use different transmit power level)

❏ Channel coding● K=9, R=1/2 conv. Coding (Forward), 1/3 conv. Coding(Reverse)

● CRC (9.6kbps, 4.8kbps)

❏ Frame duration: 20ms

❏ Chip rate: 1.2288 Mcps

Page 4: Assembly Coding for Implementing in DSP · DC Lab. Assembly Coding for Implementing in DSP Procedure for assembly coding Special instructions for modem floating point simulation fixed

DC Lab.

Introduction to IS-95 CDMA system (2)

❏ Single long PN code : 242-1 chips● Forward link : Data scrambling● Reverse link : Spreading, Different long PN code for different user and channel

❏ Single pair of short PN code : 215 chips● Quadrature spreading● Base station is distinguished by the phase of short PN sequence.● 256 different phases (spacing: 64 chip)

❏ 64 orthogonal Walsh codes● Forward link : 64 channels , W0: Pilot channel, W32: Sync channel

◆ W1-W7: Paging channel (7), W8-W63:Traffic channel (55)

● Reverse link : Orthogonal modulation (Noncoherent demodulation)

Page 5: Assembly Coding for Implementing in DSP · DC Lab. Assembly Coding for Implementing in DSP Procedure for assembly coding Special instructions for modem floating point simulation fixed

DC Lab.

Introduction to IS-95 CDMA system (3)

❏ Forward link channels● Pilot channel

◆ Synchronization (Especially, short PN code acquisition and tracking)◆ Phase recovery for coherent demodulation

◆ Channel estimation for RAKE receiver● Sync channel

◆ Synchronization (Long PN code), System information.● Paging channel - Used for paging message● Traffic channel - Transmit data

❏ Reverse link channels● Access channel

◆ Used by mobile to initiate communication with the base station and to respondto paging channel messages.

● Traffic channel - Transmit data

Page 6: Assembly Coding for Implementing in DSP · DC Lab. Assembly Coding for Implementing in DSP Procedure for assembly coding Special instructions for modem floating point simulation fixed

DC Lab.

IS-95 Transmitter structure (Forward link) (1)

Pilot Channel

W0 (All 0’s)

All 0’s

DecimatorLong code

Generator

1.2288 Mcps

Long Code

Mask forPaging Channel p

19.2 kbps

19.2 kbps

Wp

1.2288 McpsConv. Encoder

r=1/2, K=9

Symbol

Repetition9.6 kbps

4.8 kbps

19.2 kbps

9.6 kbps Block

Interleaver

19.2 kbps

Paging Channel

X

XX

Page 7: Assembly Coding for Implementing in DSP · DC Lab. Assembly Coding for Implementing in DSP Procedure for assembly coding Special instructions for modem floating point simulation fixed

DC Lab.

IS-95 Transmitter structure (Forward link) (2)

Add

CRCAdd 8 bit

Encoder Tail

Conv. Encoder

r=1/2, K=9

Symbol

Repetition8.6 kbps

4.0 kbps

2.0 kbps

0.8 kbps

9.2 kbps

4.4 kbps

2.0 kbps

0.8 kbps

9.6 kbps

4.8 kbps

2.4 kbps

1.2 kbps

19.2 kbps

9.6 kbps

4.8 kbps

2.4 kbps

Block

Interleaver

19.2 kbps

DecimatorLong code

Generator

1.2288 Mcps

Long Code

Mask forUser m

19.2 kbps 19.2 kbps

Decimator

MUX

Power control bits800 bps

800 bps

Wn

1.2288 Mcps

Traffic Channel

XX

Page 8: Assembly Coding for Implementing in DSP · DC Lab. Assembly Coding for Implementing in DSP Procedure for assembly coding Special instructions for modem floating point simulation fixed

DC Lab.

IS-95 Transmitter structure (Forward link) (3)

I-Channel short PN sequence

1.2288Mcps

Q-Channel short PN sequence

1.2288Mcps

Baseband

Filter

Baseband

Filter

X

X

cos (2πf0t)

sin (2πf0t)

+ S(t)

Conv. Encoder

r=1/2, K=9

Symbol

Repetition1.2 kbps 2.4 kbps

Block

Interleaver4.8 kbps

W32

1.2288 Mcps4.8 kbps

Sync Channel

Σ

X

X

X

Page 9: Assembly Coding for Implementing in DSP · DC Lab. Assembly Coding for Implementing in DSP Procedure for assembly coding Special instructions for modem floating point simulation fixed

DC Lab.

IS-95 Transmitter structure (Reverse link) (1)

Add

CRCAdd 8 bit

Encoder Tail

Conv. Encoder

r=1/3, K=9

Symbol

Repetition8.6 kbps

4.0 kbps

2.0 kbps

0.8 kbps

9.2 kbps

4.4 kbps

2.0 kbps

0.8 kbps

9.6 kbps

4.8 kbps

2.4 kbps

1.2 kbps

28.8 kbps

14.4 kbps

7.2 kbps

3.6 kbps

Block

Interleaver

28.8 kbps

Long code

Generator

1.2288 Mcps

Long CodeMask

1.2288 Mcps64-ary

OrthogonalModulator

Data Burst

Randomizer

307.2 kcps

Traffic Channel

X #

Page 10: Assembly Coding for Implementing in DSP · DC Lab. Assembly Coding for Implementing in DSP Procedure for assembly coding Special instructions for modem floating point simulation fixed

DC Lab.

Add 8 bitEncoder Tail

Conv.

Encoder

r=1/3, K=9

Symbol

Repetition

4.4 kbps 4.8 kbps 14.4 kbps

Block

Interleaver

28.8 kbps

Long code

GeneratorLong Code

Mask

1.2288 Mcps

64-ary

Orthogonal

Modulator

307.2 kcps28.8 kbps1.2288 Mcps

Access Channel

I-Channel short PN sequence

1.2288Mcps

Q-Channel short PN sequence

1.2288Mcps

Baseband

Filter

Baseband

Filter

X

X

cos (2πf0t)

sin (2πf0t)

+ S(t)

D

1/2 PN chip (406.9 ns)

X

X

X

Σ

#

#

Page 11: Assembly Coding for Implementing in DSP · DC Lab. Assembly Coding for Implementing in DSP Procedure for assembly coding Special instructions for modem floating point simulation fixed

DC Lab.

IS-95 receiver structure

RF/IF A/D Searcher

FingersCombining Deinterleaver

ViterbiDecoder

Rx Data

Packet

Code Acquisition

RAKE receiver

Page 12: Assembly Coding for Implementing in DSP · DC Lab. Assembly Coding for Implementing in DSP Procedure for assembly coding Special instructions for modem floating point simulation fixed

DC Lab.

Modem chip structure of IS-95 receiver (Qualcomm MSM2300)

DFM : Digital FM

UART : Universal Asynchronous

Receiver/Transmitter

Page 13: Assembly Coding for Implementing in DSP · DC Lab. Assembly Coding for Implementing in DSP Procedure for assembly coding Special instructions for modem floating point simulation fixed

DC Lab.

● Waveform-Encoded Orthogonal Modulation (Sklar Sect. 5.1)

◆ Used for IS-95 (Hadamard Sequence)

Page 14: Assembly Coding for Implementing in DSP · DC Lab. Assembly Coding for Implementing in DSP Procedure for assembly coding Special instructions for modem floating point simulation fixed

DC Lab.

Spread-Spectrum Communication (1)

z Many users simultaneously transmit signals over a single frequency band.

z Ec/N0 is very low. (< 0)

z Individual chip timing can’t be recovered by traditional timing recovery methods.

z Timing is recovered by partial cross-correlation between received signals and local PN codes. Thisis called the code acquisition and tracking.

z Chip-level equalization is neither possible nor required. Symbol values are recovered by evaluatingcorrelations.

Fig.1. Waveform when there exist 4 users. Fig.2. Cross-correlation (length=256 chip, user: 4)

−100 −50 0 50 100−100

−50

0

50

100

150

200

250

Timing offset

cros

s co

rrela

tion

user 1+2+3+4user 1

0 20 40 60 80 100 120 140 160 180 200−4

−3

−2

−1

0

1

2

3

4

5

Page 15: Assembly Coding for Implementing in DSP · DC Lab. Assembly Coding for Implementing in DSP Procedure for assembly coding Special instructions for modem floating point simulation fixed

DC Lab.

User 1

User 2

X

PN1

X

PN2

+

s1(n)

s2(n)

X

PN1

X

PN2

r1(n)

r2(n)

∑PG

∑PG

User 1

User 2

1 -1

-1 1

X

X

PN1 = (-1 1 1 -1 1 -1 -1 -1)

PN2 = (-1 1 -1 1 1 1 -1 1) +

sc=(0 0 2 -2 0 2 0 2)

sc(n)

sc=(0 0 2 -2 0 2 0 2) X

X

PN1 = (-1 1 1 -1 1 -1 -1 -1)

PN2 = (-1 1 -1 1 1 1 -1 1)

r1=(0 0 2 2 0 -2 0 -2)

∑PG

∑PG

r2=(0 0 -2 -2 0 2 0 2)

(4 -4)

(-4 4)

Page 16: Assembly Coding for Implementing in DSP · DC Lab. Assembly Coding for Implementing in DSP Procedure for assembly coding Special instructions for modem floating point simulation fixed

DC Lab.

User 1 X

PN1

+s1(n)

X

PN1

X

PN1’ (Delayed)

r1(n)

r2(n)

∑PG

∑PG

sc(n)

Z-1

1

Multipath channel

User 11 -1

X

PN1 = (-1, -1 1 1 -1 1 1 -1 1, -1)

+ sc(n)

sc=(… -2 0 2 0 -2 -2 0 0 -2 ...)X

X

PN1 = (-1, -1 1 1 -1 1 1 -1 1 )

PN1’ = ( -1 1 1 -1 1 1 -1 1, -1)

r1=(… 2, 0 2 0 2 -2 0 0 -2 ...)

r2=(… 2 0 2 0 -2 -2 0 0, 2 ...)

∑PG

∑PG

(4 -4)

(4 -4)

Page 17: Assembly Coding for Implementing in DSP · DC Lab. Assembly Coding for Implementing in DSP Procedure for assembly coding Special instructions for modem floating point simulation fixed

DC Lab.

Code Acquisition and Tracking

r a(t)

2 e-j ω0t

L P Fg[ l ]

| |2

t = k∆ TC

H t1 η0 H t0

r [ k] LP

/ ∆

Σn = 1 (H t1)

(H t0)Ma jo r i t y

Log i c

l L P /∆

C o d eGene ra to r

V C O

| |2

| |2

-

+

L o o pFi l ter

ε[k]

(H 1) (H 0)

H 0 / H1

D e s p r e a d e ra n d

Da taDe tec to r

c [ k]c [ k+ ∆T C]

c[ k-∆TC]

Code Acquis i t ion Block

Code Track ing Block

Page 18: Assembly Coding for Implementing in DSP · DC Lab. Assembly Coding for Implementing in DSP Procedure for assembly coding Special instructions for modem floating point simulation fixed

DC Lab.

Active and Passive Correlator

❏ Active Correlator - Simple but slow acquisition (Decision every LPTC)

❏ Passive Correlartor - Complex but fast acquisition (Decision every ∆∆∆∆TC)

g [ l ]| |2

H t1 η0 H t0

r [ k] LP

/ ∆

Σn= 1

C o d eGenera to r Reset i f (H t0) o r (H 0)

(H t1)

(H t0)Major i ty

Log ic

H 0 / H1

l L P /∆

g [ k]| |2

( H t1 )

( H t0 )

Ht1 η0H t0

r [ k]∆ TC ∆ TC ∆ TC

Code Weigh t ing

Summat ion (H t1)

(H t0)Major i ty

Log ic

H 0 / H1

C o d eGenera to r

Page 19: Assembly Coding for Implementing in DSP · DC Lab. Assembly Coding for Implementing in DSP Procedure for assembly coding Special instructions for modem floating point simulation fixed

DC Lab.

Rake Receiver

X

X

cos(2πf0t)

sin(2πf0t)

LPF

LPF

L Parallel

Demodulation

Fingers

+

X1(k)

X2(k)

XL(k)

X(k)

x(t) [PN_Icos(2 πf0t+θ)+PN_Qsin (2 πf0t +θ)]

Short PN

sequence

despreading

W64,m

X

X

X

X

Σ

ΣChannel

Amplitude &

Phase

+

Code Tracking

loop (Early-late)

Initial timing fromsearcher finger

1 Finger

Xi(k)

Page 20: Assembly Coding for Implementing in DSP · DC Lab. Assembly Coding for Implementing in DSP Procedure for assembly coding Special instructions for modem floating point simulation fixed

DC Lab.

α[A+xkW64,m][PN_Icos(θ)

+PN_Qsin (θ)] +

+

+

+

Short PN_Q

Σ

Σ

+

+

W64,m

X

X

ΣΣ

Initial timingfrom

searcher finger

+

+

Avg.

Avg.

+

Code Tracking loop (Early-late)

Short PN_I

Code Tracking

loop (Early-late)

Initial timingfrom

searcher finger

α[A+xkW64,m] [-PN_Isin(θ) +PN_Qcos (θ)]

-

[A+xkW64,m] αcos(θ)

[A+xkW64,m] αsin(θ)

xk αcos(θ)

xk αsin(θ)

Channel Amplitude & Phase Estimationfrom Pilot Channel

α: Channel amplitude

A: Pilot channel value

θ: Phase offset

xk: Transmitted symbol

)ˆcos(ˆA θα

)ˆsin(ˆA θα

)ˆcos(ˆAx k θ−θαα

Page 21: Assembly Coding for Implementing in DSP · DC Lab. Assembly Coding for Implementing in DSP Procedure for assembly coding Special instructions for modem floating point simulation fixed

DC Lab.

References

[1] Electronic Industries Association, EIA/TIA IS-136: dual-mode mobile station-basestation compatibility standard, TIA, Washington D.C., 1994.

[2] Kamilo Feher, “Wireless digital communications,” Prentice Hall, 1995.

[3] Samueli, H., “On the design of FIR digital data transmission filters with arbitrarymagnitude specifications,” IEEE Trans. Circuits and Systems, vol. 38, pp. 1563-1567, Dec. 1991.

[4] Ging-Shing Liu and Che-Ho Wei, “Timing recovery techniques for digital cellularradio with ππππ/4 DQPSK modulation,” ICC’92, vol.1, pp.319-323, 1992.

[5] M. J. Omidi, S. Pasupathy, and P. G. Gulak, “Joint data and kalman estimation offading channel using a generalized viterbi algorithm,” ICC’96, vol. 2, pp.1198-1203, May 1996.

[6] M. Luise and R. Reggiannini, “Carrier frequency recovery in all-digital modemsfor burst-mode transmissions,” IEEE Trans. Commun., vol. 39, pp.1169-1178,Feb./Mar./Apr. 1994.

Page 22: Assembly Coding for Implementing in DSP · DC Lab. Assembly Coding for Implementing in DSP Procedure for assembly coding Special instructions for modem floating point simulation fixed

DC Lab.

❏ Adaptive PRML Detection

�������� � � � � ������������ �������� ��������

● Adaptive PR Equalizer followed by Viterbi Detector (PRML)● Feed-Forward Filter shapes the target Partial-Response P(D)● We select those P(D) that matches channel characteristics

◆ HDD : 1-D^2(PR4), 1+D-D^2-D^3 (EPR4)◆ MOD, DVD : 1+D(PR!), 1+2D^2+D^3(PR2), etc.

● Ref : John M. Cioffi et al, “Adaptive Equalization in Magnetic-Disk Storage Channels” IEEE Comm. Magazine Feb. 1990.

Xn*hn

Xn : B it Information

hn : Channel Impulse Resp.

Pn : PR Impulse Resp.

P(D) : z-T r. Of Pn

PRML Receivers

Page 23: Assembly Coding for Implementing in DSP · DC Lab. Assembly Coding for Implementing in DSP Procedure for assembly coding Special instructions for modem floating point simulation fixed

DC Lab.

Software Defined Radio (SDR)

ParametersAccess Tech.

(Feature)Freq. Band

RF channelspacing (kHz)

Basebandsampling

GSMTDMA/FDMA

(GMSK)890-915MHz Forward935-960MHz Reverse

200 270.833kbps

Cdma2000CDMA/FDMA(OCQPSK)

1885-2025MHz2110-2200MHz

N �1250N=1,3,6,9,12

N �1.2288McpsN=1,3,6,9,12

W-CDMACDMA/FDMA(OCQPSK)

1885-2025MHz2110-2200MHz

1250/5000/10000/20000

1.024/4.096/8.192/16.384

Mcps

Wireless LANCSMA/FDMA

(OFDM)

Lower: 5.15-5.25GHzMiddle: 5.25-5.35GHzUpper: 5.725-5.825GHz

20000 20Msps

�� DVB (OFDM) UHF 7000/8000 9.14Msps

�� DVB (8VSB) VHF, UHF 6000 10.76Msps

Some Rescent Wireless Communication Systems.

Page 24: Assembly Coding for Implementing in DSP · DC Lab. Assembly Coding for Implementing in DSP Procedure for assembly coding Special instructions for modem floating point simulation fixed

DC Lab.

SDR Concept

SOFTWARE INSTALLATION:

z IN MANUFACTURING

z IN STORE (SIM CARD, MEMORY MODULE)

z VIA AIR

Common

Programmable

RF

Hardware

Common

Programmable

Baseband

Hardware

Software

Page 25: Assembly Coding for Implementing in DSP · DC Lab. Assembly Coding for Implementing in DSP Procedure for assembly coding Special instructions for modem floating point simulation fixed

DC Lab.

SDR Systems

Multibeam Antenna Array

Multiband RF Conversion

Wideband A/D & D/A Conversion

Digital IFProcessing

BasebandProcessing

Digital IFProcessing

BasebandProcessing

Network

Transmit Receive

ProgrammableHardware,

DSP &Software Design

Page 26: Assembly Coding for Implementing in DSP · DC Lab. Assembly Coding for Implementing in DSP Procedure for assembly coding Special instructions for modem floating point simulation fixed

DC Lab.

● Decimation filter with very narrow passbande.g. IS-95 : 1.25M / 50M = 1/40

GSM : 200k / 50M = 1/250

e.g.fc=37.5MHzBW=15MHz

e.g.fc=12.5MHzBW=15MHz

ADC50Msps12bits

DecimationFilter

DecimationFilter

ComplexSinusoid

Generator

ωmcos( n)

ωm-sin( n)

Programmable Downconverter (PDC)

RFDSP for

Baseband

Bandpass Sampling

ωm−ωm

5 20

Programmable Downconverter

Page 27: Assembly Coding for Implementing in DSP · DC Lab. Assembly Coding for Implementing in DSP Procedure for assembly coding Special instructions for modem floating point simulation fixed

DC Lab.

PDC with CIC and ISOP (Proposed)

ISOP (Interpolated Second Order Poly.)

)1(|2|

1)( 2kMkM zcz

czP −− ++

+=

Magnitude response of P(z)

(1-z )-1 (1-z )-RML

L1(1+cz +z )-k -2k MHBFs PFIR2

m

CIC filter ISOPMultistageHalfbandDecimationFilter

Fs

F /Ms

F /Ms

F /2s

m M

Q FIR

InterpolationFilter

(1-z )-1 (1-z )-RML

L1(1+cz +z )-k -2k

CIC filter ISOP

k=1k=2k=3

0 1/8M 1/4M 3/8M 1/2M0

1

2

3

4

5

6

Normalized frequency

Mag

nitu

de

c=−3

c=−4

c=−5

c=−6

Page 28: Assembly Coding for Implementing in DSP · DC Lab. Assembly Coding for Implementing in DSP Procedure for assembly coding Special instructions for modem floating point simulation fixed

DC Lab.

SDR References

[1] Special issue on Software Radios, IEEE Commun. Mag., vol.33, no.5, May1995, pp.24-68.

[2] Special issue on Software Radio, IEEE Commun. Mag., vol.37, no.2, Feb.1999, pp.82-131.

[3] Special issue on Software Radio, IEEE Jour. on Selected Areas inCommun. , May 1999.

[4] ACTS program, http://www.infowin.org/ACTS

[5] FIRST, http://www.era.co.uk/first/first.htm

[6] SDR forum, http://www.sdrforum.org

[7] Abstract of SDR Market Demand Forecast Series on Software DefinedRadio, Issue #1 Nov. 1, 1998, http://www.sdrforum.org

Page 29: Assembly Coding for Implementing in DSP · DC Lab. Assembly Coding for Implementing in DSP Procedure for assembly coding Special instructions for modem floating point simulation fixed

DC Lab.

SDR References

[8] H. J. Oh, S. Kim, G. Choi, Y. H. Lee, "On the Use of Interpolated Second

Order Polynomials for Efficient Design in Programmable Downconversion,"IEEE Jour. on Selected Areas in Commun. , vol.17, pp.551-560, May 1999.

[9] J. E. Russel, "Wireless Communications: Past, Present & Future," ICUPCTutorial , Boston, MA, Sep. 30, 1996.

[10] J. D. Silva, "Why 3rd Generation?," Workshop on RTT's for IMT-2000,http://www.itu.int/imt/2-radio-dev/Workshop-97/2a.ppt, 10-11 Nov. 1998.

[11] J. Spicer, "Configuring the Terminal - Software Downloads and SoftwareRadios," Workshop on RTT's for IMT-2000, http://www.itu.int/imt/2-radio-dev/Workshop-97/3a1.ppt, 10-11 Nov. 1998.