area optimization in floorplanning using ap-tcg...optimization of floorplanning. 3. review of tcg...

Area Optimization in Floorplanning Using AP-TCG

Li Yi-ming*, Li Yi, Zhou Ming-tian


Li Yiming*, Li Yi, Zhou Mingtian

School of Computer Science and Engineering, University of Electronic Science and

Technology of China, Chengdu 610054, P.R. China *[email protected]

doi:10.4156/jcit.vol5. issue10.28

Abstract Most of existing floorplanning algorithms evaluate the target area after packing all of the blocks,

but random perturbation will make the target area larger or less unpredictably. In this paper, a unified

non-slicing area prejudged transitive closure graph (AP-TCG) algorithm is proposed, which can

estimate the target area before packing. AP-TCG can indicate whether the perturbation is beneficial to

the area. We discard the adverse perturbation and continue to the next permutation. This technology

always makes the target area less and less. Unlike most of the existing floorplanner algorithms, AP-

TCG is performing without Simulated Annealing (SA) scheme because of its self-convergence property.

Inherited the nice properties from geometric representation of transitive closure graph (TCG), the

solution space is finite (n!*n!) and every solution is feasible. The experimental results from MCNC and

GSRC benchmarks show that our algorithm is efficient and effective.

Keywords: Computer Aided Design, Floorplanning, Transitive Closure Graph, Area Prejudged

1. Introduction

As the technology advance, the complexity of physical design for modern circuit in Very

Large Scaled Integration (VLSI) increases more quickly now. Floorplanning is the method to

decide the position of every circuit block or Intellectual Property (IP) block on a chip without

overlapped each other. Area optimization is one of the key objectives in floorplanning.

To get a better solution for this common NP-hard problem of floorplanning, many researches

have been studied in previous works. Some of representative algorithms are listed as follows.

Slicing floorplan is represented by Polish Expression (PE) to sand the slicing trees [1]. It is

convenient, but may not capture the best solution. Non-slicing representations include the the

TCG [2], the integrated TCG with a packing Sequence (TCG-S) [3], the B*-Tree [4], the O-Tree

[5], the Corner Block List (CBL) [6], Sequence-Pair (SP) [7], the Bounded Slicing Grid (BSG)

[8] and the twin binary tree [9]. Lin et al. present two horizontal/vertical transitive closure

graphs describing the geometrical relations named TCG in [2] and integrate TCG with a packing

sequence named TCG-S in [3]. Chang et al. raise a binary tree based representation for left and

bottom compacted placement, called B*-tree [4]. Guo et al. [5] propose an order tree (O-tree)

representation of a non-slicing placement. Hong et al. propose three lists (block name list,

orientation list, T-junction information list) to present the geometric relations name CBL[6], but

it is proposed to represent the mosaic floorplan. Murata et al. [7] propose two sequences of

permutations, namely sequence pair, to represent the geometric relations of modules. Fast

transforming an Sequence Pair to its placement (FAST-SP) takes O(nloglogn) time to transform

between an SP and its corresponding placement by Tang et al. [10]. Nakatake et al. propose a

method based on the bounded-sliceline grid structure to represent the geometric topology in [8].

The twin binary tree [9] is also a non-slicing floorplanner to represent the mosaic floorplan.

Our idea is easy to understand that all of the above algorithms get the target area after

packing all of the blocks. If the packing result is better than the current one, they accept the

perturbation. If the result is adverse, they accept the perturbation in a very small rejection ratio

or reject it directly in most cases. Hence, if we know the influence of the random perturbation to

the area, we can discard the redundancy perturbations that make the area larger and accept other

perturbations that get less or equal area. The area prejudged TCG algorithm has the property of

self-convergence, for target area become less and less in the iteration. We do not need the

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Journal of Convergence Information Technology

Volume 5, Number 10. December 2010

simulated annealing scheme to converge the feasible solutions any more. The experimental

results show that our algorithm is efficient and effective. The tested examples come from all of

MCNC benchmarks and some of GSRC benchmarks. The average dead-space ratio is less than

3.99% which is better than most of existing algorithm.

The rest of the paper is organized as follows. Section 2 gives the problem definition of

floorplanning. Section 3 briefly reviews the fundamental TCG algorithm. Section 4 presents our

AP-TCG algorithm in details of how to prejudge the area after random permutation. Experiment

results are studied in Section 5, with conclusion remarks in Section 6.

2. Problem definition

The floorplanning problem is defined as following: Let B={b1,b2,…bn} be a set of n

rectangular blocks whose width and height are expressed by wi and hi, 1 i n. Let (xi, yi)

describe the coordinates of the bottom-left corner of block bi, 1 i n, on a chip. A floorplan F

is an order of (xi, yi) for every block bi, 1 i n, without overlapped each two. Let Wi and Hi

represent the width and height of the bounding rectangle of F, and we can get easily the Area of

F is A = W H. The goal of floorplanning/placement is to optimize the area (the minimum

bounding rectangle of F) and/or the wire length (the minimum summation of half-bounding box

of interconnections) of floorplan F on the chip. In this paper, we only consider the area

optimization of floorplanning.

3. Review of TCG

The original paper, which proposed the transitive closure graph [2], presents an algorithm to

construct the two constraint graphs Gh and Gv. Both Gh and Gv have n + 2 vertices representing

n blocks plus source s and sink t (represent the boundaries of the placement). If block bi is to

the left of block bj, Gh has a directed edge (bi, bj). Analogically, Gv has the corresponding

directed edge (bi, bj) if block bi is below block bj. There exists one edge connecting the two

vertexes either in Gh or Gv for each pair of blocks. Both Gh and Gv are vertex weighted, directed,

acyclic graph, which is called transitive closure graph. The weight in Gh represent wi of the

block bi, and the weight in Gv represent hi of the block bi. The longest path algorithm can be

applied to determine the coordinates of each block and t he total width and height of the

bounding box.

TCG has three feasible properties:

1) Ch and Cv are acyclic.

2) Each pair of nodes must be connected by exactly one edge either in Ch or in Cv.

3) The transitive closure of Ch (Cv) is equal to Ch (Cv) itself.

TCG apply the following four operations to perturb a solution:

• Rotation: Rotate a block.

•Swap: Swap two blocks in both of Ch and Cv.

•Reverse: Reverse a reduction edge in Ch or Cv.

•Move: Move a reduction edge from one transitive closure graph (Ch or Cv) to the other.

4. AP-TCG representation

AP-TCG algorithm constructs the horizontal/vertical transitive closure graph at first. In the

following, let hsdi (vsdi) represent the length of longest path from the source s to block bi in Ch (Cv), 1

i n, respectively. Let htdi (vtdi) represent the length of longest path from block bi to the sink t in Ch

(Cv), 1 i n, respectively. Then for each operation in TCG, we have the theorems below to prejudge

the target area without packing.

Theorem 1:

The block bi in the longest path in Ch (Cv) have the equation: W=hsdi+htdi (H=vsdi+ vtdi). W (H) is

the width (height) of the bounding box of placement P, as denoted above.

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Proof: W (H) is the length of longest path from the source s to the sink t in Ch (Cv). It is consisted by

the longest path from the source s to block bi and the longest path from block bi to the sink t.

Aimed to each of the four perturbing operations in TCG, we can prejudge the target area by the

theorems below:

Rotation: To rotate a block bi, we only need to exchange the weights of the corresponding the node

bi in Ch and Cv.

Theorem 2:

If wi>hi and vsdi+vtdi+ (wi hi) H, the target area is no more than A=WH after the Rotation.

If wi<hi and hsdi+htdi+ (hiwi) W, the target area is no more than A=WH after the Rotation.

If wi=hi, the Rotation is useless to the target area.

The time complexity of prejudgment in the Rotation is O(1).

Proof: If wi hi, the longest horizontal path from the source s to the sink t of block bi decreases the

length of (wi hi), W maybe decrease or not in Ch. The longest vertical path from the source s to the

sink t of block bi increases the length of (wi hi), H does not change in Cv if vsdi + vtdi+ (wi hi) H. So

we discard the perturbations which satisfy vsdi+vtdi+ (wi hi) H and accept other perturbations. The

proof to last half of Theorem 2 is similar.

(2)Swap: To swap the positions of two block bi and bj, we only need to exchange two blocks in both

Ch and Cv.

Theorem 3:

If wi wj and hi hj, if hsdj+htdj+(wiwj) W and vsdj+vtdj+(hihj) H, the target area is no more

than A=WH after the Swap.

If wi wj and hi hj, if hsdj+htdj+(wiwj) W and vsdi+vtdi+(hjhi) H, the target area is no more


If wi wj and hi hj, if hsdi+htdi+(wjwi) W and vsdj+vtdj+(hihj) H, the target area is no more


If wi wj and hi hj, if hsdi+htdi+(wjwi) W and vsdi+vtdi+(hjhi) H, the target area is no more


The time complexity of prejudgment in the Swap is O(1).

Proof:If wi wj and hi hj, the lonest horizontal/vertical path from the source s to the sink t of

block bi decreases the length of (wi wj)/(hi hj), W/H maybe decrease or not because there are

other longest paths possibly. The longest horizontal/vertical path from the source s to the sink t

of block bj increases the length of (wi wj)/(hi hj), W/H does not change if hsdj+htdj+(wiwj)

W and vsdj+vtdj+(hihj) H. Therefore, we discard the perturbation satisfy hsdj+htdj+(wiwj)

W and vsdj+vtdj+(hihj) H, and accept other perturbations. The proof to rest of Theorem 3 is

similar.

(3)Reverse: The Reverse operation reverses the direction of a reduction edge (bi, bj) in transitive

closure graph, which changing the geometric relation of the two blocks bi and bj.

Theorem 4:

The reduction edge (bi,bj) is in Ch or Cv, which is selected to be reversed

If (bi,bj) is in Ch and max_in(j)+max_out(i)+ wj W, the target area is no more than A=WH after

the Reverse.

If (bi,bj) is in Cv and max_in(j)+max_out(i) + hj H, the target area is no more than A=WH after

the Reverse.

max_in(j) represents the length of the longest path from the source s to block bj without passed

block bi. max_out(i) represents the length of the longest path form block bi to the sink t without passed

block bj.

The time complexity of prejudgment in the Reverse is O(n).

Proof: Without loss of generality, we assume the reduction edge (bi,bj) is in Ch. In the

reverse operation, because the reduction edge (bi,bj) is change to (bj,bi), we get the length of the

longest horizontal path by sub-path from the source s to bj with no passed bi, sub-path form bi to

the sink t with no passed bj and wj. The summation of three partitions is the length of new path

from the source s to the sink t that determines the value of W after reverse. So we discard the

perturbation which make max_in(j)+max_out(i)+ wj W in Ch and accept other perturbations.

The proof to last half of Theorem 4 is similar.

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(4)Move: The Move operation moves a reduction edge (bi, bj) from a transitive closure graph to the

other, which switching the geometric relation of the two block bi and bj between a horizontal relation

and a vertical one.

Theorem 5:

The reduction edge (bi, bj) is in Ch or Cv, which is selected to be moved.

If (bi, bj) in Ch and vsdi+hj+vtdj H, the target area is no more than A=WH after the Move.

If (bi, bj) in Cv and hsdi+wj+htdj W, the target area is no more than A=WH after the Move.

The time complexity of prejudgment in the Move is O(1).

Proof: Without loss of generality, we assume the reduction edge (bi,bj) to be moved is in Ch.

After the move operation, the value of W maybe decreases or not because there are other longest

paths possibly. Additionally, we will add new edge (bi,bj) into Cv and the value of H will not be

changed if vsdi+hj+vtdj H. Therefore, we discard the perturbation that make vsdi+hj+vtdj H

and accept other perturbations. The proof to last half of Theorem 5 is similar.

From all theorems mentioned above, we prejudge the target area for each perturbing

operations and discard the adverse one without packing. The time complexity of it is linear.

Thus, we only pack a part of perturbations and not like other floorplanners pack in every

perturbation. Therefore, we implement it in an iteration scheme and not like most of other

floorplanners using the SA scheme. In each perturbing operation, the area of each perturbation

is prejudged firstly. If the prejudged result overflows the solution of last time, then, the

operation is abandoned in this iterat ion. This technology will improve the efficient of the AP-

TCG. Because the target area become less and less, the AP-TCG have the property of self-

convergence. After that, another block or reduction edge can be randomly selected for the next

perturbation of the floorplan. Thus, the area becomes less and less, and the solution is obtained

at the end of the iteration.

5. Experimental results

We implement our algorithm in the C++ programming language on an AMD 1.83GHz PC

with 512-MB memory in Linux 2.4. All problems come from MCNC and GSRC benchmarks.

The GSRC can be gotten on line in [14]. The number of blocks increases from 9 to 300.

Table 1 compares the results of the AP-TCG with those of five existing well-designed

algorithm on the problems from MCNC. The five algorithms are the TCG[2], the TCG-S[3], the

Genetic Algorithm/Sequence Pair (GA/SP)[15], the Moving Block Sequence and Organizational

Evolutionary Algorithm (MBS-OEA)[11] and the Horizontal and Vertical Contours with Single

Sequence(HVC-SS)[12]. We not only compare the AP-TCG with the TCG, the TCG-S and the

HVC-SS in a SA scheme, but also compare with the GS/SP and the MBS-OEA in a genetic

algorithm scheme. More applications of genetic algorithms can be found in [13], [16] and [17].

The running environments of the TCG and the TCG-S algorithms are the same with AP-TCG.

The running environments of the GA/SP is 1.83 GHz PC with 512MB RAM; the MBS -OEA is

IBM Z Pro Type 6221 3.06GHz with 1GB RAM; the HVC-SS is 2.6GHz with 512MB RAM.

As can be seen, for apte, the Area of the AP-TCG is as small as those four of other

algorithms. For xerox, the Area of AP-TCG is slightly larger than those of the GA/SP, the

MBS-OEA and TCG-S. For hp, the Area of AP-TCG is as small as those four of other

algorithms. For ami33, the Area of the AP-TCG is slightly larger than the Area of the MBS-

OEA. For ami49, the Area of the AP-TCG is the smallest. To summarize, the AP-TCG obtains a

better performance, especially for the two larger problems, ami33 and ami49.

Then we compares the running times of the six algorithms. It should be noted that the GA/SP,

the MBS-OEA and the HVC-SS are running on a faster computer, and the TCG, the TCG-S and

the AP-TCG are running on the same computer. Based on comparable solution quality, the AP-

TCG achieves 55.4 speedup compared to the GA/SP, 1.5 speedup compared the HVC-SS,

16.5 speedup compared to the MBS-OEA, 6.1 speedup compared to the TCG, 3.2 speedup

compared to the TCG-S. Moreover, TCG have proved to be efficient and effective than the

SP[6], the O-tree[4] and the B*-tree[3]. Thus, the AP-TCG obtains a good performance in

floorplanning with area optimization.

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Table 2 compares the results of the AP-TCG with those of three existing well-designed algorithm on

the problems more than 50 blocks from GSRC. The three algorithms are the MBS-OEA[11], the

TCG[2] and the TCG-S[3]. The TCG and TCG-S provide the results only on the benchmarks of

MCNC, so we extend them to compare on the benchmarks of GSRC. The running environments of the

TCG and the TCG-S algorithms are the same with AP-TCG. The running environments of the MBS-

OEA is IBM Z Pro Type 6221 3.06GHz with 1GB RAM.

Table 1. Area and Runtime Comparisons for Area Optimization on MCNC benchmarks

Circuit

GS/SP HVC-SS MBS-OEA TCG TCG-S AP-TCG

Area

(mm2)

Time

(sec)

Area

(mm2)

Time

(sec)

Area

(mm2)

Time

(sec)

Area

(mm2)

Time

(sec)

Area

(mm2)

Time

(sec)

Area

(mm2)

Time

(sec)

apte 47.1 15 46.92 0.60 4.92 0.5 46.92 1.1 46.92 0.5 46.92 0.4

xerox 19.81 20 19.95 0.54 19.79 1.1 19.83 2.0 19.796 0.8 19.83 0.7

hp 9.02 23 9.07 1.68 8.947 1.7 8.947 5.2 8.947 0.8 8.947 0.6

ami33 1.20 291 1.196 7.85 1.175 45 1.20 18.4 1.185 15.0 1.179 4.7

ami49 37.33 394 36.78 9.33 36.35 173.2 37.49 55 36.99 26.4 36.06 6.7

Comp. - 55.4X - 1.5X - 16.5X - 6.1X - 3.2X - 1X

Table 2. Area and Runtime Comparisons for Area Optimization on GSRC benchmarks

Circuit

MBS-OEA TCG TCG-S AP-TCG

Area

(mm2)

Time

(sec)

Area

(mm2)

Time

(sec)

Area

(mm2)

Time

(sec)

Area

(mm2)

Time

(sec) n50 20.4140 123.2 20.8392 76.9 22.5312 32.6 20.1601 7.1

n50b 20.9271 121.0 21.3408 72.2 23.3376 28.7 20.7468 6.8

n50c 20.7564 137.0 22.1144 56.5 23.8610 29.9 20.6528 7.2

n100 18.9832 1706.1 19.3284 522.1 19.1590 90.0 18.3717 25.6

n100b 16.9158 1065.4 18.0880 445.5 19.2290 55.8 16.4128 29.5

n100c 18.2648 1319.0 20.1168 295.6 18.4912 93.4 17.5848 28.0

n200 19.2384 12114.1 19.5993 12701.5 20.5440 788.5 18.1476 124.0

n200b 19.0554 14217.2 19.9346 9418.6 20.1312 855.9 18.0609 123.9

n200c 18.7600 11210.7 18.9210 11536.9 19.7040 942.5 17.5978 128.8

n300 30.2412 80984.1 32.7540 21883.1 33.1104 1962.8 28.4073 215.5

Comp. 176.6X 81.9X 7X 1X

As can be seen, the Areas of the AP-TCG are the smallest among the four algorithms. Then

we compares the running times of the four algorithms. The AP-TCG achieves 176.6 speedup

compared to the MBS-OEA, 81.9 speedup compared to the TCG, 7 speedup compared to the

TCG-S based on comparable solution quality. Thus, the AP-TCG finds high quality floorplans

for the problems more than 50 blocks, which illustrates that the AP-TCG is competent for

solving large-scale problems.

Table 3 shows the dead space ratio in our results. As we can see, the dead space is less than

3.99% in them. Figure 1 (a), (b) and (c) denote the floorplanning results of n100a, n200a and

n300 from GSRC benchmarks respectively.

Table 3. Dead Space Ratio of Our Results

Benchmarks apte xerox hp ami33 ami49 n50a n50b n50c

Dead-space Ratio (%) 0.77 2.48 2.28 1.99 1.72 1.52 2.17 2.49

Benchmarks n100a n100b n100c n200a n200b n200c n300

Dead-space Ratio (%) 2.35 2.50 2.26 3.29 3.45 3.44 3.99

6. Conclusion

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Figure 1 (a). Result of

GSRC n100a: Area =

18.3714mm2, Dead-space =

2.35%

Figure 1 (b). Result of

GSRC n200a: Area =

18.1476mm2, Dead-space

= 3.29%

.

Figure 1 (c). Result of

GSRC n300: Area

=28.4073mm2, Dead-space

= 3.99%

This paper first proposes a new algorithm based on iteration scheme, the AP-TCG, for

solving floorplanning problems of area optimization. The AP-TCG can directly prejudge the

target area without packing for the perturbations in linear time. With its self-concentrate, the

AP-TCG is running without SA scheme. Thus, the AP-TCG is useful for boosting researches in

the field of floorplanning. The experimental results from MCNC and GSRC benchmarks show

that the AP-TCG algorithm is efficient, effective, and stable in floorplanning area optimization.

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http://vlsicad.eecs.umich.edu/BK/GSRCbench/

area optimization in floorplanning using ap-tcg...optimization of floorplanning. 3. review of tcg...

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