LM3481

Application Note 2094 LM3481 SEPIC Evaluation Board

Literature Number: SNVA461

LM3481 SEPIC EvaluationBoard

National SemiconductorApplication Note 2094Robert Sheehan, Akshay MehtaSeptember 14, 2011

IntroductionThe LM3481 SEPIC evaluation board is designed to providethe design engineer with a fully functional power convertersolution with two output voltage options. It produces a se-lectable output voltage of 12 V at 1.25A or 5V at 3A. Theswitching frequency for the converter is set to 500 kHz. Theprinted circuit board consists of 2 layers of FR4 material with2 ounce copper on both layers. This application note containsthe evaluation board schematics, Bill-of-Materials (BOM) anda quick setup procedure. Refer to the LM3481 datasheet forcomplete circuit design information.

The performance of the evaluation board is as follows:

5V Output Voltage Option:

Input Voltage Range : 4.5V to 25V

Output Voltage : 5V ± 2%

Output Current : 0A to 3A

Switching Frequency : 500 kHz

Load Regulation : 0.1%

Board Size : 2.4 x 1.8 inches

12V Output Voltage Option:

Input Voltage Range : 4.5V to 18V

Output Voltage : 12V ± 2%

Output Current : 0A to 1.25A

Switching Frequency : 500 kHz

Load Regulation : 0.1%

Board Size : 2.4 x 1.8 inches

Powering and Loading

ConsiderationsRead this entire page prior to attempting to power the evalu-ation board.

QUICK SETUP PROCEDURE

Step 1: Use an input power supply with at least 5A currentcapability. Connect the positive output of the power supply tothe VIN terminal P1. Connect the negative output of the powersupply to the input GND terminal P2.

Step 2: Connect a load with 3A capability to the VOUT terminalP3 and GND terminal P4.

Step 3: To set the output voltage to 5V, the J2 jumper shouldbe out. If the desired output voltage is 12V, the J2 jumpershould be in.

Step 4: Set VIN to 12V with no load being applied. Turn on theinput power supply. Once the input voltage is applied, theoutput voltage should be in regulation.

Step 5: The input voltage and the load current can now beadjusted and set as desired while making sure that they arein range as described above.

Note: Do not change jumper settings while the board is pow-ered on.

© 2011 National Semiconductor Corporation 301393 www.national.com

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Connection Diagram

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FIGURE 1. Basic Test Setup for the LM3481 SEPIC Evaluation Board

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FIGURE 2. Output Voltage Ripple Measurement Setup

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Board Configuration

OUTPUT VOLTAGE OPTION

A jumper has been provided on the evaluation board in orderto select the output voltage option of 12V or 5V. Shorting thejumper will set the output voltage to 12V. Leaving the jumperopen will set the output voltage to 5V.

UVLO

The LM3481 evaluation board has a resistor divider connect-ed to the UVLO pin to set the on and off thresholds to 4.25Vand 4.05V respectively. There is also a jumper J1 on theboard which provides the ‘Enable’ feature. If the jumper isopen, the board will not produce an output voltage.

OUTPUT VOLTAGE RIPPLE

Output voltage ripple measurement should be taken directlyacross the output capacitor C12 between terminals P3 andP4. Care must be taken to minimize the loop area betweenthe scope probe tip and the ground lead in order to minimizenoise in the measurement. This can be achieved by removingthe probe’s spring tip and ground lead and then wrap a barewire around the scope probe shaft. The bare wire should bein contact with the probe shaft since this is the ground leadfor the probe. The measurement can be taken by connectingthe bare wire onto the ground side of the capacitor and theprobe tip onto the positive side of the capacitor. Figure 2shows a diagram of this measurement technique.

EXTERNAL CLOCK SYNCHRONIZATION

A SYNC terminal has been provided on the evaluation boardin order to synchronize the converter to an external clock orother fixed frequency signal. Refer to the LM3481 datasheetfor complete information on setting up the external clock.

ACTIVE LOADS

Many constant-current types of active loads can exhibit aninitial short circuit, which is sustained well beyond the normalsoft-start cycle. To avoid loss of regulation of the output volt-age during current limit during startup, wait until the output

voltage is up before turning on the load. Using an active loadwith a constant-resistance mode will avoid this startup timingissue.

SEPIC OPERATION and ADVANTAGES

The Single Ended Primary Inductance Converter (SEPIC) isa DC-DC converter which allows the output voltage to be ei-ther higher than or lower than the input voltage. The SEPICcapacitor is charged to a voltage potential of approximatelyVIN. This capacitor acts as an AC short placing the two coilsof the inductor in parallel. The duty cycle relationship and op-eration is similar to that of the Buck-Boost. During the on-timeof the MOSFET a voltage of VIN is applied across the mutualinductor. During the off-time of MOSFET, the mutual inductorvoltage flies to VOUT refreshing the charge on the output ca-pacitor. Since the SEPIC capacitor is charged to VIN, thevoltage across the MOSFET is VIN + VOUT. Additionally, thecurrent through the MOSFET is IIN + IOUT.

The SEPIC has quite a few advantages over the invertingBuck-Boost and the Flyback topology. The power MOSFETand the diode voltages in the Flyback topology are unclampedand are largely functions of the transformer leakage induc-tance and the stray capacitance. This causes large voltagespikes at the switching intervals. Compared to this for theSEPIC topology the MOSFET and the diode are clamped bythe output and blocking capacitors and thus there is little cir-cuit ringing. The SEPIC also has a common ground, unlikethe Buck-Boost topology, which makes the input and outputvoltage sensing very easy.

MOMENTARY OVERLOAD or SHORT CIRCUITPROTECTION

In case of an overload or a short circuit event, the voltageacross the sense resistor would increase beyond 220 mV.This would then activate the short circuit current limit and limitthe switching frequency by a factor of 8 while the event exists.In case of a prolonged overload/short circuit event, the largecurrents would cause the junction temperatures of the MOS-FET and the diode to increase significantly and potentiallycause thermal failure.

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Typical Performance Characteristics

Efficiency at VOUT = 5V

0.0 0.5 1.0 1.5 2.0 2.5 3.00

10

20

30

40

50

60

70

80

90EF

FIC

IEN

CY

(%)

ILOAD (A)

Vin = 4.5VVin = 6VVin = 12VVin = 18VVin = 25V

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Efficiency at VOUT = 12V

0.0 0.5 1.0 1.5 2.0 2.5 3.00

102030405060708090

100

EFFI

CIE

NC

Y (%

)

ILOAD (A)

Vin = 4.5VVin = 6VVin = 12VVin = 18V

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Startup at VOUT = 5V and VIN = 4.5V

0 2 4 6 8 10 12 14 16 18 200

1

2

3

4

5

6

0

1

2

3

4

5

6

V IN

(V)

TIME (ms)

V OU

T (V

)VIN

VOUT

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Startup at VOUT = 5V and VIN = 25V

0 2 4 6 8 10 12 14 16 18 200

3

6

9

12

15

18

21

24

27

0

1

2

3

4

5

6

V IN

(V)

TIME (ms)

V OU

T (V

)

VOUT

VIN

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Startup at VOUT = 12V and VIN = 4.5V

0 2 4 6 8 10 12 14 16 18 200

1

2

3

4

5

0

2

4

6

8

10

12

14

16

V IN

(V)

TIME (ms)

V OU

T (V

)

VOUT

VIN

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Startup at VOUT = 12V and VIN = 18V

0 2 4 6 8 10 12 14 16 18 200

5

10

15

20

25

0

3

6

9

12

15

V IN

(V)

TIME (ms)

V OU

T (V

)VIN

VOUT

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Load Transient at VIN = 5V

0.0 0.5 1.0 1.5 2.03.2

3.6

4.0

4.4

4.8

5.2

0

1

2

3

4

5

6V O

UT

(V)

TIME (ms)

I LO

AD (A

)

VOUT

ILOAD

VIN = 5V

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Load Transient at VIN = 12V

0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.010.0

10.5

11.0

11.5

12.0

12.5

13.0

0

1

2

3

4

5

6

V OU

T (V

)

TIME (ms)

I LO

AD (A

)

ILOAD

VOUT

VIN = 12V

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Input Transient at Iload = 3A and VOUT = 5V

0 1 2 3 4 5 6 7 8 9 104

8

12

16

20

24

28

32

36

1.01.52.02.53.03.54.04.55.05.56.0

V IN

(V)

TIME (ms)

V OU

T (V

)

VIN

VOUT

ILOAD = 3A

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Input Transient at Iload = 3A and VOUT = 12V

0 1 2 3 4 5 6 7 8 9 101213141516171819202122

8.08.59.09.5

10.010.511.011.512.012.513.0

V IN

(V)

TIME (ms)

V OU

T (V

)

VIN

VOUT

ILOAD = 3A

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Steady State Operation at VIN = 4.5V and Iload = 1.25A

0 2 4 6 8 109.5

10.0

10.5

11.0

11.5

12.0

12.5

0

4

8

12

16

20

24

V OU

T (V

)

TIME (μs)

V SW

(V)

VIN = 4.5V

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Steady State Operation at VIN = 25V and Iload = 3A

0 1 2 3 4 5 6 7 8 9 102.5

3.0

3.5

4.0

4.5

5.0

5.5

0

7

14

21

28

35

42

V OU

T (V

)

TIME (μs)

V SW

(V)

VIN = 25V

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Evaluation Board Schematic

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FIG

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LM3481 Bill of Materials

Designat

or

Value Package Description Manufacturer Part Number Qty

C1 100 µF Polarized Capacitor, 63V,

10%

Sanyo 63CV100KX 1

C2, C3 4.7 µF 1812 Ceramic, X7R, 50V, 10% MuRata C4532X7R1H475M 2

C4 0.027 µF 0603 Ceramic, X7R, 100V, 10% Kemet C0603C273K1RACTU 1

C5 100 pF 0603 Ceramic, X7R, 100V, 10% AVX 06031C331KAT2A 1

C6 4700 pF 0603 Ceramic, X7R, 100V, 10% AVX 06031C222KAT2A 1

C7 2200 pF 0603 Ceramic, X7R, 16V, 10% TDK C1608X7R1C105K 1

C8 1000 pF 1206 Ceramic, X7R, 50V, 10% TDK C3216X7R1H105K 1

C9, C12 22 µF 1812 Ceramic, X7R, 20V, 20% TDK C4532X7R1C226M 2

C10, C11 180 µF Electrolytic capacitor Sanyo 16SVP180M 2

D1 SMC Schottky Diode, 40V Central Semi CMSH5-40 1

J1, J2 Through Hole Jumpers Sullins Electronics PBC02SAAN 2

L1 4.7 µH Coupled Inductor, 8.25A Cooper DRQ127-4R7-R 1

P1, P2,

P3, P4

Terminal, Turret, TH Keystone

Electronics

1598-2 4

Q1 PowerPAK N Channel MOSFET, 30V Vishay Si7386DP 1

R1 100 ohm 0603 RES, 1%, 0.1W Vishay-Dale CRCW0603100RFKEA 1

R2 40.2k

ohm

0603 RES, 1%, 0.1W Vishay-Dale CRCW060340K2FKEA 1

R3 20.5k

ohm

0603 RES, 1%, 0.1W Vishay-Dale CRCW060320K5FKEA 1

R4 10.7k

ohm

0603 RES, 1%, 0.1W Vishay-Dale CRCW060310K7FKEA 1

R5 20.0k

ohm

0603 RES, 1%, 0.1W Vishay-Dale CRCW060320K0FKEA 1

R6 59.0k

ohm

0603 RES, 1%, 0.1W Vishay-Dale CRCW060359K0FKEA 1

R7 DNP Resistor DNP Resistor 1

R8 20m ohm RES, 1%, 1W Vishay-Dale WSL2512R0200FEA 1

R9 6.8k ohm 0603 RES, 5%, 0.1W Vishay-Dale CRCW06036K80JNEA 1

R10 38.3k

ohm

0603 RES, 1%, 0.1W Vishay-Dale CRCW060338K3FKEA 1

TP1, TP2,

TP3

Through Hole Test Point,

Miniature, White

Keystone

Electronics

5002 3

U1 MSOP Low-Side N-Channel

Controller

National

Semiconductor

LM3481MM 1

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PCB Layout

30139318

Top Layer Components and Overlay

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Top Layer Copper

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30139323

Bottom Overlay

30139322

Bottom Layer Copper

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