analog integrated circuits
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Analog Integrated Circuits
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Contents
Articles
Bode plot 1
Current mirror 11
Differential amplifier 19
Operational amplifier 25
References
Article Sources and Contributors 43
Image Sources, Licenses and Contributors 44
Article Licenses
License 45
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Bode plot 1
Bode plot
Figure 1(a): The Bode plot for a first-order (one-pole) highpass filter; the straight-line
approximations are labeled "Bode pole"; phase varies from 90 at low frequencies (due to
the contribution of the numerator, which is 90 at all frequencies) to 0 at high
frequencies (where the phase contribution of the denominator is 90 and cancels the
contribution of the numerator).
Figure 1(b): The Bode plot for a first-order (one-pole) lowpass filter; the straight-line
approximations are labeled "Bode pole"; phase is 90 lower than for Figure 1(a) because
the phase contribution of the numerator is 0 at all frequencies.
A Bode plot is a graph of the transfer
function of a linear, time-invariant
system versus frequency, plotted with
a log-frequency axis, to show the
system's frequency response. It is
usually a combination of a Bode
magnitude plot, expressing the
magnitude of the frequency response
gain, and a Bode phase plot,
expressing the frequency response
phase shift.
Overview
Among his several important
contributions to circuit theory and
control theory, engineer Hendrik Wade
Bode (19051982), while working at
Bell Labs in the United States in the
1930s, devised a simple but accurate
method for graphing gain and
phase-shift plots. These bear his name,
Bode gain plot and Bode phase plot
(pronounced Boh-dee in English,
Bow-duh in Dutch).[1]
The magnitude axis of the Bode plot is
usually expressed as decibels of power,
that is by the 20 log rule: 20 times the
common (base 10) logarithm of the
amplitude gain. With the magnitude
gain being logarithmic, Bode plots
make multiplication of magnitudes a
simple matter of adding distances on
the graph (in decibels), since
A Bode phase plot is a graph of phase
versus frequency, also plotted on a
log-frequency axis, usually used in
conjunction with the magnitude plot, to
evaluate how much a signal will be
phase-shifted. For example a signal
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Bode plot 2
described by:Asin(t) may be attenuated but also phase-shifted. If the system attenuates it by a factor x and phase
shifts it by the signal out of the system will be (A/x) sin(t). The phase shift is generally a function of
frequency.
Phase can also be added directly from the graphical values, a fact that is mathematically clear when phase is seen as
the imaginary part of the complex logarithm of a complex gain.
In Figure 1(a), the Bode plots are shown for the one-pole highpass filter function:
where f is the frequency in Hz, and f1
is the pole position in Hz, f1= 100 Hz in the figure. Using the rules for
complex numbers, the magnitude of this function is
while the phase is:
Care must be taken that the inverse tangent is set up to return degrees, not radians. On the Bode magnitude plot,
decibels are used, and the plotted magnitude is:
In Figure 1(b), the Bode plots are shown for the one-pole lowpass filter function:
Also shown in Figure 1(a) and 1(b) are the straight-line approximations to the Bode plots that are used in hand
analysis, and described later.
The magnitude and phase Bode plots can seldom be changed independently of each other changing the amplitude
response of the system will most likely change the phase characteristics and vice versa. For minimum-phase systems
the phase and amplitude characteristics can be obtained from each other with the use of the Hilbert transform.
If the transfer function is a rational function with real poles and zeros, then the Bode plot can be approximated with
straight lines. These asymptotic approximations are called straight line Bode plots or uncorrected Bode plots and
are useful because they can be drawn by hand following a few simple rules. Simple plots can even be predicted
without drawing them.
The approximation can be taken further by correcting the value at each cutoff frequency. The plot is then called a
corrected Bode plot.
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Bode plot 3
Rules for hand-made Bode plot
The premise of a Bode plot is that one can consider the log of a function in the form:
as a sum of the logs of its poles and zeros:
This idea is used explicitly in the method for drawing phase diagrams. The method for drawing amplitude plots
implicitly uses this idea, but since the log of the amplitude of each pole or zero always starts at zero and only has one
asymptote change (the straight lines), the method can be simplified.
Straight-line amplitude plot
Amplitude decibels is usually done using the version. Given a transfer function in the form
where and are constants, , , andH is the transfer function:
at every value of s where (a zero), increase the slope of the line by per decade.
at every value of s where (a pole), decrease the slope of the line by per decade.
The initial value of the graph depends on the boundaries. The initial point is found by putting the initial angular
frequency into the function and finding |H(j)|.
The initial slope of the function at the initial value depends on the number and order of zeros and poles that are at
values below the initial value, and are found using the first two rules.
To handle irreducible 2nd order polynomials, can, in many cases, be approximated as
.
Note that zeros and poles happen when is equal to a certain or . This is because the function in question isthe magnitude of H(j), and since it is a complex function, . Thus at any place where there
is a zero or pole involving the term , the magnitude of that term is
.
Corrected amplitude plot
To correct a straight-line amplitude plot:
at every zero, put a point above the line,
at every pole, put a point below the line,
draw a smooth curve through those points using the straight lines as asymptotes (lines which the curveapproaches).
Note that this correction method does not incorporate how to handle complex values of or . In the case of an
irreducible polynomial, the best way to correct the plot is to actually calculate the magnitude of the transfer function
at the pole or zero corresponding to the irreducible polynomial, and put that dot over or under the line at that pole or
zero.
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Bode plot 4
Straight-line phase plot
Given a transfer function in the same form as above:
the idea is to draw separate plots for each pole and zero, then add them up. The actual phase curve is given by
.
To draw the phase plot, for each pole and zero:
if A is positive, start line (with zero slope) at 0 degrees
if A is negative, start line (with zero slope) at 180 degrees
at every (for stable zeros ), increase the slope by degrees per decade,
beginning one decade before (E.g.: )
at every (for stable poles ), decrease the slope by degrees per decade,
beginning one decade before (E.g.: )
"unstable" (right half plane) poles and zeros ( ) have opposite behavior flatten the slope again when the phase has changed by degrees (for a zero) or degrees (for a
pole),
After plotting one line for each pole or zero, add the lines together to obtain the final phase plot; that is, the final
phase plot is the superposition of each earlier phase plot.
Example
A passive (unity pass band gain) lowpass RC filter, for instance has the following transfer function expressed in the
frequency domain:
From the transfer function it can be determined that the cutoff frequency pointfc
(in hertz) is at the frequency
or (equivalently) at
where is the angular cutoff frequency in radians per second.
The transfer function in terms of the angular frequencies becomes:
The above equation is the normalized form of the transfer function. The Bode plot is shown in Figure 1(b) above,
and construction of the straight-line approximation is discussed next.
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Bode plot 5
Magnitude plot
The magnitude (in decibels) of the transfer function above, (normalized and converted to angular frequency form),
given by the decibel gain expression :
when plotted versus input frequency on a logarithmic scale, can be approximated by two lines and it forms the
asymptotic (approximate) magnitude Bode plot of the transfer function:
for angular frequencies below it is a horizontal line at 0 dB since at low frequencies the term is small and
can be neglected, making the decibel gain equation above equal to zero,
for angular frequencies above it is a line with a slope of 20 dB per decade since at high frequencies the
term dominates and the decibel gain expression above simplifies to which is a straight line with a
slope of 20 dB per decade.
These two lines meet at the corner frequency. From the plot, it can be seen that for frequencies well below the corner
frequency, the circuit has an attenuation of 0 dB, corresponding to a unity pass band gain, i.e. the amplitude of the
filter output equals the amplitude of the input. Frequencies above the corner frequency are attenuated the higher
the frequency, the higher the attenuation.
Phase plot
The phase Bode plot is obtained by plotting the phase angle of the transfer function given by
versus , where and are the input and cutoff angular frequencies respectively. For input frequencies much
lower than corner, the ratio is small and therefore the phase angle is close to zero. As the ratio increases the
absolute value of the phase increases and becomes 45 degrees when . As the ratio increases for input
frequencies much greater than the corner frequency, the phase angle asymptotically approaches 90 degrees. The
frequency scale for the phase plot is logarithmic.
Normalized plot
The horizontal frequency axis, in both the magnitude and phase plots, can be replaced by the normalized
(nondimensional) frequency ratio . In such a case the plot is said to be normalized and units of the frequencies
are no longer used since all input frequencies are now expressed as multiples of the cutoff frequency .
An example with pole and zero
Figures 2-5 further illustrate construction of Bode plots. This example with both a pole and a zero shows how to use
superposition. To begin, the components are presented separately.
Figure 2 shows the Bode magnitude plot for a zero and a low-pass pole, and compares the two with the Bode straight
line plots. The straight-line plots are horizontal up to the pole (zero) location and then drop (rise) at 20 dB/decade.
The second Figure 3 does the same for the phase. The phase plots are horizontal up to a frequency factor of ten
below the pole (zero) location and then drop (rise) at 45/decade until the frequency is ten times higher than the pole
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Bode plot 6
(zero) location. The plots then are again horizontal at higher frequencies at a final, total phase change of 90.
Figure 4 and Figure 5 show how superposition (simple addition) of a pole and zero plot is done. The Bode straight
line plots again are compared with the exact plots. The zero has been moved to higher frequency than the pole to
make a more interesting example. Notice in Figure 4 that the 20 dB/decade drop of the pole is arrested by the 20
dB/decade rise of the zero resulting in a horizontal magnitude plot for frequencies above the zero location. Notice in
Figure 5 in the phase plot that the straight-line approximation is pretty approximate in the region where both poleand zero affect the phase. Notice also in Figure 5 that the range of frequencies where the phase changes in the
straight line plot is limited to frequencies a factor of ten above and below the pole (zero) location. Where the phase
of the pole and the zero both are present, the straight-line phase plot is horizontal because the 45/decade drop of the
pole is arrested by the overlapping 45/decade rise of the zero in the limited range of frequencies where both are
active contributors to the phase.
Example with pole and zero
Figure 2: Bode magnitude plot for zero and low-pass pole; curves
labeled "Bode" are the straight-line Bode plots
Figure 3: Bode phase plot for zero and low-pass pole; curves labeled
"Bode" are the straight-line Bode plots
Figure 4: Bode magnitude plot for pole-zero combination; the location
of the zero is ten times higher than in Figures 2&3; curves labeled
"Bode" are the straight-line Bode plots
Figure 5: Bode phase plot for pole-zero combination; the location of
the zero is ten times higher than in Figures 2&3; curves labeled "Bode"
are the straight-line Bode plots
Gain margin and phase margin
Bode plots are used to assess the stability of negative feedback amplifiers by finding the gain and phase margins of
an amplifier. The notion of gain and phase margin is based upon the gain expression for a negative feedback
amplifier given by
where AFB
is the gain of the amplifier with feedback (the closed-loop gain), is the feedback factor andAOL
is the
gain without feedback (the open-loop gain). The gainAOL
is a complex function of frequency, with both magnitude
and phase.[2]
Examination of this relation shows the possibility of infinite gain (interpreted as instability) if theproduct A
OL= 1. (That is, the magnitude of A
OLis unity and its phase is 180, the so-called Barkhausen
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Bode plot 7
stability criterion). Bode plots are used to determine just how close an amplifier comes to satisfying this condition.
Key to this determination are two frequencies. The first, labeled here as f180
, is the frequency where the open-loop
gain flips sign. The second, labeled here f0dB
, is the frequency where the magnitude of the product | AOL
| = 1 (in
dB, magnitude 1 is 0 dB). That is, frequencyf180
is determined by the condition:
where vertical bars denote the magnitude of a complex number (for example, | a+jb | = [ a2 + b2]1/2 ), and
frequencyf0dB
is determined by the condition:
One measure of proximity to instability is the gain margin. The Bode phase plot locates the frequency where the
phase of AOL
reaches 180, denoted here as frequencyf180
. Using this frequency, the Bode magnitude plot finds
the magnitude of AOL
. If |AOL
|180
= 1, the amplifier is unstable, as mentioned. If |AOL
|180
< 1, instability does not
occur, and the separation in dB of the magnitude of |AOL
|180
from |AOL
| = 1 is called the gain margin. Because a
magnitude of one is 0 dB, the gain margin is simply one of the equivalent forms: 20 log10
( |AOL
|180
) = 20 log10
(
|AOL
|180
) 20 log10
( 1 / ).
Another equivalent measure of proximity to instability is the phase margin. The Bode magnitude plot locates thefrequency where the magnitude of |A
OL| reaches unity, denoted here as frequency f
0dB. Using this frequency, the
Bode phase plot finds the phase of AOL
. If the phase of AOL
(f0dB
) > 180, the instability condition cannot be met
at any frequency (because its magnitude is going to be < 1 whenf = f180
), and the distance of the phase atf0dB
in
degrees above 180 is called thephase margin.
If a simpleyes or no on the stability issue is all that is needed, the amplifier is stable if f0dB
< f180
. This criterion is
sufficient to predict stability only for amplifiers satisfying some restrictions on their pole and zero positions
(minimum phase systems). Although these restrictions usually are met, if they are not another method must be used,
such as the Nyquist plot.[3][4]
Examples using Bode plots
Figures 6 and 7 illustrate the gain behavior and terminology. For a three-pole amplifier, Figure 6 compares the Bode
plot for the gain without feedback (the open-loop gain)AOL
with the gain with feedbackAFB
(the closed-loop gain).
See negative feedback amplifier for more detail.
In this example,AOL
= 100 dB at low frequencies, and 1 / = 58 dB. At low frequencies,AFB
58 dB as well.
Because the open-loop gain AOL
is plotted and not the product AOL
, the conditionAOL
= 1 / decides f0dB
. The
feedback gain at low frequencies and for large AOL
isAFB
1 / (look at the formula for the feedback gain at the
beginning of this section for the case of large gain AOL
), so an equivalent way to find f0dB
is to look where the
feedback gain intersects the open-loop gain. (Frequencyf0dB
is needed later to find the phase margin.)
Near this crossover of the two gains at f0dB, the Barkhausen criteria are almost satisfied in this example, and the
feedback amplifier exhibits a massive peak in gain (it would be infinity if AOL
= 1). Beyond the unity gain
frequencyf0dB
, the open-loop gain is sufficiently small thatAFB
AOL
(examine the formula at the beginning of this
section for the case of smallAOL
).
Figure 7 shows the corresponding phase comparison: the phase of the feedback amplifier is nearly zero out to the
frequencyf180
where the open-loop gain has a phase of 180. In this vicinity, the phase of the feedback amplifier
plunges abruptly downward to become almost the same as the phase of the open-loop amplifier. (Recall, AFB
AOL
for smallAOL
.)
Comparing the labeled points in Figure 6 and Figure 7, it is seen that the unity gain frequencyf0dB
and the phase-flip
frequencyf180
are very nearly equal in this amplifier, f180
f0dB
3.332 kHz, which means the gain margin and
phase margin are nearly zero. The amplifier is borderline stable.
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Bode plot 8
Figures 8 and 9 illustrate the gain margin and phase margin for a different amount of feedback . The feedback
factor is chosen smaller than in Figure 6 or 7, moving the condition | AOL
| = 1 to lower frequency. In this example,
1 / = 77 dB, and at low frequenciesAFB
77 dB as well.
Figure 8 shows the gain plot. From Figure 8, the intersection of 1 / and AOL
occurs atf0dB
= 1 kHz. Notice that the
peak in the gainAFB
nearf0dB
is almost gone.[5][6]
Figure 9 is the phase plot. Using the value of f0dB = 1 kHz found above from the magnitude plot of Figure 8, theopen-loop phase atf
0dBis 135, which is a phase margin of 45 above 180.
Using Figure 9, for a phase of 180 the value of f180
= 3.332 kHz (the same result as found earlier, of course[7]
).
The open-loop gain from Figure 8 atf180
is 58 dB, and 1 / = 77 dB, so the gain margin is 19 dB.
Stability is not the sole criterion for amplifier response, and in many applications a more stringent demand than
stability is good step response. As a rule of thumb, good step response requires a phase margin of at least 45, and
often a margin of over 70 is advocated, particularly where component variation due to manufacturing tolerances is
an issue.[8]
See also the discussion of phase margin in the step response article.
Examples
Figure 6: Gain of feedback amplifierAFB
in dB and corresponding
open-loop amplifierAOL
. Parameter 1/ = 58 dB, and at low
frequenciesAFB 58 dB as well. The gain margin in this amplifier isnearly zero because | A
OL| = 1 occurs at almostf =f
180.
Figure 7: Phase of feedback amplifier AFB
in degrees and
corresponding open-loop amplifier AOL
. The phase margin in this
amplifier is nearly zero because the phase-flip occurs at almost theunity gain frequencyf =f
0dBwhere | A
OL| = 1.
Figure 8: Gain of feedback amplifierAFB in dB and correspondingopen-loop amplifierA
OL. In this example, 1 / = 77 dB. The gain
margin in this amplifier is 19 dB.
Figure 9: Phase of feedback amplifierAFB in degrees andcorresponding open-loop amplifierA
OL. The phase margin in this
amplifier is 45.
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Bode plot 9
Bode plotter
Figure 10: Amplitude diagram of a 10th order Chebyshev filter plotted using a Bode
Plotter application. The chebyshev transfer function is defined by poles and zeros which
are added by clicking on a graphical complex diagram.
The Bode plotter is an electronic
instrument resembling an oscilloscope,
which produces a Bode diagram, or a
graph, of a circuit's voltage gain or
phase shift plotted against frequency in
a feedback control system or a filter.
An example of this is shown in Figure
10. It is extremely useful for analyzing
and testing filters and the stability of
feedback control systems, through the
measurement of corner (cutoff)
frequencies and gain and phase
margins.
This is identical to the functionperformed by a vector network analyzer, but the network analyzer is typically used at much higher frequencies.
For education/research purposes, plotting Bode diagrams for given transfer functions facilitates better understanding
and getting faster results (see external links).
Related plots
Two related plots that display the same data in different coordinate systems are the Nyquist plot and the Nichols plot.
These are parametric plots, with frequency as the input and magnitude and phase of the frequency response as the
output. The Nyquist plot displays these in polar coordinates, with magnitude mapping to radius and phase to
argument (angle). The Nichols plot displays these in rectangular coordinates, on the log scale.
Related Plots
A Nyquist plot. A Nichols plot of the same response.
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Bode plot 10
Notes
[1] Van Valkenburg, M. E. University of Illinois at Urbana-Champaign, "In memoriam: Hendrik W. Bode (1905-1982)", IEEE Transactions on
Automatic Control, Vol. AC-29, No 3., March 1984, pp. 193-194. Quote: "Something should be said about his name. To his colleagues at Bell
Laboratories and the generations of engineers that have followed, the pronunciation is boh-dee. The Bode family preferred that the original
Dutch be used as boh-dah."
[2] Ordinarily, as frequency increases the magnitude of the gain drops and the phase becomes more negative, although these are only trends and
may be reversed in particular frequency ranges. Unusual gain behavior can render the concepts of gain and phase margin inapplicable. Thenother methods such as the Nyquist plot have to be used to assess stability.
[3] Thomas H. Lee (2004). The design of CMOS radio-frequency integrated circuits(http://worldcat. org/isbn/0-521-83539-9) (Second Edition
ed.). Cambridge UK: Cambridge University Press. p. 14.6 pp. 451453. ISBN 0-521-83539-9. .
[4] William S Levine (1996). The control handbook: the electrical engineering handbook series(http://books. google. com/
books?id=2WQP5JGaJOgC&pg=RA1-PA163&lpg=RA1-PA163&dq=stability+"minimum+phase"&source=web&ots=P3fFTcyfzM&
sig=ad5DJ7EvVm6In_zhI0MlF_6vHDA) (Second Edition ed.). Boca Raton FL: CRC Press/IEEE Press. p. 10.1 p. 163. ISBN 0849385709. .
[5] The critical amount of feedback where the peak in the gainjust disappears altogether is the maximally flat or Butterworth design.
[6] Willy M C Sansen (2006).Analog design essentials(http://worldcat. org/isbn/0-387-25746-2). Dordrecht, The Netherlands: Springer.
p. 0517-0527 pp. 157163. ISBN 0-387-25746-2. .
[7] The frequency where the open-loop gain flips signf180
does not change with a change in feedback factor; it is a property of the open-loop
gain. The value of the gain atf180
also does not change with a change in . Therefore, we could use the previous values from Figures 6 and 7.
However, for clarity the procedure is described using only Figures 8 and 9.
[8] Willy M C Sansen. 0526 p. 162(http://worldcat.org/isbn/0-387-25746-2). ISBN 0-387-25746-2. .
References
External links
Explanation of Bode plots with movies and examples (http://www.facstaff.bucknell.edu/mastascu/
eControlHTML/Freq/Freq5.html)
How to draw piecewise asymptotic Bode plots (http://lpsa.swarthmore.edu/Bode/BodeHow.html)
Summarized drawing rules (http://lims.mech.northwestern.edu/~lynch/courses/ME391/2003/bodesketching.
pdf) (PDF)
Bode plot applet (http://www.uwm.edu/People/msw/BodePlot/) - Accepts transfer function coefficients as
input, and calculates magnitude and phase response
Circuit analysis in electrochemistry (http://www.abc.chemistry.bsu.by/vi/fit.htm)
Tim Green: Operational amplifier stability(http://www.en-genius.net/includes/files/acqt_013105.pdf)
Includes some Bode plot introduction
Gnuplot code for generating Bode plot: DIN-A4 printing template (pdf)
http://en.wikipedia.org/w/index.php?title=File:Bode_plot_template.pdfhttp://www.en-genius.net/includes/files/acqt_013105.pdfhttp://www.abc.chemistry.bsu.by/vi/fit.htmhttp://www.uwm.edu/People/msw/BodePlot/http://en.wikipedia.org/w/index.php?title=PDFhttp://lims.mech.northwestern.edu/~lynch/courses/ME391/2003/bodesketching.pdfhttp://lims.mech.northwestern.edu/~lynch/courses/ME391/2003/bodesketching.pdfhttp://lpsa.swarthmore.edu/Bode/BodeHow.htmlhttp://www.facstaff.bucknell.edu/mastascu/eControlHTML/Freq/Freq5.htmlhttp://www.facstaff.bucknell.edu/mastascu/eControlHTML/Freq/Freq5.htmlhttp://worldcat.org/isbn/0-387-25746-2http://worldcat.org/isbn/0-387-25746-2http://en.wikipedia.org/w/index.php?title=Butterworth_filter%23Maximal_flatnesshttp://books.google.com/books?id=2WQP5JGaJOgC&pg=RA1-PA163&lpg=RA1-PA163&dq=stability+%22minimum+phase%22&source=web&ots=P3fFTcyfzM&sig=ad5DJ7EvVm6In_zhI0MlF_6vHDAhttp://books.google.com/books?id=2WQP5JGaJOgC&pg=RA1-PA163&lpg=RA1-PA163&dq=stability+%22minimum+phase%22&source=web&ots=P3fFTcyfzM&sig=ad5DJ7EvVm6In_zhI0MlF_6vHDAhttp://books.google.com/books?id=2WQP5JGaJOgC&pg=RA1-PA163&lpg=RA1-PA163&dq=stability+%22minimum+phase%22&source=web&ots=P3fFTcyfzM&sig=ad5DJ7EvVm6In_zhI0MlF_6vHDAhttp://worldcat.org/isbn/0-521-83539-9http://en.wikipedia.org/w/index.php?title=Nyquist_plothttp://en.wikipedia.org/w/index.php?title=IEEE -
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Current mirror 11
Current mirror
A current mirror is a circuit designed to copy a current through one active device by controlling the current in
another active device of a circuit, keeping the output current constant regardless of loading. The current being
'copied' can be, and sometimes is, a varying signal current. Conceptually, an ideal current mirror is simply an ideal
inverting current amplifier that reverses the current direction as well or it is a current-controlled current source
(CCCS). The current mirror is used to provide bias currents and active loads to circuits
Mirror characteristics
There are three main specifications that characterize a current mirror. The first is the transfer ratio (in the case of a
current amplifier) or the output current magnitude (in the case of a constant current source CCS). The second is its
AC output resistance, which determines how much the output current varies with the voltage applied to the mirror.
The third specification is the minimum voltage drop across the output part of the mirror necessary to make it work
properly. This minimum voltage is dictated by the need to keep the output transistor of the mirror in active mode.
The range of voltages where the mirror works is called the compliance range and the voltage marking the boundarybetween good and bad behavior is called the compliance voltage. There are also a number of secondary performance
issues with mirrors, for example, temperature stability.
Practical approximations
For small-signal analysis the current mirror can be approximated by its equivalent Norton impedance .
In large-signal hand analysis, a current mirror is usually and simply approximated by an ideal current source.
However, an ideal current source is unrealistic in several respects:
it has infinite AC impedance, while a practical mirror has finite impedance
it provides the same current regardless of voltage, that is, there are no compliance range requirements it has no frequency limitations, while a real mirror has limitations due to the parasitic capacitances of the
transistors
the ideal source has no sensitivity to real-world effects like noise, power-supply voltage variations and component
tolerances.
Circuit realizations of current mirrors
Basic idea
A current mirror consists of two cascaded inverse converters with mirrored transfer
characteristic.
A bipolar transistor can be used as the
simplest current-to-current converter
but its transfer ratio would highly
depend on temperature variations,
tolerances, etc. To eliminate these
undesired disturbances, a current
mirror is composed of two cascaded
current-to-voltage and
voltage-to-current converters placed at
the same conditions and having reverse characteristics. They have not to be obligatory linear; the only requirement is
their characteristics to be mirrorlike (for example, in the BJT current mirror below, they are logarithmic and
http://en.wikipedia.org/w/index.php?title=File%3AReverse_function_450.jpghttp://en.wikipedia.org/w/index.php?title=Norton%27s_theoremhttp://en.wikipedia.org/w/index.php?title=Active_loadhttp://en.wikipedia.org/w/index.php?title=Electronic_amplifier%23Input_and_output_variableshttp://en.wikipedia.org/w/index.php?title=Electronic_amplifier%23Input_and_output_variableshttp://en.wikipedia.org/w/index.php?title=Active_devicehttp://en.wikipedia.org/w/index.php?title=Current_%28electricity%29 -
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Current mirror 12
exponential). Usually, two identical converters are used but the characteristic of the first one is reversed by applying
a negative feedback. Thus a current mirror consists of two cascaded equal converters (the first - reversed and the
second - direct).
Figure 1: A current mirror implemented with npn
bipolar transistors using a resistor to set the reference
current IREF
; VCC
= supply voltage
Basic BJT current mirror
If a voltage is applied to the BJT base-emitter junction as an input
quantity and the collector current is taken as an output quantity,
the transistor will act as an exponential voltage-to-current
converter. By applying a negative feedback (simply joining the
base and collector) the transistor can be "reversed" and it will
begin acting as the opposite logarithmic current-to-voltage
converter; now it will adjust the "output" base-emitter voltage so
as to pass the applied "input" collector current.
The simplest bipolar current mirror (shown in Figure 1)
implements this idea. It consists of two cascaded transistor stages
acting accordingly as a reversed and direct voltage-to-current
converters. Transistor Q1
is connected to ground. Its collector-base
voltage is zero as shown. Consequently, the voltage drop across Q1
is VBE
, that is, this voltage is set by the diode law and Q1
is said to
be diode connected. (See also Ebers-Moll model.) It is important to have Q1
in the circuit instead of a simple diode,
because Q1
sets VBE
for transistor Q2. If Q
1and Q
2are matched, that is, have substantially the same device
properties, and if the mirror output voltage is chosen so the collector-base voltage of Q2
is also zero, then the
VBE
-value set by Q1
results in an emitter current in the matched Q2
that is the same as the emitter current in Q1.
Because Q1
and Q2
are matched, their 0-values also agree, making the mirror output current the same as the
collector current of Q1. The current delivered by the mirror for arbitrary collector-base reverse bias VCB of the outputtransistor is given by (see bipolar transistor):
,
whereIS
= reverse saturation current or scale current, VT
= thermal voltage and VA
= Early voltage. This current is
related to the reference currentIREF
when the output transistor VCB
= 0 V by:
as found using Kirchhoff's current law at the collector node of Q1:
The reference current supplies the collector current to Q1
and the base currents to both transistors when both
transistors have zero base-collector bias, the two base currents are equal, IB1
=IB2
=IB
.
Parameter 0
is the transistor -value for VCB
= 0 V.
http://en.wikipedia.org/w/index.php?title=Kirchhoff%27s_current_lawhttp://en.wikipedia.org/w/index.php?title=Early_voltagehttp://en.wikipedia.org/w/index.php?title=Boltzmann_constant%23Role_in_semiconductor_physics:_the_thermal_voltagehttp://en.wikipedia.org/w/index.php?title=Bipolar_transistorhttp://en.wikipedia.org/w/index.php?title=Bipolar_transistor%23Ebers.E2.80.93Moll_modelhttp://en.wikipedia.org/w/index.php?title=Diode_modelling%23Shockley_diode_modelhttp://en.wikipedia.org/w/index.php?title=File%3ASimple_bipolar_mirror.svg -
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Current mirror 13
Output resistance
If VCB
is greater than zero in output transistor Q2, the collector current in Q
2will be somewhat larger than for Q
1due
to the Early effect. In other words, the mirror has a finite output (or Norton) resistance given by the rO
of the output
transistor, namely (see Early effect):
,
where VA
= Early voltage and VCB
= collector-to-base bias.
Compliance voltage
To keep the output transistor active, VCB
0 V. That means the lowest output voltage that results in correct mirror
behavior, the compliance voltage, is VOUT
= VCV
= VBE
under bias conditions with the output transistor at the output
current levelIC
and with VCB
= 0 V or, inverting theI-V relation above:
where VT
= thermal voltage andIS
= reverse saturation current or scale current.
Extensions and complications
When Q2
has VCB
> 0 V, the transistors no longer are matched. In particular, their -values differ due to the Early
effect, with
where VA
is the Early voltage and 0
= transistor for VCB
= 0 V. Besides the difference due to the Early effect, the
transistor -values will differ because the 0-values depend on current, and the two transistors now carry different
currents (see Gummel-Poon model).
Further, Q2
may get substantially hotter than Q1
due to the associated higher power dissipation. To maintain
matching, the temperature of the transistors must be nearly the same. In integrated circuits and transistor arrayswhere both transistors are on the same die, this is easy to achieve. But if the two transistors are widely separated, the
precision of the current mirror is compromised.
Additional matched transistors can be connected to the same base and will supply the same collector current. In other
words, the right half of the circuit can be duplicated several times with various resistor values replacing R2
on each.
Note, however, that each additional right-half transistor "steals" a bit of collector current from Q1
due to the non-zero
base currents of the right-half transistors. This will result in a small reduction in the programmed current.
An example of a mirror with emitter degeneration to increase mirror resistance is found in two-port networks.
For the simple mirror shown in the diagram, typical values of will yield a current match of 1% or better.
http://en.wikipedia.org/w/index.php?title=Two-port_network%23Impedance_parameters_%28z-parameters%29http://en.wikipedia.org/w/index.php?title=Integrated_circuithttp://en.wikipedia.org/w/index.php?title=Gummel%E2%80%93Poon_modelhttp://en.wikipedia.org/w/index.php?title=Early_effecthttp://en.wikipedia.org/w/index.php?title=Boltzmann_constant%23Role_in_semiconductor_physics:_the_thermal_voltagehttp://en.wikipedia.org/w/index.php?title=Early_effecthttp://en.wikipedia.org/w/index.php?title=Early_effect -
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Current mirror 14
Figure 2: An n-channel MOSFET current mirror with a
resistor to set the reference current IREF
; VDD
is the
supply voltage
Basic MOSFET current mirror
The basic current mirror can also be implemented using MOSFET
transistors, as shown in Figure 2. Transistor M1
is operating in the
saturation or active mode, and so is M2. In this setup, the output
currentIOUT is directly related toIREF, as discussed next.
The drain current of a MOSFET ID
is a function of both the
gate-source voltage and the drain-to-gate voltage of the MOSFET
given by ID
= f (VGS
, VDG
), a relationship derived from the
functionality of the MOSFET device. In the case of transistor M1
of the mirror, ID
= IREF
. Reference current IREF
is a known
current, and can be provided by a resistor as shown, or by a
"threshold-referenced" or "self-biased" current source to ensure
that it is constant, independent of voltage supply variations.[1]
Using VDG=0 for transistor M1, the drain current in M1 is ID = f(V
GS,V
DG=0), so we find:f (V
GS, 0) =I
REF, implicitly determining
the value of VGS
. Thus IREF
sets the value of VGS
. The circuit in the diagram forces the same VGS
to apply to
transistorM2. If M
2is also biased with zero V
DGand provided transistors M
1andM
2have good matching of their
properties, such as channel length, width, threshold voltage etc., the relationshipIOUT
=f (VGS
,VDG
=0 ) applies, thus
setting IOUT
= IREF
; that is, the output current is the same as the reference current when VDG
=0 for the output
transistor, and both transistors are matched.
The drain-to-source voltage can be expressed as VDS
=VDG
+VGS
. With this substitution, the Shichman-Hodges
model provides an approximate form for functionf (VGS
,VDG
):[1]
where, is a technology related constant associated with the transistor, W/L is the width to length ratio of the
transistor, VGS
is the gate-source voltage, Vth
is the threshold voltage, is the channel length modulation constant,
and VDS
is the drain source voltage.
Output resistance
Because of channel-length modulation, the mirror has a finite output (or Norton) resistance given by the ro
of the
output transistor, namely (see channel length modulation):
,
where = channel-length modulation parameter and VDS
= drain-to-source bias.
Compliance voltage
To keep the output transistor resistance high, VDG
0 V.[2]
(see Baker).[3]
That means the lowest output voltage that
results in correct mirror behavior, the compliance voltage, is VOUT
= VCV
= VGS
for the output transistor at the output
current level with VDG
= 0 V, or using the inverse of thef-function,f1
:
.
For Shichman-Hodges model,f-1
is approximately a square-root function.
http://en.wikipedia.org/w/index.php?title=Channel_length_modulationhttp://en.wikipedia.org/w/index.php?title=Channel_length_modulationhttp://en.wikipedia.org/w/index.php?title=Biasinghttp://en.wikipedia.org/w/index.php?title=MOSFEThttp://en.wikipedia.org/w/index.php?title=MOSFET%23Modes_of_operationhttp://en.wikipedia.org/w/index.php?title=File%3ASimple_MOSFET_mirror.PNG -
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Current mirror 15
Extensions and reservations
A useful feature of this mirror is the linear dependence of f upon device width W, a proportionality approximately
satisfied even for models more accurate than the Shichman-Hodges model. Thus, by adjusting the ratio of widths of
the two transistors, multiples of the reference current can be generated.
It must be recognized that the Shichman-Hodges model[4]
is accurate only for rather dated technology, although it
often is used simply for convenience even today. Any quantitative design based upon new technology uses computermodels for the devices that account for the changed current-voltage characteristics. Among the differences that must
be accounted for in an accurate design is the failure of the square law in Vgs
for voltage dependence and the very
poor modeling of Vds
drain voltage dependence provided by Vds
. Another failure of the equations that proves very
significant is the inaccurate dependence upon the channel lengthL. A significant source ofL-dependence stems from
, as noted by Gray and Meyer, who also note that usually must be taken from experimental data.[1]
Feedback assisted current mirror
Figure 3: Gain-boosted current mirror with op amp feedback to increase output
resistance
Figure 3 shows a mirror using negative
feedback to increase output resistance.
Because of the op amp, these circuits are
sometimes called gain-boosted current
mirrors. Because they have relatively low
compliance voltages, they also are called
wide-swing current mirrors. A variety of
circuits based upon this idea are in
use,[5][6][7]
particularly for MOSFET
mirrors because MOSFETs have rather low
intrinsic output resistance values. A
MOSFET version of Figure 3 is shown inFigure 4 where MOSFETs M
3and M
4
operate in Ohmic mode to play the same
role as emitter resistors RE
in Figure 3, and
MOSFETs M1
and M2
operate in active
mode in the same roles as mirror transistors
Q1
and Q2
in Figure 3. An explanation
follows of how the circuit in Figure 3 works.
The operational amplifier is fed the
difference in voltages V1
- V2
at the top of
the two emitter-leg resistors of value RE
. This difference is amplified by the op amp and fed to the base of output
transistor Q2. If the collector base reverse bias on Q
2is increased by increasing the applied voltage V
A, the current in
Q2
increases, increasing V2
and decreasing the difference V1
- V2
entering the op amp. Consequently, the base
voltage of Q2
is decreased, and VBE
of Q2
decreases, counteracting the increase in output current.
http://en.wikipedia.org/w/index.php?title=MOSFET%23Modes_of_operationhttp://en.wikipedia.org/w/index.php?title=Negative_feedbackhttp://en.wikipedia.org/w/index.php?title=Negative_feedbackhttp://en.wikipedia.org/w/index.php?title=File%3AGain-assisted_current_mirror.svg -
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Current mirror 16
Figure 4: MOSFET version of wide-swing current mirror; M1
and M2
are in active
mode, while M3
and M4
are in Ohmic mode and act like resistors
If the op amp gain Av
is large, only a very
small difference V1
- V2
is sufficient to
generate the needed base voltage VB
for Q2,
namely
Consequently, the currents in the two leg
resistors are held nearly the same, and the
output current of the mirror is very nearly
the same as the collector current IC1
in Q1,
which in turn is set by the reference current
as
where 1
for transistor Q1
and 2
for Q2
differ due to the Early effect if the reversebias across the collector-base of Q
2is
non-zero.
Figure 5: Small-signal circuit to determine output resistance of mirror; transistor Q2
is replaced with its hybrid-pi model; a test currentIX
at the output generates a
voltage VX
, and the output resistance isRout
= VX/I
X.
Output resistance
An idealized treatment of output resistance is given in the footnote.[8]
A small-signal analysis for an op amp with
finite gainAv
but otherwise ideal is based upon Figure 5 (, rO
and r
refer to Q2). To arrive at Figure 5, notice that
the positive input of the op amp in Figure 3 is at AC ground, so the voltage input to the op amp is simply the AC
emitter voltage Ve
applied to its negative input, resulting in a voltage output of AvV
e. Using Ohm's law across the
input resistance r
determines the small-signal base currentIb
as:
Combining this result with Ohm's law forRE, Ve can be eliminated, to find:[9]
http://en.wikipedia.org/w/index.php?title=Ohm%27s_lawhttp://en.wikipedia.org/w/index.php?title=File%3AMirror_output_resistance.PNGhttp://en.wikipedia.org/w/index.php?title=Hybrid-pi_modelhttp://en.wikipedia.org/w/index.php?title=Early_effecthttp://en.wikipedia.org/w/index.php?title=File%3AWide-swing_MOSFET_mirror.svg -
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Current mirror 17
Kirchhoff's voltage law from the test sourceIX
to the ground ofRE
provides:
Substituting forIb
and collecting terms the output resistanceRout
is found to be:
For a large gainAv>> r
/ R
Ethe maximum output resistance obtained with this circuit is
a substantial improvement over the basic mirror whereRout
= rO
.
The small-signal analysis of the MOSFET circuit of Figure 4 is obtained from the bipolar analysis by setting = gm
r
in the formula forRout
and then letting r
. The result is
This time, RE is the resistance of the source-leg MOSFETs M3, M4. Unlike Figure 3, however, as Av is increased(holdingR
Efixed in value),R
outcontinues to increase, and does not approach a limiting value at largeA
v.
Compliance voltage
For Figure 3, a large op amp gain achieves the maximumRout
with only a small RE
. A low value for RE
means V2
also is small, allowing a low compliance voltage for this mirror, only a voltage V2
larger than the compliance voltage
of the simple bipolar mirror. For this reason this type of mirror also is called a wide-swing current mirror, because it
allows the output voltage to swing low compared to other types of mirror that achieve a large Rout
only at the
expense of large compliance voltages.
With the MOSFET circuit of Figure 4, like the circuit in Figure 3, the larger the op amp gain Av, the smallerR
Ecan
be made at a givenRout, and the lower the compliance voltage of the mirror.
Other current mirrors
There are many sophisticated current mirrors that have higher output resistances than the basic mirror (more closely
approach an ideal mirror with current output independent of output voltage) and produce currents less sensitive to
temperature and device parameter variations and to circuit voltage fluctuations. These multi-transistor mirror circuits
are used both with bipolar and MOS transistors. These circuits include:
the Widlar current source
the Wilson current source
the Cascoded current sources
http://en.wikipedia.org/w/index.php?title=Wilson_current_sourcehttp://en.wikipedia.org/w/index.php?title=Widlar_current_sourcehttp://en.wikipedia.org/w/index.php?title=Design_for_manufacturability_%28IC%29http://en.wikipedia.org/w/index.php?title=Output_impedancehttp://en.wikipedia.org/w/index.php?title=Kirchhoff%27s_voltage_law -
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Current mirror 18
Notes
[1] Paul R. Gray, Paul J. Hurst, Stephen H. Lewis, Robert G. Meyer (2001).Analysis and Design of Analog Integrated Circuits(Fourth Edition
ed.). New York: Wiley. p. 308309. ISBN 0471321680.
[2] Keeping the output resistance high means more than keeping the MOSFET in active mode, because the output resistance of real MOSFETs
only begins to increase on entry into the active region, then rising to become close to maximum value only when VDG
0 V.
[3] R. Jacob Baker (2010). CMOS Circuit Design, Layout and Simulation(Third ed.). New York: Wiley-IEEE. pp. 297, 9.2.1 and Figure 20.28,
p. 636. ISBN 978-0-470-88132-3.[4] NanoDotTek Report NDT14-08-2007, 12 August 2007 (http://www.nanodottek. com/NDT14_08_2007. pdf)
[5] R. Jacob Baker. 20.2.4 pp. 645646. ISBN 978-0-470-88132-3.
[6] Ivanov VI and Filanovksy IM (2004). Operational amplifier speed and accuracy improvement: analog circuit design with structural
methodology(http://books. google. com/books?id=IuLsny9wKIIC& pg=PA110&dq=gain+boost+wide++"current+mirror"#PPA107,M1)
(The Kluwer international series in engineering and computer science, v. 763 ed.). Boston, Mass.: Kluwer Academic. p. 6.1, p. 105108.
ISBN 1-4020-7772-6. .
[7] W. M. C. Sansen (2006).Analog design essentials. New York ; Berlin: Springer. p. 0310, p. 93. ISBN 0-387-25746-2.
[8] An idealized version of the argument in the text, valid for infinite op amp gain, is as follows. If the op amp is replaced by a nullor, voltage V2
= V1, so the currents in the leg resistors are held at the same value. That means the emitter currents of the transistors are the same. If the V
CBof
Q2
increases, so does the output transistor because of the Early effect: = 0
( 1 + VCB
/ VA
). Consequently the base current to Q2
given by
IB
=IE/ ( + 1) decreases and the output currentI
out=I
E/ (1 + 1 / ) increases slightly because increases slightly. Doing the math,
where the transistor output resistance is given by rO
= ( VA
+ VCB
) /Iout
. That is, the ideal mirror resistance for the
circuit using an ideal op amp nullor isRout
= ( + 1 ) rO
, in agreement with the value given later in the text when the
gain .
[9] Notice that asAv , V
e 0 andI
bI
X.
References
External links Patent (1968) by RJ Widlar:Biasing scheme especially suited for integrated circuits(http://www.google.com/
patents?hl=en&id=IhlMAAAAEBAJ&dq=+"Biasing+scheme+especially+suited+for+ integrated+circuits"&
printsec=frontcover&source=web&ots=Oq1T4owqMu&sig=oYenqTCaZip9QTcLwVjIcOgIc-U&sa=X&
oi=book_result&resnum=4&ct=result#PPP3,M1)
Current mirrors (http://www.google.bg/search?hl=en&source=hp&biw=1266&bih=641&q=current+
mirror&oq=current+mirror&aq=f&aqi=g10&aql=&gs_sm=e&
gs_upl=1781l6281l0l14l14l0l3l3l0l328l2455l0.4.6. 1)
4QD tec - Current sources and mirrors (http://www.4qdtec.com/csm. html) Compendium of circuits and
descriptions
http://www.4qdtec.com/csm.htmlhttp://www.google.bg/search?hl=en&source=hp&biw=1266&bih=641&q=current+mirror&oq=current+mirror&aq=f&aqi=g10&aql=&gs_sm=e&gs_upl=1781l6281l0l14l14l0l3l3l0l328l2455l0.4.6.1http://www.google.bg/search?hl=en&source=hp&biw=1266&bih=641&q=current+mirror&oq=current+mirror&aq=f&aqi=g10&aql=&gs_sm=e&gs_upl=1781l6281l0l14l14l0l3l3l0l328l2455l0.4.6.1http://www.google.bg/search?hl=en&source=hp&biw=1266&bih=641&q=current+mirror&oq=current+mirror&aq=f&aqi=g10&aql=&gs_sm=e&gs_upl=1781l6281l0l14l14l0l3l3l0l328l2455l0.4.6.1http://www.google.com/patents?hl=en&id=IhlMAAAAEBAJ&dq=+%22Biasing+scheme+especially+suited+for+integrated+circuits%22&printsec=frontcover&source=web&ots=Oq1T4owqMu&sig=oYenqTCaZip9QTcLwVjIcOgIc-U&sa=X&oi=book_result&resnum=4&ct=result#PPP3,M1http://www.google.com/patents?hl=en&id=IhlMAAAAEBAJ&dq=+%22Biasing+scheme+especially+suited+for+integrated+circuits%22&printsec=frontcover&source=web&ots=Oq1T4owqMu&sig=oYenqTCaZip9QTcLwVjIcOgIc-U&sa=X&oi=book_result&resnum=4&ct=result#PPP3,M1http://www.google.com/patents?hl=en&id=IhlMAAAAEBAJ&dq=+%22Biasing+scheme+especially+suited+for+integrated+circuits%22&printsec=frontcover&source=web&ots=Oq1T4owqMu&sig=oYenqTCaZip9QTcLwVjIcOgIc-U&sa=X&oi=book_result&resnum=4&ct=result#PPP3,M1http://www.google.com/patents?hl=en&id=IhlMAAAAEBAJ&dq=+%22Biasing+scheme+especially+suited+for+integrated+circuits%22&printsec=frontcover&source=web&ots=Oq1T4owqMu&sig=oYenqTCaZip9QTcLwVjIcOgIc-U&sa=X&oi=book_result&resnum=4&ct=result#PPP3,M1http://en.wikipedia.org/w/index.php?title=Nullorhttp://en.wikipedia.org/w/index.php?title=Early_effecthttp://en.wikipedia.org/w/index.php?title=Nullorhttp://books.google.com/books?id=IuLsny9wKIIC&pg=PA110&dq=gain+boost+wide++%22current+mirror%22#PPA107,M1http://www.nanodottek.com/NDT14_08_2007.pdf -
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Differential amplifier 19
Differential amplifier
Differential amplifier symbolThe inverting and
non-inverting inputs are distinguished by "" and
"+" symbols (respectively) placed in the amplifier
triangle. Vs+ and Vs are the power supply
voltages; they are often omitted from the diagram
for simplicity, but of course must be present in
the actual circuit.
A differential amplifier is a type of electronic amplifier that amplifies
the difference between two voltages but does not amplify the particular
voltages.
Theory
Many electronic devices use differential amplifiers internally. The
output of an ideal differential amplifier is given by:
Where and are the input voltages and is the differential
gain.
In practice, however, the gain is not quite equal for the two inputs. This
means, for instance, that if and are equal, the output will not
be zero, as it would be in the ideal case. A more realistic expression for
the output of a differential amplifier thus includes a second term.
is called the common-mode gain of the amplifier.
As differential amplifiers are often used to null out noise or bias-voltages that appear at both inputs, a low
common-mode gain is usually desired.
The common-mode rejection ratio (CMRR), usually defined as the ratio between differential-mode gain and
common-mode gain, indicates the ability of the amplifier to accurately cancel voltages that are common to bothinputs. The common-mode rejection ratio is defined as:
In a perfectly symmetrical differential amplifier, is zero and the CMRR is infinite. Note that a differential
amplifier is a more general form of amplifier than one with a single input; by grounding one input of a differential
amplifier, a single-ended amplifier results.
Long-tailed pair
Historical background
The long-tailed pair was originally implemented using a pair of vacuum tubes. The circuit works the same way for
all three-terminal devices with current gain. Today, its main feature is mostly vestigial, by virtue of the fact that
long-tail resistor circuit bias points are largely determined by Ohm's Law and less so by active component
characteristics.
The long-tailed pair was developed from earlier knowledge of push-pull circuit techniques and measurement
bridges.[1]
The earliest circuit that is truly recognizable as a long-tailed pair in its conventional form is given by
Matthews (1934)[2]
and the same circuit form appears in a patent submitted by Alan Blumlein in 1936.[3]
By the end
of the 1930s the topology was well established and had been described by various authors including Offner (1937),[4]
Schmitt (1937)[5]
and Toennies (1938) and It was particularly used for detection and measurement of physiologicalimpulses.
[6]
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Differential amplifier 20
The long-tailed pair was very successfully used in early British computing, most notably the Pilot ACE Model and
descendants,[7]
Wilkes' EDSAC, and probably others designed by people who worked with Blumlein or his peers.
The long-tailed pair has many attributes as a switch: largely immune to tube (transistor) variations (of great
importance when machines contained 1,000 or more tubes), high gain, gain stability, high input impedance,
medium/low output impedance, good clipper (with not-too-long tail), non-inverting (EDSAC contained no
inverters!) and large output voltage swings. One disadvantage is that the output voltage swing (typically 1020 V)
was imposed upon a high DC voltage (200 V or so), requiring care in signal coupling, usually some form of
wide-band DC coupling. Many computers of this time tried to avoid this problem by using only AC-coupled pulse
logic, which made them very large and overly complex (ENIAC: 18,000 tubes for a 20 digit calculator) or unreliable.
DC-coupled circuitry became the norm after the first generation of vacuum tube computers.
Configurations
A differential (long-tailed,[8]
emitter-coupled) pair amplifier consists of two amplifying stages with common
(emitter, source or cathode) degeneration.
Differential output
Figure 2: A classic long-tailed pair
With two inputs and two outputs, this forms a differential amplifier
stage (Fig. 2). The two bases (or grids or gates) are inputs which are
differentially amplified (subtracted and multiplied) by the pair; they
can be fed with a differential (balanced) input signal, or one input
could be grounded to form a phase splitter circuit. An amplifier with
differential output can drive floating load or another stage with
differential input.
Single-ended output
If the differential output is not desired, then only one output can be
used (taken from just one of the collectors (or anodes or drains),
disregarding the other output without a collector resistor; this
configuration is referred to as single-ended output. The gain is half that
of the stage with differential output. To avoid sacrificing gain, a
differential to single-ended converter can be utilized. This is often
implemented as a current mirror (Fig. 3).
Operation
To explain the circuit operation, four particular modes are isolated below although, in practice, some of them act
simultaneously and their effects are superimposed.
Biasing
In contrast with classic amplifying stages that are biased from the side of the base (and so they are highly
-dependent), the differential pair is directly biased from the side of the emitters by sinking/injecting the total
quiescent current. The series negative feedback (the emitter degeneration) makes the transistors act as voltage
stabilizers; it forces them to adjust their VBE
voltages (base currents) so that to pass the quiescent current through
their collector-emitter junctions.[9]
So, due to the negative feedback, the quiescent current depends slightly on the
transistor's .
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Differential amplifier 21
The biasing base currents needed to evoke the quiescent collector currents usually come from the ground, pass
through the input sources and enter the bases. So, the sources have to be galvanic (DC) to ensure paths for the
biasing currents and low resistive enough to not create significant voltage drops across them. Otherwise, additional
DC elements should be connected between the bases and the ground (or the positive power supply).
Common mode
At common mode (the two input voltages change in the same directions), the two voltage (emitter) followers
cooperate with each other working together on the common high-resistive emitter load (the "long tail"). They all
together increase or decrease the voltage of the common emitter point (figuratively speaking, they together "pull up"
or "loose" it so that it moves). In addition, the dynamic load "helps" them by changing its instant ohmic resistance in
the same direction as the input voltages (it increases when the voltage increases and vice versa.) thus keeping up
constant total resistance between the two supply rails. There is a full (100%) negative feedback; the two input base
voltages and the emitter voltage change simultaneously while the collector currents and the total current do not
change. As a result, the output collector voltages do not change as well.
Differential mode
Normal. At differential mode (the two input voltages change in opposite directions), the two voltage (emitter)
followers oppose each other - while one of them tries to increase the voltage of the common emitter point, the other
tries to decrease it (figuratively speaking, one of them "pulls up" the common point while the other "looses" it so that
it stays immovable) and v.v. So, the common point does not change its voltage; it behaves like a virtual ground with
a magnitude determined by the common-mode input voltages. The high-resistive emitter element does not play any
role since it is shunted by the other low-resistive emitter follower. There is no negative feedback since the emitter
voltage does not change at all when the input base voltages change. he common quiescent current vigorously steers
between the two transistors and the output collector voltages vigorously change. The two transistors mutually ground
their emitters; so, although they are common-collector stages, they actually act as common-emitter stages with
maximum gain. Bias stability and independence from variations in device parameters can be improved by negativefeedback introduced via cathode/emitter resistors with relatively small resistances.
Overdriven. If the input differential voltage changes significantly (more than about a hundred millivolts), the
base-emitter junction of the transistor driven by the lower input voltage becomes backward biased and its collector
voltage reaches the positive supply rail. The other transistor (driven by the higher input voltage) saturates and its
collector voltage begins following the input one. This mode is used in differential switches and ECL gates.
Breakdown. If the input voltage continues increasing and exceeds the base-emitter breakdown voltage, the
base-emitter junction of the transistor driven by the lower input voltage breaks down. If the input sources are low
resistive, an unlimited current will flow directly through the "diode bridge" between the two input sources and will
damage them.
At common mode, the emitter voltage follows the input voltage variations; there is a full negative feedback and the
gain is minimum. At differential mode, the emitter voltage is fixed (equal to the instant common input voltage); there
is no negative feedback and the gain is maximum.
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Differential amplifier 22
Single-ended input
The differential pair can be used as an amplifier with a single-ended input if one of the inputs is grounded or fixed to
a reference voltage (usually, the other collector is used as a single-ended output) This arrangement can be thought as
of cascaded common-collector and common-base stages or as a buffered common-base stage.[10]
The emitter-coupled amplifier is compensated for temperature drifts, VBE
is cancelled, Miller effect and transistor
saturation are beated. That is why it is used to form emitter-coupled amplifiers (avoiding Miller effect), phase splittercircuits (obtaining two inverse voltages), ECL gates and switches (avoiding transistor saturation), etc.
Improvements
Emitter constant current source
Figure 3: An improved long-tailed pair with
current-mirror load and constant-current biasing
The quiescent current has to be constant to ensure constant collector
voltages at common mode. This requirement is not so important in the
case of a differential output since the two collector voltages will vary
simultaneously but their difference (the output voltage) will not vary;
only the output range will decrease. But in the case of a single-ended
output, it is extremely important to keep a constant current since the
output collector voltage will vary. Thus the higher the resistance of the
current source , the lower is, and the better the CMRR. The
constant current needed can be produced by connecting an element
(resistor) with very high resistance between the shared emitter node
and the supply rail (negative for NPN and positive for PNP transistors)
but this will require high supply voltage. That is why, in more
sophisticated designs, an element with high differential (dynamic)
resistance approximating a constant current source/sink is substituted for the long tail (Fig. 3). It is usually
implemented by a current mirror because of its high compliance voltage (small voltage drop across the output
transistor).
The same arrangement is widely used in cascode circuits as well. It can be generalized by an equivalent circuit
consisting of a constant current source loaded by two connected in parallel voltage sources with equal voltages. The
current source determines the common current flowing through the voltage sources while the voltage sources fix the
voltage across the current source. The emitter current source is usually implemented as a common-emitter transistor
stage with constant base voltage driving with current the two common-base transistor stages. So, this arrangement
can be considered as a cascode consisting of cascaded common-emitter and common-base stages.
Collector current mirrorThe collector resistors can be replaced by a current mirror, whose output part acts as an active load (Fig. 3). Thus the
differential collector current signal is converted to a single ended voltage signal without the intrinsic 50% losses and
the gain is extremely increased. This is achieved by copying the input collector current from the right to the left side
where the magnitudes of the two input signals add. For this purpose, the input of the current mirror is connected to
the right output and the output of the current mirror is connected to the left output of the differential amplifier.
The current mirror inverts the right collector current and tries to pass it through the left transistor that produces the
left collector current. In the middle point between the two left transistors, the two signal currents (current changes)
are subtracted. In this case (differential input signal), they are equal and opposite. Thus, the difference is twice the
individual signal currents (I - (-I) = 2I) and the differential to single ended conversion is completed without gain
losses.
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Differential amplifier 23
Interfacing considerations
Floating input source
It is possible to connect a floating source between the two bases, but it is necessary to ensure paths for the biasing
base currents. In the case of galvanic source, only one resistor has to be connected between one of the bases and the
ground. The biasing current will enter directly this base and indirectly (through the input source) the other one. If the
source is capacitive, two resistors have to be connected between the two bases and the ground to ensure different
paths for the base currents.
Input/output impedance
The input impedance of the differential pair highly depends on the input mode. At common mode, the two parts
behave as common-collector stages with high emitter loads; so, the input impedances are extremely high. At
differential mode, they behave as common-emitter stages with grounded emitters; so, the input impedances are low.
The output impedance of the differential pair is high (especially for the improved differential pair from Fig. 3).
Input/output range
The common-mode input voltage can vary between the two supply rails but cannot closely reach them since some
voltage drops (minimum 1 volt) have to remain across the output transistors of the two current mirrors.
Other differential amplifiers
Figure 4: Op-amp differential amplifier
An operational amplifier, or op-amp, is a
differential amplifier with very high
differential-mode gain, very high input
impedances, and a low output impedance. By
applying negative feedback an op-ampdifferential amplifier (Fig. 4) with predictable
and stable gain can be built.[11]
Some kinds of
differential amplifier usually include several
simpler differential amplifiers. For example, an
instrumentation amplifier, a fully differential
amplifier, an instrument amplifier, or an
isolation amplifier are often built from several
op-amps.
Applications
Differential amplifiers are found in many circuits that utilise series negative feedback (op-amp follower,
non-inverting amplifier, etc.), where one input is used for the input signal, the other for the feedback signal (usually
implemented by operational amplifiers). For comparison, the old-fashioned inverting single-ended op-amps from the
early 40's could realize only parallel negative feedback by connecting additional resistor networks (an op-amp
inverting amplifier is the most popular example). A common application is for the control of motors or servos, as
well as for signal amplification applications. In discrete electronics, a common arrangement for implementing a
differential amplifier is the long-tailed pair, which is also usually found as the differential element in most op-amp
integrated circuits. A long-tailed pair can be used as an analog multiplier with the differential voltage as one input
and the biasing current as another.
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Differential amplifier 24
A differential amplifier is used as the input stage emitter coupled logic gates and as switch. When used as a switch,
the "left" base/grid is used as signal input and the "right" base/grid is grounded; output is taken from the right
collector/plate. When the input is zero or negative, the output is close to zero (but can be not saturated); when the
input is positive, the output is most-positive, dynamic operation being the same as the amplifier use described above.
Footnotes[1] Eglin, J. M.A Direct Current Amplifier for Measuring Small Currents. Journal of the Optical Society of America and Review of Scientific
Instruments, May 1929, p.393-402.
[2] Matthews, B. H. C.A Special Purpose Amplifier. The Journal of Physiology, March 17, 1934, 81, 28P-29P.
[3][3] Blumlein, A. D. UK Patent No: 482740; July 4, 1936. US Patent 2185367; filed June 24, 1937
[4] Offner, F.Push-Pull Resistance Coupled Amplifiers. Review of Scientific Instruments, January 1937, p.20-21.
[5] Schmitt, O. H. Cathode Phase Inversion. Review of Scientific Instruments, 1937, p.100-101.
[6] Geddes, L. A. Who Invented the Differential Amplifier?. IEEE Engineering in Medicine and Biology, May/June 1996, p.116-117.
[7][7] Details of the long-tailed pair circuitry used in early computing can be found in "Alan Turing's Automatic Computing Engine" (Oxford
University Press, 2005, ISBN 0-19-856593-3) in Part IV, 'ELECTRONICS'
[8] Long-tail is a figurative name of high resistance that represents the high emitter resistance at common mode with a common long tail with a
proportional length (at differential mode this tail shortens up to zero). If additional emitter resistors with small resistances are included
between the emitters and the common node (to introduce a small negative feedback at differential mode), they can be figuratively representedby short tails.
[9][9] It is interesting fact that the negative feedback as though has reversed the transistor behavior - the collector current has become an input
quantity while the base current serves as an output one.
[10][10] More generally, this arrangement can be considered as two interacting voltage followers with negative feedback: the output part of the
differential pair acts as a voltage follower with constant input voltage (a voltage stabilizer) producing constant output voltage; the input part
acts as a voltage follower with varying input voltage trying to change the steady output voltage of the stabilizer. The stabilizer reacts to this
intervention by changing its output quantity (current, respectively voltage) that serves as a circuit output.
[11] It seems strange that, in this arrangement, a high-gain differential amplifier (op-amp) is used as a component to build a low-gain differential
amplifier like a high-gain inverting amplifier (op-amp) serves as a component in a low-gain inverting amplifier; but just this paradox of
negative feedback amplifiers has impeded Harold Black to obtain his patent.
References
External links
BJT Differential Amplifier (http://www.ecircuitcenter.com/Circuits/BJT_Diffamp1/BJT_Diffamp1.htm)
Circuit and explanation
A testbench for differential circuits (http://www.designers-guide.org/Analysis/diff.pdf)
A discrete OpAmp with complimentary differential amplifier (http://gaedtke.name/SubMenu_Verstaerker/
KompDiffAmp.html) (in German)
Application Note: Terminating a Differential Amplifier in Single-Ended Input Applications (http://www.analog.
com/
static/
imported-files/
application_notes/
AN-0990.pdf)
http://www.analog.com/static/imported-files/application_notes/AN-0990.pdfhttp://www.analog.com/static/imported-files/application_notes/AN-0990.pdfhttp://gaedtke.name/SubMenu_Verstaerker/KompDiffAmp.htmlhttp://gaedtke.name/SubMenu_Verstaerker/KompDiffAmp.htmlhttp://www.designers-guide.org/Analysis/diff.pdfhttp://www.ecircuitcenter.com/Circuits/BJT_Diffamp1/BJT_Diffamp1.htmhttp://en.wikipedia.org/w/index.php?title=Harold_Blackhttp://en.wikipedia.org/w/index.php?title=Operational_amplifier_applications%23Inverting_amplifierhttp://en.wikipedia.org/w/index.php?title=Emitter_coupled_logic -
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Operational amplifier 25
Operational amplifier
A Signetics a741 operational amplifier, one of the most successful op-amps.
An operational amplifier ("op-amp") is a
DC-coupled high-gain electronic voltage
amplifier with a differential input and,
usually, a single-ended output.[1] An op-amp
produces an output voltage that is typically
hundreds of thousands times larger than the
voltage difference between its input
terminals.[2]
Operational amplifiers are important
building blocks for a wide range of
electronic circuits. They had their origins in
analog computers where they were used in
many linear, non-linear andfrequency-dependent circuits. Their
popularity in circuit design largely stems from the fact that characteristics of the final op-amp circuits with negative
feedback (such as their gain) are set by external components with little dependence on temperature changes and
manufacturing variations in the op-amp itself.
Op-amps are among the most widely used electronic devices today, being used in a vast array of consumer,
industrial, and scientific devices. Many standard IC op-amps cost only a few cents in moderate production volume;
however some integrated or hybrid operational amplifiers with special performance specifications may cost over
$100 US in small quantities. Op-amps may be packaged as components, or used as elements of more complex
integrated circuits.
The op-amp is one type of differential amplifier. Other types of differential amplifier include the fully differential
amplifier (similar to the op-amp, but with two outputs), the instrumentation amplifier (usually built from three
op-amps), the isolation amplifier (similar to the instrumentation amplifier, but with tolerance to common-mode
voltages that would destroy an ordinary op-amp), and negative feedback amplifier (usually built from one or more
op-amps and a resistive feedback network).
Circuit notation
Circuit diagram symbol for an op-amp
The circuit symbol for an op-amp is shown to the right, where:
V+: non-inverting input
V: inverting input
Vout
: output
VS+
: positive power supply
VS
: negative power supply
The power supply pins (VS+
and VS
) can be labeled in different ways
(See IC power supply pins). Despite different labeling, the function
remains the same to provide additional power for amplification of
the signal. Often these pins are left out of the diagram for clarity, and
the power configuration is described or assumed from the circuit.
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Operational amplifier 26
Operation
An op-amp without negative feedback (a
comparator)
The amplifier's differential inputs consist of a V+
input and a V
input,
and ideally the op-amp amplifies only the difference in voltage
between the two, which is called the differential input voltage. The
output voltage of the op-amp is given by the equation,
where V+
is the voltage at the non-inverting terminal, V
is the voltage
at the inverting terminal andAOL
is the open-loop gain of the amplifier
(the term "open-loop" refers to the absence of a feedback loop from the
output to the input).
The magnitude of AOL
is typically very large10,000 or more for
integrated circuit op-ampsand therefore even a quite small difference
between V+
and V
drives the amplifier output nearly to the supply
voltage. This is called saturation of the amplifier. The magnitude of
AOL is not well controlled by the manufacturing process, and so it is impractical to use an operational amplifier as a
stand-alone differential amplifier. Without negative feedback, and perhaps with positive feedback for regeneration,
an op-amp acts as a comparator. If the inverting input is held at ground (0 V) directly or by a re