tms320 c6xx
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TMS320C6xxDr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004
Architecture
C6xx
2
'C6x - System Block Diagram
PERIPHERALS
On Chip Ex. Memory
Internal BusesOff Chip
Ex. Memory
CPU
.D1.M1.L1
.S1
.D2.M2.L2
.S2
Regs (B
0-B15)
Regs (A
0-A15)
Control Regs
Harvard
PC
4
'C6x - System Block Diagram
32/6432/64
256
32/64
32/6432/64
32
I/O
Mappatein memoria
Mappatein memoria
5
'C6x - Peripherals
On Chip
Off Chip
Each of these peripherals has a module dedicated to them and each of these can exist
on the C6x
6
EMIFclk1
clk2
clk3
Ad1
Ad2
Ad3clk0
7
Memory Size per deviceDevices Internal EMIF A EMIF B
C6201, C6701C6204, C6205
P = 64 kBD = 64 kB
52M Bytes (32-bits wide)
N/AC6202 P = 256 kBD = 128 kB
C6203 P = 384 kBD = 512 kB
C6211C6711 L1P = 4 kB
L1D = 4 kBL2 = 64 kB
128M Bytes (32-bits wide)
N/A
C6712 64M Bytes (16-bits wide)
C6713 L1P = 4 kBL1D = 4 kBL2 = 256 kB
128M Bytes (32 - bits wide) N/A
C6411DM642
L1P = 16 kBL1D = 16 kBL2 = 256 kB
128M Bytes (32-bits wide) N/A
C6414C6415C6416
L1P = 16 kBL1D = 16 kBL2 = 1 MB
256M Bytes (64-bits wide)
64M Bytes (16-bits wide)
HARVARD Off Chip Memory
SlowFast
8
HPI / XBUS / PCI
9
McBSP/ASP and Utopia
Bus I2C: Protocollo Seriale Sincrono (due linee bidirezionali, clock e dati sincroni, più la massa)ATM: Asynchronous Transfer Mode
10
GPIO
• LED• SWITCH
11
DMA / EDMA
12
Timer / Counter
13
Ethernet
14
Video Ports
15
VCP / TCP - 3G Wireless
16
Phase Locked Loop (PLL)
17
Clock Cycle
x8
18
C6713 Architecture
19
C6713-DSK Architecture
20
CPLDs
21
C6416Architecture
22
C6416-DSK Architecture
Slow
Fast
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