stability and passivity of the super node algorithm for em modelling of ics
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Stability and Passivity of the Super Node Algorithm
for EM modelling of ICs
Maria UgryumovaSupervisor: Wil SchildersTechnical University Eindhoven,The Netherlands
CASA day, 13 November 2008
Outline
1. Motivation
2. Fasterix and EM simulation
3. System parameters
4. Super Node Algorithm
5. Numerical example
6. Passivity enforcement
7. Conclusions
1
• From the original model to the reduced one
• Realization
Outline
1. Motivation
2. Fasterix and EM simulation
3. System parameters
4. Super Node Algorithm
5. Numerical example
6. Passivity enforcement
7. Conclusions
1
• From the original model to the reduced one
• Realization
Motivation
Solution
EM tools Model Order Reduction
• increasing IC complexity
• smaller feature sizes
• higher frequencies
• multilayer structure
• electromagnetic effects
2
65 nm – 45 nm
1.06 GHz – 3.33 GHz
9 layers
Intel CoreTM2 Processors
84 10 transistors
Fasterix – layout simulation tool for EMmodelling (NXP) properties of ICs
Motivation
• program simulator PSTAR (NXP)
• radiated EM fields
3
Model Order Reduction:
Super Node Algorithm
Motivating example
Time response of the lowpass filter model (300 unknowns). Why is it unstable?
• What is the reason of instability?• How can we avoid the instability?
Key questions?
4
unstable
Outline
1. Motivation
2. Fasterix and EM simulation
3. System parameters
4. Super Node Algorithm
5. Numerical example
6. Passivity enforcement
7. Conclusions
5
• From the original model to the reduced one
• Realization
How Fasterix works
6
• Initial data (coordinates, pins, metal, max. frequency, etc.)
• Geometry preprocessor;
[Du Cloux 1993], [Wachters, Schilders 1997]
1. 2.
How Fasterix works
0
0
'
0
'
EdxG
iJ
EJdxGiJ
A
, ,0
)( ,
xnJ
xVx Vfixed
2
1
0
( ) - charge density
( ) - scalar potential
( ) - current density
- irradiation; - permeability
- permittivity; - conductivity
div
L
H
J H
E
7
• Initial data (coordinates, pins, metal, max. frequency, etc.)
• Geometry preprocessor; BVP
• Full RLC circuit – inefficient!
3.
[Du Cloux 1993], [Wachters, Schilders 1997]
• Initial data (coordinates, pins, metal, max. frequency, etc.)
• Geometry preprocessor; BVP
• Full RLC circuit – inefficient!
• Super nodes are defined
• Reduced RLC circuit - efficient!
How Fasterix works
8
4. 5.
Super node
algorithm
[Du Cloux 1993], [Wachters, Schilders 1997]
Outline
1. Motivation
2. Fasterix and EM simulation
3. System parameters
4. Super Node Algorithm
5. Passivity enforcement
6. Numerical examples
7. Conclusions
9
• From the original model to the reduced one
• Realization
System parameters
1
1
( )n
T io i
i i
RH s B G sC B
s
lims
• Transfer function
– residuals – poles
• Poles are for which C
| ( ) |H s or det( ) 0G C
i.e. poles are eigenvalues of Gx Cx
10
i
( )
( ) ( )
i
To
dC x Gx B u t
dt
y t B x t
• Linear time invariant system
iR
pole , , then Re( ) 0
11
System parameters
• Passive positive real:
H(s) is analytic for Re(s)>0 *( ) ( ) 0 for Re(s)>0H s H s
( )H s
Passive systems
• dissipate power delivered through input and output ports
• synthesizable with positive R,L,C and transformers [Brune ‘31]
Stable •
Outline
1. Motivation
2. Fasterix and EM simulation
3. System parameters
4. Super Node Algorithm
5. Numerical example
6. Passivity enforcement
7. Conclusions
12
• From the original model to the reduced one
• Realization
0 0
0 0T
G C
R P L Is
P C V J
1( ) TP R sL P sCJ s V
I - current in the branchesV – voltage in the nodesJ – currents, floating into the sys. through the nodes G – positive real, C – positive definite
• Voltage to current transfer:
Admittance matrix
• Kirchhoff equations
SNA: original (non-reduced) RLC model
• Y(s) is stable and positive real Re( ( , )) 0R L
givenunknown
13
( )Y s
( ) ( ) 0HY s Y s
(( )) n nYJ Vss
SNA: Model Order Reduction
Super Node Algorithm (SNA)
) )( (k kY sJ s V
21 kY YY
1. Elimination of non-super nodes:
2. Two steps of approximations
3. Realization of the circuit
1nY Y
14
Generated by BEM
port
1
port
2port
1
port
2
0 0 (1)
0 0T
R P L Is
P C V J
1. SNA: Elimination of non-super nodes• Kirchhoff equations
• Partitioning
''
' ' '
' 0 '
NN NNN N
N N N N
C CN NV J P P P C
C CN N
R, L, C – positive definite
N – super nodesN’ – all other nodes
15
• •
•
1nY Y
0 0 (1)
0 0T
R P L Is
P C V J
'
'
' ' ' ' '
0 0 0
0 0 0
0 0 0 0
N NT
N NN NN N NT T
N NN N N N
R P P L I
P s C C V J
P C C V
• Kirchhoff equations
• Partitioning
''
' ' '
' 0 '
NN NNN N
N N N N
C CN NV J P P P C
C CN N
• Substitution into (1)
R, L, C – positive definite
N – super nodesN’ – all other nodes
15
• •
•
1. SNA: Elimination of non-super nodes 1nY Y
0 0 (1)
0 0T
R P L Is
P C V J
'
' ' ' ' '
'
0
0 0N N
NTN N N N N N
xG C Bi
TN N NN NN N
Bo
R P L I Ps V
P C V sC
J P sC x sC V
1( ) ( )T
o iN NNNB s G s BJ C s VsC
• Kirchhoff equations
• Partitioning
''
' ' '
' 0 '
NN NNN N
N N N N
C CN NV J P P P C
C CN N
• Substitution into (1)
• - Schur complement of• stable: eig(-G,C)<0• positive real
R, L, C – positive definite
N – super nodesN’ – all other nodes
16
1( )Y s
• •
•
1. SNA: Elimination of non-super nodes 1nY Y
1Y nY
G – positive real, C – positive definite
Sketch of the proof: - positive real
1. Stable: Re( ( , )) 0G C
1( )Y s
*1 1*
1 * * *
( ) ( )
2 2 0,
T T
T
Y s Y s P R sL P sC P R sL P sC
P R sL R sL R sL R sL P y R L y
4. Lemma If is positive definite matrix then its Schur
complements are positive definite.
n nA C
5. By Lemma, positive definite positive real1( )Y s
2. - Schur complement of
3. Y(s) – positive definite:
1( )Y s 1( ) TP R sLY P sCs
17
0
(( )) n nYJ Vss
2. SNA: Model Order Reduction
Super Node Algorithm (SNA)
) )( (k kY sJ s V
21 kY YY
1. Elimination of non-super nodes:
2. Two steps of approximations
3. Realization of the circuit
1nY Y
18
Generated by BEM
port
1
port
2port
1
port
2
' 0 1
0 1
NV V V
I I I
' 0
' 0
' 1
' ' 0 '' 1
0 (3)
0 0 0 0
00 (4)
0 0 0
N N NT
N
NT
N N N N NN
R P IL P Vs
P V
R P ILs
s C V C VP V
2 0 1 ' 0T
N NN NNY P I I sC V sC
• Under the assumption: , - free-space wave number.
• Pairs found from two systems:
2. SNA: 1st approximation:
0 1k h
1 0V ik h
• If then (1,...,1)NV diag
00( ) :ik h
10( ) :ik h
19
0k
1 0I ik h
21Y Y
'
' ' ' ' '
'
0
0 0N N
NTN N N N N N
xG C Bi
TN N NN NN N
Bo
R P L I Ps V
P C V sC
J P sC x sC V
• stable • not positive real • computation of eigenvalues
• Introducing the null space for , we solve:
2. SNA: 2nd approximation: (details)
0( )ULL N CFTPY I Ys s
'NP
0i
20
2 0 1 ' 0T
N NN NNY P I I sC V sC
' 0
' 0
0
0 0 0 0N N N
TN
R P IL P Vs
P V
' 0
0 0
0
TNP I
I I
1
0 ( )T TN NI R sL P V
1
( )n
lC
l lFULL
HsY
sY s
2Y Y
high freq. range
Yc – indefinite!
• •
In the pole-residual form:•
SNA: Comparison of the approximations
• All approximations match well• Capacitances start influence at high frequencies
21
0.5 GHz
Outline
1. Motivation
2. Fasterix and EM simulation
3. System parameters
4. Super Node Algorithm
5. Passivity enforcement
6. Numerical examples
7. Conclusions
22
• From the original model to the reduced one
• Realization
(( )) n nYJ Vss
SNA: Model Order Reduction (MOR)
Super Node Algorithm (SNA)
) )( (k kY sJ s V
21 kY YY
1. Elimination of non-super nodes:
2. Two steps of approximations
3.
1nY Y
23
Generated by BEM
kY
• Calculate m<<n eigenvalues
• Choose (m+1) match frequencies
• Solve for
• Circuit elements
, and , 1, 1, , 1, C ij ijy H k m i j N
1
nl
FULL Cl l
HY sY
s
RLC circuit
realization
,
1
( )m
l ijk C ij k
l l k
Hs y y s
s
1 1, , ,, , l l l ij l l ij C ijR H L H C y
i
1
2
3
4 3 5
5
0
min( ) /100
max( ) 10
[ , ]
i
i
s
s
s
s s s
s
24
3. SNA: Realization of the reduced circuit
stablenot positive real
1 1, , ,, , l l l ij l l ij C ijR H L H C y
• N – number of super nodes• m – number of branches between each pair of s.n. l 1, , , 1,m i j N
3. SNA: Realization of the reduced circuit
25
1
ml
FULL Cl l
HY sY
s
RLC circuit
realization
stablenot positive real [Guillemin’68]
• What is the reason of instability in time domain?
Key question?
26
3. SNA: Realization of the reduced circuit
• MNA: dimension of the system ) • Redundancy
2( )O N m
27
1
ml
FULL Cl l
HY sY
s
RLC circuit
realization
stablenot positive real
• N – number of super nodes• m – number of branches between each pair of s.n.
1.0e+006 -0.33075173081148
-0.33075151394768 -0.33075158822141 -0.73063347579307 -0.73063369561798 -0.73063384656739 -0.68099777735205 -0.68099799754699 -0.68099790176943 -0.62258539700220 -0.62258525785232 -0.62258531561929 9.90350498680717 0.00000000000670
1
2
3
4
3.3075e+5
6.8100e+5
7.3063e+5
6.2259e+5
• MNA: finite poles:• Generalized eigenvalues:
• Match frequencies (Fasterix):
Example (Two parallel striplines, 1MHz)
4
1
lRLC C
l l
HY sY
s
sk(1)=0 sk(2)=-526.365 sk(3)=-0.116024e+07 sk(4)=-0.164082e+07sk(5)=-0.232048e+07
0
0 00
T
CG
C BG Ps x u
LP
dim(G,C) 85 x 85
stable notstable
28
RHP
[6 6]lH
How to guarantee that reduced circuit will be described by the same poles?
TheoremSuper node reduced circuit described by Y(s) with n stable poles, in MNA formulation has exactly the same n poles iff all ports: grounded / voltage / current sources [proof in progress]
1
( )n
k
k k
HY s sC
s p
2 2 2 2, kC R H R
11 C,
,
0
1
i
ik
k ij
kk ij
p
pR
H
LH
22 C12C
Two-ports realization
port 1 port 2
29
Outline
1. Motivation
2. Fasterix and EM simulation
3. System parameters
4. Super Node Algorithm
5. Numerical example
6. Passivity enforcement
7. Conclusions
30
• From the original model to the reduced one
• Realization
Example (Lowpass filter, 10e9 Hz)
system Dim sys. R L C Mutual.Ind. Time, sec.
original 257 452 452 2763 50950 754.1
reduced(m=4)
98 19012 19012 19110 0 47.9
31
Outline
1. Motivation
2. Fasterix and EM simulation
3. System parameters
4. Super Node Algorithm
5. Numerical example
6. Passivity enforcement
7. Conclusions
32
• From the original model to the reduced one
• Realization
' 00 01T
C NN N NNsY s C V P I sC
0( )FULL N CY s P I sY
1' 00 01 1 1( ,... )T
NN NC V P I Vdiag V
Passivity enforcement
pos. definite ( )FULLY spos. real
1
0 , n m
T T i iN N N
i ii i
H HP I P A sB P m n
s s
• not positive real
remedy: Modal approximation [Rommes, 2007]
33
pos. real Not
Not pos. definite
2.)
1.)
Outline
1. Motivation
2. Fasterix and EM simulation
3. System parameters
4. Super Node Algorithm
5. Numerical examples
6. Passivity enforcement
7. Conclusions
34
• From the original model to the reduced one
• Realization
Conclusions
Achieved
• The reason of instability of SNA models has been found
• Remedy to guarantee stability has been presented
• Passivity enforcement
Main hurdles
• Redundancy of the poles
• For N super nodes, m poles circuit elements
• Positive R,L,C not guaranteed
Future work
• Another approach for simulation of EM effects based on measurement of Y/Z/S parameters
2( )O N m
35
Thank you!
References
Schilders, W.H.A. and ter Maten, E.J.W, Special volume : numerical methods in electromagnetics,
Elsevier, Amsterdam, 2005.
Cloux, R.Du and Maas, G.P.J.F.M and Wachters, A.J.H and Milsom, R.F. and Scott, K.J.,
Fasterix, an environment for PCB simulation, Proc. 11th Int. Conf. on EMC, Zurich, Switzeland,
1993
Rommes J., Methods for eigenvalue problems with applications in model order
reduction, Ph.D. dissertation, Utrecht University, Utrecht, The Netherlands, 2007.
[Online]. Available: http://rommes.googlepages.com/index.html
Guillemin, E.A., Synthesis of Passive Networks, Wiley, New York, 1957
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