rcim 2008 - hlr

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POLITECNICO DI MILANO

Introduction to HLRIntroduction to HLR

Francesco Redaelli: fredaelli@elet.polimi.it

Reconfigurable Computing Italian MeetingReconfigurable Computing Italian Meeting19 December 2008

Room S01, Politecnico di Milano - Milan (Italy)

2

MotivationsMotivations

Reconfigurable systems, while providing new interesting features in the field of hardware/software co-design, and more in general in the embedded system design, also introduce new problems in their implementation and management.

This is particularly true for systems that implement self partial reconfiguration, such as Xilinx platforms.

3

Behavioral and Structural flexibilityBehavioral and Structural flexibility

Speedup the overall computation of the final system

Increasing need for behavioral flexibility in embedded

systems design

Support of new standards, e.g. in media processing

Addition of new features

New applications too large to fit on the device all at

once

4

Reconfiguration challenges Reconfiguration challenges

Reconfiguration times heavily impact on the final solution’s latency

Hiding reconfiguration time is not sufficient

Possible solution:

Trivial

Bitstream dimension reduction

Complex

Maximize the reuse of configured modules

Reconfiguration hiding

Alternative implementation (SW execution)�

Relocation

4

5

Design FlowDesign Flow

Design Flow divided in three phases in order to reduce

the complexity and allow for each phase specific

algorithms.

6

TasksTasks reusereuse

Reconfiguration times impact heavily on the final

solution’s latency, therefore:

Not only try to hide the reconfigurations

But try to maximize the reuse of reconfigurable modules

Schedule length is on

average at least 18.6%

better than the shortest

one and 19.7% better than the average.

7

ReconfigurationReconfiguration hidinghiding

Time

Area

AB

Reconf

D

C

Reconf

E

F

Area

AB

Reconf

Reconf

DC

Reconf

Reconf

F

E

8

RelocationRelocation: Scenario: Scenario

A

E

D

C

B

F

2/1

2/2

1/2

1/1

1/1

2/2

A possible scenario

FiArea/Time

Legenda:

Time

Time

Area

AB

Rec. F

F

Rec. E

E

Rec. C

C

Rec. D

D

RR3RR2RR1

A

RR3RR2RR1

F

RR3RR2RR1

D

RR3RR2RR1

B

RR3RR2RR1

C

E

RR3RR2RR1

RFU

Implementations

9

RelocationRelocation: : MotivationMotivation

A

E

D

C

B

F

2/1

2/2

1/2

1/1

1/1

2/2

A possible scenario

FiArea/Time

Legenda:

Time

10

RelocationRelocation: : MotivationMotivation

A

E

D

C

B

F

2/1

2/2

1/2

1/1

1/1

2/2

A possible scenario

FiArea/Time

Legenda:

Time

Time

Area

AB

Rec. C

C

R2

F

F

R2

E

E

D

R2

D

RR3RR2RR1

A

RR3RR2RR1

F

RR3RR2RR1

D

RR3RR2RR1

B

RR3RR2RR1

C

E

RR3RR2RR1

RFU

Implementations

11

QuestionsQuestions

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