me applied electronics iii sem
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Faculty ofElectrical and Electronics EngineeringM.E. Regulations 2007
CURRICULUM AND SYLLABIFOR
M.E. DEGREE COURSES
M.E. Applied Electronics
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Faculty of Electrical and Electronics EngineeringM.E. Regulations 2007
M.E. APPLIED ELECTRONICS
SEMESTER I
Code No. Course
Hours/Week Maximum Marks
L T P CSessional
MarksExamMarks
Total
07AE101 Applied Mathematics 3 1 0 50 50 100
07AE102Advanced Digital Signal
Processing3 1 0 50 50 100
07AE103Advanced Digital System
Design3 0 0 50 50 100
07AE104 VLSI Design Techniques 3 0 0 50 50 100
07AE105 AdvancedMicroprocessors
07ANEXX Elective I 3 0 0 50 50 100
Practical07AE106 Electronics Design Lab I 0 0 3 50 50 100
SEMESTER II
Code No. Course
Hours/Week Maximum Marks
L T P CSessional
Marks
Exam
Marks
Total
Theory
07AE201
Analysis and Design of
Analog IntegratedCircuits
3 1 0 50 50 100
07AE202 CAD of VLSI circuits 3 1 0 50 50 100
07AE203Digital Control
Engineering3 0 0 50 50 100
07AE204 Embedded Systems* 3 0 0 50 50 100
07ANEXX Elective II 3 0 0 50 50 100
07ANEXX Elective III 3 0 0 50 50 100
Practical07AE205 Electronics Design Lab II 0 0 3 50 50 100
*Common to M.E. Power Electronics and Drives & M.E. Applied Electronics
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SEMESTER III
Code No. Course
Hours/Week Maximum Marks
L T P CSessional
Marks
Exam
Marks
Total
Theory
07AE3XX Elective IV 4 0 0 50 50 100
07AE3XX Elective V 3 0 0 50 50 100
07AE3XX Elective VI 3 0 0 50 50 100
Practical07AE301 Project Work Phase I* 0 0 3 50 150 200
*Includes one month Internship
SEMESTER IV
Code No. Course
Hours/Week Maximum Marks
L T P CSessional
MarksExamMarks
Total
Practical07AE401 Project Work Phase II 0 0 6 100 300 400
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LIST OF ELECTIVES
Group I (For Semester I)
S.No. Sub Code Course title
1 07ANE01 Internet Technologies and applications
2 07ANE02 Wavelet Transforms and applications
3 07ANE03 High Performance Communication Networks
Group II (For Semester II)
S.No. Sub Code Course title
1 07ANE04 Computational Intelligent Techniques
2 07ANE05 Power Quality Engineering
3 07ANE06 ASIC Design4 07ANE07 DSP Integrated Circuits
5 07ANE08 Digital Image Processing
6 07ANE09 Project Management
Group III (For Semester III)
S.No. Sub Code Course title
1 07ANE10 Industrial Robotics
2 07ANE11 VLSI Signal Processing
3 07ANE12 Wireless Embedded Systems4 07ANE13 Computer Architecture and Parallel Processing
5 07ANE14 Industrial Electronics
6 07ANE15 Low Power VLSI Design
7 07ANE16 RF System Design
8 07ANE17 Design and Analysis of Algorithms
9 07ANE18 Electromagnetic Interference and Compatibility in System Design
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ELECTIVES FOR III SEMESTER (ELECTIVE IV, ELECTIVE V AND
ELECTIVE VI)
07ANE10 INDUSTRIAL ROBOTICS
3 0 0 3
UNIT I FUNDAMENTAL CONCEPTS OF ROBOTICS 4
History, Present status and future trends in Robotics and automation - Laws of Robotics -Robot definitions - Robotics systems and robot anatomy - Specification of Robots -
resolution, repeatability and accuracy of a manipulator. Robotics applications.
UNIT - II ROBOT DRIVES AND POWER TRANSMISSION SYSTEMS 9Robot drive mechanisms, hydraulic electric servomotor- stepper motor - pneumatic
drives, Mechanical transmission method - Gear transmission, Belt drives, cables, Rollerchains, Link - Rod systems - Rotary-to-Rotary motion conversion, Rotary-to-Linear
motion conversion, Rack and Pinion drives, Lead screws, Ball Bearing screws, Endeffectors Types.
UNIT - III SENSORS 10
Sensor characteristics, Position sensors Potentiometers Encoders Resolvers LVDT,Velocity sensors Tachogenerators - Encoders - Proximity sensors, Limit switches
Tactile sensors - Touch sensors - Force and torque sensors
UNIT - IV VISION SYSTEMS FOR ROBOTICS 10Robot vision systems, Image capture- cameras vidicon and solid state, Image
representation - Gray scale and colour images, image sampling and quantization - Image
processing and analysis - Image data reduction - Segmentation - Feature extraction -Object Recognition- Image capturing and communication - JPEG, MPEGs and H.26xstandards, packet video, error concealment.- Image texture analysis. Motion generation -
Manipulator dynamics - Jacobian in terms of D-H matrices - Controller architecture.
UNIT - V PLC AND AUTOMATION 12Building blocks of automation, Controllers PLC- Role of PLC in FA - Architecture of
PLC - Advantages - Types of PLC - Types of Programming - Simple process controlprograms using Relay Ladder Logic and Boolean logic methods - PLC arithmetic
functions Flexible Manufacturing Systems concept - Automatic feeding lines, ASRS,transfer lines, automatic inspection - Computer Integrated Manufacture - CNC, intelligent
automation. Industrial networking, bus standards, HMI Systems, DCS and SCADA,Wireless controls..
Lecture : 45, TOTAL : 45
REFERENCE BOOKS
1 Richard D Klafter, Thomas A Chmielewski, Michael Negin, "Robotics Engineering An Integrated Approach", Eastern Economy Edition, Prentice Hall of India P Ltd.,
1989.
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2 Fu K.S., Gomalez R.C., Lee C.S.G., "Robotics : Control, Sensing, Vision andIntelligence", McGraw Hill Book Company, 1987.
3 Mikell P Groover et. al., "Industrial Robots - Technology, Programming andApplications", McGraw Hill, New York, 1986.
4 Saeed B Niku,Introduction to Robotics Analysis,Systems,ApplicationsPHI Pvt Ltd
New Delhi,2003.5 Deh S R., "Robotics Technology and Flexible Automation", Tata McGraw HillPublishing, Company Ltd., 1994.
07ANE11 VLSI SIGNAL PROCESSING
3 1 0 4
UNIT I INTRODUCTION TO DSP SYSTEMS 9
Introduction To DSP Systems -Typical DSP algorithms; Iteration Bound data flow
graph representations, loop bound and iteration bound, Longest path Matrix algorithm;Pipelining and parallel processing Pipelining of FIR digital filters, parallel processing,
pipelining and parallel processing for low power;
UNIT - II RETIMING, FOLDING AND UNFOLDING 9
Retiming - definitions and properties Retiming techniques; Unfolding an algorithm forUnfolding, properties of unfolding, sample period reduction and parallel processing
application; Folding Folding transformation Register minimizing techniques Register minimization in folded architectures
UNIT III FAST CONVOLUTION 9
Fast convolution Cook-Toom algorithm, modified Cook-Took algorithm WinogradAlgorithm, Iterated Convolution Cyclic Convolution; Pipelined and parallel recursive
and adaptive filters inefficient/efficient single channel interleaving, Look- Aheadpipelining in first- order IIR filters, Look-Ahead pipelining with power-of-two
decompositionparallel processing of IIR filters, combined pipelining and parallelprocessing of IIR filters, pipelined adaptive digital filters, relaxed look-ahead, pipelined
LMS adaptive filter.
UNIT - IV BIT-LEVEL ARITHMETIC ARCHITECTURES 9
Bit-Level Arithmetic Architectures- parallel multipliers with sign extension, parallel
carry-ripple array multipliers, parallel carry-save multiplier, 4x 4 bit Baugh- Wooley
carry-save multiplication tabular form and implementation, design of Lyons bit-serialmultipliers using Horners rule, bit-serial FIR filter, CSD representation, CSDmultiplication using Horners rule for precision improvement
UNIT V PROGRAMMING DIGITAL SIGNAL PROCESSORS 9
Synchronous, Wave and asynchronous pipelining- synchronous pipelining and clocking
styles, clock skew in edge-triggered single-phase clocking, two-phase clocking, wavepipelining, asynchronous pipelining bundled data versus dual rail protocol; Programming
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Digital Signal Processors general architecture with important features; Low powerDesign needs for low power VLSI chips, charging and discharging capacitance, short-
circuit current of an inverter, CMOS leakage current, basic principles of low power design
LECTURE :45 TUTORIAL :15 TOTAL : 60
REFERENCES:
1 Keshab K.Parhi, VLSI Digital Signal Processing systems, Design andimplementation, Wiley, Inter Science, 1999
2 Gary Yeap, Practical Low Power Digital VLSI Design, Kluwer AcademicPublishers, 1998
3 Mohammed Isamail and Terri Fiez, Analog VLSI Signal and InformationProcessing, Mc Graw-Hill, 1994.
07ANE12 WIRELESS EMBEDDED SYSTEMS
3 0 0 3
UNIT I EMBEDDED SYSTEMS FOR REAL-TIME APPLICATIONS 9
Introduction - Definition of embedded system -Constraints on embedded systems vs.standalone systems- Concept of real-time design -Time scales for real-time system
Applications Software environments: HLL vs. assembly coding, DSP vs. general purposecomputer vs. RISC
UNIT II WIRELESS PAN 9
Blue tooth:Over all architecture, Protocol Stack, Physical Connection, MAC Mechanism,
Connection Management, Security-Zigbee:Protocol Architecture, Physical layer, MACLayer,Zigbee Layer,Applications-Home RF
UNIT III CDMA,GSM AND GPRS 9
IS-95:Forward CDMA Channel,Reverse CDMA Channel-GSM:Services,SystemArchitecture, Radio Sub system,Channel Types,Frame structure,Signal Processing-
GPRS-Reference Architecture, Protocol Layers,Short Messaging Services.
UNIT IV SMART SENSORS AND RECENT TRENDS IN SENSOR
TECHNOLOGIES
9
Primary sensors, filters, converter compensation Non-linearity- Noise and interference
Drift Information coding Data coding Data Communication Standards for smart
sensor interface Film sensors Semiconductor IC technology MEMS Nano sensors
UNIT V APPLICATION 9Product,Bands and Standards-Wireless Geo location: System Architecture, Technologies,
Standard for E-911 Service- Wireless Home Networking-Need, Technologies- HomeAccess Networks-Embedded Wireless Control using GSM-RF ID
LECTURE :45, TOTAL : 45
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REFERENCES:
1 Embedded Realtime System Programming, S. V. Iyer and P. Gupta, TMH
2 Principles of Wireless Networks,Kaveh Pahalavan and Prasanth
Krishnamoorthy,PHI,20053 Wireless Communications Principles and Practice ,Theodore S Rappaport,PHI,20074 Patranabis, D., Sensors and Transducers, Wheeler Publishing, 1997
07ANE13 COMPUTER ARCHITECTURE AND PARALLEL PROCESSING
3 0 0 3
UNIT I PRINCIPLES OF PARALLEL PROCESSING 9Introduction-Trends towards Parallel Processing- Uniprocessor Architecture Overview -
Basic Uniprocessor Architecture, Parallel Processing Mechanism, Balancing ofsubsystems, Bandwidth, Multiprogramming and Time sharing - Styles of Architecture
-Multiplicity of Instruction Data Structures, Serial versus Parallel Processing-Parallelism versus Pipelining- Parallel Processing Applications
UNIT - II VECTOR PROCESSORS 9
Principles of Vector Processing, Pipelined Vector Processing methods, The Architectureof CRAY-1,the Architecture of CYBER-205, Vector Processing in CYBER-205
UNIT - III ARRAY PROCESSORS 9
SIMD Computer Organizations, Masking and Data Routing mechanisms, Statics versusDynamic Networks, Mesh-connected, Iliac Networks, Cube Interconnection Networks,
SIMD Matrix Multiplication
UNIT - IV MULTIPROCESSOR SYSTEMS 9Loosely Coupled Multiprocessors, Tightly Coupled Multiprocessors, Processor
characteristics for Multiprocessing, Time Shared or Common Buses, Crossbar switch andMulti-port memories, Classification of Multiprocessor Operating Systems, Software
Requirements for Multiprocessors, Operating System Requirements, Language features toexploit parallelism, Detection of Parallelism in programs.
UNIT - V DATA FLOW COMPUTER ARCHITECTURES 9
Control-Flow versus Data Flow Computers, Data Flow Graphs and Languages,Advantages and Potential Problems, Static Data Flow Computers, Dynamic Data Flow
Computers, Data Flow Design Alternates Lecture : 45, TOTAL : 45REFERENCE BOOKS
1 Computer Architecture and Parallel Processing, Kai Hwang, Faye A Briggs ,McGraw Hill Inc., 1985.
2 Pipelined and Parallel Computer Architecture, Sajjan G Shiva, Prentice Hall Inc,1996, First Edition
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07ANE14 INDUSTRIAL ELECTRONICS
3 0 0 3
UNIT I 8Thyristors - basic structure - static and dynamic characteristics - methods of turning on -gate triggering circuit using UJT - methods of turning off - commutation circuits.
UNIT - II 9
Line frequency phase controlled rectifiers using SCR - single-phase rectifier with R andRL loads - half controlled and fully controlled converters with continuous and constant
currents. Input side harmonics and power factor
UNIT - III 9SCR inverters - circuits for single-phase inverters - series, parallel and bridge inverters -
pulse width-modulated inverters - basic circuit operation
UNIT - IV 10AC regulators - single phase ac regulator with R and RL loads - sequence control of ac
regulators - cycloconverter - basic principle of operation - single phase to single phasecycloconverter - choppers - principle of operation - step-up and step-down choppers.
UNIT - V 9
Linear regulators - Switching regulators. Concept of switched mode power supply.Uninterruptible power supply. Different configurations. applications.
Speed control of ac and dc drives -Induction heating. Dielectric heating. Principles,
characteristics and applications. Lecture : 45, TOTAL : 45REFERENCE BOOKS
1 Ned Mohan et.al, Power Electronics., John Wiley and Sons2 Rashid, Power Electronics, Prentice Hall India
3 G.K.Dubey et.al, Thyristorised Power Controllers, Wiley Eastern, 2001.4 Cage John M, Theory and Applications of Industrial Electronics, Mc Graw Hill,
1951.5 Paul M Zbar, Industrial Electronics, Tata Mc Graw Hill, 3rd edition, 1988.
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07ANE15 LOW POWER VLSI DESIGN
3 0 0 3
UNIT I POWER DISSIPATION IN CMOS 9
Hierarchy of limits of power Sources of power consumption Physics of powerdissipation in CMOS FET devices- Basic principle of low power design
UNIT - II POWER OPTIMIZATION 9
Logical level power optimization Circuit level low power design Circuit techniquesfor reducing power consumption in adders and multipliers
UNIT - III DESIGN OF LOW POWER CMOS CIRCUITS 9
Computer Arithmetic techniques for low power systems Reducing power consumption
in memories Low power clock, Interconnect and layout design Advanced techniques Special techniques
UNIT - IV POWER ESTIMATION 9
Power estimation techniques Logic level power estimation Simulation power analysis
Probabilistic power analysis
UNIT - V SYNTHESIS AND SOFTWARE DESIGN FOR LOW
POWER
9
Synthesis for low power Behavioral level transforms- Software design for low power
LECTURE : 45, TOTAL : 45
REFERENCES:
1 K.Roy and S.C. Prasad , LOW POWER CMOS VLSI circuit design,Wiley,2000
2 Dimitrios Soudris, Chirstian Pignet, Costas Goutis, Designing CMOS CircuitsFor Low Power, Kluwer,2002
3 Gary Yeap, Practical low power digital VLSI design, Kluwer,1998
FURTHER READINGS:
1. A.P.Chandrakasan, R.W Broadersen, Low Power Digital CMOS VLSI Design,Kluwer 1995.
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07ANE16 RF SYSTEM DESIGN
3 1 0 4
UNIT I INTRODUCTION, RANDOM SIGNALS AND NOISES,
INTRODUCTION TO LOW NOISE AMPLIFIERS
9
Introduction to RF IC design, Gain, decibels, impedance levels, non linearities andharmonic distortions, intermodulation, dynamic range, introduction to random process and
noises, review of thermal noise, noise models and circuit noise calculations, low noise RFamplifiers structures, relationship between power consumption, gain, linearity and noise
figures.
UNIT - II NON LINEAR RF CIRCUITS AND SYSTEMS, RF MIXERS 9Non linear elements, their characteristics and approximation methods, harmonics analysis
of current in non linear elements, non linear resonant amplifiers and frequency multipliers,Up and down conversion mixers, single and double balanced mixers
UNIT - III RF OSCILLATORS, MULTIPLES ACCESS TECHNIQUES 9
Oscillators, types of oscillators, feedback oscillator topologies, resonant oscillators,crystal oscillators, small signal analysis of an oscillators, short introduction to voltage
controlled oscillators, frequency division multiple access(FDMA), time division multipleaccess(TDMA), Code division multiple access(CDMA).
UNIT - IV MODULATORS AND DEMODULATORS TECHNIQUES, RF
TRANSCEIVERS ARCHITECTURES
9
Modulators and demodulators, their structures and electrical schemes, transceivers and
architectures, Transceivers functions and their characteristics, direct conversions and
super heterodyne receivers.
UNIT - V PHASE LOCKED LOOPS (PLL) 9Phase locked loops and frequency synthesis, Basic building block of the PLL, PLL
synthesizers for radio applications.
Lecture : 45, Tutorial : 15, TOTAL : 60
REFERENCE BOOKS
1 D. M. Pozar, Microwave engineering, 2nd
edition, N.Y., John Wiley and Sons, 19982 B.P.Lathi, Modern digital and analog communication systems, 3
rdedition, N.Y.,
Oxford University press, 1998
3 B.Sklar, Digital communications-fundamentals and applications, 2nd
edition, PrenticeHall PTR, New Jersey, 2001.
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07ANE17 DESIGN AND ANALYSIS OF ALGORITHMS
3 1 0 4
UNIT I INTRODUCTION 9
Polynomial and Exponential algorithms, big "oh" and small "oh" notation, exactalgorithms and heuristics, direct / indirect / deterministic algorithms, static and dynamiccomplexity, stepwise refinement.
UNIT - II DESIGN TECHNIQUES 9
Subgoals method, working backwards, work tracking, branch and bound algorithms fortraveling salesman problem and knapsack problem, hill climbing techniques, divide and
conquer method, dynamic programming, greedy methods.
UNIT - III SEARCHING AND SORTING 9Sequential search, binary search, block search, Fibonacci search, bubble sort, bucket
sorting, quick sort, heap sort, average case and worst case behavior, FFT.
UNIT - IV GRAPH ALGORITHMS 9Minimum spanning, tree, shortest path algorithms, R-connected graphs, Even's and
Kleitman's algorithms, ax-flow min cut theorem, Steiglitz's link deficit algorithm.
UNIT - V SELECTED TOPICS 9NP Completeness Approximation Algorithms, NP Hard Problems, Strasseu's Matrix
Multiplication Algorithms, Magic Squares, Introduction To Parallel Algorithms andGenetic Algorithms, Monti-Carlo Methods, Amortised Analysis.
Lecture : 45, Tutorial : 15, TOTAL : 60
REFERENCE BOOKS1 Sara Baase, "Computer Algorithms : Introduction to Design and Analysis", AddisonWesley, 1988.
2 T.H.Corman, C.E.Leiserson and R.L.Rioest, "Introduction to Algorithms", Mc GrawHill, 1994.
3 E.Horowitz and S.Sahni, "Fundamentals of Computer Algorithms", GalgotiaPublications, 1988.
4 D.E.Goldberg, "Genetic Algorithms : Search Optimization and Machine Learning",Addison Wesley, 1989.
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07ANE18 ELECTROMAGNETIC INTERFERENCE AND COMPATIBILITY IN
SYSTEM DESIGN
3 1 0 4
UNIT I EMI ENVIRONMENT 9
EMI/EMC concepts and definitions, Sources of EMI, conducted and radiated EMI,Transient EMI, Time domain Vs Frequency domain EMI, Units of measurementparameters, Emission and immunity concepts, ESD.
UNIT - II EMI COUPLING PRINCIPLES 9
Conducted, Radiated and Transient Coupling, Common Impedance Ground Coupling,Radiated Common Mode and Ground Loop Coupling, Radiated Differential Mode
Coupling, Near Field Cable to Cable Coupling, Power Mains and Power Supply coupling.
UNIT - III EMI/EMC STANDARDS AND MEASUREMENTS 9Civilian standards - FCC,CISPR,IEC,EN,Military standards - MIL STD 461D/462, EMI
Test Instruments /Systems, EMI Shielded Chamber, Open Area Test Site, TEM Cell,Sensors/Injectors/Couplers, Test beds for ESD and EFT, Military Test Method and
Procedures (462).
UNIT - IV EMI CONTROL TECHNIQUES 9Shielding, Filtering, Grounding, Bonding, Isolation Transformer, Transient Suppressors,
Cable Routing, Signal Control, Component Selection and Mounting.
UNIT - V EMC DESIGN OF PCBs 9PCB Traces Cross Talk, Impedance Control, Power Distribution Decoupling, Zoning,
Motherboard Designs and Propagation Delay Performance Models.
Lecture : 45, Tutorial : 15, TOTAL : 60REFERENCE BOOKS1 Henry W.Ott, "Noise Reduction Techniques in Electronic Systems", John Wiley and
Sons, NewYork. 1988.2 C.R.Paul, Introduction to Electromagnetic Compatibility , John Wiley and Sons,
Inc, 19923 V.P.Kodali, "Engineering EMC Principles, Measurements and Technologies", IEEE
Press, 1996.4 Bernhard Keiser, "Principles of Electromagnetic Compatibility", Artech house, 3rd
Ed, 1986.
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