lecture 15: small signal modeling

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Lecture 15: Small Signal Modeling. Prof. Niknejad. Lecture Outline. Review: Diffusion Revisited BJT Small-Signal Model Circuits!!! Small Signal Modeling Example: Simple MOS Amplifier. Large signal. Notation Review. - PowerPoint PPT Presentation

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Department of EECS University of California, Berkeley

EECS 105 Fall 2003, Lecture 15

Lecture 15:

Small Signal Modeling

Prof. Niknejad

Department of EECS University of California, Berkeley

EECS 105 Fall 2003, Lecture 15 Prof. A. Niknejad

Lecture Outline

Review: Diffusion Revisited BJT Small-Signal Model Circuits!!! Small Signal Modeling Example: Simple MOS Amplifier

Department of EECS University of California, Berkeley

EECS 105 Fall 2003, Lecture 15 Prof. A. Niknejad

Notation Review

Since we’re introducing a new (confusing) subject, let’s adopt some consistent notation

Please point out any mistakes (that I will surely make!) Once you get a feel for small-signal analysis, we can drop the notation

and things will be clear by context (yeah right! … good excuse)

( , )C BE CEi f v vLarge signal

( , )C C BE BE CE CEI i f V v V v small signal

DC (bias)( , )C c BE be CE ceI i f V v V v

small signal(less messy!)

c be ceBE CEQ Q

f fi v v

v v

transconductance Output conductance

( , )BE CEQ V V

Quiescent Point(bias)

Department of EECS University of California, Berkeley

EECS 105 Fall 2003, Lecture 15 Prof. A. Niknejad

Diffusion Revisited

Why is minority current profile a linear function? Recall that the path through the Si crystal is a zig-zag series

of acceleration and deceleration (due to collisions) Note that diffusion current density is controlled by width of

region (base width for BJT):

Decreasing width increases current!

Density here fixed by potential (injection of carriers)Physical interpretation: How many electrons (holes) have enough energy to cross barrier? Boltzmann distribution givethis number.

Wp

Density fixed by metal contact

Half go left,half go right

Department of EECS University of California, Berkeley

EECS 105 Fall 2003, Lecture 15 Prof. A. Niknejad

Diffusion Capacitance

The total minority carrier charge for a one-sided junction is (area of triangle)

For a one-sided junction, the current is dominated by these minority carriers:

2 , 0 0

1 1( )( )

2 2

DqV

kTn dep p p pQ qA bh qA W x n e n

0 0,

( )DqV

n kTD p p

p dep p

qADI n e n

W x

2

,

nD

n p dep p

DI

Q W x

Constant!

Department of EECS University of California, Berkeley

EECS 105 Fall 2003, Lecture 15 Prof. A. Niknejad

Diffusion Capacitance (cont)

The proportionality constant has units of time

The physical interpretation is that this is the transit time for the minority carriers to cross the p-type region. Since the capacitance is related to charge:

2

,p dep pnT

D n

W xQ

I D

n T DQ In

d T d T

Q IC g

V V

Diffusion Coefficient

Distance acrossP-type base

2

,p dep p

Tn

W xq

kT

Mobility

Temperature

Department of EECS University of California, Berkeley

EECS 105 Fall 2003, Lecture 15 Prof. A. Niknejad

BJT Transconductance gm

The transconductance is analogous to diode conductance

Department of EECS University of California, Berkeley

EECS 105 Fall 2003, Lecture 15 Prof. A. Niknejad

Transconductance (cont)

Forward-active large-signal current:

/ (1 )BE thv VC S CE Ai I e v V

• Differentiating and evaluating at Q = (VBE, VCE )

/ (1 )BEqV kTCS CE A

BE Q

i qI e V V

v kT

C Cm

BE Q

i qIg

v kT

Department of EECS University of California, Berkeley

EECS 105 Fall 2003, Lecture 15 Prof. A. Niknejad

BJT Base Currents

Unlike MOSFET, there is a DC current into thebase terminal of a bipolar transistor:

/ (1 )BEqV kTB C F S F CE AI I I e V V

To find the change in base current due to change in base-emitter voltage:

1B B Cm

BE C BE FQ QQ

i i ig

v i v

Bb be

BE Q

ii v

v

mb be

F

gi v

Department of EECS University of California, Berkeley

EECS 105 Fall 2003, Lecture 15 Prof. A. Niknejad

Small Signal Current Gain

0C

FB

i

i

Since currents are linearly related, the derivative is a constant (small signal = large signal)

0C Bi i

0c bi i

Department of EECS University of California, Berkeley

EECS 105 Fall 2003, Lecture 15 Prof. A. Niknejad

Input Resistance rπ

1 1 C mB

BE F BE FQ Q

i gir

v v

In practice, the DC current gain F and the small-signal current gain o are both highly variable (+/- 25%)

Typical bias point: DC collector current = 100 A

F

m

rg

25mV100 25k

.1mAr

iR MOSFET

Department of EECS University of California, Berkeley

EECS 105 Fall 2003, Lecture 15 Prof. A. Niknejad

Output Resistance roWhy does current increase slightly with increasing vCE?

Answer: Base width modulation (similar to CLM for MOS)Model: Math is a mess, so introduce the Early voltage

)1(/ACE

VvSC VveIi thBE

Base (p)

Emitter (n+)

Collector (n)

BW

Department of EECS University of California, Berkeley

EECS 105 Fall 2003, Lecture 15 Prof. A. Niknejad

Graphical Interpretation of ro

slope~1/ro

slope

Department of EECS University of California, Berkeley

EECS 105 Fall 2003, Lecture 15 Prof. A. Niknejad

BJT Small-Signal Model

b bei r v1

c m be ceo

i g v vr

Department of EECS University of California, Berkeley

EECS 105 Fall 2003, Lecture 15 Prof. A. Niknejad

BJT Capacitors

Emitter-base is a forward biased junction depletion capacitance:

Collector-base is a reverse biased junction depletion capacitance

Due to minority charge injection into base, we have to account for the diffusion capacitance as well

, , 01.4j BE j BEC C

b F mC g

Department of EECS University of California, Berkeley

EECS 105 Fall 2003, Lecture 15 Prof. A. Niknejad

BJT Cross Section

Core transistor is the vertical region under the emitter contact

Everything else is “parasitic” or unwanted Lateral BJT structure is also possible

Core Transistor

External Parasitic

Department of EECS University of California, Berkeley

EECS 105 Fall 2003, Lecture 15 Prof. A. Niknejad

Core BJT Model

Given an ideal BJT structure, we can model most of the action with the above circuit

For low frequencies, we can forget the capacitors Capacitors are non-linear! MOS gate & overlap caps are

linear

mg v

Base Collector

Emitter

Reverse biased junction

Reverse biased junction &Diffusion Capacitance

Fictional Resistance(no noise)

Department of EECS University of California, Berkeley

EECS 105 Fall 2003, Lecture 15 Prof. A. Niknejad

Complete Small-Signal Model

Reverse biased junctions“core” BJT

External Parasitics

Real Resistance(has noise)

Department of EECS University of California, Berkeley

EECS 105 Fall 2003, Lecture 15 Prof. A. Niknejad

Circuits!

When the inventors of the bipolar transistor first got a working device, the first thing they did was to build an audio amplifier to prove that the transistor was actually working!

Department of EECS University of California, Berkeley

EECS 105 Fall 2003, Lecture 15 Prof. A. Niknejad

Modern ICs

First IC (TI, Jack Kilby, 1958): A couple of transistors Modern IC: Intel Pentium 4 (55 million transistors, 3 GHz)

Source: Texas InstrumentsUsed without permission

Source: Intel CorporationUsed without permission

Department of EECS University of California, Berkeley

EECS 105 Fall 2003, Lecture 15 Prof. A. Niknejad

A Simple Circuit: An MOS Amplifier

DSI

GSV

sv

DR DDV

GS GS sv V v

ov

Input signal

Output signal

Supply “Rail”

Department of EECS University of California, Berkeley

EECS 105 Fall 2003, Lecture 15 Prof. A. Niknejad

Selecting the Output Bias Point

The bias voltage VGS is selected so that the output is mid-rail (between VDD and ground)

For gain, the transistor is biased in saturation Constraint on the DC drain current:

All the resistor current flows into transistor:

Must ensure that this gives a self-consistent solution (transistor is biased in saturation)

DD o DD DSR

D D

V V V VI

R R

,R DS satI I

DS GS TV V V

Department of EECS University of California, Berkeley

EECS 105 Fall 2003, Lecture 15 Prof. A. Niknejad

Finding the Input Bias Voltage

Ignoring the output impedance

Typical numbers: W = 40 m, L = 2 m, RD = 25k, nCox = 100 A/V2, VTn = 1 V, VDD = 5 V

2,

1( )

2DS sat n ox GS Tn

WI C V V

L

2,

1( )

2 2D

DDR DS sat n ox GS Tn

D

V WI I C V V

R L

22

5V μA 1100μA 20 100 ( 1)

50k V 2 GSV

2.1 ( 1)GSV 1.32GSV .32 2.5GS T DSV V V

Department of EECS University of California, Berkeley

EECS 105 Fall 2003, Lecture 15 Prof. A. Niknejad

Applying the Small-Signal Voltage

Approach 1. Just use vGS in the equation for the total

drain current iD and find vo

  

   

GS GS sv V v

ˆ coss sv v t

21( )

2O DD D DS DD D n ox GS s T

Wv V R i V R C V v V

L

Note: Neglecting charge storage effects. Ignoring device output impedance.

Department of EECS University of California, Berkeley

EECS 105 Fall 2003, Lecture 15 Prof. A. Niknejad

Solving for the Output Voltage vO

21( )

2O DD D DS DD D n ox GS s T

Wv V R i V R C V v V

L

2

21( ) 1

2s

O DD D DS DD D n ox GS TGS T

vWv V R i V R C V V

L V V

DSI2

1 sO DD D DS

GS T

vv V R I

V V

2DDV

Department of EECS University of California, Berkeley

EECS 105 Fall 2003, Lecture 15 Prof. A. Niknejad

Small-Signal Case

Linearize the output voltage for the s.s. case Expand (1 + x)2 = 1 + 2x + x2 … last term can be

dropped when x << 1

1vs

VGS VTn–--------------------------+

2

12vs

VGS VTn–--------------------------

vs

VGS VTn–--------------------------

2

+ +=

Neglect

21 s

O DD D DSGS T

vv V R I

V V

Department of EECS University of California, Berkeley

EECS 105 Fall 2003, Lecture 15 Prof. A. Niknejad

Linearized Output Voltage

For this case, the total output voltage is:

The small-signal output voltage:

   

21

2sDD

O DDGS T

vVv V

V V

2s DDDD

OGS T

v VVv

V V

“DC”

Small-signal output

s DDo v s

GS T

v Vv A v

V V

Voltage gain

Department of EECS University of California, Berkeley

EECS 105 Fall 2003, Lecture 15 Prof. A. Niknejad

Plot of Output Waveform (Gain!)

Numbers: VDD / (VGS – VT) = 5/ 0.32 = 16 output

input

mV

Department of EECS University of California, Berkeley

EECS 105 Fall 2003, Lecture 15 Prof. A. Niknejad

There is a Better Way!

What’s missing: didn’t include device output impedance or charge storage effects (must solve non-linear differential equations…)

Approach 2. Do problem in two steps. DC voltages and currents (ignore small signals

sources): set bias point of the MOSFET ... we had to do this to pick VGS already

Substitute the small-signal model of the MOSFET and the small-signal models of the other circuit elements …

This constitutes small-signal analysis

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