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SMART
Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
Introduction
The Atmel® | SMART SAMA5D3 series is a high-performance, power-efficientembedded MPU. It features reduced power consump tion, making it an idealplatform for low-power applications, such as battery-powered devices.
This application note provides techniques to optimize the design of a SAMA5D3-based system in order to achieve the lowest power consumption possible.
The application note consists of three sections: Section 1 introduces the SAMA5D36 CPU Module Power Consumption
(CMP) board and its Linux demo. Section 2 presents the overall power consumption of SAMA5D36 in
different modes, including Low-power mode and Active mode. Section 3 explains how to optimize the power consumption for a SAMA5D3-
based system.
This application note should be used in conjunction with the SAMA5D3 Seriesdatasheet available on www.atmel.com.
APPLICATION NOTE
Design Optimization for a Low-PowerSAMA5D3-based System
Atmel | SMART SAMA5D3 Series
Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
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Table of Contents
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1. SAMA5D36-CMP Board and Linux Demo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31.1 SAMA5D36-CMP Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31.2 Linux Demo. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51.3 Source Code Extraction and Building . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2. Power Consumption under Linux Scenarios . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82.1 Low-power Modes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82.2 Linux Idle. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102.3 Dhrystone . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112.4 Audio. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122.5 LCD Controller (LCDC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132.6 Image Sensor Interface (ISI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142.7 Gigabit EMAC (GMAC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162.8 USB Host . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3. Power Optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193.1 Optimizing Power Consumption of the SAMA5D36 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193.2 Optimizing Power Consumption of External Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4. Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5. FAQ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Appendix A. SAMA5D36-CMP Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
6. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
1. SAMA5D36-CMP Board and Linux Demo
1.1 SAMA5D36-CMP Board
SAMA5D36-CMP board (see Figure 1-1) is a CPU module designed to measure the power consumption of theSAMA5D36 device.
For complete schematics of the SAMA5D36-CMP RevC, refer to the appendix.
Note: Before using the CMP board, check the settings of all jumpers to ensure that they are in the default state asillustrated in Figure 1-2.
The CMP board is a CPU module (CM) board to be used in conjunction with the SAMA5D3-EK main board (MB).The main differences between the CMP board and the CM board are the jum pers that measure the powerconsumption of each rail of the SAMA5D36 product, the use of LPDDR2 instead of DDR2, and the powermanagement IC (PMIC).
Figure 1-1. SAMA5D36-CMP Overview
1.1.1 Jumper Settings
With one jumper on each power rail of the SAMA5D36 device, the CMP board features more jumpers than the CMboard, thus offering more precise measurement capabilities than the CM. This makes it possible to measure thecurrent of each power rail, thus facilitating the overall power consumption investigation/analysis of the SAMA5D36and external devices. This is of particular importance for low-power applications.
For detailed jumper settings on the CMP board, please refer to Figure 1-2.
1.1.2 Low-Power DDR2 (LPDDR2)
Low-power DDR2 memory (MT42L128M32D1GU-25 WT) is used on the CMP board instead of DDR2, which isused on the CM board. Its low -power advantage makes LPDDR2 a good memory replacement in low-powersystem design.
1.1.3 Power Management IC (PMIC)
The Active-Semi ACT8865 is the power management IC (PMIC) implemented on the CMP board. It supplies all theon-board components including the CPU and the memories, making it a complete and highly-efficient powermanagement solution.
SAMA5D36
256MB NAND Flash
512MB LPDDR232bit
128MbNOR Flash
1KbEEPROM
KSZ9031RNEthernet PHY PMIC
ATC8865
SAMA5D36-CMP
ButtonPower Rail Jumpers
32Mb Serial Flash
3Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
Figure 1-2. CMP Default Jumper Settings
The CMP board is fully compatible with the Atmel SAMA5D3-EK evaluation kit. It can be used as a seamlessreplacement for the CM board of the Atmel SAMA5D3-EK, and functions with the main board (MB) and displaymodule (DM) board. In this application note, we develop a power consumption demonstration platform by replacingthe CM with a CMP in the standard SAMA5D3-EK, as shown in Figure 1-3.
Note: The CMP board is not for public sale. It is intended only for internal engineering purposes. For moreinformation on the CMP board, please contact your local Atmel representative or FAE.
Figure 1-3. Power Consumption Demo Platform
Note: For more details on the SAMA5D3-EK, refer to the SAMA5D3 Series Evaluation Kit User Guide available onwww.atmel.com.
DEFAULT
CLOSE
4
JP6
NOITCNUFECNEREFEREGAP
VDDIOM_MPU
VDDPLLACLOSE
JP8
4
4
4
4
4
4
4
4
4
4
4
CLOSE VDDIOP1_MPU
VDDIOP0_MPUCLOSEJP9
JP11 CLOSE VDDUTMII
VDDOSCJP12 CLOSE
JP2 CLOSE VDDCORE
JP4
JP15 CLOSE VDDIODDR_MPU_1V2
JP7 CLOSE VDDBU
JP13 CLOSE VDDANA
JP10 CLOSE FUSE_2V5
JP14 OPEN CM-3V3 to MB-3V3
JP17 V5_CCVESOLC4
4 JP18 CLOSE VCC_1V8
4 JP19 CLOSE VCC_3V3
4 JP20 CLOSE VDDIOP1_GPHY
4 JP21 CLOSE VDDIODDR_1V2
JP22 CLOSE VCC_1V24
4 JP3 CLOSE VDDUTMIC
JP1 OPEN Disable SPI0_NPCS0 for Dataflash7
JP16 2V1_CCV morf 2V1 YHPG1-29
GPHY 1V2 from PMOS2-3
CMP
MB
DM
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1.2 Linux Demo
The SAMA5D36-CMP board is delivered with a default Linux demo stored in the on-board NAND Flash. At power-up, in connection with the SAMA5D3x-MB and SAMA5D3x-DM boards, the demo starts running and plays a video.
The default Linux demo code together with this application note can be downloaded from:
ftp://ftp.linux4sam.org/pub/demo/sama5d36-cmp/
The demo archive contains: All component binaries:
sama5d3xek-nandflashboot-uboot-3.6.1.bin, u-boot.bin, sama5d36ek_cmp.itb, rootfs-sama5d3xek.ubi A TCL/SAM-BA script that interfaces with the SAM-BA tool to flash the demo:
sama5d3xek_demo_linux_nandflash.tcl A .bat script able to run the flashing script calling SAM-BA itself:
sama5d3xek_demo_linux_nandflash.bat
The Atmel SAMA5D36 integrates the full peripheral set available for the SAMA5D3 series, including an LCDcontroller, touch screen interface, CMOS sensor interface, Gigabit EMAC, 10/100 EMAC and a high-speed USBhost and device. The default Linux demo for the SAMA5D36-CMP is designed for the evaluation of theseperipherals. In addition, the demo has been designed to support the MB RevC/D/E, and any of the displaymodules, either the 5" with resi stive touchscreen, the TM4300 or the TM700 from PDA with capacitivetouchscreen..
If the on-board NAND Flash has been erased, the user may need to re-flash the default demo. To do so, follow theprocedure below:
5Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
1. Set up drivers/software environment by installing: JLink (\tools\Jlink\Setup_JLinkARM_V450j.zip): SAM-ICE driver JLinkCDC (\tools\Jlink OB DBGU\JLinkCDCInstaller_V1_2b.zip): USB serial port driver for debug
information display SAM-BA (\tools\SAM-BA2.12\sam-ba_2.12.zip): a tool used to program the on-board memory SAM-BA patch (tools\SAM-BA2.12\sam-ba_2.12_patchsama5d3xcmp.zip)
(Note: SAM-BA 2.12 formal release is for SAMA5D3-EK with DDR2 on CM board. To support the CMP board withLPDDR2, a pa tc h needs to be app l i ed . Ex t rac t the . z ip pa tch f i l e and unz ip i t , run sam-ba_2.12_patchsama5d3xcmp.exe by double-clicking it to apply the SAM-BA patch.)
2. Build the demo platform: Double-check the connection of the CM with the MB and the DM to make sure they are properly
connected and all jumpers are correctly set. Press PB4 CS_BOOT button to de-select the on-board serial Flash and the NAND Flash. Insert a 5V
power supply to power-up the demo board. Connect the demo board through J20 USB-A to the PC with a micro-USB cable. Check “Device Manager->Ports (COM & LPT)”. If “AT91 USB to Serial Converter (COMx)” appears,
then the USB connection between the demo board and PC is working.3. Download and program:
Unzip the demo package (\demo\linux4sam-buildroot-sama5d3xek-cmp-demo-v1.0.1.zip). In the demo archive, run sama5d3xek_demo_linux_nandflash.bat by double-clicking it to flash the on-board memory.
A log file (logfile.log) will pop up upon completion of demo flashing.4. Run the demo:
Re-plug the 5V power supply to run the Linux demo on the demo board. Use a micro-USB cable to connect the demo board through J14 to the PC, and open a hyperterminal
console window as (115200-8-N-1). On the console window, type “root” to log in:Welcome to Buildrootbuildroot login: root#
1.3 Source Code Extraction and Building
a) At91bootstrap:
Github: https://github.com/at91linux/at91bootstrap.git
Branch: wya/at91bootstrap-3.x-cmp
TAG: sama5d3x_cmp_v1.0
Commands to build binary:# make sama5d3xeknf_cmp_uboot_defconfig# make
Generated file:
sama5d3xek-nandflashboot-uboot-3.6.1.bin
b) u-boot:
Github: https://github.com/at91linux/u-boot-at91.git
Branch: u-boot-2013.07-at91-cmp
TAG: sama5d3x_cmp_v1.0
Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
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Commands to build binary:# make sama5d3x_cmp_nandflash
Generated file:
u-boot.bin
c) Linux:
Github: git://github.com/at91linux/linux-at91.git
Branch: wya/linux-at91-cmp
TAG: sama5d3x_cmp_v1.0
Commands to build binary:# ./build_cmp_all.sh
Generated file:
sama5d36ek_cmp.itb
d) buildroot (the same as SAMA5D3 series release):
Github: git://github.com/linux4sam/buildroot-at91.git
Branch: buildroot-2013.02-at91
Commands to build binary:# make sama5d3ekdemo_defconfig# make
Generated file:
rootfs-sama5d3ek.ubi
7Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
2. Power Consumption under Linux Scenarios
The SAMA5D3 series is based on the ARM® Cortex™-A5 processor and offers a good balance betweenperformance and power consumption. Typical application scenarios have been selected to illustrate the highperformance levels of the SAMA5D3, its rich connectivity and multimedia features and its low power consumption.
This section gives a detailed description of each scenario, as well as the typical power consumption data for each.All power consumption data were measured based on: HW demo board: default demo platform (RevD MB+5” LCD+RevC CMP) SW demo package: linux4sam-buildroot-sama5d3xek-cmp-demo-v1.0.1.zip Measurement equipment: Agilent 34410A 6(1/2) Digit Multimeter
The power consumption data may vary slightly depending on the revision of the MB, the LCD, the CMP and themeasurement equipment used.
Note: In some cases, the “top” comm and is used to get the real-tim e CPU usage value (%), which is (1-CPU_idle%).
# topMem: 21008K used, 492708K free, 0K shrd, 0K buff, 6520K cachedCPU: 36% usr 0% sys 0% nic 63% idle 0% io 0% irq 0% sirq
For example, in the above log information, if the CPU idle percentage is 63%, then the CPU usage value is 37%.
2.1 Low-power Modes
In most cases, at least two low-power modes must be implemented in an operating system – Standby mode andSuspend mode.
In Standby mode, the SAMA5D3 is in Idle mode, and the core is in Wait for Interrupt mode. Most peripherals arestill enabled and running. The internal bus is in High-speed mode for fast system restoration.
In Suspend mode, the SAMA5D3 is in Ult ra-low-power mode with a 512 Hz MCK. The core is in Wait for Interruptmode, and most peripherals are disabled and not running. The internal bus is set to Low-spe ed mode for furtherpower savings.
To build this scenario, stop auto-boot in U-Boot and set loader options for this case:U-Boot 2013.07-00054-gd757001 (Feb 25 2014 - 14:03:56)CPU: SAMA5D36Crystal frequency: 12 MHzCPU clock : 528 MHzMaster clock : 132 MHzDRAM: 512 MiBNAND: 256 MiBIn: serialOut: serialErr: serialNet: No ethernet found.Hit any key to stop autoboot: 0U-Boot>setenv bootcmd 'nand read 0x22000000 0x00200000 0x00400000; bootm 0x22000000#conf@sama5d36ek_pm'U-Boot>boot
After the operating system starts up, log in and type commands to enter the system into the low-power modesseparately:
Welcome to Buildrootbuildroot login: root# echo standby >/sys/power/state// echo mem >/sys/power/state
Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
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PM: Syncing filesystems ... done.Freezing user space processes ... (elapsed 0.01 seconds) done.Freezing remaining freezable tasks ... (elapsed 0.01 seconds) done.LDO_REG7: No configurationLDO_REG6: No configurationFUSE_2V5: No configurationVDDANA: No configurationSuspending console(s) (use no_console_suspend to debug)PM: suspend of devices complete after 218.937 msecsPM: late suspend of devices complete after 0.407 msecsPM: noirq suspend of devices complete after 0.391 msecs
The power consumption data for each power rail of the SAMA5D36 is listed below for reference.
Notes: 1. For Linux Standby mode, the SAMA5D36 is in Idle mode, while some peripherals such as the timer, DDR2 controller and DBGU serial port must be enabled.
2. For Linux Suspend mode, the SAMA5D36 is in ULP (Ultra-low-power) 512 Hz mode. In the SAMA5D3 series datasheet, the power consumption for ULP 512Hz is given as 1.2V × 0.40 mA. In this case, due to the lower supply voltage (1.15V), the actual power consumption is 1.15V × 0.36 mA.
Touch the keypads on the DM board to wake up the demo. The system will resume all the suspended drivers andprint the wake-up time on the hyperterminal:
PM: noirq resume of devices complete after 0.315 msecsPM: early resume of devices complete after 0.358 msecsPM: resume of devices complete after 180.424 msecsRestarting tasks ... done.Vddcore suspend finish voltage 1250mV#
Use Case: Low Power Modes (command: echo standby > /sys/power/state) (command: echo mem > /sys/power/state)Operation Setting: LPDDR2 in self-refresh modeUsed Peripheral: NAND, DBGU, MPDDRC, GPIO
Power Rail Voltage Range (V) Voltage (V) Current (mA)
Power Consumption
(mW)Current (mA) Power Consumption
(mW)
VDDCORE(JP2) 1.1 ~ 1.32 1.15 29.69 34.14 0.36 0.41
VDDIODDR(JP15) 1.7 ~ 1.91.14 ~ 1.30 1.15 0.0017 0.00 0.0016 0.00
VDDIOM(JP6) 1.65 ~ 1.93.0 ~ 3.6 3.3 0.0061 0.02 0.0061 0.02
VDDIOP0(JP9) 1.65 ~ 3.6 3.3 0.0076 0.03 0.0076 0.03VDDIOP1(JP8) 1.65 ~ 3.6 3.3 0.0046 0.02 0.0046 0.02VDDBU(JP7) 1.65 ~ 3.6 3.25 0.0022 0.01 0.0022 0.01
VDDUTMIC(JP3) 1.1 ~ 1.32 1.15 0.0095 0.01 0.0014 0.00VDDUTMII(JP11) 3.0 ~ 3.6 3.3 0.0001 0.00 0.0001 0.00VDDPLLA(JP4) 1.1 ~ 1.32 1.15 7.73 8.89 0.0002 0.00VDDOSC(JP12) 1.65 ~ 3.6 3.3 0.43 1.42 0.0001 0.00VDDANA(JP13) 3.0 ~ 3.6 3.32 0.0032 0.01 0.0032 0.01VDDFUSE(JP10) 2.25 ~ 2.75 2.51 0.0001 0.00 0.0001 0.00
Total 45 0.50
Standby (MCK=PCK=132MHz) Suspend to Mem (MCK=PCK=512Hz=32768Hz(osc)/64)
9Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
2.2 Linux Idle
In this scenario, the Linux system is running without any workload (CPU usage is close to 0). Power consumptionfor this scenario is measured as the reference for other scenarios. By comparison, we can see how the currentchanges on each power rail when special features are enabled and in use.
To build up this scenario, stop auto-boot in U-Boot and set loader options for this case:Hit any key to stop autoboot: 0U-Boot>setenv bootcmd 'nand read 0x22000000 0x00200000 0x00400000; bootm 0x22000000#conf@sama5d36ek_pm'U-Boot>boot
After the operating system starts up, log in:Welcome to Buildrootbuildroot login: root#
The power consumption data for each power rail of the SAMA5D36 is listed below for reference.
Use Case: Command prompt after login, No application running, no LCD displayOperation Setting: MCK: 132MHz, PCK: 528MHz, LPDDR2: 132MHzUsed Peripheral: NAND, DBGU, MPDDRC
Power Rail Voltage Range (V) Voltage (V) Current (mA)
Power Consumption
(mW)VDDCORE(JP2) 1.1 ~ 1.32 1.25 44.97 56.21
VDDIODDR(JP15) 1.7 ~ 1.91.14 ~ 1.30 1.25 4.46 5.58
VDDIOM(JP6) 1.65 ~ 1.93.0 ~ 3.6 3.3 0.053 0.17
VDDIOP0(JP9) 1.65 ~ 3.6 3.3 0.0079 0.03VDDIOP1(JP8) 1.65 ~ 3.6 3.3 0.0046 0.02VDDBU(JP7) 1.65 ~ 3.6 3.25 0.002 0.01
VDDUTMIC(JP3) 1.1 ~ 1.32 1.25 0.011 0.01VDDUTMII(JP11) 3.0 ~ 3.6 3.3 0.0001 0.00VDDPLLA(JP4) 1.1 ~ 1.32 1.25 8.06 10.08VDDOSC(JP12) 1.65 ~ 3.6 3.3 0.43 1.42VDDANA(JP13) 3.0 ~ 3.6 3.32 0.0031 0.01VDDFUSE(JP10) 2.25 ~ 2.75 2.51 0.0001 0.00
Total 74
Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
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2.3 Dhrystone
In this scenario, Dhrystone, a typical computing benchmark program, is used to evaluate the contribution of theARM core to power consumption figures. The Dhrystone program is compiled with the same toolchain as kernelbui lding. The Dhrystone source code and binary can be extracte d from APP\dhrystone\ at FTP:ftp://ftp.linux4sam.org/pub/demo/sama5d36-cmp/.
In this case, the CPU usage accounts for almost 99% of the overall power consumption.
To build this scenario, stop auto-boot in U-Boot and set loader options for this case:Hit any key to stop autoboot: 0U-Boot>setenv bootcmd 'nand read 0x22000000 0x00200000 0x00400000; bootm 0x22000000#conf@sama5d36ek_dhrystone'U-Boot>boot
After the operating system starts up, log in:Welcome to Buildrootbuildroot login: root#
Insert an SD card containing Dhrystone and copy Dhrystone to NAND Flash:# mount /dev/mmcblk0p1 /mnt# cp /mnt/dhrystone ./
Unmount SD card and remove it from the demo board:# umount /mnt
Run Dhrystone:# ./dhrystone
The power consumption data for each power rail of the SAMA5D36 is listed below for reference.
Note: By comparing this scenario with the “Linux Idle” scenario, we can see that the power consumption contribution of the ARM core lies only in VDDCORE.
Use Case: Active Power Consumption (running Dhrystone: 599DMIPS)Operation Setting: MCK: 132MHz, PCK: 528MHz, LPDDR2: 132MHzUsed Peripheral: NAND, DBGU, MPDDRC, HSMCI
Power Rail Voltage Range (V) Voltage (V) Current (mA)
Power Consumption
(mW)VDDCORE(JP2) 1.1 ~ 1.32 1.25 130.63 163.29
VDDIODDR(JP15) 1.7 ~ 1.91.14 ~ 1.30 1.25 4.46 5.58
VDDIOM(JP6) 1.65 ~ 1.93.0 ~ 3.6 3.3 0.053 0.17
VDDIOP0(JP9) 1.65 ~ 3.6 3.3 0.0081 0.03VDDIOP1(JP8) 1.65 ~ 3.6 3.3 0.0047 0.02VDDBU(JP7) 1.65 ~ 3.6 3.25 0.0019 0.01
VDDUTMIC(JP3) 1.1 ~ 1.32 1.25 0.011 0.01VDDUTMII(JP11) 3.0 ~ 3.6 3.3 0.0001 0.00VDDPLLA(JP4) 1.1 ~ 1.32 1.25 8.05 10.06VDDOSC(JP12) 1.65 ~ 3.6 3.3 0.43 1.42VDDANA(JP13) 3.0 ~ 3.6 3.32 0.0032 0.01VDDFUSE(JP10) 2.25 ~ 2.75 2.51 0.0001 0.00
Total 181
11Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
2.4 Audio
Audio playback is an essential feature for smart devices. In this scenario, the SAMA5D36 is configured to performMP3 decoding and playing function.
To build this scenario, stop auto-boot in U-Boot and set loader options for this case:Hit any key to stop autoboot: 0U-Boot>setenv bootcmd 'nand read 0x22000000 0x00200000 0x00400000; bootm 0x22000000#conf@sama5d36ek_audio'
------------------------------------------------------------------------------------------------------------------------------------------------------------------------Note: The DTB file in loader options differs for different revisions of the MB.For RevC MB:
U-Boot>setenv bootcmd 'nand read 0x22000000 0x00200000 0x00400000; bootm 0x22000000#conf@sama5d36ek_revc_audio'
------------------------------------------------------------------------------------------------------------------------------------------------------------------------
U-Boot>boot
After the operating system starts up, log in:Welcome to Buildrootbuildroot login: root#
Insert an SD card containing an MP3 file and launch the following commands:# mount /dev/mmcblk0p1 /mnt# cd /mnt# lstellmewhy.mp3# madplay tellmewhy.mp3
# cd ../# umount /mnt
The power consumption data for each power rail of the SAMA5D36 is listed below for reference.
Operatino Setting: MCK: 132MHz, PCK: 528MHz, LPDDR2: 132MHzUsed Peripheral: NAND, DBGU, MPDDRC, SSC, HSMCI
Power Rail Voltage Range (V) Voltage (V) Current (mA)
Power Consumption
(mW)VDDCORE(JP2) 1.1 ~ 1.32 1.25 55.53 69.41
VDDIODDR(JP15) 1.7 ~ 1.91.14 ~ 1.30 1.25 4.73 5.91
VDDIOM(JP6) 1.65 ~ 1.93.0 ~ 3.6 3.3 0.042 0.14
VDDIOP0(JP9) 1.65 ~ 3.6 3.3 0.19 0.63VDDIOP1(JP8) 1.65 ~ 3.6 3.3 2.62 8.65VDDBU(JP7) 1.65 ~ 3.6 3.25 0.0019 0.01
VDDUTMIC(JP3) 1.1 ~ 1.32 1.25 0.011 0.01VDDUTMII(JP11) 3.0 ~ 3.6 3.3 0.0001 0.00VDDPLLA(JP4) 1.1 ~ 1.32 1.25 8.07 10.09VDDOSC(JP12) 1.65 ~ 3.6 3.3 0.43 1.42VDDANA(JP13) 3.0 ~ 3.6 3.32 0.0086 0.03VDDFUSE(JP10) 2.25 ~ 2.75 2.51 0.0001 0.00
Total 96
Use Case: MP3 Audio Playback (Mp3 file in SD card, 128Kbps, 44.1KHz sample rate,2 channels)
Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
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2.5 LCD Controller (LCDC)
This scenario is designed to evaluate the power consumption of the LCD controller, which is typically used formultimedia display. By default, the SAMA5D36-CMP demo launches a video. During video playing, the CPUusage is approximately 45%, mainly for video software decoding.
To build this scenario, stop auto-boot in U-Boot and set loader options for this case:Hit any key to stop autoboot: 0U-Boot>setenv bootcmd 'nand read 0x22000000 0x00200000 0x00400000; bootm 0x22000000#conf@sama5d36ek_lcd'
------------------------------------------------------------------------------------------------------------------------------------------------------------------------ Note: The DTB file in loader options differs for different DM.For PDA 4.3”:
U-Boot>setenv bootcmd 'nand read 0x22000000 0x00200000 0x00400000; bootm
0x22000000#conf@ sama5d36ek_pda4_lcd'
For PDA 7”:U-Boot>setenv bootcmd 'nand read 0x22000000 0x00200000 0x00400000; bootm
0x22000000#conf@ sama5d36ek_pda7_lcd'
------------------------------------------------------------------------------------------------------------------------------------------------------------------------
U-Boot>boot
After the operating system starts up, log in:Welcome to Buildrootbuildroot login: root#
The power consumption data for each power rail of the SAMA5D36 is listed below for reference.
Operation Setting: MCK: 132MHz, PCK: 528MHz, LPDDR2: 132MHzUsed Peripheral: NAND, DBGU, MPDDRC, LCDC, GPIO
Power Rail Voltage Range (V) Voltage (V) Current (mA)
Power Consumption
(mW)VDDCORE(JP2) 1.1 ~ 1.32 1.25 85.41 106.76
VDDIODDR(JP15) 1.7 ~ 1.91.14 ~ 1.30 1.25 6.44 8.05
VDDIOM(JP6) 1.65 ~ 1.93.0 ~ 3.6 3.3 0.14 0.46
VDDIOP0(JP9) 1.65 ~ 3.6 3.3 12.28 40.52VDDIOP1(JP8) 1.65 ~ 3.6 3.3 0.0047 0.02VDDBU(JP7) 1.65 ~ 3.6 3.25 0.0029 0.01
VDDUTMIC(JP3) 1.1 ~ 1.32 1.25 0.011 0.01VDDUTMII(JP11) 3.0 ~ 3.6 3.3 0.0001 0.00VDDPLLA(JP4) 1.1 ~ 1.32 1.25 8.05 10.06VDDOSC(JP12) 1.65 ~ 3.6 3.3 0.42 1.39VDDANA(JP13) 3.0 ~ 3.6 3.32 0.0032 0.01VDDFUSE(JP10) 2.25 ~ 2.75 2.51 0.0001 0.00
Total 167
Use Case: Video playback (LCDC: base layer, 800*480*24 bits, 45 fps; 480*272 MPEG2, software decoding)
13Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
2.6 Image Sensor Interface (ISI)
This scenario is designed to evaluate the power consumption of the image sensor interface, which is used forimage sensor preview. By default, the SAMA5D36-CMP demo supports several sensor modules includingOV5640/OV2640/OV2643.
To build this scenario, stop auto-boot in U-Boot and set loader options for this case:Hit any key to stop autoboot: 0U-Boot>setenv bootcmd 'nand read 0x22000000 0x00200000 0x00400000; bootm 0x22000000#conf@sama5d36ek_isi'
------------------------------------------------------------------------------------------------------------------------------------------------------------------------Note: The DTB file in loader options differs for different revisions of the MB and the DM.For PDA 4.3”:
U-Boot>setenv bootcmd 'nand read 0x22000000 0x00200000 0x00400000; bootm 0x22000000#conf@sama5d36ek_pda4_isi'
For PDA 7”:U-Boot>setenv bootcmd 'nand read 0x22000000 0x00200000 0x00400000; bootm 0x22000000#conf@sama5d36ek_pda7_isi'
For RevC MB:U-Boot>setenv bootcmd 'nand read 0x22000000 0x00200000 0x00400000; bootm 0x22000000#conf@sama5d36ek_revc_isi'U-Boot>setenv bootcmd 'nand read 0x22000000 0x00200000 0x00400000; bootm 0x22000000#conf@sama5d36ek_revc_pda4_isi'U-Boot>setenv bootcmd 'nand read 0x22000000 0x00200000 0x00400000; bootm 0x22000000#conf@sama5d36ek_revc_pda7_isi'
------------------------------------------------------------------------------------------------------------------------------------------------------------------------
U-Boot>boot
After the operating system starts up, log in:Welcome to Buildrootbuildroot login: root#
Stop the default video playing:# psPID USER COMMAND 1 root init … 619 root {go.sh} /bin/sh /root/go.sh 620 root -sh 624 root gst-launch-0.10 filesrc location=/root/MPEG2_480_272.avi ! avide 629 root ps# kill -9 619 (The PID may differ each time)# kill -9 624 (The PID may differ each time)
Start the image sensor preview:# ls /sys/class/video4linuxvideo0# cat /sys/class/video4linux/video0/nameisi-camera# gst-launch v4l2src device="/dev/video0" ! video/x-raw-yuv,width=640,height=480 ! ffmpegcolorspace ! fbdevsink
Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
14
The power consumption data for each power rail of the SAMA5D36 is listed below for reference.
Use Case: Image Sensor preview (Image Sensor: OV5640, VGA 640*480, YUV422)Operation Setting: MCK: 132MHz, PCK: 528MHz, LPDDR2: 132MHzUsed Peripheral: NAND, DBGU, MPDDRC, ISI, LCDC, GPIO
Power Rail Voltage Range (V) Voltage (V) Current (mA)
Power Consumption
(mW)VDDCORE(JP2) 1.1 ~ 1.32 1.25 79.67 99.59
VDDIODDR(JP15) 1.7 ~ 1.91.14 ~ 1.30 1.25 8.16 10.20
VDDIOM(JP6) 1.65 ~ 1.93.0 ~ 3.6 3.3 0.13 0.43
VDDIOP0(JP9) 1.65 ~ 3.6 3.3 14.74 48.64VDDIOP1(JP8) 1.65 ~ 3.6 3.3 0.0045 0.01VDDBU(JP7) 1.65 ~ 3.6 3.25 0.0075 0.02
VDDUTMIC(JP3) 1.1 ~ 1.32 1.25 0.011 0.01VDDUTMII(JP11) 3.0 ~ 3.6 3.3 0.0001 0.00VDDPLLA(JP4) 1.1 ~ 1.32 1.25 8.05 10.06VDDOSC(JP12) 1.65 ~ 3.6 3.3 0.42 1.39VDDANA(JP13) 3.0 ~ 3.6 3.32 4.06 13.48VDDFUSE(JP10) 2.25 ~ 2.75 2.51 0.0001 0.00
Total 184
15Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
2.7 Gigabit EMAC (GMAC)
iPerf is a tool to measure the maximum bandwidth for TCP and UDP. By default, it is included in the SAMA5D36-CMP demo. To proceed, set up the Gigabit Ethernet network and start the measurement.
To build this scenario, stop auto-boot in U-Boot and set loader options for this case:Hit any key to stop autoboot: 0U-Boot>setenv bootcmd 'nand read 0x22000000 0x00200000 0x00400000; bootm 0x22000000#conf@sama5d36ek_gmac'U-Boot>boot
After OS starts up, log in:Welcome to Buildrootbuildroot login: root#
Use an Ethernet cable to connect the Gigabit Ethernet ports of both the evaluation kit and the PC, as illustratedbelow:
Set up the evaluation kit as the server with the following commands: # ifconfig eth0 192.168.3.2# iperf -u –s
Set up the PC as the client and then start data transfer to the PC with the following commands:# ifconfig eth0 192.168.3.3# iperf -u -c 192.168.3.2 -t 120 -i 1 -b 300M
The power consumption data for each power rail of the SAMA5D36 is listed below for reference.
PCClient
SAMA5D36 Server
MAC EMAC GMAC
Use Case: Running as iPerf serverOperatino Setting: MCK: 132MHz, PCK: 528MHz, LPDDR2: 132MHzUsed Peripheral: NAND, DBGU, MPDDRC, GMAC
Power Rail Voltage Range (V) Voltage (V) Current (mA)
Power Consumption
(mW)VDDCORE(JP2) 1.1 ~ 1.32 1.25 95.24 119.05
VDDIODDR(JP15) 1.7 ~ 1.91.14 ~ 1.30 1.25 8.38 10.48
VDDIOM(JP6) 1.65 ~ 1.93.0 ~ 3.6 3.3 0.062 0.20
VDDIOP0(JP9) 1.65 ~ 3.6 3.3 0.0079 0.03VDDIOP1(JP8) 1.65 ~ 3.6 3.3 10.37 34.22VDDBU(JP7) 1.65 ~ 3.6 3.25 0.0019 0.01
VDDUTMIC(JP3) 1.1 ~ 1.32 1.25 0.011 0.01VDDUTMII(JP11) 3.0 ~ 3.6 3.3 0.0001 0.00VDDPLLA(JP4) 1.1 ~ 1.32 1.25 8.01 10.01VDDOSC(JP12) 1.65 ~ 3.6 3.3 0.41 1.35VDDANA(JP13) 3.0 ~ 3.6 3.32 0.0031 0.01VDDFUSE(JP10) 2.25 ~ 2.75 2.51 0.0001 0.00
Total 175
Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
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2.8 USB Host
Bonnie++ is a benchmark tool to test hard drive and file system performance. The Bonnie++ source code can bedownloaded for free from http://sourceforge.net/projects/bonnie/. In this case, Bonnie++ is compiled with the sametool-chain as kernel building. The Bonnie++ source code and binary can be extracted from APP\bonnie\ at FTP:ftp://ftp.linux4sam.org/pub/demo/sama5d36-cmp/.
To measure the typical power consumption of the USB peripheral, the test must be run from a USB disk. The testlasts about 30 minutes, depending on the speed of the USB disk. The maximum CPU usage may be as high as90%.
To build up this scenario, stop auto-boot in U-Boot and set loader options for this case:Hit any key to stop autoboot: 0U-Boot>setenv bootcmd 'nand read 0x22000000 0x00200000 0x00400000; bootm 0x22000000#conf@sama5d36ek_usb'U-Boot>boot
After the operating system starts up, log in:Welcome to Buildrootbuildroot login: root#
Plug a USB disk containing the benchmark test (Bonnie++) and launch the following commands:# mount -t vfat /dev/sda1 /mnt# cd /mnt
# lsbonnie++ # ./bonnie\+\+ -d ./test -s 1000 -u 0Using uid:0, gid:0.Writing with putc()...doneWriting intelligently...doneRewriting...doneReading with getc()...doneReading intelligently...donestart 'em...done...done...done...Create files in sequential order...done.Stat files in sequential order...done.Delete files in sequential order...done.Create files in random order...done.Stat files in random order...done.Delete files in random order...done.Version 1.03e ------Sequential Output------ --Sequential Input- --Random- -Per Chr- --Block-- -Rewrite- -Per Chr- --Block-- --Seeks--Machine Size K/sec %CP K/sec %CP K/sec %CP K/sec %CP K/sec %CP /sec %CPbuildroot 1000M 3338 75 6674 1 4191 5 4354 95 21745 21 1318 27 ------Sequential Create------ --------Random Create-------- -Create-- --Read--- -Delete-- -Create-- --Read--- -Delete-- files /sec %CP /sec %CP /sec %CP /sec %CP /sec %CP /sec %CP 16 13 95 +++++ +++ 196 99 20 96 +++++ +++ 45 59buildroot,1000M,3338,75,6674,1,4191,5,4354,95,21745,21,1318.1,27,16,13,95,+++++,+++,196,99,20,96,+++++,+++,45,59
# cd ../# umount /mnt
17Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
The power consumption data for each power rail of the SAMA5D36 is listed below for reference.
Use Case: Run Bonnie++(Version: 1.03e command: ./bonnie++ -u 0) on USB diskOperatino Setting: MCK: 132MHz, PCK: 528MHz, LPDDR2: 132MHzUsed Peripheral: NAND, DBGU, MPDDRC, USB Host
Power Rail Voltage Range (V) Voltage (V) Current (mA)
Power Consumption
(mW)VDDCORE(JP2) 1.1 ~ 1.32 1.25 116.01 145.01
VDDIODDR(JP15) 1.7 ~ 1.91.14 ~ 1.30 1.25 5.53 6.91
VDDIOM(JP6) 1.65 ~ 1.93.0 ~ 3.6 3.3 0.047 0.16
VDDIOP0(JP9) 1.65 ~ 3.6 3.3 0.0085 0.03VDDIOP1(JP8) 1.65 ~ 3.6 3.3 0.0048 0.02VDDBU(JP7) 1.65 ~ 3.6 3.25 0.0019 0.01
VDDUTMIC(JP3) 1.1 ~ 1.32 1.25 7.94 9.93VDDUTMII(JP11) 3.0 ~ 3.6 3.3 22.95 75.74VDDPLLA(JP4) 1.1 ~ 1.32 1.25 8.04 10.05VDDOSC(JP12) 1.65 ~ 3.6 3.3 9.93 32.77VDDANA(JP13) 3.0 ~ 3.6 3.32 0.0033 0.01VDDFUSE(JP10) 2.25 ~ 2.75 2.51 0.0001 0.00
Total 281
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3. Power Optimization
3.1 Optimizing Power Consumption of the SAMA5D36
In this section, we provide techniques to optimize the power consumption of the SAMA5D36 using power rails,clock settings, peripheral settings, working mode selection and I/O setting.
3.1.1 SAMA5D36 Power Rails
Table 3-1 lists the parts of the SAMA5D36 powered by different power rails. Understanding the power behavior ofthese power rails helps to optimize their use. Also, the power consumption parameters provided in the SAMA5D3series datasheet help to estimate the power consumption of the SAMA5D36 in a real application.
3.1.1.1 VDDCORE
VDDCORE powers the processor, embedded memories and all peripherals.
The SAMA5D3 features three low-power modes: Idle, Ultra-low-power and Backup. Depending on the modeimplemented on the SAMA5D3, the power consumption on VDDCORE can be lowered to different levels (refer tothe SAMA5D3 datasheet for detailed numbers).
When the processor goes into Ultra-low-power mode, power consumption and MCK frequency decrease. Thelower the CPU MCK frequency, the less power it consumes, and the longer the wake-up time becomes.
Suggestion: Select the appropriate MCK frequency for Ultra-low-power mode depending on the requirements ofapplication performance and wake-up speed.
Note: Put the core into Idle mode to save power when no tasks are in process.
Table 3-1. SAMA5D3 Power Supplies
NameVoltage Range, Nominal
Associated Ground Powers
VDDCORE 1.1–1.32V, 1.2V GNDCORE The core, including the processor, the embedded memories and the peripherals
VDDIODDR1.7–1.9V, 1.8V
1.14–1.30, 1.2VGNDIODDR
LPDDR/DDR2 Interface I/O lines
LPDDR2 Interface I/O lines
VDDIOM1.65–1.95V, 1.8V
3.0–3.6V, 3.3VGNDIOM NAND and HSMC Interface I/O lines
VDDIOP0 1.65–3.6V GNDIOP Peripheral I/O lines
VDDIOP1 1.65–3.6V GNDIOP Peripheral I/O lines
VDDBU 1.65–3.6V GNDBU The Slow Clock Oscillator, the internal 32 kHz RC Oscillator and a part of the System Controller
VDDUTMIC 1.1–1.32V, 1.2V GNDUTMIThe USB device and host UTMI+ core
The UTMI PLL
VDDUTMII 3.0–3.6V, 3.3V GNDUTMI The USB device and host UTMI+ interface
VDDPLLA 1.1–1.32V, 1.2V GNDPLL The PLLA cell
VDDOSC 1.65–3.6V GNDOSC Main Oscillator Cell and PLL UTMI. If PLL UTMI or USB is used, the range is to be 3.0V to 3.6V.
VDDANA 3.0–3.6V, 3.3V GNDANA Analog-to-Digital Converter
VDDFUSE 2.25–2.75V, 2.5V GNDFUSEFuse box for programming.
It can be tied to ground with a 100 Ω resistor for fuse reading only.
19Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
3.1.1.2 VDDIODDR
The current into VDDIODDR depends on the external memory devices and speed. Its range can vary from almost0 to a much higher value.
For the LPDDR2 on the CMP board, the voltage of the memory IOs is 1.25V and MCK is set to 132 MHz. After memory initialization, the current is about 4.5 mA with no data access. This current will increase with
more data access (read and write), achieving up to 10.9 mA. For memory Self-refresh mode, the current is as low as 2~3 uA.
In comparison, for the DDR2 on the CM board, with voltage of memory IOs at 1.8V and the MCK set to 132 MHz,,the current into VDDIODDR ranges from 15 mA to 20 mA.
3.1.1.3 VDDIOM, VDDIOP0 and VDDIOP1
These three power rails power most I/Os of SAMA5D3 (refer to section 4 “Package and Pinout” in datasheet). Anyperipheral activity may affect the current value on the corresponding power rail.
3.1.1.4 VDDBU
VDDBU powers the Slow Clock oscillator, the internal 32 kHz RC oscillator and a part of the System Controller.
Suggestion: To reduce power consumption on VDDBU, make sure that the unused oscillator is disabled whenswitching between the external and internal oscillators..
Note: The internal 32 kHz RC oscillator is used in ROM code for fast boot-up, though its frequency precision islower than that of the external crystal oscillator.
3.1.1.5 VDDOSC, VDDUTMIC and VDDUTMII
VDDOSC powers the main oscillator cell and part of the PLL UTMI.
VDDUTMIC powers the USB device and host UTMI+ core.
Once the USB transceiver is enabled, approximately 5.5 mA will be consumed on this power rail. There will be anincrease of approximately 2.5 mA for device or host transfer.
VDDUTMII powers the USB device and host UTMI+ interface.
There is a total of three USB ports. Each port causes an increase of about 18 mA of current in VDDUTMII after theUSB connection is set up.
Suggestion: To reduce power consumption on these three power rails, disable the USB transceiver as well as theUTMI PLL if the USB is not necessary in the application.
3.1.1.6 VDDPLLA
The PLL output frequency ranges from 400 MHz to 1000 MHz. The higher the output frequen cy, the higer thepower consumption. Thus it is important to define an appropriate clock tree for the system and then set up theoscillator and PLLs accordingly.
For example, if PCK = 400 MHz, more power is saved by setting PCK = PLL = 400 MHz instead of PLL = 800 MHzand PCK=PLL/2.
3.1.1.7 VDDANA
VDDANA supplies the Analog-to-Digital Converter and its IOs only. When the ADC is not in use or in Sleep mode,the current through this power rail is only several µA.
3.1.1.8 VDDFUSE
During FUSE programming, the maximum current through VDDFUSE may reach 40 mA. Under other conditions,such as FUSE reading or no action, power consumption is close to 0.
Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
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3.1.2 System Clock
Master clock (MCK) is the clock provided to memory controllers and all peripherals. When the processor and allperipherals are idle and no task is being processed, the base consumption on VDDCORE mainly depends on MCKfrequency, whether the PCK is equal to 2 × MCK, 3 × MCK, or 4 × MCK. The PCK frequency only affects the CPUperformance.
Table 3-2 shows the power consumption in Linux Idle mode with different MCK. We can see that the powerconsumption on VDDCORE in Idle mode is proportional to MCK frequency (~ 0.32 mA/MHz).
Suggestion: Select the appropriate PCK depending on application requirements.
Then set MCK to 1/4 × PCK.
3.1.3 Peripherals
The peripherals can be divided into three categories depending on their behavior regarding power consumption(VDDCORE). Refer to the table “Power Consumpti on by Peripheral in Active Mode (TA 25°C, TA 85°C and TA105°C)” in the Electrical Characteristics section in the SAMA5D3 datasheet.
3.1.3.1 Category I
Each peripheral in this category consumes a constant amount of power as long as it is enabled, with the powe rconsumption value directly proportional to its working frequency.
For example, when the USART is enabled, its power consumption is:
3.0 µA/MHz(1) × working frequency(2)
Note (1): 3.0 uA/MHz is the USART consumption per MHz.
Table 3-2. VDDCORE Consumption Vs. MCK
OS IdleMCK=132 MHzPCK=528 MHz,
VDDCORE=1.25V
OS IdleMCK=132 MHz
PCK=396 MHz
OS IdleMCK=88 MHz
PCK=264 MHz
OS IdleMCK=50 MHz
PCK=200 MHz
Power Rail
Voltage
(V)
Current
(mA)
Power Consumption
(mW)Current
(mA)
Power Consumption
(mW)Current
(mA)
Power Consumption
(mW)Current
(mA)
Power Consumption
(mW)
VDDCORE(JP2) 1.2 42.18 52.73 41.89 50.27 28.09 33.71 18.38 22.06
VDDIODDR(JP15) 1.2 4.33 5.41 4.23 5.08 2.84 3.41 1.63 1.96
VDDIOM(JP6) 3.3 0.079 0.26 0.08 0.26 0.079 0.26 0.079 0.26
VDDIOP0(JP9) 3.3 0.083 0.27 0.083 0.27 0.083 0.27 0.082 0.27
VDDIOP1(JP8) 3.3 0.17 0.56 0.17 0.56 0.17 0.56 0.17 0.56
VDDBU(JP7) 3.25 0.0013 0.00 0.0013 0.00 0.0013 0.00 0.001 3 0.00
VDDUTMIC(JP3) 1.2 0.0099 0.01 0.0093 0.01 0.0086 0.01 0.008 3 0.01
VDDUTMII(JP11) 3.3 0.0002 0.00 0.0002 0.00 0.0002 0.00 0.000 2 0.00
VDDPLLA(JP4) 1.2 7.81 9.76 9.99 11.99 7.82 9.38 10.01 12.01
VDDOSC(JP12) 3.3 0.42 1.39 0.42 1.39 0.42 1.39 0.42 1.39
VDDANA(JP13) 3.32 0.0032 0.01 0.0032 0.01 0.0032 0.01 0.003 2 0.01
VDDFUSE(JP10) 2.51 0.0002 0.00 0.0002 0.00 0.0002 0.00 0.000 2 0.00
Total 70 70 49 39
VDDCOREConsumption
Per MCK 0.32 0.40 0.32 0.38 0.32 0.38 0.37 0.44
21Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
Note (2): The working frequency is not always equal to MCK.
The Soft Modem (SMD) is a special case, with its power consumption dependent on its clock source instead of itsworking frequency. Linear with the MCK, thus its power consumption is:
5.5 µA/MHz(3) × MCK
Note (3): 5.5 uA/MHz is the SMD consumption per MHz.
3.1.3.2 Category II
The power consumption of the peripherals in this category is related to their transfer speed.
For example, for the high-speed USB Host, when CPU usage is 24%, the UHPHS power consumption is:
(9.6 × transfer speed (Mb/s) + 12) µA/MHz × MCK
Note: For UHPHS/UDPHS, LCDC, EMAC/GMAC, the power consumption already includes the MPDDRCconsumption on VDDCORE.
3.1.3.3 Category III
The power consumption of each peripheral in this category is related to its bandwidth usage.
An example is the MPDDRC. Figure 3-1 shows the correlation between MPDDRC power consumption and itsbandwidth.
Figure 3-1. Correlation between Consumption and Bandwidth
The increase in power consumption is linear with MCK (with the same bandwidth usage condition). Figure 3-2shows the relation between power consumption increase and MCK (with the same bandwidth).
y = 31.82x + 46.598R² = 0.997
50515253545556575859
0.00 0.10 0.20 0.30 0.40
Cur
rent
uA
/MH
z
Bandwidth Usage
Full FIFO
Series1
Linear (Series1)
y = 40.899x + 46.773R² = 0.9998
01020304050607080
0.00 0.20 0.40 0.60
Cur
rent
uA
/MH
z
Bandwidth Usage
Half FIFO
Series1
Linear (Series1)
Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
22
Figure 3-2. Linearity between Consumption Increase and MCK
3.1.4 VDDCORE Power Consumption Model
With the power consumption information extracted from the datasheet, we can estimate the overall consumptionon each power rail.
Note: Compared to VDDCORE, other power rails do not contribute much to overall power consumption. For thisreason, the focus in this section is on the power consumption model of VDDCORE.
The overall consumption on VDDCORE can be calculated by the formula:
IVDDCORE_overall = IVDDCORE_idle + (IVDDCORE_dhrystone – IVDDCORE_idle) × CPU_usage (%) + IVDDCORE_peripheral_1 + …+ IVDDCORE_peripheral_n
With the GMAC use case as an example: MCK is 132 MHz, PCK is 528 MHz. USART and GMAC are both enabled. CPU usage is 24%. GMAC transfer speed is 300 Mb/s.
Therefore the theoretical overall consumption on VDDCORE is:
IVDDCORE_overall = 24 mA + (117 mA - 24 mA) × 24% + (1.2 uA × 300 Mb/s + 36 uA) × 132 MHz / 1000+ 3.0 uA × 132 MHz / 1000 = 99.02 mA
Note: IVDDCORE_idle: VDDCORE power consumption in Idle mode (24 mA, refer to the SAMA5D3 datasheet)
Note: IVDDCORE_dhrystone: VDDCORE Power Consumption in Active Mode running Dhrystone (117 mA, refer to the SAMA5D3 datasheet).
The calculated theoretical result is aligned with the measured value: 95.24 mA.
Note: The calculated theoretical value is only for reference. The final data should be based on the realmeasurement result.
Suggestions:
1. Disable any peripherals not implemented in the user application to avoid unnecessary power consumption.
Note: Disabling the USB is not sufficient to ensure that it consumes no power. In addition, the USB transceiversmust also be disabled.
2. Use the minimum peripheral clock rate (MCK/8, /4, /2).
0
0.5
1
1.5
2
2.5
3
3.5
4
33 66 100 132 165
Current (mA)
MCK (MHz)
MPDDRC Increase (49% bandwidth)) vs. Master Clock
Total
23Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
3.1.5 Power Supply
Set the power supply voltage to a minimum value depending on the corresponding working conditions: 1.15V ± 5% for VDDCORE in Linux Suspend-to-mem mode 1.2V ± 5% (PLL < 800 MHz) or 1.25 V ± 5% (PLL >= 800 MHz) in Active mode
The power management IC (Active-Semi PMIC)makes it possible to adjust the core voltage dynamically. Normally,core and PLL supply must be set to 1.25V to reach their maximum speed. If PCK ≤ 400 MHz, 1.15V is enough tosave power.
3.1.6 Multi-port DDR-SDRAM Controller (MPDDRC)
For the Multi-port DDR-SDRAM Controller (MPDDRC), external impedance match resistors are not necessarybecause the MPDDRC already has internal impedance matched. Therefore, adding external resistors may lead tohigher consumption.
Suggestions:
1. Do not add external impedance match resistors for MPDDRC.
2. Set the memory refresh cycle properly. Generating too many refresh commands will lower the memorybandwidth and SAMA5D3 performance.
3.1.7 GPIO
In Low-power modes, the I/O state of SAMA5D3 can influence the power consumption of the external devices.
For example, for some bidirectional I/Os with external pull-up/pull-down resistors, their states are uncertain whenthe CPU enters Low-power modes. This may lead to extra power consumption.
Suggestion: Correctly configure the PIO to pull-up/pull-down, input/output, output (0/1) state.
Using the Soft Modem as an example, set its two pads (DIBP to Pull-up state, DIBN to Pull-down state) tominimize power consumption.
Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
24
3.2 Optimizing Power Consumption of External Devices
To minimize overall system-level power consumption, the power consumption of external devices must be takeninto consideration.
3.2.1 General Guidelines
Check the specification of each external device for the correlation between power consumption and the differentworking modes, then configure the device to work in the appropriate power mode.
If the low-power requirement is still not met, shut down the external device by directly switching off its power supplywhen it is not used.
3.2.2 Examples on SAMA5D36-CMP Demo Board
3.2.2.1 LPDDR2
The SAMA5D3 supports DDR2 and LPDDR2, both of which can be set in Self-refresh mode when the Linux OSenters Standby/Suspend mode. It is recommended to use LPDDR2 instead of DDR2 in low-power applicationsbecause the power consumption level of LPDDR2 is only about 1/3 of that of DDR2 (refer to Table 3-3 for details),with both running at the same frequency. In addition, LPDDR2 can work at a much lower frequency thus savingmore power, while there is a minimum frequency limitation for DDR2.
Table 3-3 provides the power consumption comparison between LPDDR2 (on CMP) and DDR2 (on CM).
Note: The LPDDR2 module on the CMP board is MT42L128M32D1GU-25 WTA (512 MB, 32-bit); the DDR2module on the CM board is MT47H128M16RT-25 (256 MB, 16-bit).
3.2.2.2 Gigabit Ethernet PHY
The GMAC PHY chip (KSZ9031RNX) on the SAMA5D3 demo board has two power-down modes: software power-down and chip power-down. The consumption in chip power-down mode is lower than that in software power-down mode. However, it is important to note that once the GMAC PHY enters into chip power-down mode, the onlyway to exit is by hardware reset.
3.2.2.3 Device Shutdown
If the LCD is not used, ensure that the LCD backlight is turned off, as it has the highest power consumption of thesystem. Put the LCD control IC into Standby mode. Ensure that the LCDC is disabled in the SAMA5D36.
By implementating the suggestions for consumption optimization, the power consumption of the correspondingexternal devices can be reduced. Table 3-4 shows the change in power consumption figures after implementingthe power-saving techniques on the SAMA5D36-CMP board.
Table 3-3. Power Consumption Comparison between LPDDR2 and DDR2
Current (µA) from Datasheet
400 MHz Self-refresh Mode
LPDDR2
MT42L128M32D1GU-25 WTA122000 5683
DDR2 * 2
MT47H128M16RT-25E:C324000 28800
25Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
4. Conclusion
The SAMA5D3 series targets low-power applications. Its power consumption is significantly lower compared tosome competitors’ similar products in both low-power and in active modes, without reduced performance levels.The SAMA5D3 is suitable for low-power applications, such as portable devices that require long battery life and arich set of connectivity interfaces.
The data provided in this application note may vary from board to board and from device to device, and de pendson the measurement conditions and type of equipment used. The data is for reference only.
Table 3-4. Power Consumption of External Devices
Consumption in Active Mode
5V (mA)
Consumption in Low-Power Mode
5V (mA)Consumption Optimization Solution
Expected Consumption
5V (mA)
LCD 260 50 Disconnect DM board 0
G-PHY 90 13 Set to power-down mode 13
E-PHY 32 2 Set to power-down mode 2
COM 20 0.6 Disconnect cable 0.6
HDMI 4.7 4.7 Set to power-down mode 0
JTAG 36 36 Disconnect its power supply 0
Audio 0.1 0.1 Keep in power-down mode (after reset) 0.1
Other ICs 15 15 15
Total 457.8 121.4 30.7
Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
26
5. FAQ
1. When the demo board is powered on, why doesn’t the default demo show up?
Please check the following points: Double check all the jumpers to make sure they are set correctly. If not, set them according to Figure 1-2. The demo might not be successfully flashed, or the NAND Flash might be erased. If so, re-flash the default
demo as described in Section 1.2. If an amp meter is inserted for current measurement, the supply voltage might drop due to the impedance of
the amp meter. Check the range selection of the meter.
2. Why does switching the test range of the amp meter cause the reset of the demo board? On some low-end amp meters, the current loop is cut off during range switching.
3. Why are the consumption numbers I get in some cases not exactly the same as those provided in thisapplication note? The numbers provided in this application note are typical/average values. The actual values might vary
slightly due to certain factors such as different ICs, PCB and temperature. The default demo is with a full DTB, in which most peripherals and drivers have been enabled. If you use the
default demo for other different cases (where specific DTBs instead of the full DTB should be used), the power consumption will increase.
4. How can I wake up the system from Standby/Suspend mode when no DM board is connected? A push-button PB3 on the MB can be used to wake up the kit from Standby/Suspend mode. But as the pin
for push-button PB3 is multiplexed as one LCD data line, for the default/LCD/ISI case, the push-button PB3 does not work and you must reset the kit.
5. In the USB host scenario, why is the current through VDDUTMII and VDDOSC abnormal in Low-power mode? In the current release, the USB transceiver and an internal bandgap for UTMI PHY cannot be stopped once
they have been started or initialized.
6. Why is the wake-up time printed on the hyperterminal in this demo longer than that in datasheet? The wake-up time in the datasheet is the time from when the wake-up event occurs to when the core
executes the first instruction. The wake-up time printed on the hyperterminal in this demo is from the wake-up event occurrence to system
recovery. The extra time is used to resume device drivers.
27Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
Appendix A. SAMA5D36-CMP Schematics
This section contains the following schematics: Block diagram PIO Muxing & Jumper SAMA5D3x power SAMA5D3x NOR and NAND Flash SAMA5D3x Data Flash, 1-wire, LED 4Gb LPDDR2 Ethernet 200-pin SODIMM
Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
28
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PIO A,...EPIO A,...EPIO A&D
PIO B&E
PIO C
ATMELARMA5 PROCESSOR ATSAMA5D36-CU
SODIMM
CONNECTOR
PIO
CONNECTOR
PIO
CONNECTOR
PIO
CONNECTOR
EBI4GbLPDDR2SDRAM
2GbNANDFLASH
128Mb NORFLASH
1-WIREEEPROM
SERIALDATAFLASH
TWO LED10/100/1000 FASTETHERNET
USB A,B,C
DIB
5V INPUT
VBAT
ANALOG Reference
ICE
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5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SCHEMATICS CONVENTIONSDEFAULT
CLOSE
JUMPER and SOLDERDROP
4
JP6
PAGE REFERENCE FUNCTION
VDDIOM_MPU
DEFAULT NO POPULATE PARTS
TEST POINTPAGE REFERENCE FUNCTION
4
TP25
(1) Resistance Unit: "K" is "Kohm", "R" is "Ohm
(2) "DNP" means the component is not populatedby default
SAMA5D35SAMA5D34CAN0CAN1GMACEMACHSMCI2LCDCUSART0USART1ISITC1
SAMA5D36 config
PE0 ( EBI_A0 )
VDDPLLACLOSE
SAMA5D33
PAGE REFERENCE FUNCTION
4 R130 Option for NRSTO from PMIC
SAMA5D31 SAMA5D36
JP8
4
4
4
4
4
4
4
4
4
4
4
CLOSE VDDIOP1_MPU
VDDIOP0_MPUCLOSEJP9
JP11 CLOSE VDDUTMII
VDDOSCJP12 CLOSE
JP2 CLOSE VDDCORE
JP4
JP15 CLOSE VDDIODDR_MPU_1V2
JP7 CLOSE VDDBU
JP13 CLOSE VDDANA
JP10 CLOSE FUSE_2V5
JP14 OPEN CM-3V3 to MB-3V3
10 R81 Option for PB13 to Sodimm
4
TP23 Output 6 ( LDO) of PMIC
TP24 Output 7 ( LDO) of PMIC
4
TP4
TP10
TP18
4
4
5
WKUP
SHDN
JP174 CLOSE VCC_5V
4 JP18 CLOSE VCC_1V8
4 JP19 CLOSE VCC_3V3
4 JP20 CLOSE VDDIOP1_GPHY
4 JP21 CLOSE VDDIODDR_1V2
JP22 CLOSE VCC_1V24
4 JP3 CLOSE VDDUTMIC
JP1 CLOSE SPI0_NPCS0 for Dataflash7
JP169 2-1 GPHY 1V2 from VCC_1V2
GPHY 1V2 from PMOS2-3
C190 Option for SHDN pulse edge power on PMIC4
Q4 Option for nPBIN from MB button4
C195 Option for delay NRST_CMP4
R133 Option for nPBSTAT to PD194
4 JP14 Option for VCC_3V3 to MB
5 R54 Option for pull up JTAGSEL
6 R1 Option for pull down WP of NAND flash
8 R82, R83 Option for terminal DDR_CLK
NRST_CMP
TP6 DDR_VREF8
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5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Enable or Disable DCDCFrom MB push button, connect some device's reset input on MB
Use when need feeding MB 3V3
(TWD1)(TWCK1) (3V3)
(2V5)
(1V8)
From PMIC
Wake up and Force power on buttonon MB; the pull-up resistor on MB should DNP
Filter for VDDREF
Discharge current on LPDDR2-VDD1
Auto power on option
VDDREF
VDDREF
WKUP
NRST_CMP
SHDN
PWRHLD
NRSTO
PWRHLD
NRSTO
VCC_1V2
VCC_3V3
VCC_1V8
VCC_3V3
VDDIODDR_1V2
VCC_5V_SOD
VDDBU_SOD
VDDBU_SODVDDBU
VDDIOP0_MPU
VDDIOP1_MPU
VCC_3V3
VDDOSC
VDDIOM_MPU
VDDIOP0
VDDIOP1
VDDIOM
VDDUTMII
VDDIODDR_MPU_1V2
VCC_3V3_SODVCC_3V3
VCC_3V3
VCC_1V2VDDCORE
VDDPLLA
VDDUTMIC
VDDIOP1 VDDIOP1_GPHYFUSE_2V5
VDDANA
VCC_3V3
VDDIOM VDDIOM_NOR
VDDIOM VDDIOM_NAND
SHDN
PC27PC26
WKUP
NRST_SOD
NRST_CMP
WKUP_SOD
PC31
PD19
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JH 27-Sep-1321-Jan-14JH X.X
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Q4Si1563EDHDNP
1 32
456
R120 0R
L12180ohm at 100MHz
12JP8
12
R10951K
C17410uF
L18 2.2uH
R123 100K
C17810uF
C195100nFDNP
JP412
R134100K
C24.7uF
TP10SMD
C1874.7uF
C19710nF
C3100nF
C189100nF
MN16 ACT8865
VP131
VP226
VP316
VDDREF23
VSEL20
NC118
PWREN17
nPBSTAT13
nIRQ12
nRSTO11
PWRHLD10
SCL21
SDA22
REFBP32
nPBIN9
INL455
INL676
SW130
OUT11
SW227
OUT224
SW315
OUT319
OUT43
OUT54
OUT67
OUT78
GA
2
GP
129
GP
228
GP
314
EP
33
NC225
JP1112
C191100nF
R98 1R
R133 0RDNP
C1702.2uF
JP1212
C1854.7uF
JP612
C17510uF
R115 0R
C1941uF
C196100nF
R130 0RDNP
L11180ohm at 100MHz
12
R211R
R117 0R
R103 0R
JP1312
C18110uF
C17910uF
R106 0R
C1734.7uF
C1004.7uF
JP1912
C183100nF
R119 0R
R99 0R
R100 0R
R1131.5K
L17 2.2uH
JP1512
C18447nF
L20120@100MHz,2A
1 2
JP1812
C19810nF
R10210K
JP312
L1180ohm at 100MHz
12
R131 0R
R171R
C180100nF
TP18SMD
R124 0R
TP23 SMD
JP14DNP
12
L16 2.2uH
C1924.7uF
L210uH/150mA
C1884.7uF
R107 0R
C1692.2uF
C1864.7uF
R116 0R
L1910uH/150mA
R129 330R
JP2012
C190100nF
DNP
R13251K
R125 0R
JP1712
JP912
R1111R
L1010uH/150mA
TP4SMD
JP2212
JP2112
R110 1K
R114100K
JP1012
R10110K
JP212
R105 0R
C1714.7uF
JP712
C18210uF
Q2BSN20
1
3
2
R108 0R
C1724.7uF
C90100nF
TP24 SMD
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ADVREF
VDDIOP1_MPU
VDDIOP0VDDBU_SOD
VDDBU_SOD
VDDIOP0
VDDBU
VDDIOM_MPU
VDDIOP0_MPU
FUSE_2V5
GNDUTMI
GNDUTMI
GNDUTMI
VDDCORE
VDDOSC VDDUTMII
VDDPLLA
VDDANA
VDDUTMIC
VDDIODDR_MPU_1V2
HHSDMBHHSDPB
HHSDMCHHSDPC
DIBPDIBN
HHSDMAHHSDPA
TMSTCKTDO
NRST_CMP
JTAGSELTDI
NTRST
BMS
WKUPSHDN
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JH 27-Sep-1321-Jan-14JH X.X
X.X XX-XXX-XXXX-XXX-XX
SUP1
CA89405MFDNP
C128100nF
C80100nF
C8 20pF
C60100nF
C82100nF
Y212MHz
123 4
C46100nF
C63100nF
C4100nF
R15 10K
C48100nF
MN4HATSAMA5D36-CU
GN
DC
OR
E_1
A16
VD
DC
OR
E_1
C5
VD
DC
OR
E_2
C7
GN
DC
OR
E_2
C9
VDDIODDR_1D13
VD
DC
OR
E_3
D14
GN
DIO
DD
R_1
E14
GN
DIO
DD
R_2
F10
GN
DIO
DD
R_3
F13
VDDIODDR_2F14
GN
DIO
DD
R_4
F15
VD
DIO
P0_
1G
7
VDDIODDR_3G10
VDDIODDR_4G13
VDDIODDR_5H11
GN
DIO
DD
R_5
H14
GN
DIO
P_1
J7
GN
DIO
M_1
J11
GN
DA
NA
L4
ADVREFL5
VDDANAL6
VD
DIO
P1_
1L1
1
VD
DIO
P1_
2M
4
TDOM11
TMSN10
GN
DIO
P_2
N11
GN
DC
OR
E_3
N13
GN
DFU
SE
P4
TCKP9
GN
DP
LLP
10
NTRSTP11
GN
DU
TMI_
1R
12
VDDFUSER3
TDIR8
VDDPLLAR10
VBGR11
VDDIOM_1P12
VD
DC
OR
E_4
T7
GN
DC
OR
E_4
T8
JTAGSELT9
WKUPT10
GN
DO
SC
T11
SHDNT12
GN
DB
UT1
3
GN
DC
OR
E_5
T14
VD
DC
OR
E_5
T15
VDDIOM_2T16
GN
DIO
M_2
T17
GN
DIO
P_3
U7
XINU8
BMSU9
VDDOSCU11
VDDUTMIIU13
TSTU15
XIN32U16
VD
DC
OR
E_6
U17
VD
DC
OR
E_7
V7
XOUTV8
NRSTV9
VD
DIO
P0_
2V
11
VDDUTMICV13
VD
DB
UV
15
XOUT32V16
GN
DC
OR
E_6
V17
GN
DIO
P_4
E5
HHSDMAV10
HHSDPAU10
HHSDMCV14
HHSDPCU14
HHSDPBU12 HHSDMBV12
DIBNU6
DIBPV6
C106100nF
C79100nF
C97100nF
R53 100K
RR
4D10
0K4
5
C72100nF
C73100nF
C11 20pF
C66100nF
C85100nF
Y1 32.768 kHz
12
C5100nF
C74100nF
RR
4C10
0K3
6
C10 20pF
C17100nF
C6210pF
RR
4B10
0K2
7
C81100nF
C1014.7uF
C86100nF
R55 100K
R54100KDNP
C6 20pF
C71100nF
R525.62K 1%
C51100nF
C75100nF
C52100nF
C54100nF
RR
4A10
0K1
8
C61100nF
R510R
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_EBI_A0
DDR_A7
DDR_A12
FLASH_A2
FLASH_A7FLASH_A8
FLASH_A15
DDR_A1DDR_A2DDR_A3DDR_A4DDR_A5DDR_A6
DDR_A8DDR_A9DDR_A10DDR_A11
DDR_A13
DDR_D12DDR_D13
DDR_D0DDR_D1DDR_D2DDR_D3DDR_D4DDR_D5DDR_D6DDR_D7DDR_D8DDR_D9DDR_D10DDR_D11
DDR_D26DDR_D27
DDR_D14DDR_D15DDR_D16DDR_D17DDR_D18DDR_D19DDR_D20DDR_D21DDR_D22DDR_D23DDR_D24DDR_D25
DDR_D30DDR_D31
DDR_D28DDR_D29
FLASH_A12FLASH_A13
FLASH_A3FLASH_A4FLASH_A5FLASH_A6
FLASH_A9FLASH_A10FLASH_A11
FLASH_A14
M_EBI_D12M_EBI_D13
M_EBI_D8M_EBI_D9M_EBI_D10M_EBI_D11
M_EBI_D14M_EBI_D15
FLASH_A16FLASH_A17FLASH_A18FLASH_A19FLASH_A20FLASH_A21FLASH_A22FLASH_A23
NRDNWENANDCE
M_EBI_D2
M_EBI_D4M_EBI_D3
M_EBI_D6M_EBI_D7
M_EBI_D5
M_EBI_D0M_EBI_D1
NANDCLENANDALE
NANDRDY
M_EBI_D4
M_EBI_D2
M_EBI_D10
M_EBI_D5
M_EBI_D12
M_EBI_D9
M_EBI_D14M_EBI_D15
M_EBI_D3
M_EBI_D0
M_EBI_D6M_EBI_D7M_EBI_D8
M_EBI_D1
M_EBI_D13
M_EBI_D11
FLASH_A1FLASH_A2FLASH_A3FLASH_A4FLASH_A5FLASH_A6FLASH_A7FLASH_A8FLASH_A9FLASH_A10FLASH_A11FLASH_A12
FLASH_A15FLASH_A14FLASH_A13
FLASH_A16
FLASH_A18FLASH_A17
FLASH_A19FLASH_A20FLASH_A21FLASH_A22
NRDNWE
NCS0
FLASH_A23
PE24PE25
PE27PE28PE29PE30PE31
PE26
PE23
M_EBI_A23M_EBI_A22M_EBI_A21
NCS0
NANDCLENANDALE
NCS3
NRDNWE
NANDRDY
NCS3
FLASH_A1DDR_A0
M_EBI_D0M_EBI_D1M_EBI_D2M_EBI_D3M_EBI_D4M_EBI_D5M_EBI_D6M_EBI_D7
VDDIOM_NAND
VDDIOM_NAND
VDDIOM_NAND
VDDIOM_NOR
VDDIODDR_1V2
VDDIOM_NOR
VDDIOM_NAND
VDDIOM_NOR
VDDIOM_NAND
DDR_D[0..31]
NRST_CMP
DDR_VREF
PE[23..31]
OE_Nandflash
DDR_A[0..13]
DDR_DQS1
DDR_DQS2
DDR_DQS3
DDR_WEDDR_CS
DDR_BA0
DDR_DQM0
DDR_BA1DDR_BA2
DDR_DQM1DDR_DQM2
DDR_RASDDR_CAS
DDR_DQM3
DDR_DQS0
DDR_CKEDDR_CLKDDR_CLKN
DDR_DQSN0
DDR_DQSN1
DDR_DQSN2
DDR_DQSN3
REV DATEMODIF. DES. DATE VER.SCALE 1/1 REV. SHEET
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
ABC
610C
XX-XXX-XXJH X.X
SAMA5D36-II&NOR&NAND
18-Jun-13
SAMA5D36-CMP
JH 27-Sep-1321-Jan-14JH X.X
X.XXX-XXX-XXXX-XXX-XX
REV DATEMODIF. DES. DATE VER.SCALE 1/1 REV. SHEET
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
ABC
610C
XX-XXX-XXJH X.X
SAMA5D36-II&NOR&NAND
18-Jun-13
SAMA5D36-CMP
JH 27-Sep-1321-Jan-14JH X.X
X.XXX-XXX-XXXX-XXX-XX
REV DATEMODIF. DES. DATE VER.SCALE 1/1 REV. SHEET
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
ABC
610C
XX-XXX-XXJH X.X
SAMA5D36-II&NOR&NAND
18-Jun-13
SAMA5D36-CMP
JH 27-Sep-1321-Jan-14JH X.X
X.XXX-XXX-XXXX-XXX-XX
R12 27R
MN1NL17SZ126
OE1
VCC5
GND3 OUT
4IN2
MN4EATSAMA5D36-CU
PE0_A0/NBS0P13
PE1_A1R14
PE2_A2R13
PE3_A3V18
PE4_A4P14
PE5_A5U18
PE6_A6T18
PE7_A7R15
PE8_A8P17
PE9_A9P15
PE10_A10P18
PE11_A11R16
PE12_A12N16
PE13_A13R17
PE14_A14N17
PE15_A15_SCK3R18
PE16_A16_CTS3N18
PE17_A17_RTS3P16
PE18_A18_RXD3M18
PE19_A19_TXD3N15
PE20_A20_SCK2M15
PE21_A21/NANDALEN14
PE22_A22/NANDCLEM17
PE23_A23_CTS2M13
PE24_A24_RTS2M16
PE25_A25_RXD2N12
PE26_NCS0_TXD2M14
PE27_NCS1_TIOA2M12
PE28_NCS2_TIOB2L13
PE29_NWR1/NBS1_TCLK2L15
PE30_NWAITL14
PE31_IRQ_PWML1L16
R8 27R
R6 0R
C1100nF
C34100nF
R40 0R
C9 100nF
R3810K
MN4GATSAMA5D36-CU
D14H16
D16H18
D6J12
D8J14
D9J16
D11J17
D13J18
NWE_NWR0K11
D0K12
D4K13
D2K14D1K15
D3K16
D5K17
D7K18
NCS3L12
NRDL17
NANDRDYL18
D10J13
D12J15
R10 0R
R37 470K
C33100nF
R41 0R
R18240R 1%
R5 10K
R43 240R 1%
R7 0R
MN3MT29F2G08ABAEAWP
WE18
N.C66
VCC37
CE9
RE8
N.C1120
WP19
N.C55
N.C11
N.C22
N.C33
N.C44
DNU121
DNU222
N.C1223
N.C1324
R/B7
I/O8_N.C26
I/O9_N.C27
I/O10_N.C28
I/O029
VCC_N.C34
N.C1435
VSS36
DNU338
VCC_N.C39
VCC12
VSS13
ALE17
N.C811 N.C710
N.C914
N.C1015
CLE16
VSS_N.C25
I/O11_N.C33
I/O130
I/O332I/O231
I/O15_N.C47I/O14_N.C46I/O13_N.C45
I/O744I/O643I/O542I/O441
I/O12_N.C40
VSS_N.C48
R59 100K
R4 0R
R9 27R
TP25SMD
R110KDNP
R36 100K
R2 100K
R11 0R
C12100nF
R39 100K
R35 0R
MN4FATSAMA5D36-CU
DDR_CASA5
DDR_A13A6
DDR_A11A7
DDR_A7A8
DDR_A2A9
DDR_D30A10
DDR_D27A11
DDR_CLKNA12
DDR_DQSN3A13
DDR_D25A14DDR_D24A15
DDR_DQSN2A17
DDR_D19A18
DDR_WEB5
DDR_BA1B6
DDR_CKEB7
DDR_A9B8
DDR_A4B9
DDR_A0B10
DDR_D28B11
DDR_CLKB12
DDR_DQS3B13
DDR_D23B14
DDR_DQM2B15
DDR_D16B16
DDR_DQS2B17
DDR_D17B18
DDR_CSC8
DDR_A8C10
DDR_A1C11
DDR_CALNC12
DDR_VREFC13
DDR_BA0E9
DDR_DQSN0D18
DDR_D12D17
DDR_D14D16
DDR_D22D15
DDR_DQM3D12
DDR_A3D11
DDR_A6D10
DDR_A12D9
DDR_D13C18
DDR_D15C17
DDR_D20C16
DDR_D18C15
DDR_D21C14
DDR_A5E10
DDR_D31E11
DDR_D26E12
DDR_CALPE13
DDR_BA2F9
DDR_A10F11
DDR_D29F12
DDR_D8F16
DDR_D6F17
DDR_DQSN1F18
DDR_RASG11
DDR_DQM0G12
DDR_D10G14
DDR_D7G15
DDR_D4G16DDR_D3G17
DDR_DQS1G18
DDR_D0H12
DDR_D2H13
DDR_D5H15
DDR_D1H17
DDR_DQM1E15
DDR_D11E16
DDR_D9E17
DDR_DQS0E18
MN10JS28F128P33TF70A
A129
A225
A324
A423
A522
A621
A720
A819
A98
A107
A116
A125
A134
A143
A152
A161
A1755
A1818
A1917
A2016
DQ034
DQ136
DQ239
DQ341
DQ447
DQ549
DQ651
DQ753
DQ835
DQ937
DQ1040
DQ1142
DQ1248
DQ1350
DQ1452
DQ1554
VCC33
VCCQ38
VPP43
VSS28
VSS31
VSS12
A2111
NC13
CE#30
OE#32
WE#14
RST#44
WP#15
CLK45
WAIT56
A2210
A239
RFU227RFU126
ADV#46
R3 0R
C32100nF
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
1-WIRE EEPROM
LED
(SPI0_MIS0)(SPI0_MOSI)
SERIAL DATAFLASH
(SPI0_SPCK)
(SP
I0_N
PC
S0)
PA0PA1PA2PA3PA4PA5PA6PA7PA8PA9PA10PA11
PA15PA14PA13PA12
PA16PA17PA18PA19
PA23PA22PA21PA20
PA25PA24
PA28PA29PA30PA31
PA27PA26
PC3PC2PC1PC0
PC13PC12
PC8PC9
PC4PC5PC6PC7
PC28
PC16PC17PC18
PC10PC11
PC15PC14
PC26
PC19
PC23PC22PC21PC20
PC25PC24
PC29PC30PC31
PC27
PD3PD2PD1PD0
PD13PD12
PD8PD9
PD4PD5PD6PD7
PD28
PD16PD17PD18
PD10PD11
PD15PD14
PD26
PD19
PD23PD22PD21PD20
PD25PD24
PD29PD30PD31
PD27
PB3PB2PB1PB0
PB13PB12
PB8PB9
PB4PB5PB6PB7
PB28
PB16PB17PB18
PB10PB11
PB15PB14
PB26
PB19
PB23PB22PB21PB20
PB25PB24
PB29PB30PB31
PB27
PE25
PE24
PD11
PD12PD10
PE25
PD13
OE_Dataflash
VDDIOM
VDDIOP1
VDDIOP1
VDDIOP1
VDDIOP1
VCC_3V3
PA[0..31] PC[0..31]
PD[0..31]PB[0..31]
PE[23..31]
OE_Nandflash
BOOT_CS_OFF
REV DATEMODIF. DES. DATE VER.SCALE 1/1 REV. SHEET
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
ABC
710C
XX-XXX-XXJH X.X
SAMA5D36-III&DATA&1-WIRE,LED
18-Jun-13
SAMA5D36-CMP
27-Sep-13JH21-Jan-14JH
X.XX.X XX-XXX-XX
XX-XXX-XX
REV DATEMODIF. DES. DATE VER.SCALE 1/1 REV. SHEET
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
ABC
710C
XX-XXX-XXJH X.X
SAMA5D36-III&DATA&1-WIRE,LED
18-Jun-13
SAMA5D36-CMP
27-Sep-13JH21-Jan-14JH
X.XX.X XX-XXX-XX
XX-XXX-XX
REV DATEMODIF. DES. DATE VER.SCALE 1/1 REV. SHEET
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
ABC
710C
XX-XXX-XXJH X.X
SAMA5D36-III&DATA&1-WIRE,LED
18-Jun-13
SAMA5D36-CMP
27-Sep-13JH21-Jan-14JH
X.XX.X XX-XXX-XX
XX-XXX-XX
R48100K
R76 0R
R42470R
R44470R
Q1IRLML2502
1
32
R77 0R
R79 0R
MN4DATSAMA5D36-CU
PD0K5
PD1P1
PD2K6
PD3R1
PD4L7
PD5P2
PD6L8
PD7R2
PD8K7
PD9U2
PD10K9
PD11M5
PD12K10
PD13N4
PD14L9
PD15N3
PD16L10
PD17N5
PD18M6
PD19T1
PD20N2
PD21M3
PD22M2
PD23L3
PD24M1
PD25N1
PD26L1
PD27L2
PD28K1
PD29K2
PD30J1
PD31J2
R72 0R
MN4BATSAMA5D36-CU
PB0_GTX0T2
PB1_GTX1N7
PB2_GTX2T3
PB3_GTX3N6
PB4_GRX0P5
PB5_GRX1T4
PB6_GRX2R4
PB7_GRX3U1
PB8_GTXCKR5
PB9_GTXENP3
PB10_GTXERR6
PB11_GRXCKV3
PB12_GRXDVP6
PB13_GRXERV1
PB14_GCRSR7
PB15_GCOLU3
PB16_GMDCP7
PB17_GMDIOV2
PB18_G125CKV5
PB19_GTX4T6
PB20_GTX5N8
PB21_GTX6U4
PB22_GTX7M7
PB23_GRX4U5
PB24_GRX5M8
PB25_GRX6T5
PB26_GRX7N9
PB27V4
PB28M9
PB29P8
PB30M10
PB31R9
D3BAT54C
321
MN14DS2431P+
IO2
GN
D1
NC13
NC24
NC35
NC46
R701.5K
C123100nF
D2 red
R7810K
MN13AT25DF321A
HOLD7
GND4
VCC8
CS1
SCK6
SI5
SO2
WP3
MN4CATSAMA5D36-CU
PC0_ETX0D8
PC1_ETX1A4
PC2_ERX0E8
PC3_ERX1A3
PC4_ETXENA2
PC5_ECRSDVF8
PC6_ERXERB3
PC7_EREFCKG8
PC8_EMDCB4
PC9_EMDIOF7
PC10A1
PC11D7
PC12C6
PC13E7
PC14B2
PC15F6
PC16B1
PC17E6
PC18C3
PC19D6
PC20C4
PC21D5
PC22C2
PC23G9
PC24C1
PC25H10
PC26H9
PC27D4
PC28H8
PC29G5
PC30D3
PC31E4
MN4AATSAMA5D36-CU
PA0_LCDDAT0E3
PA1_LCDDAT1F5
PA2_LCDDAT2D2
PA3_LCDDAT3F4
PA4_LCDDAT4D1
PA5_LCDDAT5J10
PA6_LCDDAT6G4
PA7_LCDDAT7J9
PA8_LCDDAT8F3
PA9_LCDDAT9J8
PA10_LCDDAT10E2
PA11_LCDDAT11K8
PA12_LCDDAT12F2
PA13_LCDDAT13G6
PA14_LCDDAT14E1
PA15_LCDDAT15H5
PA16_LCDDAT16H3
PA17_LCDDAT17H6
PA18_LCDDAT18H4
PA19_LCDDAT19H7
PA20_LCDDAT20H2
PA21_LCDDAT21J6
PA22_LCDDAT22G2
PA23_LCDDAT23J5
PA24_LCDPWMF1
PA25_LCDDISPJ4
PA26_LCDVSYNCG3
PA27_LCDHSYNCJ3
PA28_LCDPCKG1
PA29_LCDDENK4
PA30_TWD0H1
PA31_TWCK0K3
R71470K
JP1
12
R1260R
C114100nF
MN12NL17SZ126
OE1
VCC5
GND3 OUT
4IN2
D1 Blue
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LPDDR2 SDRAM
DDR_DQS1DDR_DQSN1
DDR_DQS0DDR_DQSN0
DDR_DQM1DDR_DQM0
DDR_CLKN
DDR_CKE
DDR_CLK
DDR_D2
DDR_D15DDR_D14
DDR_D12DDR_D11DDR_D10DDR_D9
DDR_D1DDR_D0
DDR_D7DDR_D6DDR_D5DDR_D4
DDR_D13
DDR_D3
DDR_D8
DDR_CS
DDR_CLKN
DDR_CLK
DDR_RASDDR_CASDDR_WE
DDR_A5DDR_A6
DDR_A1DDR_A2DDR_A3
DDR_A0
DDR_A4
DDR_DQM2DDR_DQM3
DDR_DQSN3
DDR_DQS2DDR_DQSN2
DDR_DQS3
DDR_D16DDR_D17DDR_D18DDR_D19DDR_D20DDR_D21DDR_D22DDR_D23DDR_D24DDR_D25DDR_D26DDR_D27DDR_D28DDR_D29DDR_D30DDR_D31
VDDIODDR_1V2 1V2_VDD2
1V2_VDDCA
1V2_VDDQ
VREFCA
VREFDQ
1V2_VDD2
1V8_VDD1
1V2_VDDCA
1V2_VDDQ
VREFCA
1V2_VDDQ
1V2_VDDCA
VREFDQ
1V8_VDD1VCC_1V8
DDR_A[0..13]
DDR_D[0..31]
DDR_CLK
DDR_CKE
DDR_CS
DDR_CLKN
DDR_CASDDR_RAS
DDR_WE
DDR_DQS1
DDR_DQS0
DDR_DQM1DDR_DQM0
DDR_DQS3
DDR_DQS2
DDR_DQM2DDR_DQM3
DDR_VREF
DDR_DQSN1
DDR_DQSN0
DDR_DQSN3
DDR_DQSN2
REV DATEMODIF. DES. DATE VER.SCALE 1/1 REV. SHEET
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
ABC
810C
XX-XXX-XXJH X.X
4Gb LPDDR2
18-Jun-13
SAMA5D36-CMP
JH 27-Sep-1321-Jan-14JH X.X
X.XXX-XXX-XXXX-XXX-XX
REV DATEMODIF. DES. DATE VER.SCALE 1/1 REV. SHEET
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
ABC
810C
XX-XXX-XXJH X.X
4Gb LPDDR2
18-Jun-13
SAMA5D36-CMP
JH 27-Sep-1321-Jan-14JH X.X
X.XXX-XXX-XXXX-XXX-XX
REV DATEMODIF. DES. DATE VER.SCALE 1/1 REV. SHEET
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
ABC
810C
XX-XXX-XXJH X.X
4Gb LPDDR2
18-Jun-13
SAMA5D36-CMP
JH 27-Sep-1321-Jan-14JH X.X
X.XXX-XXX-XXXX-XXX-XX
C161100nF
U1B
MT42L128M32D1GU-25 WT
VDD1B6
VDD1C1
VDD1R1
VDD1T6
VDD2B5
VDD2D2
VDD2G1
VDD2J7
VDD2P2
VDD2T5
VDDCAF1
VDDCAH1
VDDCAN2
VDDQC7
VDDQC10
VDDQD5
VDDQE9
VDDQF10
VDDQH6
VDDQJ6
VDDQK6
VDDQM10
VDDQN9
VDDQP5
VDDQR7
VREFCAG3
VREFDQJ9
VSSC2
VSSC5
VSSD1
VSSH2
VSSP1
VSSR2
VSSR5
VSSJ8
VSSCAE1
VSSCAJ1
VSSQC6
VSSQC9
VSSQD10
VSSQR6
VSSQE10
VSSQF5
VSSQG10
VSSQJ5
VSSQL10
VSSQM5
VSSQN10
VSSQP10
DNU1A1
DNU2A2
DNU3A9
DNU4A10
DNU5B1
DNU6B10
DNU7T1
DNU8T10
DNU9U1
DNU10U2
DNU11U9
DNU12U10
NC1B2
NC2B3
NC3J2
NC4R3
NC5T2
VDDQR10
NC6T3
VSSQR9
VSSCAN1
R911.5K 1%
C158100nF
L1410uH/150mA
C162100nF
C137100nF
R92 0R
C148100nF
U1A
MT42L128M32D1GU-25 WT
CA0P3
CA1N3
CA2M3
CA3M2
CA4M1
CA5G2
CA6F2
CA7F3
CA8E3
CA9E2
ZQ1C3
CKE0K1
CKE1K2
CKJ3
CK#H3
CS0#L1
CS1#L2
DQS0L6
DQS0#L5
DQS1G6
DQS1#G5
DQS2P8
DQS2#P9
DQS3D8
DQS3#D9
DM0K5
DM1H5
DM2N7
DM3E7
DQ0N8
DQ1M8
DQ2M7
DQ3M9
DQ4M6
DQ5L7
DQ6L8
DQ7L9
DQ8G9
DQ9G8
DQ10G7
DQ11F6
DQ12F9
DQ13F7
DQ14F8
DQ15E8
DQ16T7
DQ17P6
DQ18T8
DQ19N5
DQ20P7
DQ21T9
DQ22R8
DQ23N6
DQ24E6
DQ25C8
DQ26B9
DQ27D7
DQ28E5
DQ29B8
DQ30D6
DQ31B7
ZQ0D3
RFU1K3
RFU2L3
C144100nF
C141100nF
C149100nF
C138100nF
C155100nFC156100nF
R112 0R
C142100nF
C140100nF
C139100nF
R83DNP
51R
C151100nF
C157100nF
C163100nF
C143100nF
C153100nF
R951.5K 1%
R89 0R
L1510uH/150mA
R931.5K 1%
R941R
TP6SMD
C133100nF
R96 0R
C166100nF
C145100nF
C1654.7uF
C136100nF
C167100nF
R87 0R
C159100nF
R121 0R
C135100nF
C129 100nF
C134100nF
C164100nF
R82DNP
51R
C152100nF
R971.5K 1%
R122 0R
C1474.7uF
C154100nF
R88 0R
C146100nF
C160100nF
R901R
R86 240R 1%
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
G125CK
GTX0GTX1GTX2GTX3
GRX0GRX1
GRX2GRX3
GTXCK
GTX_CTL
GRXCK
GRX_CTL
GMDC
GMDIOINT_GETHR
PCB heat sink1x1 inch copper ground
from PMIC
PB4PB5
PB6PB7
PB3PB2PB1PB0
PB16PB11
PB13
PB9
PB8
PB25PB17
PB18
XI
XO
XI
XOLDO_O
LDO
_O
DVDDL
AVDDL
AVDDH
AVDDL_PLL
AVDDL_PMOS AVDDL_PLL
AVDDL
DVDDL
AVDDL_PMOS
AVDDH VCC_1V2
VDDIOP1_GPHY
VDDIOP1_GPHY
VDDIOP1_GPHY
VDDIOP1_GPHY
VDDIOP1_GPHY
LED1LED2
PB[0..31]
NRST_CMP
ETH0_TX1+ETH0_TX1-
ETH0_RX1+ETH0_RX1-ETH0_TX2+ETH0_TX2-
ETH0_RX2+ETH0_RX2-
REV DATEMODIF. DES. DATE VER.SCALE 1/1 REV. SHEET
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
ABC
910C
XX-XXX-XXJH X.X
ETHERNET
18-Jun-13
SAMA5D36-CMP
JH 27-Sep-1321-Jan-14JH
X.XX.X
XX-XXX-XXXX-XXX-XX
REV DATEMODIF. DES. DATE VER.SCALE 1/1 REV. SHEET
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
ABC
910C
XX-XXX-XXJH X.X
ETHERNET
18-Jun-13
SAMA5D36-CMP
JH 27-Sep-1321-Jan-14JH
X.XX.X
XX-XXX-XXXX-XXX-XX
REV DATEMODIF. DES. DATE VER.SCALE 1/1 REV. SHEET
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
ABC
910C
XX-XXX-XXJH X.X
ETHERNET
18-Jun-13
SAMA5D36-CMP
JH 27-Sep-1321-Jan-14JH
X.XX.X
XX-XXX-XXXX-XXX-XX
R344.7K
C12010nF
R19 27R
+ C12110uF
+ C12610uF
Q3FDT434P
1
G
2D3S
4D_T
RR3B 27R2 7
C11910nF
C11110nF
L8180ohm at 100MHz
1 2
R20 27R
JP16
1
2
3
RR3A 27R1 8
+ C12410uF
C21 20pF
R65 27R
R26 27R
RR2D 27R4 5
C9910nF
RR2C 27R3 6
R24 27R
C10510nF
R63
4.7K
RR2B 27R2 7
L9180ohm at 100MHz
1 2
Y325MHz
123 4
R69 4.7K
L13180ohm at 100MHz
1 2
RR2A 27R1 8
RR1D 27R4 5RR1C 27R3 6
R58
4.7K
+ C2047uF
L7180ohm at 100MHz
1 2
R68 1K
+ C9610uF
C2222uF
C19322uF
R61
4.7K
R64
4.7K
C10910nF
C10810nF
C11210nF
C11510nF
C10310nF
R23 27RR22 27R
+ C12510uF
C12210nF
C11610nF
C9810nF
C11810nF
C18 20pF
R62 27R
C10210nF
R60 27R
KSZ9031RNI48-pin QFN
MN6KSZ9031RNX
NC
113
LED
215
DV
DD
H16
LED
117
DV
DD
L14
TXD
019
TXD
120
TXD
221
TXD
322
DV
DD
L18
DV
DD
L23
GTX
_CLK
24
TX_EN25DVDDL26RXD327
VSS29DVDDL30RXD131RXD032RX_DV33DVDDH34RX_CLK35MDC36
MD
IO37
INT_
N38
DV
DD
L39
DV
DD
H40
CLK
125_
ND
O41
RE
SE
T_N
42LD
O_O
43X
O45
XI
46N
C2
47IS
ET
48
AVDDH1
TXRXP_A2
TXRXM_A3
TXRXP_B5
TXRXM_B6
TXRXP_C7
TXRXM_C8
TXRXP_D10
TXRXM_D11
AVDDH12
RXD228
AV
DD
L_P
LL44
P_G
ND
49
AVDDL4
AVDDL9
R75 12.1K 1%
C10410nF
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PA0PA1
PA3PA2
PA5
PA7PA6
PA4
PA9
PA11PA10
PA13
PA15PA14
PA12
PA8
PA17
PA19PA18
PA21
PA23PA22
PA20
PA25
PA27PA26
PA29
PA31PA30
PA28
PA24
PA16
PB13PB14PB15
PB21PB22
PB20PB19
PB24
PB30
PB28
PB25PB26
PB23
PB27
PB29
PB31
PB10
PC1PC2PC3
PC6PC7
PC5PC4
PC9
PC15
PC13PC12
PC10PC11
PC8
PC14
PC21
PC18PC19
PC17
PC25
PC20
PC22PC23
PC31
PC29
PC26PC27
PC16
PC24
PC28
PC30
PC0
PE23PE24PE25PE26
PC25PC23PC21
PC18PC16PC8PC6PC4PC2PC0
PE27PC10
PC12PC14PC27PC29PC31
VDDIOP0_SODPA0PA2
PA5PA7PA9PA11PA12PA14PA16PA18
PA21PA23PA25PA27PA28PA30
PD30
PD28PD26PD24PD22PD20PD18PD16PD14
PD12PD10PD8PD6PD5PD3PD1
VDDIOP1_SOD
PB10PB14PB19PB21PB23PB24
PA13PA15PA17PA19PA20PA22PA24PA26
PC30VDDIOP0_SOD
PA1PA3PA4PA6PA8PA10
PA29PA31
PD31PD29PD27PD25PD23
PD21PD19PD17PD15PD13PD11PD9PD7
PD4PD2PD0
VDDIOP1_SOD
PB13PB15PB20PB22
PB31
PB25PB27PB29
PB26PB28
PE28PC11PC13PC15PC26PC28
PC5PC3PC1
PC24PC22PC20PC19PC17PC9PC7
PE29PE30PE31
PD13PD12
PD8PD9
PD4PD5PD6PD7
PD28
PD16PD17PD18
PD10PD11
PD15PD14
PD26
PD19
PD23PD22PD21PD20
PD25PD24
PD29PD30PD31
PD27
PD3PD2PD1PD0
PE31
PE27PE28PE29PE30
PE26PE25PE24PE23
PB30
PB12
VCC_5V_SOD
VDDBU_SOD
VCC_5V_SOD
VCC_3V3_SODVCC_3V3_SOD
VDDIOMVDDIOM
ADVREF
VDDANA
VDDANA
VDDIOP0
VDDIOP1
PA[0..31]
PB[0..31]
PC[0..31]
PWR_EN
PD[0..31]
PE[23..31]
BOOT_CS_OFF
HHSDMAHHSDPA
HHSDMBHHSDPB
HHSDMCHHSDPC
LED1LED2
ETH0_RX1+ETH0_RX1-
ETH0_RX2+ETH0_RX2-
NRST_SOD
JTAGSELWKUP_SOD
BMS
NTRSTTDITCKTMS
SHDN
TDO
DIBPDIBN
ETH0_TX1+ETH0_TX1-
ETH0_TX2-ETH0_TX2+
REV DATEMODIF. DES. DATE VER.SCALE 1/1 REV. SHEET
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
ABC
1010C
XX-XXX-XXJH X.X
200-PIN SODIMM
18-Jun-13
SAMA5D36-CMP
27-Sep-13JHJH 21-Jan-14 X.X
X.X XX-XXX-XXXX-XXX-XX
REV DATEMODIF. DES. DATE VER.SCALE 1/1 REV. SHEET
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
ABC
1010C
XX-XXX-XXJH X.X
200-PIN SODIMM
18-Jun-13
SAMA5D36-CMP
27-Sep-13JHJH 21-Jan-14 X.X
X.X XX-XXX-XXXX-XXX-XX
REV DATEMODIF. DES. DATE VER.SCALE 1/1 REV. SHEET
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
ABC
1010C
XX-XXX-XXJH X.X
200-PIN SODIMM
18-Jun-13
SAMA5D36-CMP
27-Sep-13JHJH 21-Jan-14 X.X
X.X XX-XXX-XXXX-XXX-XX
KEY
J1
SODIMM_2
PC1152
PC433 PC631
PC2759 PC1457
VCC_3V3_141
PC1354
PE2850
PE2749 NC147 Enable_245
PC1051
Enable_140PC138
GND15 VCC_5V_33 VCC_5V_11
VCC_5V_22
VCC_5V_44
VBAT6
Enable_039
VCC_3V3_343
VCC_3V3_444
Enable_346
ADVREF48
VCC_3V3_242
GND553
PC1255
PC1556
PC2658
PC2860
GND432
PE2511
PE237
PE249
PC829
VDDIOM_115 PE2613
PC2517
PC2319
PC2121
GND323
PC1825
PC1627
PA2494
PC3163
VDDIOP0_165
PA067
PA269
GND771
PA674
PA775
PA977
PA1179
PA1281
PA1483
PA1685
GND989
PA2191
PA2393
PA2595
PA2797
PA31102
VDDANA_2104
PD30105
PD28109
PD26111
PD24113
PD22115
PD20117
PD16121
PD14123
GND13125
PD10129
PD8131
PD6133
PD3137
PD1139
VDDIOP1_1141
GND15143
PB10145
PB19149
PB21151
PB23153
PB24155
GND17157
USBA_DP159
GND18163
USBB_DP165
GND19169
USBC_DP171
USBC_DM173
GND_ETH1175
ETH0_TX1+177
ETH0_TX1-179
ETH0_RX1+181
GND_ETH2185 ETH0_RX1-183
ETH0_TX2+187
ETH0_TX2-189
PC730
PE298
PE3010
PE3112
GND214
VDDIOM_216
PC2418
PC2220
PC2022
PC1924
PC1726
PC928
PC534
PC3064
VDDIOP0_266
PA168
PA370
PA472
PA876
PA1078
GND880
PA1382
PA1584
PA1786
PA2090
PA2292
PA2696
GND1098
PA29100
PA30101
VDDANA_1103
PD31106
PD29108
PD27110
PD25112
GND12116
PD21118
PD19120
PD17122
PD15124
PD9130
PD7132
GND14134
PD4136
PD2138
PD0140
PB13144
PB12146
PB15148
PB20150
PB22152
PB25156
PB27158
PB29160
PB31162
PB30164
GND20170
DIBP172
DIBN174
GND22176
JTAGSEL178
WKUP180
SHDN182
BMS184
nRST186
nTRST188
PC235
PC336
PC037
PC2961
GND662
PA573
PA1887
PA1988
PA2899
GND11107
PD18119
PD23114
PD13126
PD5135
VDDIOP1_2142
PB14147
GND16154
USBA_DM161
ETH0_RX2+191
PD12127
PD11128
USBB_DM167
PB28168PB26166
TDI190
ETH0_RX2-193
GND23195
LED2197
LED1199
TCK192
TMS194
TDO196
RTCK198
GND24200
C1271uF
C311uF
R127 0R
R81 27R DNP
R128 0R
C294.7uF
C281uF
R80 0R
C3010uF
6. Revision History
Table 6-1. Deisgn Optimization for Low-Power SAMA5D3-based Systems App Note Rev. 11291A Revision History
Doc. Rev.11291A Changes
23-Jun-14 First issue
29Design Optimization for a Low-Power SAMA5D3-based System [APPLICATION NOTE]Atmel-11291A-ATARM-Low-Power-Design-for-SAMA5D3-based-Systems-Application-Note_23-Jun-14
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