intrduction to the course

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Introduction to the Course

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2

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Start Group 2011

Alaa Salah Shehata Abdel Rahman

Mahmoud A.M. Abdel Latif

Mohamed Salah Mahmoud

Mohamed Mohamed Talaat

contact us

start.courses@gmail.com

Facebook group

start.group@groups.facebook.com

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-Introduction to VHDL

-Statements in VHDL

-Sequential Statements

-Concurrent Statements

-Data Objects

-Data Operators

-Data types

-FSM finite state machines

-Structural Description

-Testbench

-Introduction to FPGA

-Implementation on FPGA

3

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Course Outlines 0 Digital Design using VHDL

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4

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Illustration Examples Exercises Labs

Each Session includes

Refresh Your Memory

Assignment Time for your Questions

Demo Questions

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5

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Mini Project

Through our course there will be

Main Project

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6

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Start Group VHDL Guide

Start Group material

VHDL Summary

Sessions Slides

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7

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Xilinx ISE

Tools Used during course

Modelsim

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8

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Finally, we hope you remember us through our attendance certification

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See You Next Session

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