gioi thieu vhdl
Post on 30-Sep-2015
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tổng quan về VHDL cho các bạn
TRANSCRIPT
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Thit k mch s vi
VHDL -
Kin thc trc y
H thng s:S v mMch t hpMch tun t (FF, mch m, my trng thi)CAD experience (Schematics?)Ngn ng lp trnhC ? Pascal ? BASIC ? Fortran ? Cobol ?HDL? -
Mch S
Transistor CircuitsTR Circuit : Full-CustomGate/FlipFlop CellCell Library : Semi-Custom (SSI)Functional ModuleAdder, Multiplier, Register, Counter (LSI)Processor-MemoryProcessor, Memory (VLSI)SystemSOC (System-On-Chip) -
Mch S
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Cng c thit k mch s
Transistor CircuitLayout Editor & Circuit/Switch SimulatorGate/FlipFlopSchematic Editor & Logic SimulatorASICHardware Description Language (HDL)Verilog HDL/VHDLHDL & Schematic Mixed -
Ti sao s dng HDL?
Giam thi gian a san phm ra thi trngCho phep cac nha thit k phat trin nhng thit k ln oi hoi hang ngan cng logic.Cung cp mt h thng cp cao m ta cac mach logic phc tap.H tr phng phap thit k theo module va phng phap thit k a cp.Ngn ng dung thit k va m phongCho phep tao ra nhng thit k khng phu thuc vao linh kin cua mt hang nao. Rt tt cho vic thit k nhng IC chuyn dung (ASIC).Cho phep ngi s dung tuy chon cng cu, nha cung cp va linh kin. -
HDL nh mt ngn ng lp trnh
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HDL : l ngn ng?
Hardware Description LanguageStatementsSequentialConcurrentSyntaxKeywordsObjectsOperators -
HDL : Hardware Description ?
Netlist/DataflowBehavior/Inference FF-- AND Gatea -
So snh HDL V Ngn ng lp trnh
Ngn ng lp trnhHardware LanguagePurposeSoftware(Executable Binaries)Hardware(Hardwired Logics)EntryText & Visual ToolsDevelopmentCompile & LinkCompile for Simulation& Synthesis for HardwireDebuggingExecutes & View Result (Text or Graphics)Simulation & ViewWaveformStatementSequential OnlyBasically ConcurrentSequential for BehaviorDescription -
So snh HDL V Ngn ng lp trnh
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HDL : Concurrent & Sequential Statement
Th t statementObjects -
S quy trong HDL
Pht biu quyLatch (cht) -
Li li bi nhiu ng trong HDL
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Quy tnh thit k vi HDL
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Design Entry
Text EditorLanguage Sensitive Text EditorKeyword coloringStatement TemplateVisual Entry ToolsTemplate & Translate (Structural)TestbenchConverter (Waveformer) -
HDL Design Entry (Text Editor)
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HDL & Schematic Mixed
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HDL Design Entry (Visual Tools)
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HDL Simulation
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HDL Synthesis
Ti u logicTng hp thnh netlist -
VHDL l g?
VHSIC Hardware Description LanguageVHSIC : Very High Speed Integrated CircuitsBan u c xy dng cho vic lp ti liu cho cc thit k.Mt ngn ng m phng cho h thng s.Cu trc cp cao, v kiu d liu mnh.Mt ngn ng a dng. -
VHDL : mt ngn ng a dng
M t tun t (Sequential Description)M t song song (ng thi) (Concurrent Description)Netlist LanguageTiming SpecificationSelf-Contained Test Language(TestBenches) -
Lch s ca VHDL
First Generated in 1981 under VHSIC programDevelopment Started in 1983Maintained by IEEE since 1987(IEEE1076-87)MIL-STD-454 Requires VHDL for All ASICs Delivered to DoD (1988)IEEE1164: Multi Valued Logic System, 1992Revised Standard VHDL-93VITAL Initiative Defines Standard Format for Gate Libraries,1994
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