first seminar
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Department Of Electronics & Communication Engineering Department Of Electronics & Communication Engineering U.N.S.I.E.T. V.B.S. PURVANCHAL UNIVERSITY U.N.S.I.E.T. V.B.S. PURVANCHAL UNIVERSITY
JAUNPURJAUNPUR
DESIGN OF 16 BIT DESIGN OF 16 BIT MICROPROCESSOR USING VHDLMICROPROCESSOR USING VHDL
A PROJECT BYA PROJECT BY::
Nishant Kumar SrivastavaNishant Kumar Srivastava
Jibran HafeezJibran Hafeez
Zeeshan AlamZeeshan Alam
GUIDED BY:GUIDED BY: Er. Shiv Chand GuptaEr. Shiv Chand Gupta
FLOW OF PRESENTATIONFLOW OF PRESENTATION
VLSI TechnologyWhat is VLSIDesign Flow
Hardware Description Languages
VHDL basics
Project overviewComponents of processorApplication and Future Aspects Conclusion.
VLSI TECHNOLOGYVLSI TECHNOLOGY
What is VLSI
Design Flow
VLSIVLSI
Very Large Scale Integration.Very Large Scale Integration.
VLSI chips provide:VLSI chips provide:
Compactness,Compactness,
Low power consumption,Low power consumption,
Higher Reliability and speed,Higher Reliability and speed,
Significant cost savings.Significant cost savings.
VLSI DESIGN FLOWVLSI DESIGN FLOW
System design specification.System design specification.
Design entry using VHDL or Verilog.Design entry using VHDL or Verilog.
Logic Synthesis and verification.Logic Synthesis and verification.
Circuit design and testing.Circuit design and testing.
Physical layout design and verification.Physical layout design and verification.
Manufacturing, testing and packaging.Manufacturing, testing and packaging.
Final VLSI chipFinal VLSI chip
HARDWARE HARDWARE DESCRIPTION DESCRIPTION LANGUAGESLANGUAGES
VHDL BASICSVHDL BASICS
VHDL BASICSVHDL BASICS
Very high speed integrated circuit Hardware Very high speed integrated circuit Hardware Description Language.Description Language.It is being used for documentation, verification, It is being used for documentation, verification, and synthesis of large digital designsand synthesis of large digital designs..
It employs the structural, data flow, and It employs the structural, data flow, and behavioral methods of hardware description. behavioral methods of hardware description.
An Entity declaration provides the complete An Entity declaration provides the complete input - output interface for a circuitinput - output interface for a circuit
An Architecture describes the function and An Architecture describes the function and structure of a circuitstructure of a circuit
PROJECT OVERVIEWPROJECT OVERVIEW
DESIGN PARAMETERSDESIGN PARAMETERS
FLOW OF DESIGNFLOW OF DESIGN
DESIGN PARAMETERSDESIGN PARAMETERS 16 bit Address and Data bus.16 bit Address and Data bus.
16 bit ALU. 16 bit ALU.
16 bit Control unit, the heart of microprocessor.16 bit Control unit, the heart of microprocessor.
Comparator to perform logical operations.Comparator to perform logical operations.
16 bit Register array for temporary storage of data. 16 bit Register array for temporary storage of data.
Address register to point the current instruction.Address register to point the current instruction.
Program counter to point the next instruction.Program counter to point the next instruction.
Instruction register to store the fetched instruction code.Instruction register to store the fetched instruction code.
Operation register .Operation register .
Shift unit to perform Shift and rotate operations.Shift unit to perform Shift and rotate operations.
Out register for temporary storage of data. Out register for temporary storage of data.
CONTROL
UNIT
INSTRUCTION REG.
COMPARATOR
SHIFT UNIT
OUT REG.
OP. REG.
ALU
PROGRAM COUNTER
ADDRESS REG.
REGISTER
ARRAY
(A,B,C,D,E,F,G,H)
READY
RESET
CLOCK
W/ Rb
V M A
InstrregselInstrreg.out
CompselCompout
Data (16 bit)
Regrd
Regwr
Regsel
Opregsel
Alusel
Shiftsel
Outregrd Outregwr
ProgcntrrdProgcntrwr
Addrreg select
Address (16 bit)
FLOW OF DESIGNFLOW OF DESIGN
Create new projectWrite VHDL code
Check syntax and synthesizeSimulate using Modelsim
Translate, Map, PARImplement the design
SOFTWARE WINDOWSOFTWARE WINDOW
COMPONENTS OF COMPONENTS OF PROCESSORPROCESSOR
SYNTHESIS AND SYNTHESIS AND VERIFICATIONVERIFICATION
COMPONENTSCOMPONENTSALUALU
Shift UnitShift Unit
ComparatorComparator
Address RegisterAddress Register
Register ArrayRegister Array
Program CounterProgram Counter
Instruction RegisterInstruction Register
Output RegisterOutput Register
Operand RegisterOperand Register
Control UnitControl Unit
ALUALU
Two unsigned 16 bit inputs ‘a’ and ‘b’Two unsigned 16 bit inputs ‘a’ and ‘b’
Unsigned output ‘c’ of 16 bits,Unsigned output ‘c’ of 16 bits,
Select line ‘s’ of 4 bit to select one of the Select line ‘s’ of 4 bit to select one of the following operations performed by the ALU.following operations performed by the ALU.
OPERATIONS PERFORMED BY OPERATIONS PERFORMED BY ALUALU
PASS(0000): PASS(0000): In this mode no operation is performed on the In this mode no operation is performed on the operands. It just passes the data as it is.operands. It just passes the data as it is.AND (0001): AND (0001): This mode performs AND operation between This mode performs AND operation between ‘a’ and ‘b’ and the output is obtained on ‘c’.‘a’ and ‘b’ and the output is obtained on ‘c’.OR (0010):OR (0010): This mode performs OR operation between ‘a’ This mode performs OR operation between ‘a’ and ‘b’ and the output is obtained on ‘c’.and ‘b’ and the output is obtained on ‘c’.NOT (0011):NOT (0011): NOT operation is performed on ‘a’ and output NOT operation is performed on ‘a’ and output is given on line ‘c’.is given on line ‘c’.XOR (0100):XOR (0100): This mode performs XOR operation between This mode performs XOR operation between ‘a’ and ‘b’ and the output is obtained on ‘c’.‘a’ and ‘b’ and the output is obtained on ‘c’.ADD (0101):ADD (0101): This mode performs ADD operation between This mode performs ADD operation between ‘a’ and ‘b’ and the output is obtained on ‘c’.‘a’ and ‘b’ and the output is obtained on ‘c’.
SUB (0110):SUB (0110): This mode performs SUB operation between This mode performs SUB operation between ‘a’ and ‘b’ and the output is obtained on ‘c’.‘a’ and ‘b’ and the output is obtained on ‘c’.
INC (0111):INC (0111): This mode increments the data in ‘a’ and the This mode increments the data in ‘a’ and the output is obtained on ‘c’.output is obtained on ‘c’.
DEC (1000):DEC (1000): This mode Decrements the data in ‘a’ and This mode Decrements the data in ‘a’ and the output is obtained on ‘c’.the output is obtained on ‘c’.
ZERO (1001):ZERO (1001): This mode provides a Zero output on ‘c’. This mode provides a Zero output on ‘c’.
MUL (1010):MUL (1010): This mode performs Multiplication This mode performs Multiplication operation between ‘a’ and ‘b’ and the output is obtained on operation between ‘a’ and ‘b’ and the output is obtained on ‘c’.‘c’.
DIV (1011):DIV (1011): This mode performs Division operation This mode performs Division operation between ‘a’ and ‘b’ and the output is obtained on ‘c’.between ‘a’ and ‘b’ and the output is obtained on ‘c’.
BYTESWAP (1100):BYTESWAP (1100): This mode will interchange the This mode will interchange the upper and lower byte of ‘a’ and the output is obtained on upper and lower byte of ‘a’ and the output is obtained on ‘c’.‘c’.
OTHER UNITSOTHER UNITSComparator:Comparator:
This unit compares two 16 bit data coming from ALU This unit compares two 16 bit data coming from ALU and Operand register and gives one bit output to the control unit. and Operand register and gives one bit output to the control unit.
Shift Unit:Shift Unit:
The Shift unit performs operations like Shift left, Shift The Shift unit performs operations like Shift left, Shift right, Rotate left, Rotate right for bit manipulations right, Rotate left, Rotate right for bit manipulations
Address Register:Address Register:
This is a 16 bit register which is used to point a location This is a 16 bit register which is used to point a location in memory space.in memory space.
Register Array:Register Array:This is an array of 8 registers used for temporary storage This is an array of 8 registers used for temporary storage
of data.of data.
Program Counter:Program Counter:
This a 16 bit register used to point the address of This a 16 bit register used to point the address of next instruction code. next instruction code.
Instruction Register: Instruction Register:
This 16 bit register contain instruction code. First This 16 bit register contain instruction code. First 4 bits specify the opcode i.e. the operation to be performed 4 bits specify the opcode i.e. the operation to be performed and the last 6 bits specify destination and source registers. and the last 6 bits specify destination and source registers.
Output Register: Output Register:
Intermediate storage between ALU and data bus. Intermediate storage between ALU and data bus.
Operand Register: Operand Register: This 16 bit register contains the operand (data to This 16 bit register contains the operand (data to
be operated on).be operated on).
CONTROL UNITCONTROL UNITThis unit is the heart of Microprocessor which provides This unit is the heart of Microprocessor which provides control and timing signals to other units. The various control and timing signals to other units. The various controlling signals are as follows:controlling signals are as follows:
INSTRREG:INSTRREG: This 16 bit line coming from Instruction This 16 bit line coming from Instruction Register is decoded in Control Unit to know the operation Register is decoded in Control Unit to know the operation to be performed.to be performed.
CLOCK CLOCK :: This is a external signal to CU which is used for This is a external signal to CU which is used for timing and synchronization of CU operations.timing and synchronization of CU operations.
COMPOUTCOMPOUT : This one bit line coming from Comparator : This one bit line coming from Comparator can be either high or low depending on the operations can be either high or low depending on the operations performed in the comparator. performed in the comparator.
RESETRESET :: Used to reset or restart the operations of Used to reset or restart the operations of microprocessor.microprocessor.
READY READY :: Provides synchronization between Provides synchronization between microprocessor and external elements or devicesmicroprocessor and external elements or devices VMA - VALID MEMORY ADDRESSVMA - VALID MEMORY ADDRESS : : This This signal is used to enable the memory chip for read and signal is used to enable the memory chip for read and write operations.write operations.WRB - WRITE/ READ BARWRB - WRITE/ READ BAR : : When high When high memory write operation is enabled and when low memory write operation is enabled and when low read operation is enabled.read operation is enabled.COMPSEL:COMPSEL: This is 3 bit output to select the mode This is 3 bit output to select the mode of operation of comparator. of operation of comparator. ALUSEL:ALUSEL: This is 4 bit output to select the mode of This is 4 bit output to select the mode of operation of ALU. operation of ALU.
REGWR / REGRD:REGWR / REGRD: When high write and read When high write and read operations performed in one of the register of register operations performed in one of the register of register array.array.PROGCNTRWR/ PROGCNTRRDPROGCNTRWR/ PROGCNTRRD : : when when these signals are high write and read operation are these signals are high write and read operation are performed in program counter.performed in program counter.OUTREGRD/OUTREGWROUTREGRD/OUTREGWR : : when these when these signals are high write and read operation are signals are high write and read operation are performed in output register. Output register is used performed in output register. Output register is used for temporary storage of data during clock transition, for temporary storage of data during clock transition, to prevent overwriting of data on data bus.to prevent overwriting of data on data bus.OPREGRD:OPREGRD: When high data of operation register When high data of operation register moves into ALU.moves into ALU.
INSTRWR:INSTRWR: When high data which is fetched from When high data which is fetched from memory is written into instruction register.memory is written into instruction register.
ADDREGRD/ADDREGWRADDREGRD/ADDREGWR :: when these when these signals are high write and read operation are signals are high write and read operation are performed in address register.performed in address register.
SHIFTSEL:SHIFTSEL: This is 3 bit output to select the mode This is 3 bit output to select the mode of operation of shift unit.of operation of shift unit.
REGSEL:REGSEL: This is 3 bit output to select one of the This is 3 bit output to select one of the 16 bit register from register array16 bit register from register array
OPERATION OF CONTROL UNITOPERATION OF CONTROL UNIT
Keep Reset high for 1 cycle.
Control Unit decodes first 5 bitsAnd determines the instruction
Execute the instruction.
VMA goes highWRb goes low.
If Ready is highData is stored on instruction register.
COMPLETE MICROPROCESSORCOMPLETE MICROPROCESSOR
Various pins of microprocessor are:-Various pins of microprocessor are:-CLOCK CLOCK RESET RESET READYREADYVMAVMAWRB WRB DATA BUS:DATA BUS: It is 16 bit bus carry data between all the It is 16 bit bus carry data between all the unit of processor and also exchange data with external world.unit of processor and also exchange data with external world.ADDRESS BUSADDRESS BUS : It is 16 bit bus, used to address memory.: It is 16 bit bus, used to address memory.
OPERATION CYCLE OF OPERATION CYCLE OF MICROPROCESSORMICROPROCESSOR
Reset is kept high for 1 clock cycle. So that reset cycle Reset is kept high for 1 clock cycle. So that reset cycle starts, output 0000h will be placed on address bus and starts, output 0000h will be placed on address bus and data bus.data bus.The data from data bus gets copied in address and The data from data bus gets copied in address and program counter register.program counter register.Now, VMA goes high and WRB goes low. Now, VMA goes high and WRB goes low. Then if READY is high, the data on data bus will get Then if READY is high, the data on data bus will get stored in instruction register.stored in instruction register.Control unit takes first 5 bits (15 downto 11) from Control unit takes first 5 bits (15 downto 11) from instruction register to decode the type of operation.instruction register to decode the type of operation.Now first decoded instruction is executed. Now first decoded instruction is executed. Finally procedure of incrementing program counter starts. Finally procedure of incrementing program counter starts. And then whole cycle repeats.And then whole cycle repeats.
FUTURE PLANS AND FUTURE PLANS AND CONCLUSIONCONCLUSION
Since this is a new emerging field, we will try to Since this is a new emerging field, we will try to design and implement as many new designs as design and implement as many new designs as possible,possible,
We will also add as many new instructions as We will also add as many new instructions as possible,possible,
From our project and related research, we have From our project and related research, we have learnt the whole “VLSI design flow” learnt the whole “VLSI design flow”
Our project gives a way to verify, simulate and test Our project gives a way to verify, simulate and test any design before manufacturing which is helpful any design before manufacturing which is helpful for saving time, cost and manpower in Industries. for saving time, cost and manpower in Industries.
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