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AN ATMEGA32 - ADC
Rev 1.0 29-12-2009 Application Note
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ATMEGA32 - ADC
Nguyen Trung Hieu 29-12-2009 Page 2 of 18
Revision History Revision Date Description Author Rev 1.0 29-12-2009 Preliminary Nguyen Trung Hieu
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1. Gii thiu khi ADC trn ATMEGA32 1.1. S khi ADC
1.1.1. Datasheet
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1.1.2. S khi rt gn ADC vi cc ng vo knh n
1.2. Tnh nng tng qut phn gii 10 bit C th t ti 15kSPS (Sampling Per Second) chuyn i phn gii cao nht. 8 knh ng vo ngun n thng qua b dn knh 7 knh ng vo vi sai Knh ng vo vi sai vi li ty chn (10x v 200x) Ty chn canh tri (Left Adjustment) cho gi tr ADC xut ra Di in p ng vo ADC t 0 Vcc. C th la chn in p tham chiu 2.56C cho ADC Ch hot ng t do (lin tc) hay ch chuyn i n. Ch t ng kch hot ADC bng ngun ngt. Ch ngt khi hon tt chuyn i ADC. Tnh nng chng nhiu cho ADC.
1.3. Gi tr chuyn i ADC v cch tnh i vi qu trnh chuyn i ngun n
.1023INREF
VADCV
= Vi:
Vin l in p trn chn ng vo la chn. VREF l in p tham chiu la chn. 0x000 cho thy l gi tr analog ca GND. 0x3FF cho thy l gi tr analog ca in p tham chiu la chn 1 LSB.
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i vi cc knh vi sai
Vi:
VPOS l in p trn chn ng vo positive. VNEG l in p trn chn ng vo negative. GAIN l h s li la chn. VREF l in p tham chiu la chn. Kt qu hin th di 2 dng b nhau: t 0x200 (-512d) n 0x1FF (511d) Bit th 9 ca ADC (MSB ca kt qu) trong thanh ghi data high c th s dng kim
tra trng thi cc (polarity) ca kt qu chuyn i: nu bit ny bng 1 ngha l kt qu m, ngc li l kt qu dng.
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1.4. Hot ng B ADC thc hin chuyn i gi tr in p (tng t) ng vo thnh gi tr s 10-bit. Gi tr in p nh nht l GND. Gi tr in p ln nht l in p tham chiu AREF. Gi tr AREF c th ly t bn ngoi AVCC hoc ngun in p ni 2.56V bn trong chip. B ADC c php hot ng bng cch set bit ADC Enable.
Bt u chuyn i: C 2 cch:
Set ADC Start Conversion bit: cho php ADC bt u chuyn i ngay lp tc. Bit ny bng 1 trong sut qu trnh chuyn i v c xa bng hw khi hon tt.
Qu trnh chuyn i c th c trigger (kch hot) t ng t nhiu ngun khc nhau. Auto triggering c cho php thng qua vic set ADC Auto Trigger Enable bit. Ngun trigger chn bng cch set ADC Trigger Select bit. Khi c cnh dng xut hin trn cc ngun tn hiu trigger c chn, b ADC bt u chuyn i. Lu rng Interupt Flag (c ngt) s b set cho d ngun ngt hay ngt ton cc (trong SREG) c b cm hay khng. Do vy, qu trnh chuyn i c th b trigger m khng cn phi gy ngt. Tuy nhin, c ngt phi c xa nhm trigger qu trnh chuyn i mi khi c ngt tip theo xy ra.
Ch hot ng: C 2 cch:
Ch chuyn i n (Single Conversion): bng cch kch hot bit ADC Conversion bit nh trn.
Chuyn i lin tc (Free Running): nu s dng c ngt ADC nh mt ngun trigger ADC, qu trnh chuyn i mi s bt u ngay khi qu trnh chuyn i trc kt
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thc. B ADC khi hot ng ch t do (Free running mode) , ly mu v cp nht gi tr thanh ghi data mt cch c nh. Ln chuyn i u tin vn phi kch hot bng cch set bit ADC Start Conversion. Trong ch ny, b ADC s thc thi qu trnh chuyn i lin tc mt cch c lp vi c ngt ADC, ADIF c c xa hay khng.
B ADC s sinh ra kt qu 10-bit trong thanh ghi ADC Data, Low v High. Mc nh gi tr ny
canh phi, nhng c th thit lp gi tr ny canh tri. Khi kt qu thit lp canh tri v nu khng cn thit chnh xc hn 8-bit, th ch cn c thanh
ghi data high l . Nu khng, phi c thanh ghi data low trc, sau n thanh ghi data high m bo d liu trong 2 thanh ghi u l kt qu ca cng ln chuyn i.
Khi thanh ghi data low c c, vic truy xut ca ADC n thanh ghi data b chn. Ngha l nu thanh ghi data low c xong, v qu trnh chuyn i hon thnh trc khi thanh ghi data high c c, th khng thanh ghi no c cp nht v kt qu t qu trnh chuyn i b mt. Khi thanh ghi data high c c, vic truy xut ADC n 2 thanh ghi data high v low c cho php tr li.
B ADC c ngun ngt ca ring n c th s dng kch hot khi qu trnh chuyn i hon tt. Khi vic truy xut t b ADC n thanh ghi data b cm trong qu trnh c thanh ghi data high v low, ngt vn xy ra cho d kt qu chuyn i b mt.
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B chia trong ADC - ADC Prescaler
Thng thng b ADC cn ngun xung clock t 50KHz 200KHz hot ng ti phn
gii ti a. Nu phn gii thp hn 10-bit, clock ng vo ADC c th cao hn 200KHz t ti tc ly mu cao hn.
Bn trong b ADC c b chia clock t clock ca h thng c c tc clock mong mun cp cho ADC. B chia thit lp da vo gi tr cc bit ADPS (xem chi tit trong phn thanh ghi).
xc nh thi gian chuyn i ADC l bao nhiu, ta ly s chu k xung clock ADC chuyn i chia cho tn s hot ng hin ti ca ADC. Thng thng, ADC mt khong 13 chu k cho ln chuyn i bnh thng. Ln chuyn i u tin tnh t lc set bit ADC Enable mt 25 chu k Chuyn i m rng (Extended Conversion). V d, nu ang s dng ADC c tn s clock vo l 200KHz, thi gian cho chuyn i thng thng s mt 65us (13/200e3=65e-6), chuyn i m rng s mt 125us (25/200e3=125e-6).
1.5. M t cc thanh ghi ADC ADC Multiplexer Selection Register - Thanh ghi la chn dn knh ADC ADMUX
Bit 7:6 REFS1:0 Reference Selection Bits Bit la chn ngun tham chiu.
Cc bit ny s dng la chn ngun in p tham chiu cho ADC nh trong bng 83 bn di. Nu cc bit ny thay i trong qu trnh chuyn i, s thay i ny khng c hiu lc cho n khi qu trnh chuyn i hin ti hon tt (c ADIF trong ADCSRA set). Ngun p tham chiu ni c th khng c tc dng nu ngun p tham chiu bn ngoi ang t ln chn AREF.
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Bit 5 ADLAR ADC Left Adjust Result Canh tri cho kt qu ADC.
Bit ADLAR tc ng ln vic th hin ca kt qu chuyn i ADC trong thanh ghi data. Set bit ny canh tri, ngc li l canh phi. Thay i bit ny s tc ng ln thanh ghi data ngay lp tc, bt chp cc qu trnh chuyn i no ang hot ng.
Bit 4:0 MUX4:0 Analog Channel and Gain Selection Bits Bit la chn li v cc knh analog.
Cc bit ny la chn ng vo analog no c ni ti ADC. Cc bit ny cng chn li cho cc knh vi sai. Chi tit trong bng 84. Nu cc bit ny b thay i trong sut qu trnh chuyn i, s thay i ny s khng c tc dng cho n khi qu trnh chuyn i hin ti hon tt. (c ADIF trong ADCSRA set).
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ADC Control and Status Register A ADCSRA Thanh ghi iu khin v trng thi (A) ca ADC
Bit 7 ADEN ADC Enable Cho php ADC hot ng.
Set bit ny s cho php ADC hot ng, ngc li l tt b ADC. Tt ADC trong qu trnh chuyn i s kt thc tin trnh ngay lp tc.
Bit 6 ADSC ADC Start Conversion Bt u chuyn i ADC. Trong ch chuyn i ngun n, set bit ny s bt u tng ln chuyn i mt. Trong ch
hot ng t do, set bit ny bt u ln chuyn i u tin. Ln chuyn i u tin sau khi ADSC c ghi vo sau khi ADC c php hot ng, hoc ADSC c ghi vo cng lc ADC c php hot ng, s mt 25 chu k ADC clock thay v 13 chu k nh bnh thng. Ln chuyn i u tin thc hin vic khi to b ADC.
ADSC s c c ra bng 1 khi no cn trong qu trnh chuyn i. Khi qu trnh chuyn i hon tt, n s tr v gi tr 0. Ghi 0 vo bit ny khng c tc dng.
Bit 5 ADATE ADC Auto Trigger Enable Cho php t ng kch ADC. Set bit ny, ch t ng kch ADC s c php hot ng. B ADC s bt u chuyn i
khi cnh dng ca tn hiu la chn kch xut hin. Ngun kch c chn bng cch thit lp ADC Trigger Select bit bit chn ngun kch ADC, ADTS trong SFIOR.
Bit 4 ADIF ADC Interrupt Flag C ngt ADC. Bit ny c set khi chuyn i ADC hon tt v thanh ghi data c cp nht. Ngt hon tt
chuyn i ADC c thc thi nu bit ADIE v I bit trong SREG c set. ADIF c xa bi hw khi thc thi x l vector ngt tng ng. Ngoi ra, ADIF c xa bng cch ghi 1 vo bit ny. Cn thn, nu ang thc hin Read-Modify-Write trn ADCSRA, ngt ang treo (pending interrupt) c th b cm. iu ny cng p dng nu lnh SBI v CBI ang c s dng.
Bit 3 ADIE ADC Interrupt Enable Cho php ngt ADC. Set bit ny v set bit I tron SREG, ngt hon tt ADC s c kch hot.
Bit 2:0 ADPS2:0 ADC Prescaler Select Bits Bit chn b chia ADC. Cc bit ny xc nh h s chia gia tn s thch anh v clock ng vo ADC.
The ADC Data Register ADCL and ADCH Thanh ghi data ca ADC Low and High.
Trng hp ADLAR = 0
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Trng hp ADLAR = 1
Khi mt qu trnh chuyn i ADC hon tt, kt qu c tm thy trong 2 thanh ghi ny.
Trng hp cc knh vi sai c s dng, kt qu hin th di 2 dng b nhau. Khi ADCL c c, thanh ghi data ca ADC s khng c cp nht cho n khi ADCH c
c ra. Nh vy, nu kt qu ang c canh tri v khng cn chnh xc hn 8-bit, ch cn c thanh ghi ADCH. Bng khng, cn phi c thanh ghi ADCL trc, sau l thanh ghi ADCH.
Bit ADLAR trong ADMUX, v bit MUXn trong ADMUX tc ng ln kt qu c c ra t cc thanh ghi. Nu ADLAR c set, kt qu l canh tri, khng th n canh phi.
ADC9:0 ADC Conversion Result Kt qu chuyn i ADC. Cc bit ny th hin kt qu t chuyn i.
Special Function IO Register SFIOR Thanh ghi chc nng IO c bit.
Bit 7:5 ADTS2:0 ADC Auto Trigger Source ngun kch t ng cho ADC.
Nu bit ADATE trong ADCSRA c set, gi tr nhng bit ny la chn ngun no lm ngun kch chuyn i ADC. Nu ADATE b xa, thit lp ADTS2:0 s khng c tc dng. Qu trnh chuyn i s c kch bi cnh ln ca c ngt c la chn. Lu rng vic chuyn t ngun kch ang b xa sang ngun kch ang c set s sinh ra cnh dng ca tn hiu kch. Nu bit ADEN trong ADCSRA c set s bt u qu trnh chuyn i. Chuyn i sang ch chy t do (ADTS[2:0]=0) s khng gy ra kch, thm ch c ngt ADC c set.
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Bit 4 Res: Reserved Bit.
Reserved. Bit ny cn c xa khi SFIOR c set m bo tnh tng thch ca cc thit b nng cp trong tng lai.
2. Khi ADC trn KIT AT32 2.1. Schematic
ADC Input
5V
JP2312PC0
JP2412 PC1
JP2512 PC2
J3
DS1820
12
5V
3
R1
1KR210K
J2
LM35
12
5V
3
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C22104
5VU12
ATMEGA32
RST9
XTAL212
XTAL113
GN
D11
AGND31
AREF32
AVCC30
VC
C10
PC0/SCL22PC1/SDA23PC2/TCK24PC3/TMS25PC4/TDO26PC5/TDI27PC6/TOSC128PC7/TOSC229
PD0/RXD14
PD1/TXD15
PD2/INT016
PD3/INT117
PD4/OC1B18
PD5/OC1A19
PD6/ICP120
PD7/OC221
PB0/XCK/T01
PB1/T12
PB2/INT2/AIN03
PB3/OC0/AIN14
PB4/SS5
PB5/MOSI6
PB6/MISO7
PB7/SCK8
PA0/ADC040
PA1/ADC139
PA2/ADC238
PA3/ADC337
PA4/ADC436
PA5/ADC535
PA6/ADC634
PA7/ADC733
L247uH
1
2
JP2612AREF
PA2PA1PA0
PA4
AVCC
PA3
PC4PC5PC6PC7
PA6PA5
PC0PC1PC2PC3
PA7
ADC Ref. Input 2.2. Board thc t
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2.3. Thit lp board khi s dng ADC Setup jumper s dng ADC: JP21 cp p cho pin AREF. Vi bin tr VR: Ni dy t pin 1 ca JP23 (pin nm pha di) pin PA[0..7] ADC[0..7]
(bt u t pin s 2 t trn xung PORTA). Vi cm bin nhit LM35: Ni dy t chn output ca LM35 pin 2 ca JP24 (bn phi)
pin PA[0..7] ADC[0..7] (bt u t pin s 2 t trn xung PORTA). Trn PORTA, nu s dng pin no lm chc nng ADC, switch chn in tr ko cho pin
phi set sang v tr OFF.
3. Ni dung thc hnh 3.1. Bi thc hnh s 1 - ADC knh n vi VR
Ni dung - S dng ADC vi ng vo knh n (ADC0..7) - VREF ly t chn AREF.
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- c gi tr in p t bin tr. - Chuyn i kt qu ADC qua gi tr in p tng ng - Hin th kt qu qua mn hnh terminal (UART). - S dng cng c DC Volmeter hoc Voltage Probe mode kim chng. - Thc hin m phng qua proteus. - Hin thc ha trn KIT AT32 sau khi m phng thnh cng.
Cc bc thc hin (HD ca GV)
3.2. Bi thc hnh s 2 (m rng) ADC knh n vi nhiu ng vo (multi input)
Ni dung Yu cu tng t bi tp 1, vi 8 knh ng vo n. c v hin th c 8 gi tr ADC, gi tr in p tng ng trn mn hnh Virtual Terminal. Thc hin trong Proteus - Khng thc hin trn KIT v ng vo ADC hn ch. Pht trin kh nng vit hm con dng c, quy i v hin th kt qu ln terminal
cho HV.
Cc bc thc hin (HD ca GV)
3.3. Bi thc hnh s 3 (m rng) VR vi LED bar Ni dung
Yu cu tng t bi tp 1. c gi tr VR, iu khin dy 24 leds (LED bar) sng/ti dn tng ng theo gi tr ADC
c v t knh VR. Thc hin m phng trn Proteus. Hin thc ha trn KIT.
Cc bc thc hin (HD ca GV)
3.4. Bi thc hnh s 4 ADC vi LM35. Ni dung
Yu cu tng t bi tp 1, nhng ng vo l ng ra ca cm bin nhit LM35. c gi tr LM35, quy i ra nhit v hin th gi tr ny qua UART. Thc hin m phng trn Proteus. Hin thc ha trn KIT.
Cc bc thc hin (HD ca GV)
3.5. Bi thc hnh s 5 ADC vi ch vi sai Ni dung
Thc hin c p vi sai trn 2 knh ADC0 v ADC1, vi gain thit lp bng 10x. Hin th gi tr ny qua terminal. Lu du ca kt qu tr v.
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M phng trn Proteus. Cc bc thc hin
(HD ca GV)
3.6. Bi tp thc hnh s 6 ADC vi ngt hon tt chuyn i Ni dung
S dng ADC trong ch ngt hon tt cho bi tp 1 Complete ADC Conversion Interrupt.
Cc bc thc hin (HD ca GV)
3.7. Bi tp thc hnh s 7 Kch hot chuyn i ADC bng ngun ngt Ni dung
S dng ADC vi kch hot chuyn i bng ngun ngt cho bi tp 1 (Ext. Interrupt hoc Timer Interrupt).
Cc bc thc hin (HD ca GV)
3.8. Bi tp thc hnh s 8 (m rng) ADC vi ch FreeRunning Ni dung
S dng ngt hon tt ADC lm ngun kch hot bt u chuyn i ADC, ng dng cho bi tp 1.
Cc bc thc hin (HD ca GV)
3.9. Bi tp thc hnh s 9 (m rng) - S dng ADC ch scanning trong CodeVision (software)
Ni dung S dng ADC vi ch ty chn Scanning trong CodeVision cho bi tp 2.
Cc bc thc hin (HD ca GV)
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Table Of Content 1. Gii thiu khi ADC trn ATMEGA32............................................................................................................................. 3
1.1. S khi ADC ...................................................................................................................................................... 3 1.1.1. Datasheet .......................................................................................................................................................... 3 1.1.2. S khi rt gn ADC vi cc ng vo knh n ......................................................................................... 4
1.2. Tnh nng tng qut ................................................................................................................................................ 4 1.3. Gi tr chuyn i ADC v cch tnh ....................................................................................................................... 4 1.4. Hot ng................................................................................................................................................................ 6 1.5. M t cc thanh ghi ADC ........................................................................................................................................ 8
2. Khi ADC trn KIT AT32 ............................................................................................................................................... 13 2.1. Schematic.............................................................................................................................................................. 13 2.2. Board thc t......................................................................................................................................................... 14 2.3. Thit lp board khi s dng ADC.......................................................................................................................... 15
3. Ni dung thc hnh....................................................................................................................................................... 15 3.1. Bi thc hnh s 1 - ADC knh n vi VR......................................................................................................... 15 3.2. Bi thc hnh s 2 (m rng) ADC knh n vi nhiu ng vo (multi input) ................................................. 16 3.3. Bi thc hnh s 3 (m rng) VR vi LED bar.................................................................................................. 16 3.4. Bi thc hnh s 4 ADC vi LM35. ................................................................................................................... 16 3.5. Bi thc hnh s 5 ADC vi ch vi sai ......................................................................................................... 16 3.6. Bi tp thc hnh s 6 ADC vi ngt hon tt chuyn i................................................................................ 17 3.7. Bi tp thc hnh s 7 Kch hot chuyn i ADC bng ngun ngt ............................................................... 17 3.8. Bi tp thc hnh s 8 (m rng) ADC vi ch FreeRunning ..................................................................... 17 3.9. Bi tp thc hnh s 9 (m rng) - S dng ADC ch scanning trong CodeVision (software) ...................... 17
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Appendix
1. Gii thiu khi ADC trn ATMEGA32 1.1. S khi ADC 1.1.1. Datasheet 1.1.2. S khi rt gn ADC vi cc ng vo knh n
1.2. Tnh nng tng qut 1.3. Gi tr chuyn i ADC v cch tnh i vi qu trnh chuyn i ngun n i vi cc knh vi sai
1.4. Hot ng Bt u chuyn i: Ch hot ng: B chia trong ADC - ADC Prescaler
1.5. M t cc thanh ghi ADC ADC Multiplexer Selection Register - Thanh ghi la chn dn knh ADC ADMUX ADC Control and Status Register A ADCSRA Thanh ghi iu khin v trng thi (A) ca ADC The ADC Data Register ADCL and ADCH Thanh ghi data ca ADC Low and High. Special Function IO Register SFIOR Thanh ghi chc nng IO c bit.
2. Khi ADC trn KIT AT32 2.1. Schematic 2.2. Board thc t 2.3. Thit lp board khi s dng ADC
3. Ni dung thc hnh 3.1. Bi thc hnh s 1 - ADC knh n vi VR Ni dung Cc bc thc hin
3.2. Bi thc hnh s 2 (m rng) ADC knh n vi nhiu ng vo (multi input) Ni dung Cc bc thc hin
3.3. Bi thc hnh s 3 (m rng) VR vi LED bar Ni dung Cc bc thc hin
3.4. Bi thc hnh s 4 ADC vi LM35. Ni dung Cc bc thc hin
3.5. Bi thc hnh s 5 ADC vi ch vi sai Ni dung Cc bc thc hin
3.6. Bi tp thc hnh s 6 ADC vi ngt hon tt chuyn i Ni dung Cc bc thc hin
3.7. Bi tp thc hnh s 7 Kch hot chuyn i ADC bng ngun ngt Ni dung Cc bc thc hin
3.8. Bi tp thc hnh s 8 (m rng) ADC vi ch FreeRunning Ni dung Cc bc thc hin
3.9. Bi tp thc hnh s 9 (m rng) - S dng ADC ch scanning trong CodeVision (software) Ni dung Cc bc thc hin
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