altera fpga development and education platforms.pptx

ALTERA DE Series FPGA Development and Education Platforms

FormEDAS Technologies

www.edastech.com

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Agenda • Altera FPGA Road Map • Product Overview• End market focus• DE Series Development and Education platform• Supporting Interfacing cards • Design examples• Laboratory exercises • Existing End Users (Universities and industries

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65 nm90 nm

Per

form

ance

& D

ensi

ty

2002-04 2004-05 2006-07

130 nm2008-10

45 nm

Cyclone III

HardCopy IIIHardCopy III

Stratix III GXStratix III GX

Stratix III

Stratix II GX

Stratix II

Cyclone II

HardCopy II

Cyclone

Stratix GX

HardCopy

Stratix

Cyclone IVCyclone IV

HardCopy IVHardCopy IV

Stratix IV GXStratix IV GX

Stratix IVStratix IV

Planning

Altera FPGA Roadmap

28nm20010-12

Cyclone IVCyclone IV

HardCopy VHardCopy V

Stratix V GXStratix V GX

Stratix VStratix V

Product Overview

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End Market Focus

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End Market Focus

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DE Series Development and Education platform

• DE1• DE2• DE-70• DE2-115• DE0• DE0-Nano

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Development Board for research level projects I. TR-4II.DE3 / DE4

• Application Specifici. VEEK : Video and embedded evaluation kitii. INK : Industrial Networking Kitiii. Altera Nios II Embedded Evaluation Kitiv. Cyclone III Video Development Systemv. DSP in FPGA Development kitvi. PCI-X Development Board

Altera DE1 Development and Education Board DE1 Board Feature Set

- EP2C20F484- EPCS4 for configuration- USB Blaster on board- SDRAM (8Mbyte)- SRAM (512Kb)- Flash (4Mbyte)- 24-bit Audio CODEC- VGA Port- RS-232 Port- PS/2 Port- SD/MMC Socket- SMA ext clock input- 10 Red/8 Green LEDs- 2 x 40-pin Expansion Ports- 4 x 7-seg display- 10 SW & 4 Push Buttons

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ALTERA DE2 Board

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ALTERA DE2-115 Board

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ALTERA DE2-115 Block Diagram

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ALTERA DE0-Nano

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ALTERA DE0-Nano

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The DE3 Board

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Stackable Mechanism in DE3(240 LVDS pairs –1Gbps)

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Many ways to assemble DE3 boards into a big system (3 DE3 boards in this case)

Many ways to assemble DE3 boards into a big system (5 DE3 boards in this case)

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Interfacing Cards

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Interfacing Cards

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Interfacing Cards

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CD-Quality CASIO Keyboard (High-End Music Synthesizer)

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Digital Camera + Color/Motion Recognition (Pong Game)

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1.3 Mega Pixel Digital Camera with 3.6” Digital Panel

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DTV Solution using Altera DE2

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Web Server Using DE2

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Ethernet Packets TX/RX with NIOSII Core

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Key Components Used in the Lab:-- SDRAM (NIOSII code)-- Davicom 9000a Ethernet Controller

SD Card Music Player

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Laboratory exercises for digital Logic

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Lab 1 - Switches, Lights, and Multiplexers Lab 2 - Numbers and Displays Lab 3 - Latches, Flip-flops, and Registers Lab 4 - Counters Lab 5 - Timers and Real-Time Clock Lab 6 - Adders, Subtractors, and Multipliers Lab 7 - Finite State Machines Lab 8 - Memory Blocks Lab 9 - A Simple Processor Lab 10 - An Enhanced Processor Lab 11 - Implementing Algorithms in Hardware Lab 12 - Basic Digital Signal Processing

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Laboratory exercises for Embedded and computer organization

Worldwide Universities Using DE serise Platforms

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Industries Using DE serise Platforms

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• HP• AMD• LG• Philips• IBM• Microsoft• SigmaTel• ATI• Northrop Grumman• Jabil• TI• Simems• Juniper• Nokia• Wright Patterson Air Force Base

Dedicated lab setup

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End Users

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End Users

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