111 cpan 110 week 12 computer architecture and terminology

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CPAN 110Week 12

Computer Architecture and Terminology

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Bits, bytes Giga-big

Nano-small

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Bits & Bytes

● Bit - Binary Digit; represented by a 1 or a 0– abbreviated as b

● Byte - a fixed-size collection of bits– technically, minimum number of bits

required to represent a character– generally, 8 bits– usually, the smallest addressable unit of

storage– abbreviated as B

● If a bit is one bit and a byte is 8 bits, what would you call half a byte?

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●Answer:

Nibble - half a byte

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Units of Measure● Quantity/size/capacity

– Kilo byte -- KB• one KB is not 1000, it is 1024 (210) • except for disk drives (usually)

– Mega byte -- MB• one MB is not 1,000,000, it is 1024KB = 1024 x

1024 (220) = 1,048, 576 B• except for disk drives (usually)• e.g., 4096MB = 4MB

– Giga byte -- GB• one GB is not 1,000,000,000; it is 1024MB = 1024 x

1024 x 1024 (230) = 1,073,741,824 B• except for disk drives (usually)

– Tera byte -- TB• one TB is a whole lot of storage• not 1,000,000,000,000; it is 1024GB = 1024 x 1024

x 1024 x 1024 (240) =1.09951E+12• except for disk drives (usually)

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Disk drives 1MB measure

●Disk drives – to make their drives appear larger most drive manufacturers define 1MB as 1,000,000 bytes and 1GB as 1,000,000,000.

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Units of Measure● Speed

– Hertz -- Hz •one cycle per second•house current is 60Hz •speed of CPU: e.g., 4.7MHz, 550MHz,

1GHz● Rate

– bps -- bits per second•e.g., data transmission rate,

28.8Kbps, 56Kbps, 100Mbps

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Units of Measure

● Time (units in decimal)– milli second -- ms -- 1/1000 second

= 1 thousandth

– micro second - (Greek letter mu) -- 1/1,000,000 - one millionth

– nano second - ns -- one billionth– pico second - ps -- one trillionth

● Distance– micron - m -- one micrometer (1

millionth of a meter)

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Some Standard Contexts

● Memory = MB, megabytes

● Disk storage = Gigabytes● CPU clock speeds = MHz (now

GHz)● Memory access times =

nanoseconds,cpu cycle time

● CPU switching times = picoseconds● Disk access times = milliseconds

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Von Neumann Stored Program Computer Architecture Major Components

ControlUnit

ALU

CPU

InstructionCache

Memory (L2)Cache

Memory

I/O Controller(Keyboard)

I/O Controller

(Video)

I/O Controller

(FDD)

I/O Controller(FDD’s)

I/O Controller

(Other)

Keyboard Monitor Floppy Hard Disk’s ????

System Bus

InterruptController

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Generalized schematic architecture for a PC

● CPU (central processing unit) executes instructions.

● Memory--stores instructions and data.

● Cache--fast memory; stores data and instructions.

● Bus--connects components; instructions, data, and control signals.

● I/O controllers (adapters, interfaces) control I/O devices, communicate with other components.

● Interrupt Controller signals CPU when I/O occurs.

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Computer Architecture-- Mainframe Major Components

Channel--a specialized computer to offload I/O operations from CPU. Bus may be wider to transmit more data in same period of time.

ControlUnit

ALU

CPU

InstructionCache

Memory (L2)Cache

Memory

I/OChannel

I/O Controller

I/O Controller

(Other)

Devices

????

System Bus

InterruptController

I/O Controller

Devices

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● A computer has two major components, the CPU and memory.

● Memory consists of storage locations (cells).

● Data is stored in memory as binary numbers.

● Each binary digit (or bit) consists of one on-off circuit or switch.

● Each cell consists of one byte.

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MOVtoReg(R1)(000F)ADDtoReg(R1)(0010)StoreAdder(0011)

--------------

75

--------------

0123456789ABCDEF

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MemoryAddr Cells

Computer--Memory

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Computer--Memory

● Characters are stored in memory as numeric binary codes.

● Technically, a byte is the minimum number of bits needed to represent a character. On most computers a byte is 8 bits.

● Typically, numbers are stored in larger groups of cells consisting of 2 or 4 bytes called a word.

● Think of memory as a bank of storage boxes.

● Each box is identified by a number, called its address.

● Addresses begin at zero. Cells are numbered in sequence.

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Computer--Memory

● Memory stores both instructions and data. This is one of the keys to the stored-program computer concept. Normally, instructions and data are stored in separate regions in memory.

● An instruction is represented by a binary code called an op code.

● Addresses are usually represented in hexadecimal (base 16). Hex numerals go from 0 through F. (A is 10, B is 11, etc.)

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Computer--Memory

● In this example, program instructions start at memory location 2 (address 2) and end at address C (decimal 12).

● Data is stored at addresses F (decimal 15) and 10 (decimal 16).

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MOVtoReg(R1)(000F)ADDtoReg(R1)(0010)StoreAdder(0011)

--------------

75

--------------

0123456789ABCDEF

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MemoryAddr Cells

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CPU & Memory● The CPU

contains special working storage locations called registers

● IP, the Instruction Pointer (also called Instruction Counter) is a register in the control unit. It contains the address of the next instruction.

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MOVtoReg(R1)(000F)ADDtoReg(R1)(0010)StoreAdder(0011)

--------------

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-------

0123456789ABCDEF

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MemoryAddr Cells

Control Unit

IP 0002

ALU

------

------

------

------

R0

R1

R2

R3

Adder

------

First program instruction’s

address.

CPU

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CPU & Memory

● Most instructions are executed by the ALU.

● The ALU contains special and general-purpose registers. R0-R3 are used as storage locations. The Adder stores the sum of additions.

● When a program is executed (run), the operating system copies it into memory.

● The OS then sets IP to the address (location) of the first instruction in memory.

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Basic Instruction Fetch/Decode Cycle

● Program Counter points to address Addr of next instruction● Addr put on address bus● control unit CU signals memory storage unit to get contents of Addr● Next instruction Inst returned via data bus

Inst

Addr

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Instruction Execution Cycle

● Fetch● Decode● Fetch

operands● Execute ● Store output

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Staged execution● Note that executing a single

instruction may be broken down into a number of consecutive stages – Ex: Fetch, Decode, Execute

● These phases are typically performed by different parts of the CPU– the “Fetch” circuitry is independent of the

other two, etc.

● The provides an opportunity for improving performance by taking advantage of this parallelism– Usually called “pipelining”

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CPU & Memory● The operation

of the computer is controlled by a clock. The clock ticks. Each tick signals the CPU to perform the next step or operation.

● Clock frequency is a measure of CPU speed usually in MHz (Mega Hertz or million cycles per second or ticks per second).

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MOVtoReg(R1)(000F)ADDtoReg(R1)(0010)StoreAdder(0011)

--------------

7512

-------

0123456789ABCDEF

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MemoryAddr Cells

Control Unit

IP

Op code

Operand 1

Operand 2

0002

ALU

------

------

------

------

R0

R1

R2

R3

Adder

------

Address of first instruction

MovToReg

R1

000F

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CPU & Memory

● After the OS puts the address of the first instruction in IP, the clock ticks….

● Control unit fetches op code MOVtoReg stored at address in IP (0002).

● This code has two operands, a 1-byte register number (R1) and a 2-byte address (000F)

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CPU & Memory

● The clock ticks….● It fetches the 1-byte register

number R1.. The clock ticks…● It fetches the 2-byte address

(000F) at address 4● The clock ticks….● The instruction is 4 bytes long so

it adds 4 to IP; IP will contain 6, the address of the next instruction.

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CPU & Memory● Control unit passes

op code and operands to ALU.

● ALU copies data at address 000F into register 1

● After similar sequence for next op code, ALU adds value at address 0010 to value in register R1. Sum appears in Adder.

● Finally, op code StoreAdder causes the ALU to copy the value in Adder to address 0011.

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MOVtoReg(R1)(000F)ADDtoReg(R1)(0010)StoreAdder(0011)

--------------

7512

-------

0123456789ABCDEF

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MemoryAddr Cells

Control Unit

IP

Op code

Operand 1

Operand 2

0006

ALU

------

7

------

------

R0

R1

R2

R3

Adder

12

Address of next instruction

MovToReg

R1

000F

Get 7

Add 5

Store 12

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CPU & Memory

● Instruction lengths vary. Control unit tracks address of next instruction in IP.

● Execution is sequential. Instructions and steps in each instruction are executed one after another at each clock tick.

● Time required for an instruction depends on number of sequential steps in the instruction.

● Execution times vary for individual instructions; e.g., I8086, ADD is 3 ticks; DIV, up to 164 ticks.

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Measuring Computer Speeds

● Clock Frequency (MHz)– Execution is sequential. – Instructions and steps in each instruction are

executed one after another at each clock tick.– CPU speeds are increased by performing

several steps simultaneously at each tick.– Clock frequency is not a good way to compare

speeds. Ticks per instruction varies among CPU types.

– A 100MHz 486 is not as fast as a 100MHz Pentium

– Can use if comparing same CPU architecture – e.g., 300MHz to 333MHz Pentium II)– Be careful. A 350MHz Pentium II may be more

than 27MHz faster than a 333MHz Pentium II

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Measuring Computer Speeds

● MIPS (Million Instructions per Second). – Older measure.– Different systems have different

instructions and do more per instruction than others.

– CISC (Complex Instruction Set Computer) systems do more per instruction than RISC (Reduced Instruction Set Computer).

– RISC systems have uniform instructions. This simplifies and speeds up the control unit.

– RISC MIPs are higher, but a CISC system may execute an application faster.

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FLOPS (Floating-point Operations per Second)● Meaningless except for floating point

processors and floating point applications.

● All computers implement instructions to add 5 + 7 but may not have instructions for 5.5 + 7.5

● Fractions are stored internally in floating point (scientific) notation.

● Arithmetic requires complex programs or complex floating point hardware.

● Text and business applications do little with fractions. Mathematical applications depend on them.

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Alternative Computer Architectures

● Alternatives include– Multiprocessors have two or more CPUs

• Bottleneck is they share the same memory and bus

– Massively Parallel Processors• Distribute operations among many small

processors• Associative architectures (e.g., neural

networks) experimental designs only

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Data● Ultimately, all computer data is binary -- 1s and 0s

– Numeric data (numbers) stored as binary numbers• Base 2, numerals 0 and 1

– Text data (alphabetic characters and punctuation marks, etc.) stored as numeric codes

• ASCII (American Standard Code for Information Interchange)Most commonly used code7-bit code, up to 128 characters (codes 0 through 128)Usually represented in an 8-bit byte8th bit used for extended codes (grpahic and special

characters)• EBCDIC (Extended Binary Coded Decimal Interchange Code)

An 8-bit code used on some IBM systems and other mainframe computers

• A text file generally consists only of the standard ANSI text characters.NOTEPAD creates text files.No special formatting

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Other Data Types● Other Data Types

– Audio (Sound, music)– Graphic (Images, photos)– Video (Movies, animations)

● Audio– MIDI (musical instrument data interchange)

• Plays pre-recorded sounds (voices), etc• Compact files

– CDA – compact disk audio– MP3 (MPEG layer 3) – lossy audio compression

format– WAV – MS and IBM audio format

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Other Data Types● Graphic/Images

– Bitmap versus vector– Resolution, pixels, color depth– Types

• BMP Microsoft bitmap• GIF Compuserv Graphic Interchange Format (compression techniques patented)• JPG/JPEG (Joint Photographic Experts Group)

compression format• PNG – Portable Network Graphics; non-proprietary

bitmapped compression format

● Video– Requires very high data throughput