赛灵思专家大讲堂 - 嵌入式和dsp篇
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Xilinx Embedded & DSP
© Copyright 2011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. PCI, PCIe and PCI Express are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.
------------------------------Embedded & DSP--------------------------
增加 FIFO 清空操作,串口自测程序更加健壮
QSPI 线性模式例子只能运行一次,设置为 IO 模式可以反复运行
用 Vivado-HLS 实现低 latency 除法器
利用 DSP48E1 的 pattern detection 功能实现数据匹配
Xilinx Zynq-7000 如何保护客户的知识产权
学习 Zynq-7000 的入门书单
在 ZC702 上运行 Linux(1) - 运行 Pre-built images
在 ZC702 上运行 Linux(2) - 使用 git
在 ZC702 上运行 Linux(3) - 建立编译环境
在 ZC702 上运行 Linux(4) - 编译和使用 U-Boot & Linux
在 ZC702 上运行 Linux(5) - 创建 Root File System
在 ZC702 上运行 Linux(6) - 建立基于 tftp 和 nfs 的开发环境
500MHz 高性能数字信号处理设计
Xilinx Embedded & DSP
© Copyright 2011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. PCI, PCIe and PCI Express are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.
ISE 14.4 中,自带 ZYNQ UART 的测试程序。测试程序先将串口设置成自环模式,再在循
环总发送一个字节和接收一个字节。循环 32 次后,再比较发送的字符和接收字符是否一致。
如果一致,就表示 UART 测试成功,否则就报告失败。
如果 Zynq 不是刚刚复位启动,UART 的 FIFO 中可能已经有数据。这样的话,测试就会
失败。如果调试串口自测程序,在发送字符后,接收字符前,停止程序。然后再启动串口自
测程序,就会报告失败。
解决的办法是在测试前清空 FIFO。代码如下:
Status = XUartPs_CfgInitialize(&Uart_PS, Config, Config->BaseAddress);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Clear the FIFO.
*/
while ( (XUartPs_IsReceiveData(Uart_PS.Config.BaseAddress)) )
{
/*
* Receive the byte
*/
XUartPs_Recv(&Uart_PS, FirstString, 1);
}
/*
* Check hardware build.
*/
Status = XUartPs_SelfTest(&Uart_PS);
if (Status != XST_SUCCESS) }
其中 while 循环及其中的 XUartPs_Recv 是新增加的。
附件:
xuartps_polled_example.zip 4 KB
Xilinx 处理器 FAE:Hank Fu
Xilinx Embedded & DSP
© Copyright 2011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. PCI, PCIe and PCI Express are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.
QSPI 线性模式例子只能运行一次,设置为 IO 模式可以反复运行。
14.4 带有一个 QSPI 工作在线性模式的例子,xqspips_flash_lqspi_example.c。它先假设
QSPI 工作在 IO 模式,读取 QSPI 的 ID,再向 QSPI 写入数据,然后设置 QSPI 工作在线性模式,
读取数据,并和写入的数据做校验。第一次运行正常。
如果单板不下电,第二次运行时,QSPI 还工作在线性模式,读取 ID 的操作就不能完成,
一直在循环,测试就会失败。
为了让 QSPI 测试程序可以多次运行,最好在程序结束前,重新设置其工作模式。设置
工作模式的代码是:
XQspiPs_SetOptions(QspiInstancePtr, XQSPIPS_FORCE_SSELECT_OPTION |
XQSPIPS_MANUAL_START_OPTION |
XQSPIPS_HOLD_B_DRIVE_OPTION );
u32Option = XQspiPs_GetOptions( QspiInstancePtr );
xil_printf("QSPI option: 0x%x before exit.\n\r", u32Option );
ControlReg = XQspiPs_ReadReg(QspiInstancePtr->Config.BaseAddress,
XQSPIPS_CR_OFFSET);
LinearControlReg = XQspiPs_ReadReg(QspiInstancePtr->Config.BaseAddress,
XQSPIPS_LQSPI_CR_OFFSET);
xil_printf("ControlReg: 0x%08x, LinearControlReg: 0x%08x, .\r\n", ControlReg, LinearControlReg);
或者在进入测试时,检查 QSPI 的工作模式。如果没有工作在 IO 模式,则强制设置成 IO
模式。代码如下:
ControlReg = XQspiPs_ReadReg(QspiInstancePtr->Config.BaseAddress,
XQSPIPS_CR_OFFSET);
LinearControlReg = XQspiPs_ReadReg(QspiInstancePtr->Config.BaseAddress,
XQSPIPS_LQSPI_CR_OFFSET);
xil_printf("ControlReg: 0x%08x, LinearControlReg: 0x%08x, .\r\n", ControlReg, LinearControlReg);
if ((LinearControlReg & XQSPIPS_LQSPI_CR_LINEAR_MASK) != 0) {
xil_printf("QSPI works as linear mode before.\r\n");
LinearControlReg &= 0x7fffffff;
XQspiPs_WriteReg(QspiInstancePtr->Config.BaseAddress,
XQSPIPS_LQSPI_CR_OFFSET, LinearControlReg);}
Xilinx 处理器 FAE:Hank Fu
Xilinx Embedded & DSP
© Copyright 2011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. PCI, PCIe and PCI Express are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.
Vivado HLS 简介
Xilinx Vivado High-Level Synthesis (HLS) 工具将 C, C++,或者 SystemC 设计规范,算法转
成 Register Transfer Level (RTL)实现,可综合到 Xilinx FPGA。
将 DSP 算法快速转到 RTL FPGA 实现
将 C 至 RTL 时间缩短 4 倍
基于 C 语言的验证时间缩短 100 倍
RTL 仿真时间缩短 3 倍
创建一个 Vivado-HLS 工程
1. 打开 Vivado HLS GUI
双击桌面上 Vivado HLS GUI 图标, 或从 Start > All Programs > Vivado <version> > Vivado
HLS GUI
打开 GUI 之后,Vivado-HLS welcome 界面如下所示:
Xilinx DSP FAE:George Wang
Xilinx Embedded & DSP
© Copyright 2011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. PCI, PCIe and PCI Express are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.
2. 创建新工程
在 Welcome Page, 选择 Create New Project
Xilinx Embedded & DSP
© Copyright 2011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. PCI, PCIe and PCI Express are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.
3. 添加源文件
指定顶层需要综合的源文件名,并添加文件.
本除法器设计采用移位算法
#include "radix2div.h"
quotient_t radix2div (
dividend_t dividend, // (numerator)
divisor_t divisor, // (denominator)
remainder_t *remainder //
) {
#pragma AP latency max=3
#pragma AP pipeline
quotient_i_t quo, y; // <quo>+1 bits unsigned
subtract_t sub_out, rem_r; // <divisor>+1 bits signed
boolean_t last_bit, next_bit;
loop_cnt_t i;
///////////////////////////////////////////////
last_bit = 0;
rem_r = 0;
if (LOOP_MAX > 32)
Xilinx Embedded & DSP
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quo = 0ULL;
else
quo = 0;
//////////////////////////////////////////////////
div_booth_label0: for (i = 0; i < LOOP_MAX; i = i+1) {
// concurrent blocks
sub_out = rem_r - divisor;
y = dividend & 1 << (LOOP_MAX-i-2);
if ( y == 0 )
next_bit = 0;
else
next_bit = 1;
if (sub_out < 0) { // remainder - denominator is negative
quo = quo << 1;
if (i != LOOP_MAX-1) {
rem_r = rem_r << 1;
rem_r = rem_r | next_bit;
}
}
else { // remainder - denominator is positive
quo = quo << 1;
quo = quo | 1;
if (i != LOOP_MAX-1) {
rem_r = sub_out << 1;
rem_r = rem_r | next_bit;
}
else
rem_r = sub_out;
}
} // end for
*remainder = rem_r;
return quo;
}
Xilinx Embedded & DSP
© Copyright 2011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. PCI, PCIe and PCI Express are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.
4. 添加测试文件
添加测试文件.
#include <stdio.h>
#include <math.h>
#include "radix2div.h"
//////////////////////////////////////////////////////////////////////////////
quotient_t radix2div (
dividend_t dividend, // (numerator)
divisor_t divisor, // (denominator)
remainder_t *remainder //
);
//////////////////////////////////////////////////////////////////////////////
int test_divider (dividend_t dividend,
divisor_t divisor
)
{
quotient_t quotient;
remainder_t remainder;
quotient = radix2div(dividend,divisor,&remainder);
Xilinx Embedded & DSP
© Copyright 2011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. PCI, PCIe and PCI Express are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.
fprintf(stdout, ">>>>>>>>> dividend = %u, divisor = %u quotient = %u remainder = %u \n",
dividend, divisor, quotient, remainder);
fprintf(stdout, ">>>>>>>>>-------------------- \n");
if ((quotient == dividend/divisor) && (remainder == dividend-(divisor*quotient)) ) {
printf ("PASS \n");
}
else {
printf ("FAIL \n");
return 1;
}
}
//////////////////////////////////////////////////////////////////////////////
int main () {
int i, j;
dividend_t max_num;
max_num = 0;
j = LOOP_MAX-1;
for (i = 0; i < j; i = i+1) {
max_num = max_num + pow(2,i);
}
//////////////////////////////////////////////////////////////////////////////
test_divider (max_num,1);
test_divider (2,pow(2,9)-1);
test_divider (max_num,pow(2,9)-1);
test_divider (8,1);
test_divider (99,10);
//////////////////////////////////////////////////////////////////////////////
}
Xilinx Embedded & DSP
© Copyright 2011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. PCI, PCIe and PCI Express are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.
5. 创建 solution
创建 solution, 时钟约束, 并选器件.
打开包括工程信息 Vivado HLS GUI.
Xilinx Embedded & DSP
© Copyright 2011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. PCI, PCIe and PCI Express are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.
C Validation
在将 c/c++/system c 转换成 RTL 之前,必须先验证 C 设计,确保其功能是正确的点击
“Run C Simulation” 图标,
C Synthesis
现在可以对设计做 C 综合,生成 RTL 代码. 当综合完成,GUI 更新综合结果. 包括资源
使用,latency 等。
Xilinx Embedded & DSP
© Copyright 2011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. PCI, PCIe and PCI Express are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.
为了达到了预先要求为 3 个时钟周期, 将 latency 的 directive 设置为 3。
Xilinx Embedded & DSP
© Copyright 2011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. PCI, PCIe and PCI Express are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.
Explore 不同新的 Solution
project -> new solution。
在同一个工程里面,可以使用同一套源代码,进行不同 solutions 的尝试。
Xilinx Embedded & DSP
© Copyright 2011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. PCI, PCIe and PCI Express are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.
对于 DSP48E1 硬核的功能和结构,尤其是预加器、乘法器和累加器(ALU)的使用很多
人都比较清楚,但对于它的另一个强大的功能 pattern detection,很多人不是很了解,这里,
通过对一个具体的算法实现流程的描述,让大家熟悉这个功能。
算法需求如下:输入数据位宽为 16bits,从这个数据流中匹配 32’Hf6F62828,一旦匹配
成功,给出匹配指示信号。
对于此算法的 DSP48 应用如下:
1. 首先,由于算法主要是判断输入的数据是否等于 32 位常数 OxF6F62828, 然后给出判断
结果指示信号。考虑到资源最优化,如果并行同时处理 16 路数据,需要消耗 16 个 DSP48
slices,如果使用时分复用的方式,则每个 clock cycle 完成一个 case 数据的比较,输入数
据采用移位寄存器,每个时钟周期移动 1 位,构成一种 case 数据,送入 DSP48 slice 做
Pattern detector 比较,同时输出是否匹配的指示信号。16 个 clock cycle 完成 16 种 case
的比较操作。
2. DSP48E1 一次操作可以完成 48bits 数据的匹配运算,因此我们同时做 32bits 数据的
pattern detector 操作,输入两个 16bits 数据(32bits)后开始移位操作,构成 32 种 case
数据依次同常数 OxF6F62828 匹配,32 个 clock cycle 完成匹配检测。
3. DSP48E1 的 pattern detector 结构框图如下:
Figure 1: Pattern Detection logic
Xilinx DSP FAE:Harvest Guo
Xilinx Embedded & DSP
© Copyright 2011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. PCI, PCIe and PCI Express are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.
由于要匹配的 pattern 为常数,我们选择设置固定的 OxF6F62828 为图中的 PATTERN 值,
使用MASK设置屏蔽掉高16位的比较,MASK设置为 48’hFFFF00000000。输出 PATTERNDETECT
为高时,表示找到匹配的 pattern。
4. 上面 Figure1 中仅描述了 Pattern 的逻辑电路,DSP48E1 的完整结构如下图 2 所示:
Pattern Detection 的功能在 ALU 之后,所以,要将输入数据送入 ALU 后才能进行匹配操
作。将 32bits 数据从 C 端口输入,高位扩展到 48 位(C 要求 48bits), ALU 设置为 C+0 的加
法功能,即将 C 的结果输出做比较。
为保证时序要求,打开 C 寄存器和 PatternDetect 寄存器,整个匹配链路的 latency 为 2,
这样经过 32 个 clock cycle,所有 32 个 case 的匹配结果依次由 PatternDetect 输出为高可以确
定是哪个 case 匹配。
5. 算法总结:
1) 32bits 移位数据从 C 端口输入到 ALU 单元,DSP48E1 的 OPmode 设置为 C+0 功能。
2) 在 DSP48E1 的属性中配置 C 打开 1 级寄存器,PatternDetect 寄存器打开,整个计
算通路 2 个 clock cycle 延迟。
3) 在 DSP48E1 的属性配置中设置 Pattern 值为固定值 0xF6F62828,并配置 Pattern 选
择为固定寄存器值输入,设置MASK的值屏蔽高有效比特,低 32bits用于匹配运算。
4) PatternDetect 输出值为高时,对应的 case 即为找到的匹配数据。
Xilinx Embedded & DSP
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摘要:
本文描述了 Xilinx Zynq-7000 如何通过芯片内嵌的 AES-256 解密引擎和 HMAC
(Keyed-hashed message authentication code)认证引擎来保护客户的知识产权,防止拷贝、抄
板等损害客户知识产权事件的发生。
基本原理:
Xilinx Zynq-7000 内含 AES-256 解密引擎和 HMAC 认证引擎,并支持 Secure Boot 启动方
式,用于保护客户的设计(包括软件的二进制可执行代码,数据以及 FPGA 的 bitstream 编程
文件)不被窃取和使用。
客户在完成设计后,可以使用 Xilinx ISE 软件为设计添加用于认证的 256-bit 的校验码,
然后再用 256-bit 密钥 AES 算法进行加密。
256-bit AES 密钥由客户生成,保存在 FPGA 内部,不能被外部读取。
启动时,Zynq-7000 首先执行芯片内部 ROM 中的代码。BOOTROM 代码首先通过 AES-256
解密引擎对对被保护的设计进行解密,然后通过 HMAC 引擎认证完整性,只有通过认证的
设计才能被加载并执行。
对于试图通过“抄板”窃取知识产权的行为,因为缺少和 FLASH 内容相对应的 AES 密
钥,FLASH 中内容将不会被加载并执行。256-bit AES 密钥对应的组合达到 1.15×1077 种,可
以充分保证客户知识产权的安全。
Xilinx Zynq-7000 内含的硬件安全引擎的特点:
1. HMAC 硬件认证引擎
在内层保护客户设计不被非法篡改,保证客户设计的完整性。
使用美国国家标准技术研究所的 SHA256 FIPS PUB-182-2 算法和 HMAC FIPS PUB-198 算
法,这些算法由美国国家标准技术研究所(National Institute of Standards and Technology, NIST)
提供
Xilinx 处理器 FAE:Haoliang Qin
Xilinx Embedded & DSP
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http://csrc.nist.gov/publications/fips/fips180-2/fips180-2withchangenotice.pdf
http://csrc.nist.gov/publications/fips/fips198-1/FIPS-198-1_final.pdf
HMAC 签名保存在 Boot Image 中。
2. AES-256 硬件解密引擎
在外层保护客户设计不被反向工程,不被分析破解,不被拷贝。
密钥保存在片上的 eFuse 或者 BBRAM(battery-backed RAM),不能被 JTAG 或者 FPGA 逻
辑读取。eFuse 仅支持一次可编程,掉电内容不丢失。BBRAM 可支持反复编程,但是掉电内
容丢失,因此需要外接电池。
AES 算法是美国国家标准技术研究所(National Institute of Standards and Technology, NIST)
和美国商务部的正式标准( http://csrc.nist.gov/publications/fips/fips197/fips-197.pdf )。Xilinx
支持最高安全等级的 256-bit 密钥加解密方式。
通过 Xilinx ISE 保护客户设计
Xilinx SDK 用于生成 Boot Image 的工具支持 SHA-256 算法校验码生成和 AES-256 算法加
密:
1. 启动 Xilinx SDK
2. 点击 Xilinx Tools->Create Boot Image,SDK 弹出如下窗口
Xilinx Embedded & DSP
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3. 在 Tab Basic 里面配置好输入的文件位置和生成的 image 的位置后,在 Tab Advanced 里面
可以配置是否加密、密钥的存放位置以及密钥等内容:
在生成的 Boot Image 里面,偏移量 0x28 位置的内容决定了 Boot Image 是否加密:
Boot Image Header 0x028 位置的内容 描述
0xA5C3C5A3 密钥保存在 eFuse 中
0x3A5C3C5A 密钥保存在 BBRAM 中
其他值 Boot Image 未加密
Boot Image 的文件头和分区头不参与加密,被加密的只有各个分区的数据。Boot Image
的格式如下图所示:
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注意:如果选择加密 Boot Image,将对所有分区(Partition)的数据进行加密。
Zynq-7000 的启动过程
Zynq-7000 上电后首先执行芯片内部 BootRom 中的代码。BootRom 中的代码由 Xilinx 开
发并保证安全;代码保存在只读存储器中,用户无法修改。
BootRom 支持三种启动模式:
Secure, encrypted image, master mode
Non-secure master mode
Non-secure slave mode via JTAG
BootRom 通过 Boot Image 文件头 0x28 位置的内容判断 Boot Image 是否加密,代码执行
流程如下:
Xilinx Embedded & DSP
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注意:在 Secure Boot Mode 下,Boot Rom 不会使能 JTAG 接口,这时无法通过 JTAG 读取 Zynq-7000 内部的
信息,无论是软件二进制可执行代码,AES 密钥,还是 FPGA 的配置信息。
Boot Image 只有在认证了 FSBL(First Stage Boot Loader)的完整性后,才会认为它是安
全的,并将控制权移交给 FSBL 代码。 FSBL 需要加载的 Second Stage Boot Loader, 操作系统
和应用可以是明文的,也可以是加密的。 一般不建议客户使用明文的 PS (Processing System)
Image。如果必须要这样做,需要充分考虑系统级别的安全性。如果这些内容是加密的,系
统不允许切换 AES 密钥。
Secure Boot Mode 仅限于 NOR, NAND, SDIO, 和 Quad-SPI flash,不支持 JTAG 或任何其他
对外接口。
密钥的管理
256-bit AES 密钥可以由用户指定,用 Xilinx BitGen 工具生成加密的 bitstream,也可以由
工具生成随机密钥。
AES 密钥由 Xilinx iMPACT 软件通过 JTAG 写入 Zynq-7000 芯片中。
写入 AES 密钥时,所有 FPGA 中的存储器(密钥存储器和配置存储器)都会被清空。密
钥写入后,没有任何办法可以重新读出写入的密钥,也不可能在不清空全部存储器的情况下
改写密钥。
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当采用BBRAM保存密钥时,需要在VCCBATT上外接电池,确保系统掉电的情况下BBRAM
中的内容不会丢失。系统正常工作时,由 VCCAUX 对 BBRAM 供电,而不会使用 VCCBATT 上
的电池供电。当系统掉电时,VCCBATT 需要的电流很小(nA 级别),一块手表纽扣电池可以
使用很长时间。
其他 Zynq-7000 的安全要点
除了上面的内容,Xilinx 还充分考虑了其他各种复杂情况下的如何保证用户知识产权的
安全。
BootROM 检测到 Boot Image 未加密后,进入非安全状态。AES 解密引擎和 HMAC 认证
引擎被关闭,只有上电复位才能使能它们。没有任何机制可以从非安全状态转换到安全状态
(除了上电复位)。如果在加载未加密数据后试图加载加密数据,将导致系统锁定,只有重
新上电后才能复位。
当 PS 或者 PL 检测到以下非法状态时,将清空 OCM,系统缓存,复位 PL,然后 PS 进入
锁定状态。只有重新上电复位才能清楚系统锁定状态:
Non-secure boot and eFuse secure boot set
PS DAP enabled and JTAG chain disable eFuse set
SEU error tracking has been enabled in the PS and the PL reports an SEU error
A discrepancy in the redundant AES enable logic
Software sets the FORCE_RST bit of the Device Configuration Control register
Xilinx Zynq-7000 BootRom 支持 fall-back 功能:在当前的 Boot Image 不可用的情况下,会
搜索并运行 golden image。在这种情况下,系统要求 golden image 的加密状态和 FSBL 的加密
状态是一致的,即:如果 FSBL 是加密的,golden image 必须也是加密的;如果 FSBL 未加密,
golden image 必须也是不加密的。
在 secure boot 模式下,PS DAP 和 PL TAP 控制器被关闭,这样排除了通过 JTAG 访问芯
片内部的可能。
PS 的 DAP 控制器可以通过 eFuse 的 JTAG CHAIN DISABLE 永久关闭。在生成 PL bitstream
时,可以配置 DISABLE_JTAG 选项(see UG628, Command Line Tools User Guide for more
information),禁止通过 JTAG 访问 PL。
小结
通过以上的分析,我们可以看到 Xilinx Zynq-7000 提供了充分的安全措施,来保证客户
的知识产权和设计的安全性,是客户设计的重要选择。
参考文献:
UG585, Zynq-7000 EPP Technical Reference Manual
UG470, 7 Series FPGAs Configuration User Guide
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根据选用的芯片型号和应用领域的不同,读者可以适当裁减。
Entrance Readings:
1. Zynq-7000 User Guides
Zynq-7000 All Programmable SoC: Concepts, Tools, and Techniques
http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_4/ug873-zynq-ctt.pdf
Zynq-7000 All Programmable SoC Technical Reference Manual
http://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf
2. Xilinx Zynq-7000 SoC ZC702 Evaluation Kit (as long as developer use this board)
Zynq-7000 All Programmable SoC: ZC702 Evaluation Kit and Video and Imaging Kit Getting
Started Guide (ISE Design Suite 14.4)
http://www.xilinx.com/support/documentation/boards_and_kits/zynq-7000/zc702_gsg/v3_0/U
G926_Z7_ZC702_...
Zynq-7000 All Programmable SoC ZC702 Base Targeted Reference Design User Guide (ISE Design
Suite 14.4)
http://www.xilinx.com/support/documentation/boards_and_kits/zynq-7000/zc702_ug/v3_0/ug9
25-zynq-zc702...
3. Xilinx Zynq-7000 SoC ZC706 Evaluation Kit (as long as developer use this board)
Zynq-7000 All Programmable SoC ZC706 Evaluation Kit Getting Started Guide (ISE Design Suite
14.4)
http://www.xilinx.com/support/documentation/boards_and_kits/zynq-7000/zc706_gsg/v2_0/ug
961-zc706-eva...
ZC706 PCIe Targeted Reference Design (ISE Design Suite 14.4)
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http://www.xilinx.com/support/documentation/boards_and_kits/zynq-7000/zc706_ug/v2_0/ug9
63-zc706-pcie...
4. How to run Linux on Zynq-7000 Evaluation Kits
http://wiki.xilinx.com/zynq-linux
Extended Readings:
1. Zynq Video Tutorials
http://www.origin.xilinx.com/training/zynq/index.htm
2. Zynq-7000 User Guides
Zynq-7000 All Programmable SoC Software Developers Guide
http://www.xilinx.com/support/documentation/user_guides/ug821-zynq-7000-swdev.pdf
3. Xilinx Zynq-7000 SoC ZC702 Evaluation Kit (as long as developer use this board)
ZC702 Evaluation Board for the Zynq-7000 XC7Z020 All Programmable SoC User Guide
http://www.xilinx.com/support/documentation/boards_and_kits/ug850-zc702-eval-bd.pdf
Documents portal
http://www.xilinx.com/support/documentation/zc702_14-4.htm
4. Xilinx Zynq-7000 SoC ZC706 Evaluation Kit (as long as developer use this board)
ZC706 Evaluation Board for the Zynq-7000 XC7Z045 All Programmable SoC User Guide
http://www.xilinx.com/support/documentation/boards_and_kits/ug954-zc706-eval-board-xc7z0
45-ap-soc.pd...
Documents portal
http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm
5. Zynq-7000 Data Sheets
Zynq-7000 All Programmable SoC (XC7Z010 and XC7Z020) Data Sheet: DC and AC Switching
Characteristics
http://www.xilinx.com/support/documentation/data_sheets/ds187-XC7Z010-XC7Z020-Data-She
et.pdf
Zynq-7000 All Programmable SoC (XC7Z030 and XC7Z045) Data Sheet: DC and AC Switching
Characteristics
http://www.xilinx.com/support/documentation/data_sheets/ds191-XC7Z030-XC7Z045-data-shee
t.pdf
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6. Application Notes (not listed by priority)
XAPP745 - Processor Control of Vivado HLS Designs
http://www.xilinx.com/support/documentation/application_notes/xapp745-processor-control-vh
ls.pdf
XAPP890 - Zynq All Programmable SoC Sobel Filter Implementation Using the Vivado HLS Tool
http://www.xilinx.com/support/documentation/application_notes/xapp890-zynq-sobel-vivado-hl
s.pdf
XAPP792 - Designing High-Performance Video Systems with the Zynq-7000 All Programmable SoC
http://www.xilinx.com/support/documentation/application_notes/xapp792-high-performance-vi
deo-zynq.pd...
XAPP744 - Hardware In The Loop (HIL) Simulation for the Zynq-7000 All Programmable SoC
http://www.xilinx.com/support/documentation/application_notes/xapp744-HIL-Zynq-7000.pdf
XAPP794 - 1080p60 Camera Image Processing Reference Design
http://www.xilinx.com/support/documentation/application_notes/xapp794-1080p60-camera.pd
f
XAPP1078 - Simple AMP Running Linux and Bare-Metal System on Both Zynq SoC Processors
http://www.xilinx.com/support/documentation/application_notes/xapp1078-amp-linux-bare-me
tal.pdf
XAPP1159 - Partial Reconfiguration of a Hardware Accelerator on Zynq-7000 All Programmable
SoC Devices
http://www.xilinx.com/support/documentation/application_notes/xapp1159-partial-reconfig-hw
-accelerat...
XAPP897 - Designing Video Streaming Systems Using Zynq-7000 AP SoC with FreeRTOS
http://www.xilinx.com/support/documentation/application_notes/xapp897-video-streaming-syst
em-freerto...
7. ARM Documents about how to use Cortex-A9 Processor
Cortex-A Series Programmer’s Guide
https://silver.arm.com/download/download.tm?pv=1296010
Cortex™-A9 Technical Reference Manual
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0388i/DDI0388I_cortex_a9_r4p1_trm.pdf
Cortex™-A9 MPCore® Technical Cortex™-A9 MPCore® Technical Reference Manual
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0407i/DDI0407I_cortex_a9_mpcore_r4p1
_trm.pdf
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Cortex™-A9 NEON™ Media Processing Engine Technical Reference Manual
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0409i/DDI0409I_cortex_a9_neon_mpe_r
4p1_trm.pdf
Cortex™-A9 Floating-Point Unit Technical Reference Manual
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0408i/DDI0408I_cortex_a9_fpu_r4p1_tr
m.pdf
ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition
https://silver.arm.com/download/download.tm?pv=1299246
<END>
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Xilinx 针对 ZC702 提供了 Linux Porting。
参考文档在 http://wiki.xilinx.com/
源码在 http://git.xilinx.com/
拿到板子的第一步当然是先跑一下 Pre-built images 看看,一者可以验证板子好坏,再
者可以看看 Linux 已经完成了那些功能,做到了哪一步。毕竟,站在巨人的肩膀上才能看的
更高,走的更远。
最新的 Pre-built images 在 http://wiki.xilinx.com/zynq-release-14-3
拷贝以下文件到 SD 卡上,SW16 配置成 00110,就可以在 ZC702 上启动 Linux 了。
BOOT.BIN
devicetree.dtb
uImage
uramdisk.image.gz
串口上的输出如下:
U-Boot 2012.04.01-00304-g7639205 (Oct 23 2012 - 08:29:31)
DRAM: 1 GiB
WARNING: Caches not enabled
MMC: SDHCI: 0
Using default environment
In: serial
Out: serial
Err: serial
Net: zynq_gem
Hit any key to stop autoboot: 0
Copying Linux from SD to RAM...
Device: SDHCI
Manufacturer ID: 3
OEM: 5344
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Name: SU08G
Tran Speed: 25000000
Rd Block Len: 512
SD version 2.0
High Capacity: Yes
Capacity: 7.4 GiB
Bus Width: 4-bit
reading uImage
2725416 bytes read
reading devicetree.dtb
4366 bytes read
reading uramdisk.image.gz
5252253 bytes read
## Booting kernel from Legacy Image at 03000000 ...
Image Name: Linux-3.5.0-14.3-build2
Created: 2012-10-23 18:12:23 UTC
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 2725352 Bytes = 2.6 MiB
Load Address: 00008000
Entry Point: 00008000
Verifying Checksum ... OK
## Loading init Ramdisk from Legacy Image at 02000000 ...
Image Name:
Created: 2012-10-03 21:10:37 UTC
Image Type: ARM Linux RAMDisk Image (gzip compressed)
Data Size: 5252189 Bytes = 5 MiB
Load Address: 00800000
Entry Point: 00800000
Verifying Checksum ... OK
## Flattened Device Tree blob at 02a00000
Booting using the fdt blob at 0x02a00000
Loading Kernel Image ... OK
OK
Loading Ramdisk to 1fafd000, end 1ffff45d ... OK
Loading Device Tree to 1faf8000, end 1fafc10d ... OK
Starting kernel ...
Uncompressing Linux... done, booting the kernel.
Booting Linux on physical CPU 0
Linux version 3.5.0-14.3-build2 (linnj@xsjpsgv107) (gcc version 4.6.1 (Sourcery CodeBench Lite
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2011.09-50) ) #1 SMP PREEMPT Tue Oct 23 11:12:17 PDT 2012
CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=18c5387d
CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
Machine: Xilinx Zynq Platform, model: Xilinx Zynq ZC702
bootconsole [earlycon0] enabled
cma: CMA: reserved 16 MiB at 2e800000
Memory policy: ECC disabled, Data cache writealloc
PERCPU: Embedded 7 pages/cpu @c0e2a000 s6784 r8192 d13696 u32768
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 259840
Kernel command line: console=ttyPS0,115200 root=/dev/ram rw
ip=192.168.1.10:::255.255.255.0:ZC702:eth0 earlyprintk
PID hash table entries: 4096 (order: 2, 16384 bytes)
Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
Memory: 1024MB = 1024MB total
Memory: 1011624k/1011624k available, 36952k reserved, 270336K highmem
Virtual kernel memory layout:
vector : 0xffff0000 - 0xffff1000 ( 4 kB)
fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)
vmalloc : 0xf0000000 - 0xff000000 ( 240 MB)
lowmem : 0xc0000000 - 0xef800000 ( 760 MB)
pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB)
modules : 0xbf000000 - 0xbfe00000 ( 14 MB)
.text : 0xc0008000 - 0xc048e060 (4633 kB)
.init : 0xc048f000 - 0xc04b4a80 ( 151 kB)
.data : 0xc04b6000 - 0xc04f3c20 ( 248 kB)
.bss : 0xc04f3c44 - 0xc051f104 ( 174 kB)
Preemptible hierarchical RCU implementation.
Dump stacks of tasks blocking RCU-preempt GP.
NR_IRQS:128
Zynq clock init
xlnx,ps7-ttc-1.00.a #0 at 0xf0000000, irq=43
sched_clock: 32 bits at 100 Hz, resolution 10000000ns, wraps every 4294967286ms
Console: colour dummy device 80x30
Calibrating delay loop... 1332.01 BogoMIPS (lpj=6660096)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 512
CPU: Testing write buffer coherency: ok
CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
hw perfevents: enabled with ARMv7 Cortex-A9 PMU driver, 7 counters available
Setting up static identity map for 0x351160 - 0x351194
L310 cache controller enabled
l2x0: 8 ways, CACHE_ID 0x410000c8, AUX_CTRL 0x72360000, Cache size: 524288 B
Map SLCR registers
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CPU1: Booted secondary processor
CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
Brought up 2 CPUs
SMP: Total of 2 processors activated (2664.03 BogoMIPS).
devtmpfs: initialized
NET: Registered protocol family 16
DMA: preallocated 256 KiB pool for atomic coherent allocations
xgpiops e000a000.gpio: gpio at 0xe000a000 mapped to 0xf0008000
registering platform device 'pl330' id 0
registering platform device 'arm-pmu' id 0
registering platform device 'zynq-dvfs' id 0
hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.
hw-breakpoint: maximum watchpoint size is 4 bytes.
MIO pin 47 not assigned(00001220)
xslcr xslcr.0: at 0xF8000000 mapped to 0xF8000000
bio: create slab <bio-0> at 0
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
Linux video capture interface: v2.00
Switching to clocksource xttcpss_timer1
NET: Registered protocol family 2
IP route cache hash table entries: 32768 (order: 5, 131072 bytes)
TCP established hash table entries: 131072 (order: 8, 1048576 bytes)
TCP bind hash table entries: 65536 (order: 7, 786432 bytes)
TCP: Hash tables configured (established 131072 bind 65536)
TCP: reno registered
UDP hash table entries: 512 (order: 2, 16384 bytes)
UDP-Lite hash table entries: 512 (order: 2, 16384 bytes)
NET: Registered protocol family 1
RPC: Registered named UNIX socket transport module.
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
Trying to unpack rootfs image as initramfs...
rootfs image is not initramfs (no cpio magic); looks like an initrd
Freeing initrd memory: 5128K
xscugtimer xscugtimer.0: ioremap fe00c200 to f000a200 with size 400
pl330 dev 0 probe success
highmem bounce pool size: 64 pages
jffs2: version 2.2. (NAND) (SUMMARY) © 2001-2006 Red Hat, Inc.
msgmni has been set to 1489
io scheduler noop registered
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io scheduler deadline registered
io scheduler cfq registered (default)
e00console [ttyPS0] enabled, bootconsole disabled
console [ttyPS0] enabled, bootconsole disabled
xdevcfg f8007000.devcfg: ioremap f8007000 to f005e000 with size 100
brd: module loaded
loop: module loaded
xqspips e000d000.spi: master is unqueued, this is deprecated
m25p80 spi1.0: n25q128 (16384 Kbytes)
7 ofpart partitions found on MTD device spi1.0
Creating 7 MTD partitions on "spi1.0":
0x000000000000-0x000000080000 : "qspi-fsbl"
0x000000080000-0x000000100000 : "qspi-u-boot"
0x000000100000-0x000000600000 : "qspi-linux"
0x000000600000-0x000000620000 : "qspi-device-tree"
0x000000620000-0x000000700000 : "qspi-user"
0x000000700000-0x000000800000 : "qspi-scratch"
0x000000800000-0x000001000000 : "qspi-rootfs"
xqspips e000d000.spi: at 0xE000D000 mapped to 0xF0060000, irq=51
GEM: BASEADDRESS hw: e000b000 virt: f0062000
XEMACPS mii bus: probed
eth0, pdev->id -1, baseaddr 0xe000b000, irq 54
ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
xusbps-ehci xusbps-ehci.0: Xilinx PS USB EHCI Host Controller
xusbps-ehci xusbps-ehci.0: new USB bus registered, assigned bus number 1
xusbps-ehci xusbps-ehci.0: irq 53, io mem 0x00000000
xusbps-ehci xusbps-ehci.0: USB 2.0 started, EHCI 1.00
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 1 port detected
Initializing USB Mass Storage driver...
usbcore: registered new interface driver usb-storage
USB Mass Storage support registered.
Xilinx PS USB Device Controller driver (Apr 01, 2011)
mousedev: PS/2 mouse device common for all mice
i2c /dev entries driver
xi2cps e0004000.i2c: 100 kHz mmio e0004000 irq 57
si570 1-005d: registered si570 with default frequency 156250000 Hz
si570 1-005d: set initial output frequency 148500000 Hz
i2c i2c-0: Added multiplexed i2c bus 1
i2c i2c-0: Added multiplexed i2c bus 2
at24 3-0054: 1024 byte 24c08 EEPROM, writable, 1 bytes/write
i2c i2c-0: Added multiplexed i2c bus 3
i2c i2c-0: Added multiplexed i2c bus 4
rtc-pcf8563 5-0051: chip found, driver version 0.4.3
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rtc-pcf8563 5-0051: low voltage detected, date/time is not reliable.
rtc-pcf8563 5-0051: rtc core: registered rtc-pcf8563 as rtc0
i2c i2c-0: Added multiplexed i2c bus 5
i2c i2c-0: Added multiplexed i2c bus 6
i2c i2c-0: Added multiplexed i2c bus 7
i2c i2c-0: Added multiplexed i2c bus 8
pca954x 0-0074: registered 8 multiplexed busses for I2C switch pca9548
gspca_main: v2.14.0 registered
usbcore: registered new interface driver uvcvideo
USB Video Class driver (1.1.1)
mpcore_wdt: MPcore Watchdog Timer: 0.1. mpcore_noboot=0 mpcore_margin=60 sec (nowayout= 0)
xwdtps f8005000.swdt: Xilinx Watchdog Timer at 0xf0068000 with timeout 10s
sdhci: Secure Digital Host Controller Interface driver
sdhci: Copyright(c) Pierre Ossman
sdhci-pltfm: SDHCI platform and OF driver helper
mmc0: Invalid maximum block size, assuming 512 bytes
mmc0: SDHCI controller on e0100000.sdhci [e0100000.sdhci] using ADMA
usbcore: registered new interface driver usbhid
usbhid: USB HID core driver
TCP: cubic registered
NET: Registered protocol family 17
VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
Registering SWP/SWPB emulation handler
rtc-pcf8563 5-0051: low voltage detected, date/time is not reliable.
rtc-pcf8563 5-0051: setting system clock to 2013-07-02 06:48:15 UTC (1372747695)
GEM: lp->tx_bd ee842000 lp->tx_bd_dma 2e842000 lp->tx_skb ee0f5780
GEM: lp->rx_bd ee841000 lp->rx_bd_dma 2e841000 lp->rx_skb ee0f5680
GEM: MAC 0x00350a00, 0x00002201, 00:0a:35:00:01:22
mmc0: new high speed SDHC card at address e624
mmcblk0: mmc0:e624 SU08G 7.40 GiB
mmcblk0: p1 p2
usb 1-1: new full-speed USB device number 2 using xusbps-ehci
hub 1-1:1.0: USB hub found
hub 1-1:1.0: 4 ports detected
usb 1-1.3: new low-speed USB device number 3 using xusbps-ehci
input: PIXART USB OPTICAL MOUSE as
/devices/amba.0/e0002000.usb/xusbps-ehci.0/usb1/1-1/1-1.3/1-1.3:1.0/input/input0
hid-generic 0003:093A:2510.0001: input: USB HID v1.11 Mouse [PIXART USB OPTICAL MOUSE] on
usb-xusbps-ehci.0-1.3/input0
GEM: phydev ee386400, phydev->phy_id 0x1410e40, phydev->addr 0x7
eth0, phy_addr 0x7, phy_id 0x01410e40
eth0, attach [Marvell 88E1116R] phy driver
IP-Config: Complete:
device=eth0, addr=192.168.1.10, mask=255.255.255.0, gw=255.255.255.255
Xilinx Embedded & DSP
© Copyright 2011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. PCI, PCIe and PCI Express are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.
host=ZC702, domain=, nis-domain=(none)
bootserver=255.255.255.255, rootserver=255.255.255.255, rootpath=
RAMDISK: gzip image found at block 0
VFS: Mounted root (ext2 filesystem) on device 1:0.
devtmpfs: mounted
Freeing init memory: 148K
Starting rcS...
++ Mounting filesystem
++ Setting up mdev
++ Starting telnet daemon
++ Starting http daemon
++ Starting ftp daemon
++ Starting ssh daemon
rcS Complete
zynq>
zynq> df -h
Filesystem Size Used Available Use% Mounted on
none 504.5M 0 504.5M 0% /tmp
/dev/mmcblk0p1 1.8G 7.9M 1.8G 0% /mnt
zynq>
可以看出:
U-Boot 是基于 2012.04.01 的
Linux kernel 版本是 3.5.0
GCC tool chain 版本是 4.6.1
对 Cortex-A9,1 BogoMIPS=1 CPU MHz。双核 2664.03 BogoMIPS 印证了 CPU 的主频是
667MHz。
ZC702 IP 地址配置成了 static: 192.168.1.10
把 ZC702, laptop, 和公司的 Ethernet cable 接到一个 LanSwitch 上,给 VMPlayer 下的
Ubuntu 配置了 static IP: 192.168.1.20,laptop 可以正常上网。ZC702 和 Ubuntu 之间可以 ping
通,延迟大约在 0.5-1.2ms 范围内。以后跑 TFTP 和 NFS 就方便多了。网口线序自适应就是方
便啊。
一些需要注意的点:
1. 现在用 bootm 命令启动 Linux,以前是用 go 命令。
2. ramdisk 的名字改成了 uramdisk.image.gz (带 U-Boot header),以前是 ramdisk8M.image.gz
3. Linux kernel 缺省情况下(配置文件用的是 xilinx_zynq_defconfig) 不再把 device tree 硬编
码在 16 MB,而是在 bootm 命令参数里面指定。目前 kernel 还可以把 device tree 硬编
码在固定地址 (16MB),但是未来有可能会移除这个特性。
Xilinx Embedded & DSP
© Copyright 2011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. PCI, PCIe and PCI Express are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.
已知的问题:
根据 wiki 上的说明,ZC706 用是 dual QSPI,而 Linux 没有配置 quad enable bit。解决办
法是在 U-BOOT 阶段,用命令"sf probe"修正这个问题。
U-BOOT 的配置:
zynq-uboot> pri
baudrate=115200
bootcmd=run modeboot
bootdelay=3
devicetree_image=devicetree.dtb
ethact=zynq_gem
ethaddr=00:0a:35:00:01:22
fdt_high=0x20000000
initrd_high=0x20000000
ipaddr=10.10.70.102
jtagboot=echo TFTPing Linux to RAM...;tftp 0x3000000 ${kernel_image};tftp 0x2A00000
${devicetree_image};tftp 0x2000000 ${ramdisk_image};bootm 0x3000000 0x2000000 0x2A00000
kernel_image=uImage
kernel_size=0x140000
modeboot=run sdboot
nand_kernel_size=0x400000
nand_ramdisk_size=0x400000
nandboot=echo Copying Linux from NAND flash to RAM...;nand read 0x3000000 0x200000
${nand_kernel_size};nand read 0x2A00000 0x700000 0x20000;echo Copying ramdisk...;nand read
0x2000000 0x900000 ${nand_ramdisk_size};bootm 0x3000000 0x2000000 0x2A00000
norboot=echo Copying Linux from NOR flash to RAM...;cp 0xE2100000 0x3000000 ${kernel_size};cp
0xE2600000 0x2A00000 0x20000;echo Copying ramdisk...;cp 0xE3000000 0x2000000
${ramdisk_size};bootm 0x3000000 0x2000000 0x2A00000
qspiboot=echo Copying Linux from QSPI flash to RAM...;cp 0xFC100000 0x3000000 ${kernel_size};cp
0xFC600000 0x2A00000 0x20000;echo Copying ramdisk...;cp 0xFC800000 0x2000000
${ramdisk_size};bootm 0x3000000 0x2000000 0x2A00000
ramdisk_image=uramdisk.image.gz
ramdisk_size=0x200000
sdboot=echo Copying Linux from SD to RAM...;mmcinfo;fatload mmc 0 0x3000000
${kernel_image};fatload mmc 0 0x2A00000 ${devicetree_image};fatload mmc 0 0x2000000
${ramdisk_image};bootm 0x3000000 0x2000000 0x2A00000
serverip=10.10.70.101
stderr=serial
stdin=serial
stdout=serial
Environment size: 1551/65532 bytes
zynq-uboot>
Xilinx Embedded & DSP
© Copyright 2011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. PCI, PCIe and PCI Express are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.
Git 是一个比较流行的版本管理工具。Xilinx 的 Linux 代码就是用 git 维护的。链接
http://wiki.xilinx.com/using-git 上有一个简单的说明,在此稍作整理,添加了一些使用心得。
关于 git 的详细说明在 http://git-scm.com
用 git 下载源码库:
git clone git://git.xilinx.com/<project name>
Zynq Linux 用到的分支:
u-boot-xarm.git
linux-xlnx.git
缺省情况下,git 下载的是 master 主分支。如果要用到特定的标签,需要命令:
bash> git checkout –b <my_change>
可以用以下命令看本地和远端的分支情况:
bash> git branch -l
bash> git branch -r
用 git 上传:
1. Git 不喜欢匿名上传,所以要求上传者提供姓名和 email。可以用以下命令在<HOME>目录
下创建文件.gitconfig 保存这些信息:
bash> git config --global user.email johndoe@example.com
bash> git config --global user.name 'John Doe'
Xilinx 处理器 FAE:Haoliang Qin
Xilinx Embedded & DSP
© Copyright 2011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. PCI, PCIe and PCI Express are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.
2. 如果需要 git 维护版本,需要把文件纳入 git 的管理之下。下面的命令可以把当前目录下的
所有文件生成 git 快照,当然也可以添加特定路径下的特定文件:
bash> git add .
3. 以下命令可以看下次 commit 的内容
bash> git status
4. 上传本地的修改:
bash> git commit
5. 查看以前的 commit 记录
bash> git log
6. 为每次 commit 产生 patch
git format-patch -1
参数指明要为几个 commit 产生 patch
Xilinx Embedded & DSP
© Copyright 2011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. PCI, PCIe and PCI Express are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.
Ubuntu 首次运行
在 VMWare Player 5.0.0 build-812388 上装了一个 Ubuntu 10.10,用来做 Embedded Linux
交叉编译的环境。
Ubuntu 下的 Proxy 配置:
由于公司的外网出口统一经过 proxy,需要在 Ubuntu 做些配置才能访问外网。
在 Firefox 里面,点击 Edit->Preferences->Advanced->Network->Settings,在出现的窗口里
选择 Use system proxy settings。
在 System->Preference->Network Proxy 里面设置好 proxy 参数。注意配置完成后会提示
是否应用到整个系统,选择“是”。
刚安装后的系统还比较干净,要先安装 git 准备下载各种源码,但是出错了。
~$ sudo apt-get install git
Reading package lists... Done
Building dependency tree
Reading state information... Done
E: Unable to locate package git
原来忘记 update 了
~$ sudo apt-get update
说明:apt-get update - 在你更改了/etc/apt/sources.list 或 /etc/apt/preferences 后,需
要运行这个命令以令改动生效。同时也要定期运行该命令,以确保你的源列表是最新的。简
单的说,就是刷新软件列表,源服务器里的软件更新后,通过刷新可以获得最新的软件列表
信息;说白了就是刷新一下看看源里有没有新的软件或者软件的新版本。
http://wiki.ubuntu.org.cn/UbuntuHelp:AptGetHowto/zh
安装版本管理软件 git
~$ sudo apt-get install git
Xilinx 处理器 FAE:Haoliang Qin
Xilinx Embedded & DSP
© Copyright 2011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. PCI, PCIe and PCI Express are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.
安装并配置 TFTP Server
1. 安装 tftpd 相关软件包
$ sudo apt-get install xinetd tftpd tftp
2. 创建文件/etc/xinetd.d/tftp 并且按如下所示配置
service tftp
{
protocol = udp
port = 69
socket_type = dgram
wait = yes
user = nobody
server = /usr/sbin/in.tftpd
server_args = /tftpboot
disable = no
}
3. 在系统根目录下创建 tftproot 目录,并修改权限。为了方便起见,创建的是指向 uImage
所在目录的符号链接:
$ sudo ln -s /home/wave/xilinx/linux-xlnx/arch/arm/boot /tftpboot
$ sudo chmod -R 777 /tftpboot
4. 启动 tftp 服务
$ sudo /etc/init.d/xinetd stop
$ sudo /etc/init.d/xinetd start
5. 测试:传输一个文件
$ tftp localhost
tftp> get uImage
Received 2742981 bytes in 0.2 seconds
tftp> quit
$ ls -l
-rw-r--r-- 1 wave wave 2725432 2012-11-23 15:42 uImage
安装并配置 NFS Server
嵌入式 linux 的调试,一般需要 nfs 文件系统的支持,首先需要配置 host 的 nfs server
设置:
1. 安装
sudo apt-get install nfs-kernel-server
2. 指定共享文件夹,为了方便,可以创建一个链接指向实际的位置
sudo ln -s /home/wave/xilinx/_rootfs /nfsroot
Xilinx Embedded & DSP
© Copyright 2011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. PCI, PCIe and PCI Express are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.
sudo chmod 777 /nfsroot
3. 修改/etc/exports 的内容为
/nfsroot *(rw,sync,no_root_squash)
4. 重启服务:
sudo /etc/init.d/nfs-kernel-server restart
5. 检查
$ showmount -e 127.0.0.1
成功的话在本机上可以看到这样的讯息:
Export list for 127.0.0.1:
/home/wave/xilinx/_rootfs *
mkdir nfsroot
sudo mount -t nfs 127.0.0.1:/nfsroot nfsroot
ls nfsroot
<END>
Xilinx Embedded & DSP
© Copyright 2011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. PCI, PCIe and PCI Express are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.
安装工具链
参考 http://wiki.xilinx.com/zynq-tools 下载并安装 cross compiler。cross compiler 位于
http://www.xilinx.com/member/mentor_codebench/xilinx-2011.09-50-arm-xilinx-linux-gnueabi.
bin
如网页上所说,安装包 xilinx-2011.09-50-arm-xilinx-linux-gnueabi.bin 提示系统是 dash,
而安装包需要 bash。按照提示运行命令 sudo dpkg-reconfigure -plow dash,选择 No。然后重
新运行安装包。
缺省情况下安装后的工具链位于
~/CodeSourcery/Sourcery_CodeBench_Lite_for_Xilinx_GNU_Linux/bin
bash> export CROSS_COMPILE=arm-xilinx-linux-gnueabi-
bash>
export PATH=<path>/CodeSourcery/Sourcery_CodeBench_Lite_for_Xilinx_GNU_Linux/bin:$PATH
<path>一般是/home/<user name>
bash> export ARCH=arm
可以把配置命令都放到一个文件 setup 里面,然后用以下命令使之生效:
. ./setup
编译 U-Boot
bash> git clone git://git.xilinx.com/u-boot-xarm.git
bash> cd u-boot-xarm
bash> make zynq_zc70x_config
bash> make
缺省情况下下载的是 master 分支,如果需要在特定分支上工作可以:
git checkout -b xilinx-14.3-build2
Xilinx 处理器 FAE:Haoliang Qin
Xilinx Embedded & DSP
© Copyright 2011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. PCI, PCIe and PCI Express are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.
可以用以下命令确认本地源码是哪个分支:
git branch -l
对U-Boot来说,当前的master和 xilinx-14.3-build1/xilinx-14.3-build2 /xilinx-14.3-build2-trd
是一回事。
对 Linux kernel 来说,标签 xilinx-14.3-build2/xilinx-14.3-build2-trd 的时间是 2012-10-23,
master 的最近更新时间是 2012-10-26,在标签 xilinx-14.3-build2 后又有 7 次更新。当前的时
间:2012/11/15
编译 Linux
bash> git clone git://git.xilinx.com/linux-xlnx.git
bash> cd linux-xlnx
bash> make xilinx_zynq_defconfig
bash> make uImage
到最后一步生成 uImage 的时候,提示没有找到 mkimage,这时可以把 u-boot/tools 下
面的 mkimage 拷贝到/usr/bin 重新 make 即可 uImage。
使用 U-BOOT 和 zImage
Zynq 的 ROM 会在 SD 卡上寻找一个叫做 BOOT.BIN 的文件。用 SDK 生成 ZC702 的 fsbl,
以及编译生成的 u-boot(需要改名为 u-boot.elf)可以生成这个文件。尽管最新的 wiki 要求用
SDK 14.3,实际上我用的 SDK 14.2 也没有什么问题。
打开SDK->XilinxTools->Create Boot Image窗口,Bif file下拉框选择”Create a new bif file…”,
FSBL file选中SDK生成的 fsbl,点击Add增加u-boot.elf,设置好output folder,点击Create Image
即可生成 3 个文件:
bootimage.bif
u-boot.bin
u-boot.mcs
将 u-boot.bin 改名为 BOOT.BIN 就可以使用了。
注意:
1. 底层调用的 bootgen 只能识别.elf 和.bit 的文件,如果编译生成的 u-boot(尽管已经是 ELF
格式了)不添加扩展名,无法 Create Image。如果扩展名是这两个以外的,例如.fle,生
成的文件不正确,size 明显要大很多。
2. 之前有过一次 Create Image 失败,怀疑是因为路径里面有特殊字符(-或者.),后来测试
发现不是。估计原因有可能是路径名太长,有待验证。
用生成的 BOOT.BIN 和 uImage 替换 SD 卡上的同名文件,启动正常。
Xilinx Embedded & DSP
© Copyright 2011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. PCI, PCIe and PCI Express are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.
Board Support Package (BSP)
一部分代码在 arch/arm/mach-zynq
Hardware Block Driver Name Notes Detailed Page
GIC gic.c in arch/arm/common
PL330 pl330.c a different driver now exists in kernel.org
PS2 ps2.c support for keyboard and mouse in QEMU
SCU Global Timer scu_gtimer.c provides primitive abilities only
System Level Control
Registers slcr.c SLCR
Triple Timer Counter timer.c Only supports 1 TTC currently
其他的外设和驱动源文件的的对应关系如下:
Hardware Block Driver Name Notes Detailed Page
CAN not supported
GEM xilinx_emacps.c
GPIO xilinx_gpiops.c
I2C i2c-xilinx_ps.c
NAND xilinx_nandpss.c
QSPI xilinx_qspipc.c
SCU WDT xilinx_scuwdt.c
SPI xilinx_spips.c
System WDT xilinx_wdtps.c
UART xilinx_uartps.c
USB Host ehci-xilinx-usbps.c
USB Device xilinx_usbps_udc.c
USB OTG xilinx_usbps_otg.c
Device Tree
Device Tree 实际上是一种硬件描述方法。通过 data 和 code 分离的方式,达到一个 kernel
image 可以支持多种硬件平台的目的。具体表现形式有两种:
device tree source (.dts): 描述硬件平台的文本文件
device tree blob (.dtb): 通过.dts 编译生成,在 Linux 启动前加载到内存,然后 Linux
Xilinx Embedded & DSP
© Copyright 2011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. PCI, PCIe and PCI Express are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.
kernel 根据这个文件初始化自己
Xilinx ARM kernel 使用 device tree。 在 Linux kernel 3.0 之前, 大多数 ARM Linux kernels
使用 platform data,并不支持。对 ARM 平台,dts 一般放在./arch/arm/boot/dts/
Device Tree 的使用方式有两种:
任意内存地址方式:U-Boot 将 devicetree.dtb 的内存地址作为 bootm 的第三个参数,
kernel 通过寄存器 R2 找到 device tree。从 14.3 开始,这个方法开始作为 Linux kernel
的缺省配置。
固定内存地址方式:devicetree.dtb 被硬编码在 16Mb 的位置,这主要是为了在
u-boot 下使用 go 命令 (这个命令不会配置 R2 寄存器)。Kernel 里面有一个”System
Type->Xilinx Specific Options->Device Tree At Fixed Address”配置项,需要使能 device
tree 后才可见。
从 Linux kernel 3.3 开始,device tree 可以支持中断号。不过要注意这个中断号需要在
Zynq-7000 EPP TRM Table 7-3 查表得到的值上减去 32。例如:查表得到 UART 1 的 IRQID 为
82,所以 device tree 中 UART1 的中断号要填写为 50。
Kernel Command Line 获取方式:
缺省情况下,从 device tree 获取。
通过配置 kernel (Boot Options->Always use the default kernel command string),使用硬编
码的 command line。
编译 Device Tree
bash> scripts/dtc/dtc -I dts -O dtb -o <output file name> <input file path and name>
注意:device tree compiler (dtc) binary 需要在 kernel configuration 里面打开 device tree
后才会出现在 scripts/dtc/目录。
Linux源码里面的 dts和 pre-built dts略有区别。修改 zynq-zc702.dtc的 Linux command line
中 ip 部分:
原始的:ip=:::::eth0:dhcp
修改后的:ip=192.168.1.10:::255.255.255.0:ZC702:eth0
编译后生成了 dtb,经过比较,确认和 pre-built package 里面的 devicetree.dtb 完全一致。
SMP
通过 boot log 和以下命令可以看到在 ZC702 上两个 Cortex-A9 都在运行中
zynq> cat /proc/cpuinfo
Xilinx Embedded & DSP
© Copyright 2011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. PCI, PCIe and PCI Express are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.
如果需要只运行一个核,需要在 device tree 里面的 kernel command line 里面加上
"maxcpus=1"
如果需要指定某个应用运行在特定的 CPU core 上,可以用 taskset 命令。BusyBox 支持
该命令。
The following command will display the help information for the taskset command.
zynq> taskset 2 top
需要注意的是,taskset 的 CPU core 编号是从 1 开始的,而不是从 0 开始。
Xilinx Embedded & DSP
© Copyright 2011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. PCI, PCIe and PCI Express are trademarks of PCI-SIG and used under license. All other trademarks are the property of their
respective owners.
原始的描述在 http://wiki.xilinx.com/zynq-rootfs
有些资源与该页面的描述不同:
工具链在/home/wave/CodeSourcery/Sourcery_CodeBench_Lite_for_Xilinx_GNU_Linux/
Rootfs 在/home/wave/xilinx/_rootfs
可以按照以下顺序创建基本的 Linux Root File System:
1. 编译 BusyBox 提供基本工具
2. 编译 Dropbear 提供 SSH client/server
3. Toolchain Library:including standard C library and helper applications such as
gdb-server.
4. 目录创建和配置
编译 BusyBox
bash> git clone git://git.xilinx.com/apps/busybox.git
bash> cd busybox
bash> make defconfig
可以用以下命令修改配置:
bash> make menuconfig
这里修改 BusyBox Settings->Installation Options->BusyBox installation prefix 为
/home/wave/xilinx/_rootfs
编译并安装
bash> make install
Xilinx 处理器 FAE:Haoliang Qin
Xilinx Embedded & DSP
© Copyright 2011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. PCI, PCIe and PCI Express are trademarks of PCI-SIG and used under license. All other trademarks are the property of their
respective owners.
编译 Dropbear
bash> wget http://matt.ucc.asn.au/dropbear/releases/dropbear-0.53.1.tar.gz
bash> tar xfvz dropbear-0.53.1.tar.gz
bash> cd dropbear-0.53.1
bash> ./configure --prefix=/home/wave/xilinx/_rootfs
--host=arm-xilinx-linux-gnueabi --disable-zlib
CC=arm-xilinx-linux-gnueabi-gcc LDFLAGS="-Wl,--gc-sections"
CFLAGS="-ffunction-sections -fdata-sections -Os"
bash> make PROGRAMS="dropbear dbclient dropbearkey dropbearconvert scp" MULTI=1
strip
bash> sudo make install
bash> ln -s ../../sbin/dropbear /home/wave/xilinx/_rootfs/usr/bin/scp
说明:后一个名字是要创建的 link file的文件名,前一个是其指向的链接位置。
Library
bash> cd /home/wave/xilinx/_rootfs
bash> mkdir lib
bash> cp
/home/wave/CodeSourcery/Sourcery_CodeBench_Lite_for_Xilinx_GNU_Linux/arm-xil
inx-linux-gnueabi/libc/lib/* lib -r
bash> arm-xilinx-linux-gnueabi-strip lib/*
注意:arm-xilinx-linux-gnueabi-strip:lib/libgcc_s.so 是一个纯文本文件,需要跳过去。
用”du -h”观察 lib 的大小。Strip 前是 6.7M,strip 后是 2.9M
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respective owners.
bash> cp
/home/wave/CodeSourcery/Sourcery_CodeBench_Lite_for_Xilinx_GNU_Linux/arm-xil
inx-linux-gnueabi/libc/sbin/* sbin/ -r
bash> cp
/home/wave/CodeSourcery/Sourcery_CodeBench_Lite_for_Xilinx_GNU_Linux/arm-xil
inx-linux-gnueabi/libc/usr/bin/* usr/bin/ -r
目录创建和配置
切换到"_rootfs" 目录下
bash> mkdir dev etc etc/dropbear etc/init.d mnt opt proc root sys tmp var var/log
var/www
创建内容如下的文件 "etc/fstab":
LABEL=/ / tmpfs defaults 0 0
none /dev/pts devpts gid=5,mode=620 0 0
none /proc proc defaults 0 0
none /sys sysfs defaults 0 0
none /tmp tmpfs defaults 0 0
创建内容如下的文件"etc/inittab"
::sysinit:/etc/init.d/rcS
# /bin/ash
#
# Start an askfirst shell on the serial ports
ttyPS0::respawn:-/bin/ash
# What to do when restarting the init process
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respective owners.
::restart:/sbin/init
# What to do before rebooting
::shutdown:/bin/umount -a -r
创建内容如下的文件"etc/passwd":
root:$1$qC.CEbjC$SVJyqm.IG.gkElhaeM.FD0:0:0:root:/root:/bin/sh
创建内容如下的文件"etc/init.d/rcS":
#!/bin/sh
echo "Starting rcS..."
echo "++ Mounting filesystem"
mount -t proc none /proc
mount -t sysfs none /sys
mount -t tmpfs none /tmp
echo "++ Setting up mdev"
echo /sbin/mdev > /proc/sys/kernel/hotplug
mdev -s
mkdir -p /dev/pts
mkdir -p /dev/i2c
mount -t devpts devpts /dev/pts
echo "++ Starting telnet daemon"
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respective owners.
telnetd -l /bin/sh
echo "++ Starting http daemon"
httpd -h /var/www
echo "++ Starting ftp daemon"
tcpsvd 0:21 ftpd ftpd -w /&
echo "++ Starting dropbear (ssh) daemon"
dropbear
echo "rcS Complete"
设置"etc/init.d/rcS"的权限:
bash> chmod 755 etc/init.d/rcS
bash> sudo chown root:root etc/init.d/rcS
创建 ramdisk image
bash> cd ~
bash> dd if=/dev/zero of=ramdisk.img bs=1024 count=8192
bash> mke2fs -F ramdisk.img -L "ramdisk" -b 1024 -m 0
bash> tune2fs ramdisk.img -i 0
bash> chmod 777 ramdisk.img
bash> mkdir ramdisk
bash> sudo mount -o loop ramdisk.img ramdisk/
bash> sudo cp -R _rootfs/* ramdisk
bash> sudo umount ramdisk/
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respective owners.
bash> gzip -9 ramdisk.img
给 ramdisk image 增加 u-boot header:
bash> mkimage -A arm -T ramdisk -C gzip -d ramdisk.img.gz uramdisk.image.gz
奇怪的是,自己生成的 ramdisk image 是 3.6MB,prebuilt image 是 5.1MB。将 prebuilt rootfs
的 u-boot header 截掉并将内容导出,发现 ramdisk 的 size 是 16MB,并且里面多了些内容,
比如更新 QSPI FLASH 的工具等。
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修改 u-boot,用 tftp 加载 kernel 和 device tree,用 nfs 加载 rootfs
修改 include/configs/zynq_zc70x.h 中的 IP Address 的配置为需要的值
/* Default environment */
#define CONFIG_IPADDR 10.10.70.102
#define CONFIG_SERVERIP 10.10.70.101
修改 include/configs/zynq_common.h 中关于 sdboot 的配置为
"sdboot=echo Copying Linux from tftp to RAM...;" \
"tftp 0x3000000 ${kernel_image};" \
"tftp 0x2A00000 ${devicetree_image};" \
"bootm 0x3000000 0x2000000 0x2A00000\0" \
说明:
board/Xilinx/zynq_common/board.c/board_late_init()会去读取Address= 0xF800025C
的 BOOT_MODE 寄存器,然后生成 u-boot 下环境变量 modeboot。
注意:
Devicetree 的地址是 bootm 的第三个参数,所以用 bootm 启动时第二个参数(ramdisk
的地址)就不能少。如果不加载 ramdisk,就会出现 ramdisk 校验问题。所以现在还要做一
次无用的 ramdisk 加载,以骗过 bootm。
确认内核里面已经包含 NFS Client 的支持
File Systems->Network File Systems
File Systems->Network File Systems->NFS Client support
File Systems->Network File Systems->NFS Client support-> NFS Client support for NFS version 3
File Systems->Network File Systems->Root file system on NFS
加载后发现 rootfs 还是在 ramdisk 上,在 shell 里面测试 nfs,发现有问题
~ # mount -t nfs 192.168.1.20:/nfsroot ramdisk/
svc: failed to register lockdv1 RPC service (errno 111).
mount: mounting 192.168.1.20:/nfsroot on ramdisk/ failed: Connection refused
~ # mount -o nolock 192.168.1.20:/nfsroot ramdisk/
~ # ls ramdisk/
Xilinx 处理器 FAE:Haoliang Qin
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bin etc linuxrc opt root sys usr
dev lib mnt proc sbin tmp var
~ # df -h
Filesystem Size Used Available Use% Mounted on
/dev/root.old 7.7M 7.0M 768.0K 90% /
none 504.5M 0 504.5M 0% /tmp
192.168.1.20:/nfsroot/
28.3G 4.7G 22.2G 17% /root/ramdisk
~ #
注意:需要加一个-o nolock 才可以 mount 上 nfs
因此修改 device tree 里面的 bootargs 为
console=ttyPS0,115200 ip=192.168.1.10 root=/dev/nfs rw
nfsroot=192.168.1.20:/nfsroot,nolock earlyprintk
结果发现 rootfs 还是在 ramdisk 上,原来 ramdisk 的优先级高于 nfs
继续修改 device tree 里面的 bootargs 为
noinitrd console=ttyPS0,115200 ip=192.168.1.10 root=/dev/nfs rw
nfsroot=192.168.1.20:/nfsroot,nolock earlyprintk
至此终于把 nfs mount 上了。
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Xilinx 28 nm 性能领先的 DSP48
Xilinx DSP FAE:George Wang
Xilinx Embedded & DSP
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业界最先进的 DSP 模块 Artex-7, Kintex-7, Virtex-7,
Zynq-7000
7-系列 DSP48 详细框架图
Xilinx Embedded & DSP
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尽量使用 DSP48 级联(不需要外部逻辑)实现 filter
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复数乘法,乘累加的高速设计
1. DSP48 可以被高效的利用于复数乘法
用 3 DSP48s 计算 (A+jB)*(C+jD)
P1 = C*(A+B)
Re = P1 – B*(C+D), Im = P1 + A*(D-C)
用外部的 Registers/SRL 做全流水设计
对 500MHz 的设计,建议这样使用
2. 全流水的复数乘法
3. 非全流水的复数乘法
四舍五入的高速设计
通常有 3 种四舍五入方案
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1. Truncation
简单地去除 LSBs (Matlab 中的 “floor”)
2. Symmetric rounding (towards infinity)
如果 x ≥ 0 : 加 0.5 (0000.1000) 并去除 LSBs
如果 x < 0 : 加 0.4999 (0000.0111)并去除 LSBs
FPGA 实现: x + 0000.0111 + x 最高位的取反
Matlab 中的“Round”
3. Convergent rounding (towards even)
四舍五入到最近的偶实数
FGPA 实现:
加 0.5 (0000.1000)并去除 LSBs
将 LSB 置 0 for mid-points
Mid-point pattern after addition : xxxx.0000
Convergent/Symmetric 四舍五入
DSP48 高效地支持 Symmetric & Convergent 四舍五入
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1. Symmetric rounding
可用于 DSP48 乘法输出的四舍五入,但需输出的符号位作加法器的 carry 输入
不可以在同一个时钟里对 DSP48 的累加输出四舍五入
C 端用作四舍五入常数
在 Xilinx 7 系列 -2 器件中可以达到 500MHz
2. Convergent rounding
利用 pattern detector, 通过 C 端用作四舍五入常数
因为不需要符号位,可以在同一个时钟里对 DSP48 的累加输出四舍五入
在 Xilinx 7 系列 -2 器件中可以达到 500MHz
7-系列 500MHz 高速设计技巧
1. Filter 架构优化
多通道 filter 架构好于多周期, 即并行 filter 好于半并半串 filter
2. DSP48
DSP48 内部必须全流水设计
没有用到 DSP48 预加时,延 3 拍
用到 DSP48 预加时,延 4 拍
3. BRAM
必须打 2 拍全流水
Read-First mode 达不到 500 MHz,必须使用 Write-First mode
例化 BRAM 时,尽量少的数据复用
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4. 控制
尽量少的 CE,RST,避免大的 fanout,CE,全局 RST
对所有带 CE,RST 的控制信号寄存打拍
建议同步高复位
对 CE nets 打拍
5. 逻辑
7-系列有大量的 FF,充足的流水可以用
尽量将 LUTs 做到 1-2 级逻辑
在层次模块之间,使用多级流水
对位宽大于 20bits 的加法器作流水设计
建紧凑的设计有利于工具后续的布线
6. 高位宽加法器,比较器,计数器
在 DSP48 充余的情况下,可以使用 DSP48 实现高位宽的加法器,比较器,计数器等
例子
1. 数字中频设计在 7K160T-2
功能模块
DUC/DDC
Farrow 滤波器
DPD 数字预失真非线形滤波器
复数均衡器
达到了 495 MHz
3 area groups (1 per instance)
资源使用:
42% LUT
35% FF
60% slices
70% DSP48
45% BRAMs
参考文档
UG479 – Xilinx 7 Series DSP48E1 Slice, User Guide
UG389 – Xilinx Spartan-6 FPGA DSP48A1 Slice, User Guide
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