aicd lesson 5

7/31/2019 AICD Lesson 5

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Integrated

Circuit Devices& Modelling

Engr. Warren P. Bejasa


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MOS Transistors

Small-Signal Modelling in the Active Region6


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The small-signal model for a MOS transistor in the active region

Small-Signal Modelling in the ActiveRegion


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Considering the DC parameters in which all thecapacitors are ignore (i.e., replaced by open circuits).

The low-frequency, small-signal model for an active MOS transistor



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The voltage-controlled current source, gmvgs, is the mostimportant component of the model, with the transistortransconducatnce gm

In the active region,



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The second voltage-controlled current-source gsvs,models the body effect on the small-signal drain current,id. When the source is connected to small-signal ground,or when its voltage does not change appreciably, thenthis current source can be ignored. When the body effectcannot be ignored, then



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Note that although gs is nonzero for VSB = 0, if thesource is connected to the bulk, VSB is zero, and so theeffect of gs does not need to be taken into account.


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If the source happens to be biased at the same potentialas the bulk is not directly to it, then the effect of gsshould be taken into account since VSB is notnecessarily zero.

The resistor, rds, accounts for the finite output impedance(i.e., it models the channel-length modulation and its

effect on the drain current due to changes in VDS).


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Assumes is small, such that it can approximate thedrain bias current as being the same as ID-sat. Thus,

where

and


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Example:

Derive the low-frequency model parameters for an n-channel transistor that has doping concentrations of

ND = 10

25

, NA = 10

22

, nCox = 92 A/V

2

, W/L = 20m/2 m, VGS = 1.2 V, Vtn = 0.8 V, and VDS = Veff.Assume = 0.5 V1/2 and VSB = 0.5 V. What is the newvalue of rds if the drain-source voltage is increased by0.5 V?



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T model can often result in simpler equations and isoften used by experienced designers for a quickanalysis. At first glance, it might appear that this model

allows for nonzero gate current, but a quick checkconfirms that the drain current must always equal thesource current, and, therefore, the gate current mustalways be zero. For this reason, when using the T

model, one assumes from the beginning that the gatecurrent is zero.


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Example:

Derive the low-frequency model parameters for an n-channel transistor that has doping concentrations of

ND = 10

25

, NA = 10

22

, nCox = 92 A/V

2

, W/L = 20m/2 m, VGS = 1.2 V, Vtn = 0.8 V, and VDS = Veff.Assume = 0.5 V1/2 and VSB = 0.5 V. Find the Tmodel parameter, rs.



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A cross section of an n-channel MOS transistor showing the small-signal capacitances



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where

Lov : overlap distance and is usually empiricallyderived

Thus,

when higher accuracy is needed.


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Csb, the capacitor between the source and thesubstrate. This capacitor is due to the depletioncapacitance of the reverse-biased source junction, and itincludes the channel-to-bulk capacitance (assuming thetransistor is on).

whereAs : area of the source junction

Ach : area of the channel (i.e., WL)

Cjs : depletion capacitance of the source junction


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Note that the total area of the effective source includesthe original area of the junction (when no channel ispresent) plus the effective area of the channel.


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The depletion capacitance of the drain is smallerbecause it does not include the channel area.

where

Ad : area of the drain junction


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The capacitance Cgd, sometimes called the Miller-capacitance, is important when the transistor is beingused in circuits with large voltage gain. Cgd is primarily

due to the overlap between the gate and the drain andfringing capacitance.

where, once again, Lov is usually empirically derived.


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Two other capacitors are often important in integratedcircuits. These are the source and drain sidewallcapacitance, Cs-sw and Cd-sw. These capacitances can belarge because of some highly doped p+ regions under

the thick field oxide called field implants. The majorreason these regions exist is to ensure there is noleakage current between transistors. Because they arehighly doped and they lie beside the highly doped source

and drain junctions, the sidewall capacitances can resultin large additional capacitances that must be taken intoaccount in determining Csb and Cdb. The sidewallcapacitances are especially important in modern

technologies as dimensions shrink.


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For the source, the sidewall capacitance is given by

wherePs : length of the perimeter of the source junction,excluding the side adjacent to the channel


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It should be noted that Cj-sw0, the sidewall capacitanceper unit at 0-V bias voltage, can be quite large becausethe field implants are heavily doped.

The situation is similar for the drain sidewallcapacitance, Cd-sw,

where

Pd : drain perimeter excluding the portion adjacentto the gate


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The source-bulk capacitance, Csb, is given by

with the drain-bulk capacitance, Cdb, given by


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Example:

An n-channel transistor is modelled as having thefollowing capacitance parameters: Cj = 2.4 x 10

4pF/(m)2, C

j-sw= 2.0 x 104 pF/m, Cox = 1.9 x 103

pF/(m)2, Cgs-ov = Cgd-ov = 2.0 x 104 pF/m. Find the

capacitances Cgs, Cgd, Cdb, and Csb for a transistorhaving W = 100 m and L = 2 m. Assume thesource and drain junctions extend 4 m beyond the

gate, so that the source and drain areas are As = Ad =400 (m)2 and the perimeter of each is Ps = Pd = 108m.


aicd lesson 5

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