aei systems component test and model summary · file: aei systems component test and model...

Component Testing and Model Correlation

File: AEi Systems Component Test and Model Summary.docx

Proprietary to AEi Systems, LLC Revision Date: 2/9/2012

1.0 Component Test and Model Summary This document contains results for various tests performed on magnetics (88uH inductor, seven

output flyback power transformer), passive and active components (capacitor, 2N6059,

IRHNM57110), and various ICs (LM120/LM140), along with their SPICE correlations. This

report gives a good indication of AEi System’s ability to accurately model components and ICs.

1.1 Individual Component Testing

Inductors

A 88uH inductor is tested for impedance over frequency and saturation characteristics using the

Picotest J2130A DC bias injector.

Figure 1.1-1: Simplified diagram of setup used to test the impedance of each inductor.

J2130A

DC BiasInjector

bode_100AC = 1

DC

Inductor




Figure 1.1-2: Impedance (in dB) and inductance of the 88uH inductor.

From these plots, the inductance, DCR, capacitance, and effective parallel resistance can be

extracted for modeling purposes.

Figure 1.1-3: Effective 88uH inductor model.

1

DCR54m

1

88uH

Cp14p

Rp100k

L1 VLz1

I1AC = 1




Figure 1.1-4: Bench and simulation results for the 88uH phase and impedance.

The bench and simulation data are overlayed for each inductor; these overlay plots show that the

model performs exceptionally well over a wide frequency range. However, these models do not

account for the saturation characteristics of each inductor. The tabulated results and graphs are

shown below.

Figure 1.1-5: 88uH inductance as DC current increases.

3 z_bench 13 phase_bench 14 phase_sim 15 z_sim

100 1k 10k 100k 1Meg 10Megfrequency in hertz

-40.0

0

40.0

80.0

120z_

sim

, z_b

ench

in d

B(v

olts

)

-80.0

-40.0

0

40.0

80.0

phas

e_si

m, p

hase

_ben

ch in

deg

rees

plot

1

13

3

14

15

88uH InductorCurrent (A) mag (Ω) @80kHz Inductance (H)

0.01 42.85 85.25E‐060.1 42.782 85.11E‐060.2 42.742 85.03E‐060.4 42.645 84.84E‐060.6 42.56 84.67E‐060.8 42.455 84.46E‐061 42.34 84.23E‐06




Figure 1.1-6: Graphical representation of the 220uH inductance vs. DC current.

A 6th order polynomial equation is used to curve-fit the points up to 1A of DC current. The 6th

order equations are then used to generate a saturable core inductor model to replace the ideal

inductor used in the SPICE models. The results of the model saturation with current are

overlayed with the measurement results to show the nearly perfect correlation between the two.

Figure 1.1-7: Bench and simulation results of the 88uH inductor saturation curve.

y = 4E‐05x6 ‐ 0.0001x5 + 0.0001x4 ‐ 7E‐05x3 + 2E‐05x2 ‐ 3E‐06x + 9E‐05R² = 1.0001

84.00E‐06

84.20E‐06

84.40E‐06

84.60E‐06

84.80E‐06

85.00E‐06

85.20E‐06

85.40E‐06

0 0.2 0.4 0.6 0.8 1 1.2

88uH

88uH

Poly. (88uH)

1 simulated_88uh 2 measured_88uh

100m 300m 500m 700m 900mi1 in amperes

84.0u

84.4u

84.8u

85.2u

85.6u

sim

ulat

ed_8

8uh,

mea

sure

d_88

uh in

vol

tsPl

ot1

21




Multi‐Winding Power Transformers

The power transformer used in the main converter is tested, and a sophisticated “mesh model” is

created. DC resistance of each winding is tested using the 4-wire resistance measurement

capability of the Picotest M3500A 6½ Digit Multimeter. The inductance of the primary winding

is measured using the Bode 100 Vector Network Analyzer (VNA).

Figure 1.1-8: Schematic of the power transformer windings.




Figure 1.1-9: Impedance of the primary winding of the transformer (N7). The winding measures 78uH.

The turns ratios are measured and compared to the calculated values.

compared to

compared to

compared to

compared to

compared to

compared to

compared to

-20

-10

0

10

20

30

40

50

60

70

-300u

-200u

-100u

0

100u

200u

300u

102 103 104 105 106 107

TR1/

dBTR

2/H

f/HzTR1: Mag(Impedance) TR2: Ls(Impedance)

nN1 1.295:=

N7N1

1.294=

nN2 1.295:=

N7N2

1.294=

nN3 0.564:=

N7N3

0.564=

nN4 0.564:=

N7N4

0.564=

nN5 0.479:=

N7N5

0.478=

nN6 0.917:=

N7N6

0.917=

nN8 1.101:=

N7N8

1.1=




The measured values are in good agreement with the calculated ratios. Next, the leakage

inductances are measured between the windings. Measurements of voltage and current are

performed with the OMICRON Lab Bode 100 network analyzer using the Gain function at the

71.5 kHz switching frequency. The ratio of V/I is measured with voltage probe on Ch2

(reference) and the Tektronix P6022 current probe on Ch1. All windings other than the winding

where voltage is being measured are shorted during each measurement.

These values are then each used in the equation below, to calculate the leakage inductances.

After each leakage inductance is calculated, the values are placed in a subcircuit along with the

turns ratios, primary inductance, and DCRs of each winding to create the Mesh model of the

transformer.

LN7N1VN7IN1

2π f nN7⋅ nN1⋅:=

LN7N1 1.354 10 6−×=




Figure 1.1-10: Final SPICE “Mesh” model of the power transformer.

This model is an extremely high-fidelity model that yields hyper-accurate switching simulation results as shown below.

2 1

N7RATIO = 1

1

LN777.83u

1 123

Lleak216.6n

3

RN721m

1 26

LN7N11.354u

11

1 5

LN7N21.593u

1 8

LN7N37.807u

1 13

LN7N430.82u

1 14

LN7N546.14u

1 15

LN7N65.918u

16 1

LN7N8790.5n

6

RN142m

5 9

N2RATIO = 0.772

1

1

9

RN248m

8 11

N3RATIO = 1.773

11

RN398m

1

1

13 18

N4RATIO = -1.773

26 6

N1RATIO = -0.772

1

1

14 19

N5RATIO = -2.088

1

1

15 20

N6RATIO = -1.091

1

1

1621

N8RATIO = -0.908

16 16

18

RN4102m

19

RN5123m

20

RN670m

21

RN845m

1

1

26

5

LN1N21.577u

5

5

26

26

2626

26

8

LN1N33.575u

8

8

26

26

2626

26

13

LN1N416.77u

13

13

26

26

2626

26

14

LN1N516.78u

14

14

26

26

2626

26

15

LN1N69.742u

15

15

26

2626

16

LN1N81.705u

55

88

1313

1414

1515

2626 26 2626

26

5

5

55

5

16

LN2N82.111u

5

5

55

5

15

LN2N65.785u

5

5

55

5

14

LN2N521.93u

5

5

55

5

13

LN2N46.668u

5

8

55

LN2N33.054u

5

5

8

8

88

8

16

LN3N813.85u

8

8

88

8

15

LN3N658.42u

8

8

88

8

14

LN3N525.65u

8

13

88

LN3N48.502u

8

8

15

151515

14

141414

13

131313

8

888

13

131313

14

141414

15

151515

161616 16161616

16

13

13

1313

13

16

LN4N813.65u

13

13

1313

13

15

LN4N630.42u

13

14

1313

LN4N514.63u

13

13

14

141414

15

151515

1616

14

14

1414

14

16

LN5N875.25u

14

15

1414

LN5N66.178u

14

14

15

16

1515

LN6N810.12u

15

15

15

151515

1616 1616

55

88

1313

2626

1414

1515

PIN1

PIN2

PIN3

PIN4

PIN5

PIN6

PIN7

PIN8

PIN9

PIN10

PIN11

PIN12

PIN13

PIN14

PIN15

PIN16




Figure 1.1-11: Simulated ripple voltages compared to the bench measurements.

The simulation of the output voltage ripple compares very well to the bench measurements.

Transformer models for power supplies such as multi-winding flybacks must be made with this

level of fidelity. The results for transient and frequency domain (stability) simulations using less

accurate models will not be correct.




Capacitors

Bench measurements of the capacitor’s impedance magnitude, impedance phase shift, and ESR

are obtained to create an AC only frequency dependent model of the capacitor. This model is not

used in transient simulations.

Figure 1.1-12: 220uF output capacitor model configuration (AC Domain model) based on bench measurements. Voltage sources are used to tolerance resistor equations. The equations are used to fit the

model to measured bench data.

res7res8

V5 V9

4

5

C11237u

5

6

L1111.0196n

4

6

Itest

Impedance

R18R=(exp((log(0.105)+(log(f req/(2*pi))-log(3000))*((log(0.04)- log(0.105))/(log(300000)-log(3000))))/log(e))-0.015)*V(res7)+1n

R9R=(exp((log(0.05)+(log(f req/(2*pi))-log(7000000))*((log( 0.07)- log(0.05))/(log(20000000)-log(7000000))))/log(e))+1n)*V( res8)+1n




Figure 1.1-13: Overlay of the bench measurement of the 220uF output capacitor impedance magnitude, impedance phase shift, and ESR and the simulated result using the AEi Systems’ model.

Figure 1.1-14: 220uF capacitor model obtained from the manufacture vs. the same bench data as shown in

the previous figure. This model is not recommended for analysis.

1 benchdb 2 benchp 3 benchre 4 simdb 5 simp 6 simre

100 1k 10k 100k 1Meg 10Meg 100Megfrequency

-360

-180

0

180

360

sim

p, b

ench

p

50.0m

150m

250m

350m

450msi

mre

, ben

chre

-75.0

-55.0

-35.0

-15.0

5.00

sim

db, b

ench

dbPl

ot1

14

36

25

1 ph_v(1) 2 db_v(1) 3 PHASE(VOUT) 4 VDB(VOUT)

100 1k 10k 100k 1Meg 10Meg 100Megfrequency in hertz

-25.0

-15.0

-5.00

5.00

15.0

db_v

(1),

VD

B(V

OU

T) in

dB

-80.0

-40.0

0

40.0

80.0

PH

AS

E(V

OU

T), p

h_v(

1) in

deg

rees

Plo

t1

1342

SpiTan ModelVendor Model




Linear Regulators

Seven linear regulators were obtained from the manufacturer in order to get a statistic set of data.

An individual model of each regulator is created and tested for accuracy, to ensure reliable

simulation results when the part is simulated in the system.

Each linear regulator is tested with the same input voltage as seen in the system and over a broad

current range. In each test, the output impedance is measured using the Picotest J2111A Current

Injector coupled with the Bode 100 VNA.

Figure 1.1-15: Typical bench setup for output impedance and non-invasive phase margin measurements.




Figure 1.1-16: Schematic of output impedance measurement of the LM1X0 linear regulators.

The bench test and simulation results for each regulator are shown below. Note the measured

effective inductance vs. the simulated effective inductance of each regulator. The effective

inductance created by the control loop of each regulator defines the AC and transient

performance of the regulator. Each regulator is tested over current to characterize the dynamic

impedance. Creating a model with performance similar to the real part ensures accuracy in all

simulation conditions, not just at a single operating point.

N1214

V8-15V

VN12in

Gnd

out14

LM120-12

14 14

J2111A25mAAC = 1




Regulator Code Load Current(A) Frequency(Hz) Magnitude Magnitude (model) Eff. Inductance (H)Eff. Inductance (H)

(model)

25.00E‐03 20.00E+03 0.168703 0.197 1.34E‐06 1.57E‐06125.00E‐03 20.00E+03 0.07058 0.075 561.66E‐09 596.83E‐09225.00E‐03 20.00E+03 0.058824 0.0605 468.11E‐09 481.44E‐09525.00E‐03 20.00E+03 0.050509 0.0497 401.94E‐09 395.50E‐0925.00E‐03 30.00E+03 0.164836 0.1801 874.48E‐09 955.46E‐09145.00E‐03 30.00E+03 0.067453 0.068 357.85E‐09 360.75E‐09265.00E‐03 60.00E+03 0.096894 0.115 257.02E‐09 305.05E‐09505.00E‐03 60.00E+03 0.086723 0.098 230.04E‐09 259.95E‐0925.00E‐03 30.00E+03 0.202648 0.222 1.08E‐06 1.18E‐06175.00E‐03 30.00E+03 0.075407 0.0789 400.05E‐09 418.58E‐09325.00E‐03 30.00E+03 0.067457 0.0662 357.87E‐09 351.20E‐09625.00E‐03 30.00E+03 0.060588 0.0583 321.43E‐09 309.29E‐09

25.05E‐03 50.00E+03 0.3654 0.353712 1.16E‐06 1.13E‐0650.81E‐03 50.00E+03 0.205822 0.216301 655.15E‐09 688.51E‐09126.84E‐03 50.00E+03 0.134198 0.133822 427.17E‐09 425.97E‐09412.52E‐03 50.00E+03 0.107021 0.0948756 340.66E‐09 302.00E‐0925.12E‐03 30.00E+03 0.53467 0.432 2.84E‐06 2.29E‐0651.22E‐03 30.00E+03 0.276979 0.268383 1.47E‐06 1.42E‐06111.96E‐03 30.00E+03 0.181456 0.180237 962.65E‐09 956.19E‐09368.79E‐03 30.00E+03 0.136197 0.126429 722.55E‐09 670.73E‐0925.15E‐03 20.00E+03 0.412242 0.369939 3.28E‐06 2.94E‐0645.34E‐03 20.00E+03 0.249459 0.245317 1.99E‐06 1.95E‐06101.55E‐03 20.00E+03 0.157817 0.157306 1.26E‐06 1.25E‐06359.30E‐03 20.00E+03 0.112346 0.103504 894.02E‐09 823.66E‐09

Regulator Code Load Current(A) Frequency(Hz) Magnitude Magnitude (model) Eff. Inductance (H)Eff. Inductance (H)

(model)

25.00E‐03 20.00E+03 0.521982 1.03339 4.15E‐06 4.11E‐0650.00E‐03 20.00E+03 0.390884 1.08517 3.11E‐06 3.14E‐06

LM120H‐15(‐15V)

(500 mA)

LM120‐12(‐12V)

11506BYA

LM120‐5(‐5V)

11505SYA

LM120K‐15(‐15V)

11507BYA

LM140‐5(+5V)

LM140‐12(+12V)

10706SYA

10707SYA

LM140‐15(+15V)

10708SYA




Various linear regulator overlays are shown below to demonstrate the accuracy of all aspects of

the model, including effective inductance, resonant frequency, Q of the resonant peak, and low

frequency impedance.

Figure 1.1-17: Overlay of the LM120-12 linear regulator output impedance (in Ohms) with a 25mA load.

Figure 1.1-18: Overlay of the LM120-12 linear regulator group delay with a 25mA load.

1 sim_magnitude 2 bench_magnitude


10m

20m

50m

100m

200m

500m

1

2

5

10

sim

_mag

nitu

de, b

ench

_mag

nitu

de in

ohm

sPl

ot1

21

2 bench_tg 4 sim_tg

100 1k 10k 100k 1Meg 10MegFREQUENCY in hertz

1p

10p

100p

1n

10n

100n

1u

10u

100u

1m

10m

sim

_tg,

ben

ch_t

g in

sec

onds

Plot

1

2

4








1m

10m

100m

1

10

100

benc

h_m

agni

tude

, sim

_mag

nitu

de in

ohm

sPl

ot1

12

1 bench_group_delay 4 sim_group_delay

100 1k 10k 100k 1Meg 10Meg 100MegFREQUENCY in hertz

10p

100p

1n

10n

100n

1u

10u

100u

1m

10m

benc

h_gr

oup_

dela

y, s

im_g

roup

_del

ay in

sec

onds

Plot

1

41








1m

10m

100m

1

10

100

sim

_mag

nitu

de, b

ench

_mag

nitu

de in

ohm

sPl

ot1

21

1 bench_group_delay 3 sim_group_delay


10p

100p

1n

10n

100n

1u

10u

100u

1m

10m

benc

h_gr

oup_

dela

y, s

im_g

roup

_del

ay in

sec

onds

Plot

1

31




Figure 1.1-23: Overlay of the LM120H-15 linear regulator output impedance (in Ohms) with a 25mA load.


1 outz_simulation 2 outz_bench

10k 20k 50k 100k 200k 500k 1Megfrequency in hertz

100m

200m

500m

1

2

5

10

20

50

100

outz

_ben

ch, o

utz_

sim

ulat

ion

in o

hms

Plot

1

1

2

LM120H-15V Output Impedance 25mA Load1uF ceramic capacitor on the output

2 measured_group_delay 4 simulated_group_delay

10k 20k 50k 100k 200k 500k 1MegFREQUENCY in hertz

5.00u

15.0u

25.0u

35.0u

45.0u

mea

sure

d_gr

oup_

dela

y, s

imul

ated

_gro

up_d

elay

in s

econ

dsP

lot1

42




A small test circuit is assembled using regulators and capacitors provided by the program to test

a piece of circuitry as it exists in the real system, and to compare the model results to a full

circuit.

Figure 1.1-25: Test circuit used for testing the stability of the -12V linear regulator, U62.

Figure 1.1-26: Overlay of the LM120-12 linear regulator test circuit output impedance (in dB Ohms) with a

100mA load.

in

Gnd

out

U5LM120-15

in

Gnd

out

U10LM120-15

in

Gnd

out

U62LM120-12

VN3-19.5V

C1330uF

C210uF

C310uF

C41uF

Cceramic0.1uF

I1100mA

n12n15Vrf

n15V

Vn12

Vin

x18

2 n15_vout_bench 11 n15_vout_sim


-20.0

-10.0

0

10.0

20.0

n15_

vout

_sim

, n15

_vou

t_be

nch

in d

B(vo

lts)

Plot

1

2

11

Impedance in dBsim and bench are both at 100mA loads





Looking at the peak in group delay that coincides with a peak in the output impedance, it is

possible to determine the bandwidth and phase margin (PM) of the regulator (LM120-12).

(Bandwidth of the circuit)

This calculation can be verified using a small signal load step to observe the oscillation in the

-12V output voltage. The load step can also be simulated and compared to the measured results

to further confirm the accuracy of the SPICE model.

2 tg_bench 4 tg_sim

100 1k 10k 100k 1Meg 10MegFREQUENCY in hertz

100p

1n

10n

100n

1u

10u

100u

1m

tg_b

ench

, tg_

sim

in s

econ

dsPl

ot1

4

2

Group Delay100mA load

Tg 5.89410 6−⋅:=

Freq 146.273103⋅:=

Q 93 10 6−⋅ 27 103

⋅, ( ) 7.889=

PM 9.954 106⋅ 81.780103

⋅, ( ) 20.907=




Figure 1.1-28: Measured load step response of the -12V linear regulator test circuit.

Figure 1.1-29: Simulated load step response of the -12V linear regulator test circuit.

1 voutn12 3 load_current

205u 225u 245u 265u 285utime in seconds

-40.0m

0

40.0m

80.0m

120m

load

_cur

rent

in a

mpe

res

-12.033

-12.023

-12.013

-12.003

-11.993

vout

n12

in v

olts

Plot

1

1

3




Darlington Transistor

The 2N6059 is a Darlington structure NPN BJT. To properly model the part, it must be

understood how the part behaves at low currents and over frequency. At low currents, only one

of the transistors is turned on (Q4 shown below). Once enough current flows through the 70

Ohm resistor to generate approximately a 0.6V drop, transistor Q5 turns on. A small test circuit

is built and the forward transfer and PSRR (Power Supply Rejection Ratio) of the 2N6059 is

tested.

Figure 1.1-30: Subcircuit schematic of the 2N6059 Darlington transistor.

Figure 1.1-31: Test circuit used to test the AC forward transfer gain of the 2N6059.

1

R1070

1

1 1

R115.5k

1

Q42N6059b

1

Q52N6059aVc

Vb

111

1

Ve

Vc

3

V49.64716AC = 1

9

V115

R310k

4

C20.9u

VoutVout

4

5

R525m

5

L112n

Vb

I125m

8

R4350m

8

9

L220n

33

R150

3

Q12N6059




Figure 1.1-32: Bench measurements of the 2N6059 forward transfer gain at various load currents.

Figure 1.1-33: Simulation results of the 2N6059 forward transfer gain at various load currents.

1 6ma 2 7ma 3 8ma 4 9ma 5 10ma 6 11ma 7 12ma 8 13ma

100 1k 10k 100k 1MegFREQUENCY in hertz

-60.0

-40.0

-20.0

0

20.0

9ma,

8m

a, 7

ma,

6m

a, 1

3ma,

12m

a, 1

1ma,

10m

a in

dB

(vol

ts)

Plot

1

5678

1234

2N6059 Forward TransferAll measurements are loaded with the Current Injector exceptfor the 21mA measurement which is a purely resistive load

3, 4 and 5mA datapoints lie basically right on top 6mA and 7mA---- up to 5mA data is not shown here

1 6ma 2 7ma 3 8ma 4 9ma 5 10ma 6 11ma 7 12ma 8 13ma

100 1k 10k 100k 1Megfrequency in hertz

-60.0

-40.0

-20.0

0

20.0

10m

a, 1

3ma,

9m

a, 1

2ma,

8m

a, 1

1ma,

7m

a, 6

ma

in d

b(vo

lts)

Plot

1

12

6

3

7

4

85

Model Forward Transfer Results




Figure 1.1-34: Overlay of the measured and simulated PSRR of the 2N6059 test circuit.

A large signal simulator like Agilent’s ADS (unlike SPICE, which is a small signal simulator)

can simulate the pole frequency of the forward transfer of the 2N6059 while sweeping the load

current. Using the model created in SPICE, the low current point at which the second transistor

fully turns on can be observed.

3 bench_psrr 14 sim_psrr


0

20.0

40.0

60.0

80.0

sim

_psr

r, be

nch_

psrr

in d

BPl

ot1

3

14




Figure 1.1-35: 2N6059 forward transfer test circuit simulated in ADS.

Figure 1.1-36: Simulated results of the 2N6059 forward transfer pole frequency vs. current.




Figure 1.1-37: Bench testing image of the 2N6059 transistor.

Power MOSFETS

This section contains a description of the IRHNM57110 (100V 100kRad Hi-Rel Single N-

Channel TID Hardened MOSFET) AEi Systems SPICE model performance compared to

measured test data for the part. Comparisons are also made to the SPICE model provided by IR

on their web site. Forward transfer and VGS vs. IS data are presented.

This model is made with the proviso that the MOSFET is to be used in a discrete LDO design,

converting a 3.3V input source voltage to a 2.5V output voltage. In this application, the dynamic

source impedance of the MOSFET forms a moving pole with the output capacitors, dependent

primarily on the load current. In order to properly simulate this circuit, the MOSFET model must

accurately portray the dynamic resistance (1/gfs) as a function of operating current.




The test setup output capacitor was measured in order to determine the actual capacitance, as

well as the parasitic resistance and inductance.

Figure 1.1-38: Schematic used for simulating the MOSFET’s forward transfer curve.

The IRHNM57110 is configured to have 3.3V on its drain and a variable gate voltage to keep the

source voltage at 2.5V. The forward transfer (Vs/Vg) is measured using an OMICRON Lab

Bode 100 VNA and Picotest J2130A DC Bias injector. A load current range of 1mA – 1.5A is

tested.

The SPICE subcircuit model structure is based on a template previously developed by AEi

Systems during its collaboration agreement with IR in 1998. The structure is configured for the

IR FET process.

AC plots (gain/phase), comparing the AEi Systems model performance to the bench data, are

shown next.

DC_BIAS_INJECTOR5.33756VAC = 1

Vin3.3

Vs

Vg

Vd

VsQAEi1DUT

Rload8

C21u

8

6

R225m

6

L120n

3.30V 2.20V

5.34V




Figure 1.1-39: Gain and Phase of the forward transfer with a 2.49k Ohm load or 1mA.

Figure 1.1-40: Gain and Phase of the forward transfer with a 1.25k Ohm load or 2mA

1 sim_phase 2 sim_gain 3 bench_phase 4 bench_gain

10 100 1k 10k 100k 1Meg 10Megfrequency in hertz

-70.0

-50.0

-30.0

-10.0

10.0be

nch_

gain

, sim

_gai

n in

db(

volts

)

-150

-50.0

50.0

150

250

benc

h_ph

ase,

sim

_pha

se in

deg

rees

Plo

t1

1

2

3

4

3.3Vin, 2.5Vout, 2.49k ohm load



-70.0

-50.0

-30.0

-10.0

10.0

benc

h_ga

in, s

im_g

ain

in d

b(vo

lts)

-150

-50.0

50.0

150

250

benc

h_ph

ase,

sim

_pha

se in

deg

rees

Plo

t1

1

2

3

4





Figure 1.1-41: Gain and Phase of the forward transfer with a 649 Ohm load or 3.85mA

Figure 1.1‐42: Gain and Phase of the forward transfer with a 325 Ohm load or 7.7mA



-70.0

-50.0

-30.0

-10.0

10.0be

nch_

gain

, sim

_gai

n in

db(

volts

)

-150

-50.0

50.0

150

250

benc

h_ph

ase,

sim

_pha

se in

deg

rees

Plo

t1

12

3

4

3.3Vin, 2.5Vout, 649 ohm load



-70.0

-50.0

-30.0

-10.0

10.0

benc

h_ga

in, s

im_g

ain

in d

b(vo

lts)

-150

-50.0

50.0

150

250

benc

h_ph

ase,

sim

_pha

se in

deg

rees

Plo

t1

12

3

4

3.3Vin, 2.5Vout, 325 ohm load




Figure 1.1-43: Gain and Phase of the forward transfer with a 2.49k Ohm load. Results using IR’s model are shown and compared with the AEi Systems model and test data. IR’s model does not match the bench results (pink and orange traces).

The disparity in the IR model’s performance, with the pole being over a decade too high in frequency, is a function of the incorrect

modeling of the transconductance of the MOSFET. This would cause inaccurate AC analysis results, especially in the stability

assessment, if this model were used in a linear regulator simulation.

1 sim_phase_aei 2 sim_gain_aei 3 bench_phase 4 bench_gain 5 sim_phase_ir 6 sim_gain_ir


-70.0

-50.0

-30.0

-10.0

10.0si

m_g

ain_

ir, s

im_g

ain_

aei,

benc

h_ga

in in

dB

(vol

ts)

-150

-50.0

50.0

150

250

sim

_pha

se_i

r, si

m_p

hase

_aei

, ben

ch_p

hase

in d

egre

esP

lot1

3

4

1

2

5

6





Figure 1.1-44: Forward Transfer gain comparison between the AEi Systems’ model and IR’s model at under various load conditions (1mA-7.7ma). This shows the large transconductance sensitivity to load current. The pole would continue moving at higher currents.

The incorrect performance of the poles moving in the IR model will greatly impact the transient step load performance of the model.

The transconductance of the MOSFET must be modeled correctly to see the proper transient response differences during the rising and

falling edges of a load current step.

1 aei_vdbs_2p49k_load 2 aei_vdbs_1p25k_load 3 aei_vdbs_649_load 4 aei_vdbs_325_load 5 ir_vdbs_2p49k_load6 ir_vdbs_1p25k_load 9 ir_vdbs_649_load 10 ir_vdbs_325_load

-70.0

-50.0

-30.0

-10.0

10.0

AE

i mod

el F

orw

ard

Tran

sfer

in d

b(vo

lts)

Plo

t1

1234

10 100 1k 10k 100k 1Meg 10Meg 100Megf i h t

-70.0

-50.0

-30.0

-10.0

10.0

irIR

mod

el F

orw

ard

Tran

sfer

in d

b(vo

lts)

Plo

t2

56910

Forward Transfer Gain of AEi 57110 MOSFET model

Forward Transfer Gain of IR 57110 MOSFET model




The DC characteristics of the MOSFET are characterized and compared to the bench

measurements below. The VGS of the FET is measured at various load currents to obtain

important information about the N, RS, VTO and RS terms of the SPICE model.

Figure 1.1-45: VGS vs. IS of the AEi Systems model, IR model and bench measurements over load current.

Figure 1.1‐46: Tabulated VGS vs. IS of the AEi Systems model, IR model and bench measurements over

load current. The IR model, set up mainly for hard switching applications, is not accurate.

0

1

2

3

4

5

6

1.0E‐3 10.0E‐3 100.0E‐3 1.0E+0 10.0E+0

VGS [V]

IS [A]

VGS vs IS

Bench

AEi

IR

Log. (Bench)

Log. (AEi)

Log. (IR)

Load Current (A) Vg (V) Vgs (V) Vg (V) Vgs (V) Vg (V) Vgs (V)Two 2.66k in parallel 1.9E‐3 5.754 3.254 5.74935 3.24935 7.21116 4.71116Four 2.66k in parallel 3.8E‐3 5.864 3.364 5.84766 3.34766 7.21713 4.71713150 ohm resistor 16.7E‐3 6.096 3.596 6.06263 3.56263 7.24113 4.7411399.57 ohm resistor 25.1E‐3 6.131 3.631 6.12362 3.62362 7.25225 4.7522521.92 ohm resistor 114.1E‐3 6.389 3.889 6.36805 3.86805 7.32955 4.829555.14 ohm resistor 486.4E‐3 6.601 4.101 6.78174 4.28174 7.53377 5.033772.57 ohm resistor 972.8E‐3 6.967 4.467 6.93484 4.43484 7.7454 5.24541.63 ohm resistor 1.5E+0 7.201 4.701 7.16522 4.66522 7.96495 5.46495

Bench Aei Model 6/21 IR Model




The AC and DC performance of AEi Systems’ model is in excellent agreement with the acquired

bench data. The locations of the poles are at the correct frequencies and move appropriately with

varying load current. This allows the linear regulator stability to be properly represented in the

simulation of the full regulator application circuit at any operating current.

The VGS vs. IS performance follows the bench measurements with 1% accuracy which allows

accurately depiction of the DC and transient performance of the circuit.

The IR provided model proved to be deficient in all areas that were tested. The pole locations in

the forward transfer measurement are more than a decade greater in frequency than they should

be and the pole does not move correctly with respect to load current indicating both value and

topological deficiencies in the SPICE subcircuit structure.

The VGS vs. IS performance of the IR model was also inadequate as it did not line up with the

bench measurements and did not perform correctly over load current.

1.2 Conclusion All of the data presented above provides insight into the performance of the system’s power

supply. All of the components tested have been modeled and those models have been verified

against the measured results. The high levels of confidence in the models provide the basis for

accurate full-system simulations and analyses performed in the Worst Case Circuit Analysis.

As a general observation, the negative linear regulators has proven difficult to stabilize, as at low

currents the effective inductance of the regulator is quite large, and the effective Q of the

regulator at its bandwidth with no output capacitor is very high.

aei systems component test and model summary · file: aei systems component test and model...

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