advanced operating systems prof. muhammad saeed memory management -1
TRANSCRIPT
Advanced Operating Advanced Operating SystemsSystems
Prof. Muhammad Saeed
Memory Management -1Memory Management -1
Memory Management
• Basic memory management
• Swapping
• Virtual memory
• Page replacement algorithms
• Modeling page replacement algorithms
• Design issues for paging systems
• Implementation issues
• Segmentation
Advanced Operating Systems 2
What is the memory hierarchy?o Different levels of memoryo Some are small & fasto Others are large & slow
What levels are usually included?o Cache: small amount of fast, expensive memory
• L1 (level 1) cache: usually on the CPU chip• L2 & L3 cache: off-chip, made of SRAM
o Main memory: medium-speed, medium price memory (DRAM)o Disk: many gigabytes of slow, cheap, non-volatile storage
Memory manager handles the memory hierarchy
Memory hierarchy
Advanced Operating Systems 3
Basic memory management(No Memory Abstraction) Components include
o Operating system (with device drivers)o Single process
Goal: layout in memoryo Memory protection may not be an issue (only one program)o Flexibility may still be useful (allow OS changes, etc.)
No swapping or paging
Operating system(RAM)
User program(RAM)
0xFFFF 0xFFFF
0 0
User program(RAM)
Operating system(ROM)
Operating system(RAM)
User program(RAM)
Device drivers(ROM)
Advanced Operating Systems 4
Memory Models
No Memory Abstraction & Multiple Programs Fixed memory partitions
– Divide memory into fixed spaces– Assign a process to a space when it’s free
Mechanisms– Separate input queues for each partition– Single input queue: better ability to optimize CPU usage
OS
Partition 1
Partition 2
Partition 3
Partition 4
0
100K
500K
600K
700K
900K
OS
Partition 1
Partition 2
Partition 3
Partition 4
0
100K
500K
600K
700K
900K
Advanced Operating Systems 6
Memory needs two things for multiprogrammingo Relocationo Protection
The OS cannot be certain where a program will be loaded in memoryo Variables and procedures can’t use absolute locations in memoryo Several ways to guarantee this
The OS must keep processes’ memory separateo Protect a process from other processes reading or modifying its
own memoryo Protect a process from modifying its own memory in undesirable
ways (such as writing to program code) IBM System 360 Solution
o Memory divided into 2k blocks, each assigned a 4-bit protection key held in CPU registers. PSW contained a protection key. A process with the PSW key was allowed to access the process memory.
o Static relocation
Advanced Operating Systems 7
Special CPU registers: base & limito Access to the registers limited to
system modeo Registers contain
• Base: start of the process’s memory partition
• Limit: length of the process’s memory partition
Address generationo Physical address: location in actual
memoryo Logical address: location from the
process’s point of viewo Physical address = base + logical
addresso Logical address larger than limit =>
error
Processpartition
OS0
0xFFFF
Limit
Base
0x2000
0x9000
Logical address: 0x1204Physical address:0x1204+0x9000 = 0xa204
A Memory Abstraction: Address Spaces
Advanced Operating Systems 8
Swapping Memory allocation changes as
o Processes come into memoryo Processes leave memory
• Swapped to disk• Complete execution
Gray regions are unused memory
OS OS OS OS OS OS OS
A AB
ABC
BC
BC
D
C
D
C
DA
Advanced Operating Systems 9
Swapping: leaving room to grow Need to allow for
programs to growo Allocate more memory for
datao Larger stack
Handled by allocating more space than is necessary at the starto Inefficient: wastes memory
that’s not currently in useo What if the process requests
too much memory?
OSCode
Data
StackCode
Data
Stack
ProcessB
ProcessA
Room forB to grow
Room forA to grow
Advanced Operating Systems 10
Allocating memory Search through region list to find a large enough space Suppose there are several choices: which one to use?
o First fit: the first suitable hole on the listo Next fit: the first suitable after the previously allocated holeo Best fit: the smallest hole that is larger than the desired region (wastes
least space?)o Worst fit: the largest available hole (leaves largest fragment)o Quick fit: lists maintained for more common sizes
Option: maintain separate queues for different-size holesAllocate 20 blocks first fitAllocate 12 blocks next fit
Allocate 13 blocks best fitAllocate 15 blocks worst fit
- 6 5 - 19 14 - 52 25 - 102 30 - 135 16
- 202 10 - 302 20 - 350 30 - 411 19 - 510 3
5 181
15
Advanced Operating Systems 11
Managing Free Memory with Bitmaps Keep track of free / allocated memory regions with a
bitmapo One bit in map corresponds to a fixed-size region of memoryo Bitmap is a constant size for a given amount of memory regardless of
how much is allocated at a particular time Chunk size determines efficiency
o At 1 bit per 4KB chunk, we need just 256 bits (32 bytes) per MB of memory
o For smaller chunks, we need more memory for the bitmapo Can be difficult to find large contiguous free areas in bitmap
A B C D
11111100001110000111111111111000
8 16 24 32Memory regions
Bitmap
Advanced Operating Systems 12
Managing Free Memory with Linked List Keep track of free / allocated memory regions with a
linked list– Each entry in the list corresponds to a contiguous region of memory– Entry can indicate either allocated or free (and, optionally, owning
process)– May have separate lists for free and allocated areas
Efficient if chunks are large– Fixed-size representation for each region– More regions => more space needed for free lists
A B C D
16 24 32Memory regions
A 0 6 H 6 4 B 10 3 H 13 4 C 17 9
H 29 3D 26 3
8
Advanced Operating Systems 13
Freeing Memory Allocation structures must be updated when memory
is freed Easy with bitmaps: just set the appropriate bits in the
bitmap Linked lists: modify adjacent elements as needed
o Merge adjacent free regions into a single regiono May involve merging two regions with the just-freed area
A X B
A X
X B
X
A B
A
B
Advanced Operating Systems 14
Limitations of swapping Problems with swapping
o Process must fit into physical memory (impossible to run larger processes)
o Memory becomes fragmented• External fragmentation: lots of small free areas• Compaction needed to reassemble larger free areas
o Processes are either in memory or on disk: half and half doesn’t do any good
Overlays solved the first problemo Bring in pieces of the process over time (typically data)o Still doesn’t solve the problem of fragmentation or partially
resident processes
Advanced Operating Systems 15
Virtual Memory Basic idea: allow the OS to hand out more memory
than exists on the system Keep recently used stuff in physical memory Move less recently used stuff to disk Keep all of this hidden from processes
o Processes still see an address space from 0 – max addresso Movement of information to and from disk handled by
the OS without process help Virtual memory (VM) especially helpful in
multiprogrammed systemo CPU schedules process B while process A waits for its
memory to be retrieved from disk
Advanced Operating Systems 16
Program uses virtual addresseso Addresses local to the processo Hardware translates virtual
address to physical address Translation done by the
Memory Management Unito Usually on the same chip as the
CPUo Only physical addresses leave
the CPU/MMU chip Physical memory indexed by
physical addresses
CPU chip
CPU
Memory
Diskcontroller
MMU
Virtual addressesfrom CPU to MMU
Physical addresseson bus, in memory
Virtual and Physical Addresses
Advanced Operating Systems 17
Paging and Page Table Virtual addresses mapped to
physical addresseso Unit of mapping is called a pageo All addresses in the same virtual
page are in the same physical pageo Page table entry (PTE) contains
translation for a single page Table translates virtual page
number to physical page numbero Not all virtual memory has a
physical pageo Not every physical page need be
used Example:
o 64 KB virtual memoryo 32 KB physical memory
0–4K4–8K8–12K12–16K16–20K20–24K24–28K28–32K
70–4K44–8K
8–12K12–16K
016–20K20–24K24–28K
328–32K32–36K36–40K
140–44K544–48K648–52K-52–56K
56–60K-60–64K
Virtual addressspace
Physicalmemory
-
--
--
--
Advanced Operating Systems 18
Page Table Entry Each entry in the page table contains
o Valid bit: set if this logical page number has a corresponding physical frame in memory
• If not valid, remainder of PTE is irrelevanto Page frame number: page in physical memoryo Referenced bit: set if data on the page has been accessedo Dirty (modified) bit :set if data on the page has been modifiedo Protection information
Page frame numberVRDProtection
Valid bitReferenced bitDirty bit
Advanced Operating Systems 19
Mapping logical => physical addressMapping logical => physical address Split address from CPU into
two pieceso Page number (p)o Page offset (d)
Page numbero Index into page tableo Page table contains base
address of page in physical memory
Page offseto Added to base address to
get actual physical memory address
Page size = 2d bytes
Example:• 4 KB (=4096 byte) pages• 32 bit logical addresses
p d
2d = 4096 d = 12
12 bits
32 bit logical address
32-12 = 20 bits
Advanced Operating Systems 20
Address translation architecture
page number
p d
page offset
01
p-1p
p+1f
f d
Page frame number
...
page tablephysical memory
01
...f-1f
f+1f+2...
Page frame number
CPU
Advanced Operating Systems 21
Memory & paging structures
0
Page frame number
Logical memory (P0)
123456789
Physicalmemory
Page table (P0)
Logical memory (P1) Page table (P1)
Page 4Page 3Page 2Page 1Page 0
Page 1Page 0
08
29436
Page 3 (P0)Page 0 (P1)
Page 0 (P0)
Page 2 (P0)Page 1 (P0)Page 4 (P0)
Page 1 (P1)
Freepages
Advanced Operating Systems 22
Two-level page tables Problem: page tables can be too
largeo 232 bytes in 4KB pages need 1 million
PTEs
Solution: use multi-level page tableso “Page size” in first page table is large
(megabytes)o PTE marked invalid in first page table
needs no 2nd level page table
1st level page table has pointers to 2nd level page tables
2nd level page table has actual physical page numbers in it
884960
955
...
220657
401
...
1st levelpage table
2nd levelpage tables
...
...
...
...
...
...
...
...
...
mainmemory
...
125613
961
...
Advanced Operating Systems 23
Two-level page tables
Advanced Operating Systems 24
Two-level paging: example System characteristics
o 8 KB pageso 32-bit logical address divided into 13 bit page offset, 19 bit
page number Page number divided into:
o 10 bit page numbero 9 bit page offset
Logical address looks like this:o p1 is an index into the 1st level page tableo p2 is an index into the 2nd level page table pointed to by p1
p1 = 10 bits p2 = 9 bits offset = 13 bits
page offsetpage number
Advanced Operating Systems 25
2-level address translation example
...
...
p1 = 10 bits p2 = 9 bits offset = 13 bits
page offsetpage number
...
0
1
p1...
01
p2
19physical address
1st level page table
2nd level page table
main memory
01
framenumber
13Pagetablebase
...
...
Advanced Operating Systems 26
Implementing page tables in hardware Page table resides in main (physical) memory CPU uses special registers for paging
o Page table base register (PTBR) points to the page tableo Page table length register (PTLR) contains length of page table:
restricts maximum legal logical address Translating an address requires two memory accesses
o First access reads page table entry (PTE)o Second access reads the data / instruction from memory
Reduce number of memory accesseso Can’t avoid second access (we need the value from memory)o Eliminate first access by keeping a hardware cache (called a
translation lookaside buffer or TLB) of recently used page table entries, usually inside MMU.
Advanced Operating Systems 27
Translation Lookaside Buffer (TLB)Associated Memory
Search the TLB for the desired logical page numbero Search entries in parallelo Use standard cache techniques
If desired logical page number is found, get frame number from TLB
If desired logical page number isn’t foundo Get frame number from page table
in memoryo Replace an entry in the TLB with the
logical & physical page numbers from this reference
Logicalpage #
Physicalframe #
Example TLB
8
unused
2
3
12
29
22
7
3
1
0
12
6
11
4
Advanced Operating Systems 28
Handling TLB misses If PTE isn’t found in TLB, OS needs to do the lookup
in the page table Lookup can be done in hardware or software Hardware TLB replacement
o CPU hardware does page table lookupo Can be faster than softwareo Less flexible than software, and more complex hardware
Software TLB replacemento OS gets TLB exceptiono Exception handler does page table lookup & places the
result into the TLBo Program continues after return from exceptiono Larger TLB (lower miss rate) can make this feasible
Advanced Operating Systems 29
Inverted page table Reduce page table size further: keep one entry for each
frame in memory PTE contains
o Virtual address pointing to this frameo Information about the process that owns this page
Search page table byo Hashing the virtual page number and process IDo Starting at the entry corresponding to the hash resulto Search until either the entry is found or a limit is reached
Page frame number is index of PTE Improve performance by using more advanced hashing
algorithms
Advanced Operating Systems 30
Inverted page table architecture
pid1
pidk
pid0
process ID p = 19 bits offset = 13 bits
page number
1319physical address
inverted page table
main memory
...
01
...
Page framenumber
page offset
pid p
p0
p1
pk
...
...
01
k
search
k
pid1
pidk
pid0 p0
p1
pk
Courtesy University of PITTSBURGH
Advanced Operating Systems 31
ENDEND