advanced design system 2009 the hf/hi-speed co-design...

Copyright © 2009 Agilent Technologies, Inc.

Advanced Design System 2009The HF/Hi-speed Co-design Platform


ADS 2009 enables Co-Design of RFIC, Package, Module and RF Board

Mounted on Board

•System design (numeric domain) •Circuit simulation

– Frequency domain– Time domain– Multi-technology Support (MTS)

•Electromagnetic (EM) simulation– 3D planar– 3D full wave

•Co-simulation / co-optimization

•Signal & power integrity simulation•Modeling from measurements: X-parameters

•Verification against RF / hi-speed standards•Unified design database

IC Design

Packaged IC


2009年2月17日星期二3

ADS 2009:The Most Complete Signal Integrity Analysis

• All new Channel Simulator– Million-bit-per-minute

throughput– 1000 faster than SPICE– Extracts impulse response

model from ADS schematics and layouts

• All new Eye Probe– Fast eye diagram

measurements– Complements Channel

Simulator– Interactive “what if” analysis of

Tx, channel, Rx



ADS 2009 Adds New Signal Integrity Models

• Causal multilayer models using a fast (Svensson/Djordjevic) loss model

• Causality-corrected microstrip and stripline models

• Causal, passive netlists from S-parameters using unique pole-zero placement algorithm in Broadband Spice Model Generator

• Import HSPICE PRBS patterns without rework– Use new HSPICE-

compatible .pat statement

Causal response (red) using new dielectric model versus standard non-causal model (blue)

Example of the new Svennson/Djordjevic-enabled substrate



ADS 2009: Signal Integrity Simulation and Data Display Enhancements• Accelerate transient simulations 4

with massively parallel, many-core processing on NVIDIA Tesla GPU-enabled computers

• Multi-threaded impulse characterization for faster Convolution Simulator

• On-the-fly jitter analysis with instrument-like eye diagram

Tesla C1060 GPU accelerator from NVIDIA


6

N-core CPU Performance: With and Without GPU

Speedups (all relative to 1-core CPU with no GPU) based on 26 circuits, ranging from 900 to 103,000 BSIM4 FETs

Average

Peak

1 core 2 core 4 core 8 coren-core CPU, no

GPU1.0x (ref.) 1.9x 3.1x 4.5x

n-core CPU+one GPU

4.1x 5.2x 5.9x 5.8x

GPU advantage 4.1x 2.8x 1.9x 1.3x

1 core 2 core 4 core 8 coren-core CPU, no

GPU1.0x (ref.) 2.5x 3.5x 5.7x

n-core CPU+one GPU

5.5x 7.3x 8.3x 8.0x

GPU advantage 5.5x 3.7x 2.4x 1.6x



ADS 2009: Signal Integrity Workflow with Allegro Design Flow Integration• Enhanced data transfer from Allegro

– Now imports lumped elements as well as traces and vias

– Package, PCB, and SIP artwork and schematics

• Port resequence utility– Simplifies import of critical nets from

Allegro– Supports predictive post-layout

simulation of channel response, crosstalk, and EMI/EMC using Momentum


ADS 2009:Signal Integrity Enhancements Summary

•Channel Simulator

•GPU Accelerated Transient Simulator

•New, fast eye diagram measurements

•Djordjevic loss model for fast, causal multilayer models

•Causality-corrected microstrip and stripline models

•Threaded impulse characterization for faster convolution


Simulation with X-ParametersBreakthrough Nonlinear Behavioral Models from direct measurement

• X-parameters are mathematically correct superset of S-parameters, applicable to both large-signal and small-signal conditions, for linear and nonlinear components

• Cascadable• Valid across wide impedance range with load pull• You can measure, model, & simulate with X-parameters for fast and

accurate non-linear RF design• Reduces risk of failure by designing with off-the-shelf proven components


Simulation Advancements

• X-parameters simulation

• Multi-threaded harmonic balance, up to 2x faster

• Support HSPICE .pat statement for complex sources

• Periodic & Arbitrary Jitter Analysis

• Synthesis of Stripline and suspended Stripline in passive design guide

• Wireless Libraries updated WiMedia v1.2, 3GPP/ LTE MIMO v8.3.0 & v8.4.0 Simulated vs. measured

Power contours (left) and PAE contours (right) with X-parameter models


• Improved Broadband Spice Model Generator guarantees passivity and causality

• Enhanced layout & SMT connectivity transfer from Allegro PCB, APD, SIP for EM-circuit co-simulation

• Improved mesher and solver accuracy for RFIC

• Intuitive port numbering for S-parameters interpretation

• Fast up/downlayer viewing

3D Planar EM Momentum G2 Enhancements


Electromagnetic Design System EMDS G2Enhanced 3D components, Faster Simulation• 3D parameterized components

• Fast parameterized geometry setup for analysis and optimization

• Fast frequency sweep for iterative solver• Locates all resonances across the

full simulation frequency range• Symmetry planes

• Double simulation speed with half the memory for symmetrical structures


• DRC for Flattened Layout

• Device level DRC now possible for both hierarchical & flattened layouts

• Integration with external DRC tools

• Mentor Calibre

• Cadence Assura

• Triquint MailDRC

• Allows ADS layout to view, edit and fix errors reported from external DRC tools

Layout DRC Enhancements


• New statistics and DOE tab for Variable Setup dialog

• Data Display snap-to-grideasy alignment

Usability Enhancements

• 50 new ADS examples


ADS 2009 Enables HF/Hi-Speed Co-Design with:Momentum G2 Planar 3DEM• Improved meshing • Improved resistance modeling• Port re-sequence for easy S-Parameter

interpretation• Substrate stack driven viewing utilities• Enhancements to Broadband Spice Model

Generator for passivity and causality

Physical Layout• DRC for Flattened Layout• DRC 3rd-party integration (Assura, Calibre,

MailDRC)• PDK Builder for Schematic• Enhanced layout and SMT connectivity transfer

from Allegro PCB, APD and SIP

Usability• AEL Debugger for ADS customization• Data Display snap-to-grid alignment• New 50 ADS examples• Direct drawing of pass-fail limit lines on plots• Fast variable setup tab for statistics and DOE

simulation

Signal Integrity• Channel Simulator• GPU Accelerated Transient Simulator• New, fast eye diagram measurements• Djordjevic loss model for fast, causal

multilayer models• Causality-corrected microstrip and

stripline models• Threaded impulse characterization for

faster convolution

Simulation• Support HSPICE .pat statement• Arbitrary Jitter Analysis• Multi-threaded harmonic balance• Improved Passive Circuit Design Guide• Wireless Libraries (WiMedia v1.2, 3GPP/

LTE MIMO v8.3.0 & v8.4.0)• Pole-zero custom frequency-dependent

voltage and current sources

EMDS G2 full 3DEM• 3D parameterized components• Improved mesher and solver• Fast frequency sweep for iterative solver• Symmetry planes

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