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Course Content: ADVANCED CMOS TECHNOLOGY 2018 (The 14/10/7 nm Nodes) May 2, 3, 4, 2018, Milpitas California 1. Detailed step-by-step 14/10 nm FinFET fabrication process (front-end & back-end) 2. FinFET manufacturing issues and solutions 3. 7/5 nm Nanowire fabrication 4. Planar Flash & DRAM Memory Fabrication 5. Detailed 3D Flash fabrication process flow and discussion of manufacturing issues 6. Future memory technologies 7. Extensive SEM/TEM Survey of Leading-edge devices 8. 3D Packaging Versus 3D Monolithic packaging status update 9. CMOS Technology Forecast: 5 nm, 3.5 nm, 2.5 nm nodes COURSE CONTENT IS UPDATED & TECHNICALLY CURRENT THROUGH MAY 2018 © 2018 Threshold Systems Inc. All rights reserved. www.ThresholdSystems.com INCLUDES: 14/10NM FINFET, 3D FLASH AND NANOWIRE FABRICATION DETAILS

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Page 1: ADVANCED CMOS TECHNOLOGY 2018 - Threshold Systemssecure.thresholdsystems.com/Portals/0/pdf/ACMOSSpring2018.pdf · 3. The 7/5 nm Node; Nanowires? • A Vertical Nanowire fabrication

Course Content:

ADVANCED CMOS TECHNOLOGY 2018(The 14/10/7 nm Nodes)May 2, 3, 4, 2018, Milpitas California

1. Detailed step-by-step 14/10 nm FinFET fabrication process (front-end & back-end)

2. FinFET manufacturing issues and solutions

3. 7/5 nm Nanowire fabrication

4. Planar Flash & DRAM Memory Fabrication

5. Detailed 3D Flash fabrication process flow and discussion of manufacturing issues

6. Future memory technologies

7. Extensive SEM/TEM Survey of Leading-edge devices

8. 3D Packaging Versus 3D Monolithic packaging status update

9. CMOS Technology Forecast: 5 nm, 3.5 nm, 2.5 nm nodes

COURSE CONTENT IS UPDATED & TECHNICALLY CURRENT THROUGH MAY 2018

© 2018 Threshold Systems Inc. All rights reserved.

www.ThresholdSystems.com

INCLUDES: 14/10NM FINFET, 3D FLASH AND NANOWIRE FABRICATION DETAILS

Page 2: ADVANCED CMOS TECHNOLOGY 2018 - Threshold Systemssecure.thresholdsystems.com/Portals/0/pdf/ACMOSSpring2018.pdf · 3. The 7/5 nm Node; Nanowires? • A Vertical Nanowire fabrication

THE 14/10/7 NM NODESAdvanced CMOS Technology

This is the one course that you need to attend this year to

learn about the key technical breakthroughs in Logic and

Memory that have enabled 14/10nm node technology, and

the manufacturing challenges of 3D Flash, 7nm FinFETs and

5nm Nanowires.

The central theme of this seminar is an in-depth presentation of the key 14/10/7nm node technical issues: FinFET fabrication, Gate-Last high-k/metal gate implementation, 3D Flash Fabrication, CD control, immersion and EUV lithography, Copper/low-k integration, 3D packaging, Monolithic 3D, and their critical processing issues. Each section of the course will present the relevant technical problems in a clear and comprehensible fashion as well as discuss the proposed range of solutions and equipment requirements necessary to resolve each of these problems.

seminar contents

introduction

© 2018 Threshold Systems Inc. All rights reserved.

DATE: MAY 2, 3, 4, 2018

1. Process integration. The 14/10 nm technology nodes represent landmarks in semiconductor manufacturing.

•Theenduringmythofatechnologynode •Marketforces:theshifttomobile •TheIdsatequation •Ion/Ioffcurves,scalingmethodology 2. Detailed 14/10nm FinFET Fabrication Sequence. The FinFet

represents a radical departure in transistor architecture. • Adetailedstep-by-step14/10nmFinFETfabricationprocess• BulkandSOIFinFETintegration• FinFETHigh-k/MetalGateintegration• Contactoptions,includingCobaltcontacts•DetailsofBack-Endmetallizationmethodologiesand air-gap dielectrics

3. The 7/5 nm Node; Nanowires? •AVerticalNanowirefabricationprocess •Keyfabricationdetailsandmanufacturingproblems •VerticalversushorizontalNanowires:advantagesand disadvantages •NanowireSCEcontrolandscaling

4. Planar Flash & DRAM Memory. •DRAMmemoryfunctionandnomenclature •DRAMscalinglimits •Thecapacitor-lessDRAMmemorycell •PlanarFlashoperation and function •PlanarFlashscaling techniques

5. 3D Flash Memory •A detailed step-by-step Samsung 3D NAND Flash fabrication process •Staircasefabricationmethodology •TheroleofALDin3DFlashfabrication •TheIntel-Micron3DNANDprocess •TheToshibaBICS3DNANDprocess

6. Advanced Lithography. •PhysicalLimitsofLithographyTools •ImmersionLithography–principlesandpractice •Double,TripleandQuadruplepatterning •EUVLithography:status,problemsandsolutions •ResolutionEnhancementTechnologies •Photoresist:chemicallyamplifiedresistissues •EmergingLithographyTechnologies(DSA,Imprintetc.)

7. Emerging Memory Technologies. •DetailedCross-point memory process flow •PhaseChangeMemory(PCRAM) •ResistiveRAM(ReRAM)–novelandcomesintwovariations •SpinTorqueTransferRAM(STT-RAM)–thebrightest prospect?

8. Survey of leading edge devices. This part of the course presents a visual feast of TEMs and SEMs of real-world, leading edge devices for Logic, DRAM and Flash memory.

9. 3D Packaging versus Monolithic 3D - which way to go? •TSVtechnology:design,processingandproduction •Interposers:theshortcutto3Dpackaging •Monolithic3Dfabricationprocesses •Annealing3DMonolithicstructures •TheInternetofThings(IoT).

10. The Way forward: a CMOS technology forecast. •ThetwopossiblepathsforwardinCMOSLogicdevicearchitecture(FinFETsvs.UTBFDSOI) •Thetransitionto3Ddevices(Logic&FlashMemory) •NewnanoscaleeffectsandtheirimpactonCMOSdevice architecture and materials •Futuredevices:Quantumwelldevices,TunnelFETsandQuantumWires •IsMoore’slawfinallycomingtoanend?

Page 3: ADVANCED CMOS TECHNOLOGY 2018 - Threshold Systemssecure.thresholdsystems.com/Portals/0/pdf/ACMOSSpring2018.pdf · 3. The 7/5 nm Node; Nanowires? • A Vertical Nanowire fabrication

DATE: MAY 2, 3, 4, 2018

1) Three days of instruction by industry experts with in-depth knowledge of the subject material.2)Asuperlativesetoffull-colornotesincludingSEM&TEMmicrographsofreal-worlddevicestructuresthatillustratekeytechnical

features and manufacturing challenges.3)Continentalbreakfast,hotbuffetlunchandmorningandafternoonrefreshmentsserveddaily.

• EquipmentSuppliers&MetrologyEngineers• Fabless Design Engineers and Managers• Foundry Interface Engineers and Managers• DeviceandProcessEngineers• Design Engineers

• ProductEngineers• ProcessDevelopment&ProcessIntegrationEngineers• ProcessEquipment&MarketingManagers• MaterialsSupplierMarketingManagers&Applications

Engineers

Dr. Moshe Preil isaworld-classlithographerwithover30yearsofexperienceinthefield.HehasworkedatAMD,Luminescent, ASML and most recently he was the Manager of Emerging Lithography Technology at Global Foundries. CurrentlyheistheaSeniorMarketingManagerinthePatterningDivisionatKLA-Tencor.Hehasleadteamstaskedwithinvestigatingstate-of-the-artLithographytoolsandprocessessuchasDirectedSelfAssembly(DSA),e-BeamDirectWrite(EBDW)andmanagedanEUVlithographytool.Adramaticandengagingpublicspeaker,Dr.Preilhastaughtnumerouscoursesonthesubjectofopticallithography,haspublishedextensivelyinthisfield,andiswidelyregardedas a gifted and inspiring instructor.

Dick James is the Technology Analyst Emeritus for TechInsights, an Ottawa, Canada-based reverse engineering com-panythatspecializesinsemiconductorsandelectronicsystems.

DickjoinedTechInsightspredicessor,Chipworks,in1995andactsasaconsultanttoTechInsights’staffandcustom-ers,dealingwith themicrostructural characterizationofdevices,bothprocess andpackaging.He is alsoamuchsought-afterspeakerat technicalconferencesandapopularbloggeratTechInsights.comandElectroIQ.com,andother publications.

Dick graduated in 1971 with a M.Sc. in Microelectronics and Semiconductor Devices from the University of Southamp-toninEngland,andaB.Sc.inAppliedChemistryfromtheUniversityofSalford.Hehasover40years’experienceinprocess development, design, manufacturing, packaging and reverse engineering of semiconductor devices.

Jerry Healey has been a technical professional in the semiconductor industry for over 25 years, 8 years of which were spent as a Device Engineer at Motorola Semiconductor. He was formerly an instructor for UC BerkeleyExtension(CollegeofEngineering),andwasalsoemployedasaProcessIntegrationEngineeratbothSematechandthe Advanced Technology Development Facility, where he worked on advanced technology node development.

Heisarenownedlecturerinthefieldofsiliconprocessing,andhisareasofexpertiseincludeprocessintegration,technologytransferofnewprocessesfromR&Dintomanufacturing,3DPackagingversus3DMonilithicPackaging,and FinFET fabrication. His audiences remember him for the breadth of his knowledge regarding semiconductor manufacturing, his engaging lecture style, and the insightful color graphics he uses to illustrate his lectures.

Thebestinstructorsinthebusinesswillbeteachingthiscourse.Alloftheinstructorsareworld-classexpertsintheirfields,withdecadesof industry experience. However, these presenters have been selected not just for their deep technical expertise, but also for their ability to present complex technical information in a clear and engaging manner. Each of these instructors is an experienced and skilled public speaker, and the accompanying course notes for this seminar are profusely illustrated with high-quality 3D color graphics and relevant SEMsandTEMs.Wewantyoutoleavethiscoursewithaclearunderstandingofthekeyenablingtechnologiesthathavemadethe14/10/7nm node technologies a reality, as well as an understanding of what the central technical challenges are for the 10/7 nm nodes. After you have completed this course you will never again leave a meeting wondering what people were talking about.

course instructors

Tuitionwho should attend

what’s included

Threshold Systems, Inc.,

527QueenAnneCourt,

San Antonio, TX 78229

512-576-6404www.ThresholdSystems.com

SEMI HEADQUARTERS, 673 SOUTH MILPITAS BLVD. MILPITAS, CA, 95035, USA

$1,795

© 2018 Threshold Systems Inc. All rights reserved.