Chapter 3: 8088/80x86 Addressing

Modes

Qi Cheng

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Chapters 3: Overview

• Memory/IO addressing details focus on locations of two operands

• Instruction addressing

• Stack addressing

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3.4 MOV Instruction

MOV Destination, Source (Move byte or word data)

Note: Destination and Source should be of the same size.

e.g., MOV AL,30H ; AL 30HMOV DL,AL ; DL AL

but notMOV DX,AL ; illegal

Note that MOV DS,1000H is an illegal instruction (not defined).

initializing segment register:

MOV AX,1000HMOV DS,AX

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3.5 Addressing Modes

way to define addresses of operands

By default, CPU uses DS as segment register (because operands are data), and offset should be specified in instructions.

BP and SP use SS as segment register.

Physical address: combination of segment register content and an offset

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(1) Immediate addressing

Example: What is the function of MOV CX,7?Sol: CX=16bit, then 7=0007H,

Machine code: B9 07 00 (3 bytes)

(2) Register addressing

Example: If AX=1000H, BL=80H, what is the result of MOV AL,BL?Sol: BLAL, result is AX=1080H.

Machine code: 88 B8 (2 bytes)

3.5 Addressing Modes

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3.5 Addressing Modes

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3.5 Addressing Modes

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(3) Direct addressing (square brackets refer to memory location(s))

Example: MOV [7000H],AX ? If DS=1000H.Sol:

copy 16-bit number in AX 2 memory locations DS:7000H, DS:7001H

but where?

Physical address=10000H+7000H=17000H.

Result: copy AL to 17000H and AH to 17001H.

Machine code: A3 00 70 (3 bytes)

3.5 Addressing Modes

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3.5 Addressing Modes

MOV [7000H],BX ? If DS=1000H.

Can you have MOV 7000H,BX ? Why?

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(4) Register indirect addressing (square brackets refer to memory location(s))

Example: Assume that SI=2000H, DS=0800H. MOV DL,[SI] ?Sol:

copy 8-bit number in a memory location DL

but where?

Physical address = 08000 H+2000H = 0A000H.

Result: copy the number in 0A000H to DL

Machine code: 8A 14 (2 bytes)

MOV DL, ES:[SI] ?MOV ES:[DI],AL ?

3.5 Addressing Modes

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(5) Based addressing (square brackets refer to memory location(s))

Example: MOV AX,[BX+4] ? if DS=0100H, BX=0600H.Sol:

copy 16-bit number in 2 memory locations AX

but where?

Physical address=01000H+0600H+0004H=01604H

Result: copy the number in 01604H to AL the number in 01605H to AH

Machine code: 8B 47 04 (3 bytes)

3.5 Addressing Modes

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(5) Based addressing (square brackets refer to memory location(s))

Example: MOV AX,[BP+4] ? if SS=0200H, BP=0100H.Sol:

copy 16-bit number in 2 memory locations AX SS:0104H, SS:0105Hbut where?

Physical address=02000H+0100H+00004H=02104H

Result: copy the number in 02104H to AL the number in 02105H to AH

Machine code:

3.5 Addressing Modes

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3.5 Addressing Modes

More examples on segment override prefix:

MOV AX, [3000H] ( AX 16-bit number in DS:3000H, DS:3001H)

MOV AX, ES:[3000H] ( AX 16-bit number in ES:3000H, ES:3001H)

MOV AX, SS:[3000H] ( AX 16-bit number in SS:3000H, SS:3001H)

MOV AX, CS:[3000H] ( AX 16-bit number in CS:3000H, CS:3001H)

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3.5 Addressing Modes

Examples for arithmetic/bit instructions

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3.5 Addressing Modes

Examples for program transfer instructions

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(7) Indexed addressing (left as exercise)

(8) Based indexed addressing (left as exercise)

(9) Based indexed with displacement addressing (left as exercise)

(10) String addressing

MOVSB move a string one byte

before after

SI 8760H 8761HDI 7860H 7861HDS not affected in this exampleES not affected in this example

3.5 Addressing Modes (week 5)

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3.5 Addressing Modes

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(11) Port addressing (review)

8088IN AL,40HOUT 80H,AL

Total no. of ports is 256.

80x86 MOV DL,80HIN AX,38HOUT DL,AX

Total no. of ports is 65,536.

(12) 32-bit addressing

not covered in this subject

3.5 Addressing Modes

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3.5 Addressing Modes (supp.)

(1) Instruction addressing: way to specify the address of next instructions

JMP, JZ,…CALLRET, IRET

CPU uses CS and IP to generate address of instructions. Continuous execution of instructions is accomplished by adjusting IP

(2) Stack addressing: way to specify the address of data in stackPUSH, POP

CPU uses SS and SP to generate address of top memory location in stack.

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Instruction Addressing

Use of CS & IP

3.5 Addressing Modes (supp.)

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Stack Addressing

Use of SS & SP

3.5 Addressing Modes (supp.)

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Stack Addressing

Use of SS & SP

3.5 Addressing Modes (supp.)

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Summary—direct & indirect addressing

Direct ---the instruction specifies the addressIndirect ---the instruction specifies where to find the address

Memory indirect---A memory location contains the addressRegister indirect---A register contains the address

Indirect addressing is needed for array/list processing

Summary—register indirect addressing

[BX],[BP] Based [SI],[DI] Index[BX+disp],[BP+disp] Based + displacement [SI+disp],[DI+disp] Index + displacement

3.5 Addressing Modes (summary)

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3.5 Addressing Modes (summary)

Type of Memory Reference Default Segment Base Alternate Segment Base Offset

Instruction Fetch/Program transfer CS None IP

Stack Operation SS None SP

Data Transfer (except following) DS CS, ES, SS Physical Address

- String Source DS CS, ES, SS SI

- String Destination ES None DI

- BP used as Base Register SS CS, DS, ES Physical Address

- BX Used as Base Register DS CS, ES, SS Physical Address

Type of Memory Reference Default Segment Base Alternate Segment Base Offset

Arithmetic operations DS IP

Logic operations DS SP

Shift/rotate operations DS CS, ES, SS Physical Address

CS, ES, SS

CS, ES, SS

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Chapter 3: Summary

1 Addressing modes