acer aspire 3000 5000 quanta zl5

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5 5 4 4 3 3 2 2 1 1 D D C C B B A A REV 3B MB ASSY'S P/N : 31ZL5MB0009 PROJECT : ZL5 REV: APPROVE BY: SAINT LIN DRAWING BY:DILBERT YU MODEL: TO ZL5 MotherBoard PROJECT LEADER: SAINT LIN DOCUMENT NO: 2 CHANGE LIST: DATE :2005/3/9 FROM COVER SHEET 1 OF 1 PAGE MODEL : ZL5 MB FIRST RELEASE 1A 1 3 4 5 9 8 6 7 10 11 13 12 17 16 15 14 21 20 19 23 18 24 22 25 26 2A 19. L7, L8, L9, L10, L11, L12, L13, L14, L15, L16, L18, L24, L26, L27, L40, L43, L47, L48, L49, L50 change P/N to CX0QNT03004 12. Page21 : SW2, SW3 change P/N to DHPPS11BD0 20. PQ3, PQ4, PQ5, PQ6, PQ8, PQ9, PQ10, PQ12, PQ13, PQ14, PQ15, PQ16, PQ18, PQ24, PQ32, PQ33, PQ35, Q2, Q3, Q4, Q5, Q6, Q8, Q9, Q11, Q26, Q27, Q34 change P/N to BAM70020074 04. Page9 : Change R20 to 6.2K, Unstaff C13 18. U20 change P/N to AJ007600T25 06. Page11 : RN5, RN7, RN8, RN11, RN20, RN21 change P/N to CJ282084N01 01. Page2 : Unstaff R202 for correct clock setting 17. Delete JP1, JP2 ~ JP6 11. Page20 : Cancel the HOLD# ciruit (Unstaff R95, R111, D5, D7, Q17, Staff Q15, R99) 14. Page23 : PR63 change to 11K/F; PD15 change P/N to BC10QS04C01; Staff PC77 1000P 02. Page3 : Delete JP2, Unstaff C561 and C559 ~ C562, C567 change P/N to CH6101M9A07 due to the height limitaion 07. Page12 : Modify the power good circuit (Delete D15, Add R402, R403) 09. Page17 : CN7, CN8 change footprint 08. Page16 : Modify the lan led circuit to fit to the right led color definition (R350, R353 change to pull high, Add D26, D27, CN3 change footprint) 13. Page22 : Add PR123, PD16, PC149; PD13 change P/N to BC05FA20Z01; PU12 change P/N to AL001999W16 03. Page5 : Change DDR MD terminator resistor array to 56ohm 4P2R type 05. Page10 : Modify the CRT circuit due to the bad signal quality of CM2009 (Delete U1, Add D25, D28 ~ D32, Q35, Q36, R405, R404, R406, U31, U32) 10. Page19 : HOLE25 change to TOP layer 15. Page25 : PL8, PL9 change size to RC0805; PD8, PD9 change P/N to BC10QS04C01 16. Page26 : Unstaff PQ4; PR101, PR105 change P/N to CS31003B919; PU9 change P/N to AJ017720W06 3A 01. Page2 : Staff R176 33ohm for 302ELV clock 03. Page9 : Staff R295(0ohm), R294 change P/N to CS00002JB03, Unstaff Y4, C31, C554 for 302ELV clock; Add C710 ~ C713, R407 ~ R410 for EMI reserved. 05. Page12 : C633, C634 change P/N to CH01806JB07 to adjust RTC accuracy; Add JP1 for RTC reset 07. Page17 : Unstaff CN8, CN10; Add C700 ~ C708 for EMI 08. Page19 : Delete HOLE18; Staff PAD4 for modem cable 06. Page15 : Add C709 04. Page10 : D17 change p/n to BC05FA20Z01 to enlarge the current limit; L1 ~ L3 change p/n to CX808600101 for EMI 02. Page4 : Staff C131, C175, C188, C189 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 05. Q2, Q3, Q4, Q5, Q6, Q8, Q9, Q11, Q18, Q26, Q27, Q34, Q35, Q36, PQ3, PQ4, PQ5, PQ6, PQ8, PQ9, PQ10, PQ12, PQ13, PQ14, PQ15, PQ16, PQ18, PQ24, PQ32, PQ33, PQ35 change p/n to BAN70020Z13 04. Page22 : Unstaff PR112 for thermal shutdown working properly 03. Page19 : Staff PAD9(FDMK1004010) for EMI 02. Page18 : L54, L55 change p/n to CX8HS121001; Unstaff R260, R261, R265, R271, R278 01. Page17 : L36, R274, R279 change p/n to CX8HS121001; Staff R270, R273 100pF Quanta Computer Inc.

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MODEL:

REV:

CHANGE LIST:

MODEL : ZL5 MB PAGE1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

1A 2A

FIRST RELEASE 01. Page2 : Unstaff R202 for correct clock setting 02. Page3 : Delete JP2, Unstaff C561 and C559 ~ C562, C567 change P/N to CH6101M9A07 due to the height limitaion 03. Page5 : Change DDR MD terminator resistor array to 56ohm 4P2R type 04. Page9 : Change R20 to 6.2K, Unstaff C13 05. Page10 : Modify the CRT circuit due to the bad signal quality of CM2009 (Delete U1, Add D25, D28 ~ D32, Q35, Q36, R405, R404, R406, U31, U32) 06. Page11 : RN5, RN7, RN8, RN11, RN20, RN21 change P/N to CJ282084N01 07. Page12 : Modify the power good circuit (Delete D15, Add R402, R403) 08. Page16 : Modify the lan led circuit to fit to the right led color definition (R350, R353 change to pull high, Add D26, D27, CN3 change footprint) 09. Page17 : CN7, CN8 change footprint 10. Page19 : HOLE25 change to TOP layer 11. Page20 : Cancel the HOLD# ciruit (Unstaff R95, R111, D5, D7, Q17, Staff Q15, R99) 12. Page21 : SW2, SW3 change P/N to DHPPS11BD0 13. Page22 : Add PR123, PD16, PC149; PD13 change P/N to BC05FA20Z01; PU12 change P/N to AL001999W16 14. Page23 : PR63 change to 11K/F; PD15 change P/N to BC10QS04C01; Staff PC77 1000P 15. Page25 : PL8, PL9 change size to RC0805; PD8, PD9 change P/N to BC10QS04C01 16. Page26 : Unstaff PQ4; PR101, PR105 change P/N to CS31003B919; PU9 change P/N to AJ017720W06 17. Delete JP1, JP2 ~ JP6 18. U20 change P/N to AJ007600T25 19. L7, L8, L9, L10, L11, L12, L13, L14, L15, L16, L18, L24, L26, L27, L40, L43, L47, L48, L49, L50 change P/N to CX0QNT03004 20. PQ3, PQ4, PQ5, PQ6, PQ8, PQ9, PQ10, PQ12, PQ13, PQ14, PQ15, PQ16, PQ18, PQ24, PQ32, PQ33, PQ35, Q2, Q3, Q4, Q5, Q6, Q8, Q9, Q11, Q26, Q27, Q34 change P/N to BAM70020074

FROM3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A

TO3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 3B 3BB C D

D

ZL5 MotherBoard

C

3A

01. Page2 : Staff R176 33ohm for 302ELV clock 02. Page4 : Staff C131, C175, C188, C189 03. Page9 : Staff R295(0ohm), R294 change P/N to CS00002JB03, Unstaff Y4, C31, C554 for 302ELV clock; Add C710 ~ C713, R407 ~ R410 for EMI reserved. 04. Page10 : D17 change p/n to BC05FA20Z01 to enlarge the current limit; L1 ~ L3 change p/n to CX808600101 for EMI 05. Page12 : C633, C634 change P/N to CH01806JB07 to adjust RTC accuracy; Add JP1 for RTC reset 06. Page15 : Add C709 07. Page17 : Unstaff CN8, CN10; Add C700 ~ C708 for EMI

B

08. Page19 : Delete HOLE18; Staff PAD4 for modem cable 3B 01. Page17 : L36, R274, R279 change p/n to CX8HS121001; Staff R270, R273 100pF 02. Page18 : L54, L55 change p/n to CX8HS121001; Unstaff R260, R261, R265, R271, R278 03. Page19 : Staff PAD9(FDMK1004010) for EMI 04. Page22 : Unstaff PR112 for thermal shutdown working properly 05. Q2, Q3, Q4, Q5, Q6, Q8, Q9, Q11, Q18, Q26, Q27, Q34, Q35, Q36, PQ3, PQ4, PQ5, PQ6, PQ8, PQ9, PQ10, PQ12, PQ13, PQ14, PQ15, PQ16, PQ18, PQ24, PQ32, PQ33, PQ35 change p/n to BAN70020Z13

A

A

PROJECT : ZL5

APPROVE BY: SAINT LIN PROJECT LEADER: SAINT LIN3

DRAWING BY:DILBERT YU DOCUMENT NO:2

REV 3B COVER SHEET 1 OF 1 DATE :2005/3/91

Quanta Computer Inc.5

MB ASSY'S P/N : 31ZL5MB00094

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HOST 200MHz ZCLK 133MHz

CPUDDR SO-DIMMPage 5

CLK-GENICS 952801D

AGP 66MHz PCI 33MHz USB 48MHz REF 14.318MHz

DDR 333

AMD Athlon64SMT uPGA754Page 3,4

ZL5ThermalThermal sensor & Fan

Block DiagramD

Page 2

HyperTransport 16x16 1600MT/s

NB3V_ALWAYS 5VPCU 3V_S5

RGB INTA# DVO

1x D-SUB 15-PinPage 10

CRT LCD

SIS M760GX(698 PIN BGA)Page 6,7,8

LVDS TransmitterSIS302ELVPage 9

LVDS

15" XGA/WXGAPage 10

3V/5VC

1.8V_S5 3VSUS 5VSUS +3V +5V 15VPage 22

MuTIOL(1GB/s)

REQ0#, GNT0# IDSEL : AD22 INTB#, INTC# PCI 2.2 133MB/s (33MHZ) REQ1#, GNT1# IDSEL : AD17 INTD# WLAN 802.11A/G Page 15

C

Primary MasterPage 19

HDD

ATA 66/100

SBSIS 963L(371 PIN BGA)

Mini PCI

Antenna PC Card1x type-I/II

Secondary MasterPage 19

ODD USB

ATA 66/100

CardBusTI PCI1410Page 14

2.5VSUS

3x connectorPage 15

USB 2.0 MII RTL8201CPPage 16 Page 15

2.5V/1.25VB

1.25VREF +2.5V DDR_VTT (BLUETOOTH)

LAN PHY

TransformerPage 16

RJ-45

MINI USB

Page 16

Page 23

AC'97 2.1

56K MODEMPage 17

MDC1.5

RJ-11

Page 16

B

1.2V/1.5V 1.8VPage 24

+1.2V_HT +1.5V +1.8V LPCPage 17 Page 11,12,13

MIC-In Jack AC97 CodecALC203

Line-In Jack AMP HP-Out Jack Int. Speaker

Int. Keyboard

MAX9755Page 18

CPU COREPage 25A

VCC_CORE

87-Key

Page 21

EC NS PC97551 BIOSPage 20 Page 20

Touch Pad6-ButtonPage 21

A

BATTERY CHARGERPage 26Size Date:8 7 6 5 4 3 2

PROJECT : ZL5

Quanta Computer Inc.Document Number

BLOCK DIAGRAMThursday, March 10, 2005 Sheet 11

Rev 3B of 26

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+3V L23 FBM2125 VCC3_CLKGN C281D

U12 1 11 15 24 31 33 43 44 5 8 16 23 28 36 40 47 VDDREF VDDZ VDDPCI VDDPCI VDD48 VDDAGP VDDCPU VDDCPU GNDREF GNDZ GNDPCI GNDPCI GND48 GNDF GNDCPU GNDCPU

By-Pass Capacitors Damping Resistors Place Close to Clk GeneratorCPU_1T CPU_1C CPU_0T CPU_0C 42 41 46 45 MGN_CPU1T MGN_CPU1C MGN_CPU0T MGN_CPU0C R182 R174 R198 R189 15_4 15_4 15_4 15_4 CPUCLK1_H [6] CPUCLK1_L [6] CPUCLK+ [3] CPUCLK- [3]

Place Close to Clock GeneratorCPUCLK1_H CPUCLK1_L AGPCLK0 ZCLK0 ZCLK1 C313 C300 C279 C302 C297 C278 C275 C270 C261 C303 C324 C337 C317 C276 *10P_4 *10P_4 *10P_4 *10P_4 *10P_4 *10P_4 *10P_4 *10P_4 *10P_4 *10P_4 *10P_4 *10P_4 *10P_4 *10P_4C D

C288 .1U_4 C280 C277 .1U_4

C314 .1U_4 C350 .1U_4

C257 .1U_4 C301 .1U_4

.1U_4 C291 C356 .1U_4 10U/10V_8 .1U_4

AGPCLK0 AGPCLK1 ZCLK0 ZCLK1 FS0/REF0** FS1/REF0** FS2/REF0**

35 34 9 10 2 3 4 13 14 17 18 19 20 21 22 25 26

MGN_AGPCLK0 MGN_ZCLK0 MGN_ZCLK1 FS0 FS1 FS2 FS3 FS4 MGN_PCICLK1 MGN_PCICLK2 MGN_PCICLK3 MGN_PCICLK4

R147 R175 R171 R203 R204 R192 R185 R176 R143 R135 R133 R130

22_4 22_4 22_4 33_4 33_4 33_4 33_4 33_4 33_4 33_4 33_4 33_4

AGPCLK0 [6] ZCLK0 [7] ZCLK1 [11] 14M_CODEC [17] VOSCI [7] REFCLK1 [12] VOSCIE [7] VBRCLK [9] 96XPCLK [11] PCLK_MP [15] PCLK_PCM [14] PCLK_591 [20]

96XPCLK PCLK_MP PCLK_PCM PCLK_591 VBRCLK REFCLK1 VOSCI VOSCIE UCLK48M

+3V

R205 4.7K_4 [12] CPUSTP# +3VC

R197 R156

*0_4 10K_4 MGN_PD#

48 37

CPUSTOP#* PD#*

+3V [12] STP_PCI# STP_PCI# +3V

R158 R153

4.7K_4 *0_4

FS3/PCICLK_F0** FS4/PCICLK_F1** PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4 PCICLK5 PCICLK6 PCICLK7

12

PCI_STOP#* 48MHz 24_48MHz

30 29

CLK48M

R140

22_4

UCLK48M [13]

L22 FBM2125 C289 .1U_4

VCC3_CLKGN_VDDA C284 .1U_4 C292 10P_4

38

VDDA SCLK SDATA 32 27 SMBCLK [5,12] SMBDAT [5,12] +3V

Frequency SelectionR202 R191 R184 R155 R150 *2.7K_4 2.7K_4 *2.7K_4 *2.7K_4 *2.7K_4 FS0 FS1 FS2 FS3 FS4 R201 R190 R183 R154 R149 *2.7K_4 *2.7K_4 *2.7K_4 *2.7K_4 *2.7K_4

39

GNDA

* INTERNAL PULL-HIGH 150K ** INTERNAL PULL-lOW 150K X1 X2 Y2 14.318MHz 7

+3VB

ICS952801 6

B

C355 10U/10V_8

C353 .1U_4

C354 C298 10P_4 10P_4 10P_4 C271

CLK Table for SiS M760 ( Not For ICS ICS-952801)SiS 755/M760 CLOCK (FS4) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (FS3) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 (FS2) 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 (FS1) 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 (FS0) 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1(MHz)

SiS 755/M760 CLOCK AGPCLK(MHz) (MHz)

CPU

ZCLK(MHz)

PCI

(MHz)

VCO

(FS4) 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

(FS3) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1

(FS2) 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1

(FS1) 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1

(FS0) 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1

CPU

(MHz)

ZCLK(MHz)

AGPCLK(MHz)

PCI

(MHz)

A

200 200 200 200 233 233 233 233 266 266 266 266 200 200 200 200

66.66 100 133.33 166.66 66.66 93.2 133.28 139.8 66.66 106.4 133 159.6 133 114 142 160

66.66 66.66 66.66 66.66 66.66 66.66 66.66 69.9 66.66 66.5 66.5 66.5 50 66.66 66.66 66.66

33.33 33.33 33.33 33.33 33.33 33.33 33.33 33.33 33.33 33.33 33.33 33.33 33.33 33.33 33.33 33.33

400 400 400 1000 466 466 933 699 266 532 532 798 400 800 1000 800

180 185 190 195 205 210 215 220 66.66 66.66 100 100 133 133 166 166

135 132.14 135.71 130 136.66 140 129 132 66.66 100 100 133.33 100 133.33 100 133.33

67.5 66.07 67.08 65 68.33 70 64.5 66 66.66 66.66 66.66 66.66 66.66 66.66 66.66 66.66

33.75 33.04 33.93 32.5 34.17 35 32.25 33 33.33 33.33 33.33 33.33 33.33 33.33 33.33 33.33

A

PROJECT : ZL5

Quanta Computer Inc.Size Date: Document Number

CLOCK GENERATORThursday, March 10, 20052

Rev 3B Sheet 21

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+1.2V_HT

U21A AMD K8 LDT B27 B29 C26 C28 D25 D27 D29 V_HT0_A0 V_HT0_A1 V_HT0_A2 V_HT0_A3 V_HT0_A4 V_HT0_A5 V_HT0_A6 HT_RXD15 HT_RXD14 HT_RXD13 HT_RXD12 HT_RXD11 HT_RXD10 HT_RXD9 HT_RXD8 HT_RXD7 HT_RXD6 HT_RXD5 HT_RXD4 HT_RXD3 HT_RXD2 HT_RXD1 HT_RXD0 HT_RXD#15 HT_RXD#14 HT_RXD#13 HT_RXD#12 HT_RXD#11 HT_RXD#10 HT_RXD#9 HT_RXD#8 HT_RXD#7 HT_RXD#6 HT_RXD#5 HT_RXD#4 HT_RXD#3 HT_RXD#2 HT_RXD#1 HT_RXD#0 HT_RXCLK1 HT_RXCLK0 HT_RXCLK#1 HT_RXCLK#0 HT_RXCTL1 HT_RXCTL0 HT_RXCTL#1 HT_RXCTL#0 V_HT0_B0 V_HT0_B1 V_HT0_B2 V_HT0_B3 V_HT0_B4 V_HT0_B5 V_HT0_B6 HT_TXD15 HT_TXD14 HT_TXD13 HT_TXD12 HT_TXD11 HT_TXD10 HT_TXD9 HT_TXD8 HT_TXD7 HT_TXD6 HT_TXD5 HT_TXD4 HT_TXD3 HT_TXD2 HT_TXD1 HT_TXD0 HT_TXD#15 HT_TXD#14 HT_TXD#13 HT_TXD#12 HT_TXD#11 HT_TXD#10 HT_TXD#9 HT_TXD#8 HT_TXD#7 HT_TXD#6 HT_TXD#5 HT_TXD#4 HT_TXD#3 HT_TXD#2 HT_TXD#1 HT_TXD#0 HT_TXCLK1 HT_TXCLK0 HT_TXCLK#1 HT_TXCLK#0 HT_TXCTL1 HT_TXCTL0 HT_TXCTL#1 HT_TXCTL#0 AF25 AE28 AF29 AG26 AG28 AH27 AH29 N26 L25 L26 J25 G25 G26 E25 E26 N29 M28 L29 K28 H28 G29 F28 E29 N27 M25 L27 K25 H25 G27 F25 E27 P29 M27 M29 K27 H27 H29 F27 F29

+1.2V_HT

U21C AMD K8 CTL & DBG [6] LDTREST# [6] LDTSTOP# CPU_PWROK L0_REF1 L0_REF0 COREFB COREFB# CORE_SENSE T17 T18 AF20 AE18 AJ27 AF27 AE26 A23 A24 B23 AE12 AF12 AE11 AJ21 AH21 AH19 AJ19 AH25 AJ25 CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 AE15 AF15 AG14 AF14 AG13 RESET# PWROK HT_STOP# L0_REF1 L0_REF0 COREFB COREFB# CORE_SENSE VDDIOFB VDDIOFB# VDDIO_SENSE CLKIN CLKIN# FBCLKOUT FBCLKOUT# VDDA1 VDDA2 VID0 VID1 VID2 VID3 VID4 NC_BP3 NC_BP2 NC_BP1 NC_BP0 NC_BPSCLK NC_BPSCLK# NC_PLLCHZ NC_PLLCHZ# NC_SCANCLK1 NC_SCANCLK2 NC_SCANEN NC_SCANSHENB NC_SCANSHENA NC_RSVD_SCL NC_RSVD_SDA NC_BRN# JTAG7 JTAG3 JTAG1 JTAG2 JTAG6 JTAG5 JTAG4 CLKOP1 [6] CLKOP0 [6] CLKON1 [6] CLKON0 [6] T1 CTLOP0 [6] T2 CTLON0 [6] DBRDY DBREQTMS TCK TRSTTDI TDO AH17 AE19 E20 E17 B21 A21 A22 A25 B7 B13 B18 C1 C3 C6 C9 C20 C23 C24 D3 F3 J3 NC_DCLKTWO DBRDY DBREQ# TMS TCK TRST# TDI TDO NC_A25 NC_B7 NC_B13 NC_B18 NC_C1 NC_C3 NC_C6 NC_C9 NC_C20 NC_C23 NC_C24 NC_D3 NC_F3 NC_J3 NC_SINCHN NC_ANALOG0 NC_ANALOG1 NC_ANALOG2 NC_ANALOG3 NC_K1 NC_R2 NC_R3 NC_AA2 NC_AA3 NC_AE9 NC_AE21 NC_AE22 NC_AG2 NC_AG4 NC_AG6 NC_AG7 NC_AG9 NC_AH1 NC_AF18 THERMTRIP# THERMDA THERMDC KEY0 KEY1 A20 A26 A27 AJ28 A28 THERMTRIP# THERMDA THERMDC THERMTRIP# [12]

VCC_CORE R304 *51.1/F_6 CORE_SENSE

Length < 1"CADOP[15..0] CADOP15 CADOP14 CADOP13 CADOP12 CADOP11 CADOP10 CADOP9 CADOP8 CADOP7 CADOP6 CADOP5 CADOP4 CADOP3 CADOP2 CADOP1 CADOP0 CADON15 CADON14 CADON13 CADON12 CADON11 CADON10 CADON9 CADON8 CADON7 CADON6 CADON5 CADON4 CADON3 CADON2 CADON1 CADON0 [6]

Length < 1" Width : 10milT47 T50 R305 169/F_6

Near Socket754CPU_CLK CPU_CLKFBCLKOUTC570 C569 R308 3900P_6 3900P_6 80.6/F_6 FBCLKOUTD

[6] CADIP[15..0]D

[6] CADIN[15..0]

CADIP15 CADIP14 CADIP13 CADIP12 CADIP11 CADIP10 CADIP9 CADIP8 CADIP7 CADIP6 CADIP5 CADIP4 CADIP3 CADIP2 CADIP1 CADIP0 CADIN15 CADIN14 CADIN13 CADIN12 CADIN11 CADIN10 CADIN9 CADIN8 CADIN7 CADIN6 CADIN5 CADIN4 CADIN3 CADIN2 CADIN1 CADIN0

T25 U27 V25 W27 AA27 AB25 AC27 AD25 T27 V29 V27 Y29 AB29 AB27 AD29 AD27 R25 U26 U25 W26 AA26 AA25 AC26 AC25 T28 U29 V28 W29 AA29 AB28 AC29 AD28 Y25 Y27 W25 Y28 R27 T29 R26 R29

CPUCLK+ [2] CPUCLK- [2]

VDDIO_SENSE CPU_CLK CPU_CLK-

AG18 AH18 AG17 AJ18 AJ23 AH23 AE24 AF24 D20 C21 D18 C19 B19 D22 C22 A19 C15 C18 AF21 AF22 AF23 AE23 K1 R2 R3 AA2 AA3 AE9 AE21 AE22 AG2 AG4 AG6 AG7 AG9 AH1 AF18

BP1 BP0 BPSCLK BPSCLKT49 T48 SCANCLK1 SCANCLK2 SCANEN SCANSHENB SCANSHENA T3 T51 BRNT5 SINCHN K8_ANALOG0 K8_ANALOG1 K8_ANALOG2 K8_ANALOG3

VCC_CORE R302 R297 51.1/F_6 51.1/F_6 COREFB COREFB# COREFB [25] COREFB# [25]

FBCLKOUT Diff. Pair Zdiff=80ohm FBCLKOUTCPU_VCCA CADON[15..0] [25] [25] [25] [25] [25] [6] CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4

+1.2V_HT R46 R47

Trace route as 10/10/1044.2/F_6 L0_REF1 44.2/F_6 L0_REF0

CPU_VCCA R298 R296 R312 R313 R314 R307 R303 1 3 5 7 RP49 R306 R91 2.5VSUS R300 820_4 820_4 BPSCLK BPSCLK680_4 680_4 680_4 680_4 680_4 680_4 680_4 LDTREST# LDTSTOP# THERMTRIP# BRNSINCHN DBRDY DBREQ-

Must shut down when assertedC

C

[6] CLKIP1 [6] CLKIP0 [6] CLKIN1 [6] CLKIN0 [6] CTLIP0 [6] CTLIN0

CLKIP1 CLKIP0 CLKIN1 CLKIN0 CTLIP1 CTLIP0 CTLIN1 CTLIN0

J26 CLKOP1 J29 CLKOP0 J27 CLKON1 K29 CLKON0 N25 CTLOP1 P28 CTLOP0 P25 CTLON1 P27 CTLON0

2.5VSUS

TDI 2 4 TRST6 TMS 8 680_8P4R 680_4 TDO

51.1/F_6 VDDIO_SENSE

+5V

+5V

R301

0_4

CPU_VCCA

R299

[20,26] MBCLK

3

Q8 2N7002E 1

R55 10K_4 THMCLK +3V +3V R51 200_4 T20W-THERVCC C137 2.2U_6 10K_4 U4 R67 SMCLK THMDAT MAX6648_AL# 10K_4 2 +1.2V_HT 2N7002E 3 8 7 6 5 1 THMCLK Q11 MAX6648_AL [12,20] +3V R69

B

+5V

+5V

C195 .1U_4 R61 10K_4

2

[20,26] MBDATA

3

Q9 2N7002E 1

1 THERMDA 2 3 4

VCC DXP DXN -OVT G781

1 3 5 7 RP51 1 3 5 7 RP48 1 3 5 7 RP50

K8_ANALOG2 2 K8_ANALOG3 4 K8_ANALOG1 6 K8_ANALOG0 8 680_8P4R BP1 2 BP0 4 SCANSHENA 6 SCANCLK2 8 680_8P4R SCANSHENB 2 SCANCLK1 4 TCK 6 SCANEN 8 680_8P4R

2

B

THMDAT C152 2200P_6 THERMDC

ADM1032SMDATA /MAX6657 -ALTGND

R43 R68 10K_4 +3V MAX6648_OV# [21] R44

49.9/F_6 49.9/F_6

CTLIP1 CTLIN1

+1.2V_HT C80 *4.7U/10V_8

+1.2V_HT C558 150U/4V_3528 + C94 *4.7U/10V_8 C60 *4.7U/10V_8 MAX6648_OV#

C560 *10U/6.3V_8 C63 4.7U/10V_8

CPU_VCCA

C562 10U/6.3V_8 C68 C84 C83A

C559 10U/6.3V_8 C561 *10U/6.3V_8 C76 C75 C69 C74 .22U_4 .22U_4 .22U_4 .22U_4 C567 10U/6.3V_8 C564 .22U_4 C196 3300P_4 C565 .1U_4 R84 C211 10K/F_4 470P_4 R78 10K/F_4 CPU_VCCA +3V CPU_VCCA 2 R71 330_4

.22U_4 .22U_4 .22U_4 .22U_4 .22U_4 .22U_4 .22U_4

C86 C52 C51 C81

105mA

U5 4 OUT IN SHDN 5 SET MAX8863 GND 3 1 2 C209 .01U_4 C197 .1U_4 R309 680_4 2 R310 10K_4

THERMTRIP#

R58

33_4 1 Q10

3 1999_SHT# MMBT3904

A

1999_SHT# [22]

C563 .22U_4 C71 C87 C55 + .22U_4 .22U_4 150U/4V_3528

PROJECT : ZL51 NPWROK [12] Size Date: Document Number

Max8863 Vset=1.25V V=2.55 4

CPU_PWROK

3

Quanta Computer Inc.CPU(HT LINK)Thursday, March 10, 2005 Sheet 31

MMBT3904 Q28

Rev 3B of 26

8

7

6

3

2

8

7

6

5

4

3

2

1

CPU DDR/POWER I/FB2 B4 B6 B8 B10 B12 B14 B16 B22 B25 B26 B28 C25 C27 C29 D2 D16 D19 D21 D23 D26 D28 E15 E16 E18 E22 E24 F2 F7 F9 F11 F13 F15 F17 F19 F21 F23 G6 G8 G10 G12 G14 G16 G18 G20 G22 G24 G28 H2 H7 H9 H11 H13 H15 H17 H19 H21 H23 H26 J6 J8 J10 J12 J14 J16 J18 J20 J22 J24 K2 K7 K9 K11 K13 K15 K17 K19 K21 K23 L6 L8 L10 L20 L22 L24 L28 M2 M7 M9 M21 M23 M26 N6 N8 N10 N20 N22 N24 P2 P7 P9 P21 P23 R6 R8 R10 R20 R22 R24 U21E AMD K8 GROUND VSS110 VSS1 VSS111 VSS2 VSS112 VSS3 VSS113 VSS4 VSS114 VSS5 VSS115 VSS6 VSS116 VSS7 VSS117 VSS8 VSS9 VSS118 VSS119 VSS10 VSS120 VSS11 VSS121 VSS12 VSS122 VSS13 VSS123 VSS14 VSS124 VSS15 VSS125 VSS16 VSS126 VSS17 VSS127 VSS18 VSS128 VSS19 VSS129 VSS20 VSS130 VSS21 VSS131 VSS22 VSS132 VSS23 VSS133 VSS24 VSS134 VSS25 VSS135 VSS26 VSS136 VSS27 VSS137 VSS28 VSS138 VSS29 VSS139 VSS30 VSS140 VSS31 VSS141 VSS32 VSS142 VSS33 VSS143 VSS34 VSS144 VSS35 VSS145 VSS36 VSS37 VSS146 VSS38 VSS147 VSS39 VSS148 VSS40 VSS149 VSS41 VSS150 VSS42 VSS151 VSS43 VSS152 VSS44 VSS153 VSS45 VSS154 VSS46 VSS155 VSS47 VSS156 VSS48 VSS157 VSS49 VSS158 VSS50 VSS159 VSS51 VSS160 VSS52 VSS161 VSS53 VSS162 VSS54 VSS163 VSS55 VSS164 VSS56 VSS165 VSS57 VSS166 VSS58 VSS167 VSS59 VSS168 VSS60 VSS169 VSS61 VSS170 VSS62 VSS171 VSS63 VSS172 VSS64 VSS173 VSS65 VSS174 VSS66 VSS175 VSS67 VSS176 VSS68 VSS177 VSS69 VSS178 VSS70 VSS179 VSS71 VSS180 VSS72 VSS181 VSS73 VSS182 VSS74 VSS183 VSS75 VSS184 VSS76 VSS185 VSS77 VSS186 VSS78 VSS187 VSS79 VSS188 VSS80 VSS189 VSS81 VSS190 VSS82 VSS191 VSS83 VSS192 VSS84 VSS193 VSS85 VSS194 VSS86 VSS195 VSS87 VSS196 VSS88 VSS197 VSS89 VSS198 VSS90 VSS199 VSS91 VSS200 VSS92 VSS201 VSS93 VSS202 VSS94 VSS203 VSS95 VSS204 VSS96 VSS205 VSS97 VSS206 VSS98 VSS207 VSS99 VSS208 VSS100 VSS209 VSS101 VSS210 VSS102 VSS211 VSS103 VSS212 VSS104 VSS213 VSS105 VSS214 VSS106 VSS215 VSS107 VSS216 VSS108 VSS217 VSS109 VSS218 VSS219 DDR_VTT R28 T2 T7 T9 T21 T23 T26 U6 U8 U10 U20 U22 U24 V2 V7 V9 V21 V23 W6 W8 W10 W20 W22 W24 W28 Y2 Y7 Y9 Y11 Y13 Y15 Y17 Y19 Y21 Y23 Y26 AA6 AA8 AA10 AA12 AA14 AA16 AA18 AA20 AA22 AA24 AB2 AB7 AB9 AB11 AB13 AB15 AB17 AB19 AB21 AB23 AC6 AC8 AC10 AC12 AC14 AC16 AC18 AC20 AC22 AC24 AC28 AD2 AD7 AD9 AD11 AD13 AD15 AD17 AD19 AD21 AD23 AD26 AE14 AE16 AE20 AE29 AF2 AF17 AF19 AF26 AF28 AG20 AG21 AG22 AG23 AG24 AG25 AG27 AG29 AH2 AH4 AH6 AH8 AH10 AH12 AH14 AH20 AH22 AH26 AH28 AJ20 AJ22 AJ24 AJ26 U21B AMD K8 MEMORY A18 B17 C16 C17 D17 AE13 MEMZN MEMZP MD63 MD62 MD61 MD60 MD59 MD58 MD57 MD56 MD55 MD54 MD53 MD52 MD51 MD50 MD49 MD48 MD47 MD46 MD45 MD44 MD43 MD42 MD41 MD40 MD39 MD38 MD37 MD36 MD35 MD34 MD33 MD32 MD31 MD30 MD29 MD28 MD27 MD26 MD25 MD24 MD23 MD22 MD21 MD20 MD19 MD18 MD17 MD16 MD15 MD14 MD13 MD12 MD11 MD10 MD9 MD8 MD7 MD6 MD5 MD4 MD3 MD2 MD1 MD0 DM7 DM6 DM5 DM4 DM3 DM2 DM1 DM0 DQS7 DQS6 DQS5 DQS4 DQS3 DQS2 DQS1 DQS0 T23 D14 C14 A16 B15 A12 B11 A17 A15 C13 A11 A10 B9 C7 A6 C11 A9 A5 B5 C5 A4 E2 E1 A3 B3 E3 F1 G2 G1 L3 L1 G3 J2 L2 M1 W1 W3 AC1 AC3 W2 Y1 AC2 AD1 AE1 AE3 AG3 AJ4 AE2 AF1 AH3 AJ3 AJ5 AJ6 AJ7 AH9 AG5 AH5 AJ9 AJ10 AH11 AJ11 AH15 AJ15 AG11 AJ12 AJ14 AJ16 R1 A13 A7 C2 H1 AA1 AG1 AH7 AH13 T1 A14 A8 D1 J1 AB1 AJ2 AJ8 AJ13 VTT_A1 VTT_A2 VTT_A3 VTT_A4 VTT_A5 VTT_SENSE MEMZN MEMZP MEMDATA63 MEMDATA62 MEMDATA61 MEMDATA60 MEMDATA59 MEMDATA58 MEMDATA57 MEMDATA56 MEMDATA55 MEMDATA54 MEMDATA53 MEMDATA52 MEMDATA51 MEMDATA50 MEMDATA49 MEMDATA48 MEMDATA47 MEMDATA46 MEMDATA45 MEMDATA44 MEMDATA43 MEMDATA42 MEMDATA41 MEMDATA40 MEMDATA39 MEMDATA38 MEMDATA37 MEMDATA36 MEMDATA35 MEMDATA34 MEMDATA33 MEMDATA32 MEMDATA31 MEMDATA30 MEMDATA29 MEMDATA28 MEMDATA27 MEMDATA26 MEMDATA25 MEMDATA24 MEMDATA23 MEMDATA22 MEMDATA21 MEMDATA20 MEMDATA19 MEMDATA18 MEMDATA17 MEMDATA16 MEMDATA15 MEMDATA14 MEMDATA13 MEMDATA12 MEMDATA11 MEMDATA10 MEMDATA9 MEMDATA8 MEMDATA7 MEMDATA6 MEMDATA5 MEMDATA4 MEMDATA3 MEMDATA2 MEMDATA1 MEMDATA0 MEMDQS17 MEMDQS16 MEMDQS15 MEMDQS14 MEMDQS13 MEMDQS12 MEMDQS11 MEMDQS10 MEMDQS9 MEMDQS8 MEMDQS7 MEMDQS6 MEMDQS5 MEMDQS4 MEMDQS3 MEMDQS2 MEMDQS1 MEMDQS0 VTT_B1 VTT_B2 VTT_B3 VTT_B4 VTT_B5 AF16 AG15 AG16 AH16 AJ17 DDR_VTT MD4 MD1 MD5 MD0 MD6 MD7 MD3 MD2 MD11 MD15 MD14 MD10 MD13 MD9 MD8 MD12 MD23 MD19 MD18 MD22 MD17 MD20 MD21 MD16 MD29 MD25 MD28 MD24 MD26 MD31 MD30 MD27 MD35 MD38 MD39 MD34 MD33 MD32 MD36 MD37 MD43 MD46 MD47 MD42 MD44 MD41 MD40 MD45 MD53 MD52 MD48 MD49 MD51 MD55 MD54 MD50 MD57 MD61 MD60 MD56 MD59 MD63 MD62 MD58 RP18 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 MD_4 2 MD_1 4 MD_5 6 MD_0 8 10_8P4R_4 MD_6 2 MD_7 4 MD_3 6 MD_2 8 10_8P4R_4 MD_11 2 MD_15 4 MD_14 6 MD_10 8 10_8P4R_4 MD_13 2 MD_9 4 MD_8 6 MD_12 8 10_8P4R_4 MD_23 2 MD_19 4 MD_18 6 MD_22 8 10_8P4R_4 MD_17 2 MD_20 4 MD_21 6 MD_16 8 10_8P4R_4 MD_29 2 MD_25 4 MD_28 6 MD_24 8 10_8P4R_4 MD_26 2 MD_31 4 MD_30 6 MD_27 8 10_8P4R_4 MD_35 2 MD_38 4 MD_39 6 MD_34 8 10_8P4R_4 MD_33 2 MD_32 4 MD_36 6 MD_37 8 10_8P4R_4 MD_43 2 MD_46 4 MD_47 6 MD_42 8 10_8P4R_4 MD_44 2 MD_41 4 MD_40 6 MD_45 8 10_8P4R_4 MD_53 2 MD_52 4 MD_48 6 MD_49 8 10_8P4R_4 MD_51 2 MD_55 4 MD_54 6 MD_50 8 10_8P4R_4 MD_57 2 MD_61 4 MD_60 6 MD_56 8 10_8P4R_4 MD_59 2 MD_63 4 MD_62 6 MD_58 8 10_8P4R_4 DQS_0 DM_0 DQS_3 DM_3 DQS_4 DM_4 DM_7 DQS_7 DM_1 DQS_1 DQS_2 DM_2 DM_5 DQS_5 DM_6 DQS_6

VCC_CORE U21D AMD K8 POWER B20 B24 D24 E19 E21 E23 E28 F18 F20 F22 F24 F26 G11 G13 G15 G17 G19 G21 G23 H10 H12 H14 H16 H18 H20 H22 H24 J9 J11 J13 J15 J17 J19 J21 J23 J28 K8 K10 K12 K14 K16 K18 K20 K22 K24 K26 L7 L9 L21 L23 M8 M10 M20 M22 M24 N7 N9 N21 N23 N28 P8 P10 P20 P22 P24 P26 R7 R9 R21 R23 T8 T10 T20 T22 T24 U7 U9 U21 U23 U28 V8 V10 V20 V22 V24 V26 W7 W9 W21 W23 Y8 Y10 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDD19 VDD20 VDD21 VDD22 VDD23 VDD24 VDD25 VDD26 VDD27 VDD28 VDD29 VDD30 VDD31 VDD32 VDD33 VDD34 VDD35 VDD36 VDD37 VDD38 VDD39 VDD40 VDD41 VDD42 VDD43 VDD44 VDD45 VDD46 VDD47 VDD48 VDD49 VDD50 VDD51 VDD52 VDD53 VDD54 VDD55 VDD56 VDD57 VDD58 VDD59 VDD60 VDD61 VDD62 VDD63 VDD64 VDD65 VDD66 VDD67 VDD68 VDD69 VDD70 VDD71 VDD72 VDD73 VDD74 VDD75 VDD76 VDD77 VDD78 VDD79 VDD80 VDD81 VDD82 VDD83 VDD84 VDD85 VDD86 VDD87 VDD88 VDD89 VDD90 VDD91 VDD92 VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8 VDDIO9 VDDIO10 VDDIO11 VDDIO12 VDDIO13 VDDIO14 VDDIO15 VDDIO16 VDDIO17 VDDIO18 VDDIO19 VDDIO20 VDDIO21 VDDIO22 VDDIO23 VDDIO24 VDDIO25 VDDIO26 VDDIO27 VDDIO28 VDDIO29 VDDIO30 VDDIO31 VDDIO32 VDDIO33 VDDIO34 VDDIO35 VDDIO36 VDDIO37 VDDIO38 VDDIO39 VDDIO40 VDDIO41 VDDIO42 VDDIO43 VDDIO44 VDDIO45 VDDIO46 VDDIO47 VDDIO48 VDDIO49 VDDIO50 VDD93 VDD94 VDD95 VDD96 VDD97 VDD98 VDD99 VDD100 VDD101 VDD102 VDD103 VDD104 VDD105 VDD106 VDD107 VDD108 VDD109 VDD110 VDD111 VDD112 VDD113 VDD114 VDD115 VDD116 VDD117 VDD118 VDD119 VDD120 VDD121 VDD122 VDD123 VDD124 VDD125 VDD126 VDD127 VDD128 VDD129 VDD130 VDD131 VDD132 VDD133 D5 D7 D9 D11 D13 D15 E4 F6 F8 F10 F12 F14 F16 G4 G7 G9 H6 H8 J4 J7 K6 L4 M6 N4 P6 R4 T6 U4 V6 W4 Y6 AA4 AA7 AB6 AB8 AC4 AC7 AC9 AD6 AD8 AD10 AD12 AD14 AD16 AE4 AF5 AF7 AF9 AF11 AF13 Y12 Y14 Y16 Y18 Y20 Y22 Y24 AA9 AA11 AA13 AA15 AA17 AA19 AA21 AA23 AA28 AB10 AB12 AB14 AB16 AB18 AB20 AB22 AB24 AB26 AC11 AC13 AC15 AC17 AC19 AC21 AC23 AD18 AD20 AD22 AD24 AE17 AE25 AE27 AG19 AH24

2.5VSUS

2.5VSUS

VCC_CORE

VCC_CORE

RP20

C580 + C236 + C224 C185 C173 C237 C215 C234 C232 C222 C220 C235 C216 C217 C171 C223 C208 C193 C238 C200 C191 C179 C162 C219 C218

150U/4V_3528 150U/4V_3528 *4.7U/10V_6 *4.7U/10V_6 4.7U/10V_6 4.7U/10V_6 4.7U/10V_6 4.7U/10V_6 4.7U/10V_6 4.7U/10V_6 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .22U_4 .1U_4 .1U_4 .1U_4 .22U_4 .22U_4 .1U_4 .22U_4 .1U_4

C96 C203 C202 C198 C82 C104 C204 C109 C192 C105 C199 C110 C201 C207 C123 C206 C581 C583 C584 C582 C95 C577 C106

.22U_4 .1U_4 .1U_4 .1U_4 .22U_4 .22U_4 .1U_4 .22U_4 .1U_4 .1U_4 .1U_4 .22U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .22U_4 .1U_4 .22U_4 .22U_4 .22U_4 .1U_4

C182 + C183 + C130 C177 C129 C132 C133 C176 C190 C134 C188 C189 C175 C131 C574 C575 C205 C576 C111 C107 C108

150U/4V_3528 150U/4V_3528 4.7U/10V_6 4.7U/10V_6 4.7U/10V_6 4.7U/10V_6 4.7U/10V_6 4.7U/10V_6 4.7U/10V_6 4.7U/10V_6 4.7U/10V_6 4.7U/10V_6 4.7U/10V_6 4.7U/10V_6 .1U_4 .22U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4C D

D

MEMRESET# MEMVREF1 MEMCHECK7 MEMCHECK6 MEMCHECK5 MEMCHECK4 MEMCHECK3 MEMCHECK2 MEMCHECK1 MEMCHECK0 MEMCS#7 MEMCS#6 MEMCS#5 MEMCS#4 MEMCS#3 MEMCS#2 MEMCS#1 MEMCS#0 MEMCKEB MEMCKEA MEMCLK#7 MEMCLK7 MEMCLK#6 MEMCLK6 MEMCLK#5 MEMCLK5 MEMCLK#4 MEMCLK4 MEMCLK#3 MEMCLK3 MEMCLK#2 MEMCLK2 MEMCLK#1 MEMCLK1 MEMCLK#0 MEMCLK0 MEMBANKA1 MEMBANKA0 MEMRASA# MEMCASA# MEMWEA# NC_MEMADDA15 NC_MEMADDA14 MEMADDA13 MEMADDA12 MEMADDA11 MEMADDA10 MEMADDA9 MEMADDA8 MEMADDA7 MEMADDA6 MEMADDA5 MEMADDA4 MEMADDA3 MEMADDA2 MEMADDA1 MEMADDA0 MEMBANKB1 MEMBANKB0 MEMRASB# MEMCASB# MEMWEB# NC_MEMADDB15 NC_MEMADDB14 MEMADDB13 MEMADDB12 MEMADDB11 MEMADDB10 MEMADDB9 MEMADDB8 MEMADDB7 MEMADDB6 MEMADDB5 MEMADDB4 MEMADDB3 MEMADDB2 MEMADDB1 MEMADDB0

AG10 AG12 N3 N1 U3 V1 N2 P1 U1 U2 D8 C8 E8 E7 D6 E6 C4 E5

MEMRST# 1.25VREF_CPU

T21

RP4

RP2

RP7

CS#7 CS#6 CS#5 CS#4 CS#3 CS#2 CS#1 CS#0

T12 T10 T9 T11 CS#3 CS#2 CS#1 CS#0

RP5

[5] [5] [5] [5]

RP8

AE7 CKE1 AE8 CKE0 C10 DCLK#7 D10 DCLK7 E11 DCLK#6 E12 DCLK6 AG8 DCLK#5 AF8 DCLK5 AE10 DCLK#4 AF10 DCLK4 V4 DCLK#3 V3 DCLK3 K4 DCLK#2 K5 DCLK2 P5 DCLK#1 R5 DCLK1 P4 DCLK#0 P3 DCLK0 K3 H3 H5 D4 G5 E13 C12 E10 AE6 AF3 M5 AE5 AB5 AD3 Y5 AB4 Y3 V5 T5 T3 N5 L5 J5 H4 F5 F4 E14 D12 E9 AF6 AF4 M4 AD5 AC5 AD4 AA5 AB3 Y4 W5 U5 T4 M3 MEMBAA1 MEMBAA0 RAS#A CAS#A WE#A

CKE1 [5] CKE0 [5] DCLK#7 [5] DCLK7 [5] DCLK#6 [5] DCLK6 [5] DCLK#5 [5] DCLK5 [5] DCLK#4 [5] DCLK4 [5] T22 T26 T24 T25

RP9

RP11

RP10

C

RP14

RP12

MEMBAA1 [5] MEMBAA0 [5] RAS#A [5] CAS#A [5] WE#A [5] T6 T8

RP15

RP17

MAA13 MAA12 MAA11 MAA10 MAA9 MAA8 MAA7 MAA6 MAA5 MAA4 MAA3 MAA2 MAA1 MAA0 MEMBAB1 MEMBAB0 RAS#B CAS#B WE#B

RP23

DDR_VTT

RP24 DQS0 DM0 DQS3 DM3 DQS4 DM4 DM7 DQS7 DM1 DQS1 DQS2 DM2 DM5 DQS5 DM6 DQS6

RP19 RP21 RP22 RP1 RP3 RP6 RP13 RP16

B

MEMBAB1 [5] MEMBAB0 [5] RAS#B [5] CAS#B [5] WE#B [5] T4 T7

T27

MAB13 MAB12 MAB11 MAB10 MAB9 MAB8 MAB7 MAB6 MAB5 MAB4 MAB3 MAB2 MAB1 MAB0

1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3

2 4 10_4P2R_4 2 4 10_4P2R_4 2 4 10_4P2R_4 2 4 10_4P2R_4 2 4 10_4P2R_4 2 4 10_4P2R_4 2 4 10_4P2R_4 2 4 10_4P2R_4

C422 + C579 C210 C148 C158 C156 C174 C157 C146 C163 C143 C149 C164

150U/4V_3528 10U/10V_8 10U/10V_8 .22U_4 .22U_4B

.1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4

DCLK#7 DCLK#6 DCLK#5 DCLK#4 DCLK#1 DCLK#0

R82 R76 R86 R81 R103 R104

120_4 120_4 120_4 120_4 *120_4 *120_4

DCLK7 DCLK6 DCLK5 DCLK4 DCLK1 DCLK0

Trace length between resistor & CPU must be less than 1000mil

MD_[63..0] DQS_[7..0] 2.5VSUS DM_[7..0] MAA[13..0] R89 C225 100/F_4 .1U_4 C213 R88 .1U_4 100/F_4 1000P_4 .01U_4 *100P_4 DCLK0 R108 10K_4 MEMZP R73 34.8/F_6 Size Date: Document Number 2.5VSUS MAB[13..0]

MD_[63..0] [5] DQS_[7..0] [5] DM_[7..0] [5] MAA[13..0] [5] MAB[13..0] [5]A

A

> 10mil1.25VREF_CPU C214 C591 R87 C194 *0_4 1.25VREF

DCLK#1 R107 DCLK#0 R109 DCLK1 R106

10K_4 10K_4 10K_4

Trace length < 1"MEMZN R72

2.5VSUS

PROJECT : ZL5

34.8/F_6

Quanta Computer Inc.CPU(DDR/POWER)Thursday, March 10, 2005 Sheet 41

Rev 3B of 26

8

7

6

5

4

3

2

8

7

6

5

4

3

2

1

DDR_VTT 2.5VSUS 9 10 21 22 33 34 36 45 46 57 58 69 70 81 82 92 93 94 113 114 131 132 143 144 155 156 157 167 168 179 180 191 192 2.5VSUS 9 10 21 22 33 34 36 45 46 57 58 69 70 81 82 92 93 94 113 114 131 132 143 144 155 156 157 167 168 179 180 191 192 MD_0 MD_1 MD_5 MD_4 MD_6 MD_7 MD_3 MD_2 MD_10 MD_14 MD_15 MD_11 MD_8 MD_12 MD_13 MD_9 MD_23 MD_19 MD_18 MD_22 MD_16 MD_21 MD_20 MD_17 MD_30 MD_27 MD_26 MD_31 MD_25 MD_28 MD_24 MD_29 MD_37 MD_36 MD_32 MD_33 MD_38 MD_35 MD_34 MD_39 MD_46 MD_47 MD_42 MD_43 MD_40 MD_41 MD_45 MD_44 MD_50 MD_54 MD_51 MD_55 MD_49 MD_53 MD_52 MD_48 MD_56 MD_60 MD_57 MD_61 MD_62 MD_58 MD_59 MD_63 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 RN22 56_4P2R_4 RN23 56_4P2R_4 RN24 56_4P2R_4 RN25 56_4P2R_4 RN26 56_4P2R_4 RN27 56_4P2R_4 RN28 56_4P2R_4 RN29 56_4P2R_4 RN30 56_4P2R_4 RN31 56_4P2R_4 RN32 56_4P2R_4 RN33 56_4P2R_4 RN34 56_4P2R_4 RN35 56_4P2R_4 RN36 56_4P2R_4 RN37 56_4P2R_4 RN38 56_4P2R_4 RN39 56_4P2R_4 RN40 56_4P2R_4 RN41 56_4P2R_4 RN42 56_4P2R_4 RN43 56_4P2R_4 RN44 56_4P2R_4 RN45 56_4P2R_4 RN46 56_4P2R_4 RN47 56_4P2R_4 RN48 56_4P2R_4 RN49 56_4P2R_4 RN50 56_4P2R_4 RN51 56_4P2R_4 RN52 56_4P2R_4 RN53 56_4P2R_4

2.5VSUS C373 C322 C370 C365 C390 C397 C367 C369 10U/10V_8 10U/10V_8 10U/10V_8 10U/10V_8 10U/10V_8 10U/10V_8 10U/10V_8 10U/10V_8

CN21 MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 [4] MEMBAB0 [4] MEMBAB1

CN20 MD_1 MD_4 MD_6 MD_7 MD_0 MD_5 MD_2 MD_3 MD_8 MD_12 MD_14 MD_10 MD_9 MD_13 MD_11 MD_15 MD_20 MD_17 MD_23 MD_19 MD_16 MD_21 MD_22 MD_18 MD_28 MD_25 MD_30 MD_27 MD_29 MD_24 MD_26 MD_31 MD_32 MD_33 MD_35 MD_38 MD_37 MD_36 MD_34 MD_39 MD_41 MD_40 MD_47 MD_46 MD_44 MD_45 MD_42 MD_43 MD_48 MD_52 MD_54 MD_50 MD_53 MD_49 MD_55 MD_51 MD_60 MD_56 MD_62 MD_58 MD_61 MD_57 MD_63 MD_59 MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 [4] MEMBAA0 [4] MEMBAA1

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

D

112 111 110 109 108 107 106 105 102 101 115 100 99 97 MEMBAB0 117 MEMBAB1 116 12 26 48 62 134 148 170 184 78 11 25 47 61 133 147 169 183 77 118 119 120 121 122 96 95

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 DU/A13 BA0 BA1 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DM8 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8 RAS# WE# CAS# S0# S1# CKE0 CKE1 CK0 CK0# CK1 CK1# CK2 CK2# SDA SCL CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 VREF VREF VDDSPD VDDID

UPDIMM1

DM_0 DM_1 DM_2 DM_3 DM_4 DM_5 DM_6 DM_7

C

DQS_0 DQS_1 DQS_2 DQS_3 DQS_4 DQS_5 DQS_6 DQS_7

[4] RAS#B [4] WE#B [4] CAS#B [4] [4] [4] CS#2 CS#3 CKE1

RAS#B WE#B CAS#B CS#2 CS#3

[4] DCLK4 [4] DCLK#4 [4] DCLK6 [4] DCLK#6 2.5VSUS [2,12] SMBDAT [2,12] SMBCLK

DCLK4 DCLK#4 DCLK6 DCLK#6 R206 10K_4 R212 10K_4

35 37 160 158 89 91 193 195 71 73 79 83 72 74 80 84

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 DU DU DU DU DU/RESET# DU/BA2

5 7 13 17 6 8 14 18 19 23 29 31 20 24 30 32 41 43 49 53 42 44 50 54 55 59 65 67 56 60 66 68 127 129 135 139 128 130 136 140 141 145 151 153 142 146 152 154 163 165 171 175 164 166 172 176 177 181 187 189 178 182 188 190 85 123 124 200 86 98

112 111 110 109 108 107 106 105 102 101 115 100 99 97 MEMBAA0 117 MEMBAA1 116 12 26 48 62 134 148 170 184 78 11 25 47 61 133 147 169 183 77 118 119 120 121 122 96 95

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 DU/A13 BA0 BA1 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DM8 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8 RAS# WE# CAS# S0# S1# CKE0 CKE1 CK0 CK0# CK1 CK1# CK2 CK2# SDA SCL CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 VREF VREF VDDSPD VDDID

DOWNDIMM0

DM_0 DM_1 DM_2 DM_3 DM_4 DM_5 DM_6 DM_7

DQS_0 DQS_1 DQS_2 DQS_3 DQS_4 DQS_5 DQS_6 DQS_7

[4] RAS#A [4] WE#A [4] CAS#A [4] [4] [4] CS#0 CS#1 CKE0

RAS#A WE#A CAS#A CS#0 CS#1

[4] DCLK5 [4] DCLK#5 [4] DCLK7 [4] DCLK#7 2.5VSUS [2,12] SMBDAT [2,12] SMBCLK

DCLK5 DCLK#5 DCLK7 DCLK#7 R144 10K_4 R148 10K_4

35 37 160 158 89 91 193 195 71 73 79 83 72 74 80 84

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 DU DU DU DU DU/RESET# DU/BA2

5 7 13 17 6 8 14 18 19 23 29 31 20 24 30 32 41 43 49 53 42 44 50 54 55 59 65 67 56 60 66 68 127 129 135 139 128 130 136 140 141 145 151 153 142 146 152 154 163 165 171 175 164 166 172 176 177 181 187 189 178 182 188 190 85 123 124 200 86 98

MD_1 MD_4 MD_6 MD_7 MD_0 MD_5 MD_2 MD_3 MD_8 MD_12 MD_14 MD_10 MD_9 MD_13 MD_11 MD_15 MD_20 MD_17 MD_23 MD_19 MD_16 MD_21 MD_22 MD_18 MD_28 MD_25 MD_30 MD_27 MD_29 MD_24 MD_26 MD_31 MD_32 MD_33 MD_35 MD_38 MD_37 MD_36 MD_34 MD_39 MD_41 MD_40 MD_47 MD_46 MD_44 MD_45 MD_42 MD_43 MD_48 MD_52 MD_54 MD_50 MD_53 MD_49 MD_55 MD_51 MD_60 MD_56 MD_62 MD_58 MD_61 MD_57 MD_63 MD_59

C400 C399 C392 C326 C393 C325

.1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4

D

2.5VSUS C320 C272 C259 C348 C339 C411 C395 C307 C413 C359 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4

2.5VSUS C391 C345 C269 C343 C352 C346 C262 C394 C308 C405 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4

C

2.5VSUS C282 C258 C273 C255 C330 C329 C335 C341 C347 C263 .01U_4 .01U_4 .01U_4 .01U_4 .01U_4 .01U_4 .01U_4 .01U_4 .01U_4 .01U_4

2.5VSUS DDR_VTT DM_0 DQS_0 DM_1 DQS_1 DQS_2 DM_2 DQS_3 DM_3 DM_4 DQS_4 DQS_5 DM_5 DM_6 DQS_6 DQS_7 DM_7 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 RN17 68_4P2R_4 RN16 68_4P2R_4 RN18 68_4P2R_4 RN19 68_4P2R_4 RN12 68_4P2R_4 RN13 68_4P2R_4 RN14 68_4P2R_4 RN15 68_4P2R_4 C254 C323 C351 C342 C327 C264 C331 C260 C256 C336 2.5VSUS C267 C401 C349 C318 C402 C403 C406 C404 C333 C332 C296 C328 C316 C344 1000P_4 1000P_4 1000P_4 1000P_4 1000P_4 1000P_4 1000P_4 1000P_4 1000P_4 1000P_4 1000P_4 1000P_4 1000P_4 1000P_4 .01U_4 .01U_4 .01U_4 .01U_4 .01U_4 .01U_4 .01U_4 .01U_4 .01U_4 .01U_4

B

MAB13 +3V R217 10K_4 MVREF_DM1

MAA13

B

MVREF_DM0 +3V C321 .1U_4

1 2 197 199

SA0 SA1 SA2 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

194 196 198

+3V C305 .1U_4

1 2 197 199

SA0 SA1 SA2 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

194 196 198

DDR_VTT MEMBAB1 MAB10 MAB0 MAB2 MAA13 MAA10 MAA1 MAA3 MAB4 MAB6 MAB8 MAB11 MAA5 MAA7 MAA9 MAA12 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8

3 4 15 16 27 28 38 39 40 51 52 63 64 75 76 87 88 90 103 104 125 126 137 138 149 150 159 161 162 173 174 185 186

DDR-SODIMM-STD-H4.0

3 4 15 16 27 28 38 39 40 51 52 63 64 75 76 87 88 90 103 104 125 126 137 138 149 150 159 161 162 173 174 185 186

R213 *10K_4

R132 *10K_4

DDR-SODIMM-STD-H8.0

47_8P4R_4 RN10 47_8P4R_4 RN2 47_8P4R_4 RN9 47_8P4R_4 RN1

MD_[63..0] DQS_[7..0] DM_[7..0] 2.5VSUSA

MD_[63..0] [4] DQS_[7..0] [4] DM_[7..0] [4] 2.5VSUS MAA[13..0] MAB[13..0] MAA[13..0] [4] MAB[13..0] [4] DDR_VTT DDR_VTT C454 C450 C465 C452 C451 C449 C472 C419 C474 C425 C475 C480 C468 C478 C467 C466 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 DDR_VTT C448 C441 C440 C423 C319 C471 C447 C444 C442 C455 C479 C470 C446 C445 C443 .01U_4 .01U_4 .01U_4 .01U_4 .01U_4 .01U_4 .01U_4 .01U_4 .01U_4 .01U_4 .01U_4 .01U_4 .01U_4 .01U_4 .01U_4 DDR_VTT C476 C418 C469 C285 C473 C464 C424 C457 C456 C458 C274 C439 C477 C438 1000P_4 1000P_4 1000P_4 1000P_4 1000P_4 1000P_4 1000P_4 1000P_4 1000P_4 1000P_4 1000P_4 1000P_4 1000P_4 1000P_4 DDR_VTT MAA6 MAA4 MAA8 MAA11 MAB12 MAB9 MAB7 MAB5 MEMBAB0 MAB13 MAA2 MAA0 MEMBAA1 MEMBAA0 MAB3 MAB1 1 3 5 7 1 3 5 7 1 3 1 3 1 3 1 3 2 4 6 8 2 4 6 8 2 4 2 4 2 4 2 4 47_8P4R_4 RN4 47_8P4R_4 RN6 RP28 47_4P2R_4 RP25 47_4P2R_4 RP26 47_4P2R_4 RP27 47_4P2R_4

C334 R209 1U_6 100/F_6 R208 100/F_6 C387 .01U_4 MVREF_DM0 C385 .01U_4 C398 R179 100/F_6 R146 100/F_6 C312 .01U_4 MVREF_DM1 C311 .01U_4

DDR_VTT

20milC386 .1U_4

1U_6

20milC310 .1U_4

C366 C381 C409 C315 C453

10U/10V_8 10U/10V_8 10U/10V_8 10U/10V_8 .1U_4

RAS#A WE#A CAS#A RAS#B WE#B CAS#B CS#0 CS#1 CS#2 CS#3 CKE0 CKE1

R181 R180 R200 R218 R210 R220 R145 R195 R211 R219 R137 R214

47_4 47_4 47_4 47_4 47_4 47_4 47_4 47_4 47_4 47_4 47_4 47_4

A

PROJECT : ZL5

Quanta Computer Inc.Size Date: Document Number

DDR SO-DIMMThursday, March 10, 20052

Rev 3B Sheet 51

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[3] CADIP[15..0] [3] CADIN[15..0] [3] CADOP[15..0] [3] CADON[15..0]D

CADIP[15..0] CADIN[15..0] CADOP[15..0] CADON[15..0] LTCOMPN LTCOMPP

CLKIN0 [3] CLKIP0 [3] CLKIN1 [3] CLKIP1 [3] CTLIN0 [3] CTLIP0 [3] [9] VAD[11..0] [9] VAGCLK [9] VAHSYNC [9] VAVSYNC [9] VADE

+3V A1XAVDD R62 C230 .1U_4 A1XAVSSD

0_6

C181 .01U_4

CADIP15 CADIN15 CADIP14 CADIN14 CADIP13 CADIN13 CADIP12 CADIN12 CADIP11 CADIN11 CADIP10 CADIN10 CADIP9 CADIN9 CADIP8 CADIN8 CADIP7 CADIN7 CADIP6 CADIN6 CADIP5 CADIN5 CADIP4 CADIN4 CADIP3 CADIN3 CADIP2 CADIN2 CADIP1 CADIN1 CADIP0 CADIN0

[9] VBD[11..0] +3V [9] VBGCLK [9] VBHSYNC [9] VBVSYNC [9] VBDE [9] VBCTL1 [9] VBCTL0 A4XAVDD L48 WB201209B121QNT03 C597 .1U_4 +1.8V H3 L4 N5 R4 A6 B6 L6 L1 M4 M5 M1 M2 N6 C4 A3 D6 G6 E6 C1 C2 T2 R1 J2 H1 AA1 V2 V3 AA4 AA5 AA2 AA3 V1 V4 R320 *33_4 AGPRCOMP AGPRCOMN A1XAVDD A1XAVSS A4XAVDD A4XAVSS AVREFGC R_VAGCLK R_VBGCLK R319 R85 10_4 10_4 VAGCLK VBGCLK HTPHYAVSS GCDETVBHCLK [9] HTPHYAVDD C566 .1U_4 +3V L40 WB201209B121QNT03 C568 .01U_4 C47 10U/10V_8 A4XAVSS C601 .01U_4 C59 10U/10V_8

D24 D25 E23 E24 F22 F23 D21 D22 F19 F20 D18 D19 E17 E18 F16 F17 A24 A25 C23 C24 A22 A23 C21 C22 C19 C20 A18 A19 C17 C18 A16 A17

C26 C25 LTCTLN LTCTLP

A21 A20

E21 E20

U20A CADON0 CADOP0 CADON1 CADOP1 CADON2 CADOP2 CADON3 CADOP3 CADON4 CADOP4 CADON5 CADOP5 CADON6 CADOP6 CADON7 CADOP7 CADON8 CADOP8 CADON9 CADOP9 CADON10 CADOP10 CADON11 CADOP11 CADON12 CADOP12 CADON13 CADOP13 CADON14 CADOP14 CADON15 CADOP15 LRCOMP

LTCAD_P15 LTCAD_N15 LTCAD_P14 LTCAD_N14 LTCAD_P13 LTCAD_N13 LTCAD_P12 LTCAD_N12 LTCAD_P11 LTCAD_N11 LTCAD_P10 LTCAD_N10 LTCAD_P9 LTCAD_N9 LTCAD_P8 LTCAD_N8 LTCAD_P7 LTCAD_N7 LTCAD_P6 LTCAD_N6 LTCAD_P5 LTCAD_N5 LTCAD_P4 LTCAD_N4 LTCAD_P3 LTCAD_N3 LTCAD_P2 LTCAD_N2 LTCAD_P1 LTCAD_N1 LTCAD_P0 LTCAD_N0

C

N27 P27 M29 N29 L27 M27 K29 L29 H29 J29 G27 H27 F29 G29 E27 F27 N24 P24 M25 N25 L26 M26 K24 L24 H26 J26 G24 H24 F25 G25 E26 F26 C28 J25 K25 J27 K27 D29 E29

LRCAD_N0 LRCAD_P0 LRCAD_N1 LRCAD_P1 LRCAD_N2 LRCAD_P2 LRCAD_N3 LRCAD_P3 LRCAD_N4 LRCAD_P4 LRCAD_N5 LRCAD_P5 LRCAD_N6 LRCAD_P6 LRCAD_N7 LRCAD_P7 LRCAD_N8 LRACD_P8 LRCAD_N9 LRCAD_P9 LRCAD_N10 LRCAD_P10 LRCAD_N11 LRCAD_P11 LRCAD_N12 LRCAD_P12 LRCAD_N13 LRCAD_P13 LRCAD_N14 LRCAD_P14 LRCAD_N15 LRCAD_P15 LRCOMP LRCLK_N1 LRCLK_P1 LRCLK_N0 LRCLK_P0 LRCTLN LRCTLP HTCLKN HTCLKP HTAVDD HTAVSS HTPHYAVDD HTPHYAVSS LDTSTOP# LDTREQ# LDTRESET# M760GX

LTCOMP_N LTCOMP_P AC/BE#3 AC/BE#2 AC/BE#1 AC/BE#0 AREQ# AGNT# AFRAME# AIRDY# ATRDY# ADEVSEL# ASERR# ASTOP# APAR RBF# WBF# GC_DET# PIPE#/ADBIH ADBIL

LTCLK_N0 LTCLK_P0

LTCLK_N1 LTCLK_P1

B28 A27

HOST_TX

R315 4.7K_4 VBCAD [9] HTAVDD C145 .1U_4 HTAVSS +3V L16 WB201209B121QNT03 C153 .01U_4 C56 10U/10V_8C

HOST_RX

M760-1LVDS/AGP

SB_STB SB_STB# AD_STB0 AD_STB#0 AD_STB1 AD_STB#1 AGPCLK AGPCOMP_P AGPCOMP_N A1XAVDD A1XAVSS A4XAVDD A4XAVSS AGPVREF AGPVSSREF

[3] CLKON1 [3] CLKOP1 [3] CLKON0 [3] CLKOP0B

AGPCLK0 [2]

Place close to chipAGPRCOMN R90 49.9/F_6

+1.8VB

[3] CTLON0 [3] CTLOP0 755CLK755CLK+ HTAVDD HTAVSS HTPHYAVDD HTPHYAVSS [3] LDTSTOP# [12] LDTREQ# [3] LDTREST#

CPU_VCCA

A11 A12 C11 B11 C12 B12 E11 D12 D11

20mil

+1.8V R318

LDTREQ#

R52

1K_4 +1.2V_HT

LRCOMP 124/F_6 LTCOMPN

R29 R30 R36 R322 C604 C227 C212

100/F_6 49.9/F_6 49.9/F_6 43.2/F_6 *10P_4 *10P_4 *10P_4

AAD0 AAD1 AAD2 AAD3 AAD4 AAD5 AAD6 AAD7 AAD8 AAD9 AAD10 AAD11 AAD12 AAD13 AAD14 AAD15 AAD16 AAD17 AAD18 AAD19 AAD20 AAD21 AAD22 AAD23 AAD24 AAD25 AAD26 AAD27 AAD28 AAD29 AAD30 AAD31

SBA7 SBA6 SBA5 SBA4 SBA3 SBA2 SBA1 SBA0

ST0 ST1 ST2

R323 C606 124/F_6 *22P_4

LTCOMPP AGPRCOMP VAGCLK VBGCLK

D2 G5 D3 F4 F5 E4 B3 D5

MVBCLK

V5 U6 U1 U4 U3 T5 T3 T6 R2 P1 R5 P3 P4 N2 P6 N3 L3 K2 K5 K6 K3 J4 J1 J5 G2 H4 G3 F1 F2 H6 E1 E3 VBVSYNC VBHSYNC VBCTL1 VBCTL0 VBDE VAD3 VAD2 VAD0 VAD1 VBD9 VBD8 VBD10 VBD11 VAHSYNC VAVSYNC VADE VAD11 VAD10 VAD9 VAD8 VAD7 VAD4 VAD5 VAD6 VBD0 VBD1 VBD2 VBD3 VBD4 VBD5 VBD6 VBD7

C5 A5 B4

Near 200mil

Near 200mil

MVBCLK

[9] VBCLKA

R80

10_4

A

+1.2V_HT

R49 R50

75_4 75_4 3900P_6 755CLK3900P_6 755CLK+ R53 169/F_6 Size Date: Document Number

PROJECT : ZL5

[2] CPUCLK1_L [2] CPUCLK1_H

CPUCLK1_L C136 CPUCLK1_H C122

Quanta Computer Inc.M760GX(HT LINK/AGP)Thursday, March 10, 20052

Rev 3B Sheet 61

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ZCLK0 R321 *33_4 C605 *22P_4D

U20B [11] ZAD[0..16] ZAD[0..16] +3V R79 R59 R63 R65 R60 R83 VOSCI ROUT GOUT BOUT HSYNC VSYNC VGPIO1 VGPIO0 INTA# RSYNC LSYNC CSYNC VCOMP VRSET VVBWN DACAVDD1 DACAVSS1 DACAVDD2 DACAVSS2 DCLKAVDD DCLKAVSS MCLKAVDD MCLKAVSS B10 B8 A8 A9 D8 F9 C7 C8 F8 D7 F7 E8 C9 A10 B9 B7 E9 A7 E10 D9 C10 E7 D10 VOSCI ROUT GOUT BOUT 33_4 33_4 100_4 100_4 VOSCI [2] CRT_R [10] CRT_G [10] CRT_B [10] HSYNC [10] VSYNC [10] DDC1BD [10] DDC1BC [10] INTA# [9,11] *4.7K_4 *4.7K_4 4.7K_4 *4.7K_4 4.7K_4 4.7K_4 RSYNC CSYNC LSYNC AA27 AB28 AB29 AC29 AB26 AA26 AA25 Y25 Y24 AA29 AF28 AH28 AG27 AH27 AF26 AE25 AD25 AD24 AE26 AG29 AC27 AD29 AD28 AD27 AE29 AC26 AC25 AB24 AE27 AF29 AJ27 AG26 AJ26 AG25 AH25 AG24 AF24 AE23 AF23 AJ24 AJ15 AG16 AH16 AJ16 AE16 AD16 AF17 AD17 AE18 AJ17 AG11 AJ11 AG12 AH12 AF11 AD11 AE12 AD12 AE13 AJ12 AG15 AJ14 AH14 AJ13 AE15 AF15 AF14 AD14 AF13 AG13 AJ10 AH10 AJ9 AG9 AF10 AE10 AD10 AF9 AD9 AH8 DQB0 DQB1 DQB2 DQB3 DQB4 DQB5 DQB6 DQB7 DQMB0 DDRBSTB0 DQB8 DQB9 DQB10 DQB11 DQB12 DQB13 DQB14 DQB15 DQMB1 DDRBSTB1 DQB16 DQB17 DQB18 DQB19 DQB20 DQB21 DQB22 DQB23 DQMB2 DDRBSTB2 DQB24 DQB25 DQB26 DQB27 DQB28 DQB29 DQB30 DQB31 DQMB3 DDRBSTB3 DQB32 DQB33 DQB34 DQB35 DQB36 DQB37 DQB38 DQB39 DQMB4 DDRBSTB4 DQB40 DQB41 DQB42 DQB43 DQB44 DQB45 DQB46 DQB47 DQMB5 DDRBSTB5 DQB48 DQB49 DQB50 DQB51 DQB52 DQB53 DQB54 DQB55 DQMB6 DDRBSTB6 DQB56 DQB57 DQB58 DQB59 DQB60 DQB61 DQB62 DQB63 DQMB7 DDRBSTB7 M760GX

The differences between the traces of MuTIOL Strobes and Data should be smaller than 0.05"

D

U20C M760GX [2] ZCLK0 [11] ZSTB0 [11] ZSTB-0 [11] ZSTB1 [11] ZSTB-1 ZCLK0 ZSTB0 ZSTB-0 ZSTB1 ZSTB-1 Z1XAVDD Z1XAVSS Z4XAVDD Z4XAVSS ZCMP_N ZCMP_P ZVREF ZUREQ ZDREQ ZAD0 ZAD1 ZAD2 ZAD3 ZAD4 ZAD5 ZAD6 ZAD7 ZAD8 ZAD9 ZAD10 ZAD11 ZAD12 ZAD13 ZAD14 ZAD15 ZAD16 AE1 AJ5 AH6 AG1 AH2 AB1 AB2 AD3 AD4 AD6 AC6 AD5 AE8 AF8 AJ7 AG7 AE7 AD7 AG5 AF6 AJ4 AH4 AJ3 AG3 AF4 AE5 AE2 AF2 AE3 AF1 AG8 ZCLK ZSTB0 ZSTB#0

VGA (For 760 Only)

ZSTB1 ZSTB#1 Z1XAVDD Z1XAVSS Z4XAVDD Z4XAVSS ZCMP_N ZCMP_P ZVREF ZUREQ ZDREQ ZAD0 ZAD1 ZAD2 ZAD3 ZAD4 ZAD5 ZAD6 ZAD7 ZAD8 ZAD9 ZAD10 ZAD11 ZAD12 ZAD13 ZAD14 ZAD15 ZAD16

R75 R77 VGPIO1 R74 VGPIO0 R70 RSYNC LSYNC CSYNC VCOMP VRSET VVBWN DACAVDD DACAVSS DACAVDD DACAVSS DCLKAVDD DCLKAVSS MCLKAVDD MCLKAVSS

+3V R31 R32 *10K_4 10K_4 TRAP3 TRAP4

The differences between the traces of MuTIOL Strobes and Data in each group should be smaller than 0.05",and strobes need ground guard trace[11] ZUREQ [11] ZDREQ

NB Hardware Trap has internal pull-low in SiS M760 chip

MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 MAB13 WEB RASB CASB

AJ21 AG22 AH22 AJ23 AH23 AD22 AF22 AD21 AG21 AE21 AE20 AF20 AH20 AJ20 AH18 AG19 AJ19

+3V L15 WB201209B121QNT03 C46 C150 10U/10V_8 1U_4 DCLKAVDD C151 .1U_4 DCLKAVSS

MuTIOL

SDCLKBN0 SDCLKBN1 SDCLKBP0 SDCLKBP1

AG18 AD19 AG17 AD18C

C

M760-3

M760-2

CKEB CSB

AF19 AG20 W26 Y26 Y27 Y28 AJ8 Y29 W28 W29 W27 R28 *33_4 C44 *22P_4B

+3V TESTMODE0 TESTMODE1 TESTMODE2 V25 U28 V26 V28 W25 W24 V27 U29 V24 V29 L47 WB201209B121QNT03 C61 C594 10U/10V_8 TRAP3 TRAP4 R37 0_4 1U_4 MCLKAVDD C596 .1U_4 MCLKAVSS

DRAMTRAP0 DRAMTRAP1 DRAMTRAP2 DRAMTRAP3 DDRVREFB0 DDRVREFB1 ECLKAVDD ECLKAVSS VOSCIE

[12,20] PWROK [9,11,14,15,16,19,20] PCIRST# C144 *.1U_4

F10 F11 C135

PWROK PCIRST#

Control & Hardware Trap

TRAP0 TRAP1 TRAP2 TRAP3 TRAP4 ENTEST DLLEN#

ECLKAVDD ECLKAVSS VOSCIE [2]

C573 VRSET +1.8V R311 130/F_6 C572

.1U_4 VVBWN .1U_4 VCOMP DACAVDD C589 .1U_4 DACAVSS

*.1U_4

L43 WB201209B121QNT03 C166 C585 10U/10V_8 .1U_4

B

+3V R324 0_6 C602 .01U_4 Z1XAVDD C598 .1U_4 Z1XAVSS

+3V L18 WB201209B121QNT03 C231 .01U_4 Z4XAVDD C228 .1U_4 Z4XAVSS

C62

10U/10V_8

+3V ECLKAVDD L14 WB201209B121QNT03 C49 C128 .1U_4 10U/10V_8

SiS755/760 NB Hardware Trap Table 755/760 DLLEN# TESTMODE0 TESTMODE1 TESTMODE2A

C48

ON/1 DISABLE

OFF/0 ENABLE

Internal Pull Low Pull Low

Default Low/0+1.8V

Place near 755/760 chip. MuTIOL 1.0 Vref=0.5*VCC1.8 MuTIOL 2.0 Vref=0.25*VCC1.8R64 R54 56_6 ZCMP_N ECLKAVSS

.01U_4

CPUCLK/ZCLK/AGPCLK PLL/DLL Circuit Enable

755 Test Mode Selection 755 Test Mode Enable MuTIOL Verision 1 , 2 MuTIOL DBI Mode MuTIOLIntial Packet Series Mode Reserve Reserve

1: Mode1 ENABLE Ver. 1 DISABLE DISABLE

0: Mode0 DISABLE Ver. 2 ENABLE ENABLE

Pull Low Pull Low Pull Low Pull Low Pull Low Pull Low Pull Low Low/0 Low/0 Low/0 Low/0 High/1 High/1C167 10U/10V_8

C120 150/F_4 .1U_4 ZVREF R56 49.9/F_4 C124 .1U_4 R57 56_6 ZCMP_PA

TRAP0 TRAP1 TRAP2 TRAP3 TRAP4

PROJECT : ZL5

Quanta Computer Inc.Size Date: Document Number

M760GX(MuTIOL/VGA)Thursday, March 10, 20052

Rev 3B Sheet 71

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If Support SiS M760LV IVDD=1.5V+1.2V_HT +1.8V

LAYOUT: Place HT bypass caps on topside near connected Lokar HT link.+1.2V_HT J16 J15 J14 J13 H22 H21

AE4 AE6 AE9 AE11 AE14 AE17 AE19 AE22 AE24 AE28 AF5 AF7 AF12 AF16 AF18 AF21 AF25 AF27 AG10 AG14 AG23 AG28 AH9 AH11 AH13 AH15 AH17 AH19 AH21 AH24 AH26 AJ18 AJ22 AJ25

D

R21 T20 T21 U21 V20 W20 Y12 Y13 Y14 Y15 Y16 Y17 Y18 Y19 Y20 AA12

+3V

Y6 Y5 Y4 Y3 Y2 Y1 W6 W5 W4 W3 W2 W1

C57 C112

10U/10V_8 .22U_4 .22U_4 .022U_4 .022U_4

D

VLDT VLDT VLDT VLDT VLDT VLDT

+1.5V

+1.2V_HT

AJ6 AH7 AH5 AH3 AG6 AG4 AG2 AF3 AD2 AD1 AC5 AC4 AC3 AB6 AA6 AB3 AB4 AB5 AC1 AC2 A13 A14 A15 B13 B14 B15 C13 C14 C15 D13 D14 D15 D16 E12 E13 E14 E15 F12 F13 F14 F15 P28 P29 R24 R25 R26 R27 R28 R29 T24 T25 T26 T27 T28 T29 U24 U25 U26 U27

VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD VLDT VLDT VLDT VLDT VLDT VLDT VLDT VLDT VLDT VLDT VLDT VLDT VLDT VLDT VLDT VLDT VLDT VLDT VLDT VLDT VLDT VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM M760GX

C

M760-4Power

B

W12 VDDZ Y11 VDDZ AA10VDDZ AA11VDDZ

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

IVDD IVDD IVDD IVDD IVDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

F28 G1 G4 G26 G28 H2 H5 H25 H28 J3 J6 J24 J28 K1 K4 K26 K28 L2 L5 L25 L28 M3 M6 M24 M28 N1 N4 N26 N28 P2 P5 P25 P26 R3 R6 T1 T4 U2 U5 V6 AA24 AA28 AB25 AB27 AC24 AC28 AD8 AD13 AD15 AD20 AD23 AD26

+1.5V

VLDT VLDT VLDT VLDT VLDT VLDT VLDT VLDT VLDT VLDT VLDT VLDT VLDT VLDT VLDT VLDT VLDT IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM

+1.8V

U20E J17 J18 J19 J20 J21 J22 K14 K16 K18 K20 K21 L21 M20 M21 N21 P20 P21 K11 L11 M11 M12 M14 M16 M18 N11 N13 N15 N17 P11 P12 P14 P16 P18 R11 R13 R15 R17 T11 T12 T14 T16 T18 U11 U13 U15 U17 V11 V12 V13 V14 V15 V16 V17 V18 W13 W15 W17 M760GX

U20D

PVDDM PVDDM PVDDM PVDDM PVDDM VCC VCC VCC VCC VCC VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

R20 U20 W14 W16 W18 K12 J12 J11 J10 H9 K13 K15 K17 K19 L12 L13 L14 L15 L16 L17 L18 L19 L20 M13 M15 M17 M19 N12 N14 N16 N18 N19 N20 P13 P15 P17 P19 R12 R14 R16 R18 R19 T13 T15 T17 T19 U12 U14 U16 U18 U19 V19 W19

C67 C97 +3V C64

+1.2V_HT

C66 C78 C103 C102 C77

10U/10V_8 1500P_4 1500P_4 1500P_4 1500P_4C

M760-5Power

Place these capacitors under 760 solder side.+1.5V

C100 +1.8V C85 C113 C139 C147 C140 C172 .01U_4 .01U_4 .1U_4 .1U_4 C229 C73 C114 C91

.1U_4 .1U_4 .01U_4 .01U_4 .1U_4 .1U_4 .01U_4

B

+1.2V_HT +1.5V C116 C118 .1U_4 .1U_4 .1U_4 .022U_4 1000P_4 100P_4 C79 C119 C170 C127 C599 .1U_4 .22U_4 .022U_4 1000P_4 100P_4

W10 W11 Y9 Y10 AA9

H8 J8 J9 K9 K10 L10 M9 M10 N10 P9 P10 R10 T10 U9 U10 V10 W9

In +1.8V

C58 C65

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

A4 A26 B2 B5 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 C3 C6 C16 C27 C29 D1 D4 D17 D20 D23 D26 D27 D28 E2 E5 E16 E19 E22 E25 E28 F3 F6 F18 F21 F24

+1.8V Out

C98 C72

+1.5V +1.8VA

+1.8V 10U/10V_8 1U_4 1U_4 .1U_4 .1U_4 C578 C125 C141 C138 C126 10U/10V_8 1U_4 1U_4 .1U_4 .1U_4

+1.5V C93 C115 C99 C121 C101 10U/10V_8 1U_4 .1U_4 .1U_4 .1U_4 +3V C43 C45 .1U_4 .1U_4

C70 C92 C154 C600 C117 C142

10U/10V_8 10U/10V_8 .1U_4 .1U_4 .1U_4 .1U_4 +1.8V C603 C168 C178 C159 .1U_4 .1U_4 .1U_4 .1U_4 Size Date: Document NumberA

C165 C155 C160 C184 C180

PROJECT : ZL5

Quanta Computer Inc.M760GX(POWER)Thursday, March 10, 20052

Rev 3B Sheet 81

of

26

8

7

6

5

4

3

8

7

6

5

4

3

2

1

[6] VAGCLK [6] VAHSYNC [6] VAVSYNC [6] VAD[11..0] [6] VBD[11..0] VAD[11..0] VBD[11..0] VAHSYNC VAVSYNC VAGCLK VAD6 VAD7 VAD8 VAD9 VAD10 VAD11 VAD0 VAD1 VAD2 VAD3 VAD4 VAD5 DVDD VBGCLK VBD6 VBD7 VBD8 VBD9 VBD10 VBD11 VBVSYNC VBHSYNC VBCTL0 VBD0 VBD1 VBD2 VBD3 VBD4 VBD5 DVDD

VBGCLK [6] VBCTL0 [6] VBHSYNC [6] VBVSYNC [6]

VBGCLK VAGCLK VBHCLK VBCLK

PFTEST0 PFTEST1 R407 *0_6 C710 *10P_4 R408 *0_6 C711 *10P_4 R409 *0_6 C712 *10P_4 R410 *0_6 C713 *10P_4 +1.8V PFTEST2

R22 R25 R24

4.7K_4 *0_4 *0_4

+3V

D

D

U18

VAVSYNC VAHSYNC OVSS VAD11 VAD10 VAD9 VAD8 VAD7 VAD6 VAGCLK DVSS3 DVDD3 VAD5 VAD4 VAD3 VAD2 VAD1 VAD0 RESERVED RESERVED VBD11 VBD10 VBD9 VBD8 VBD7 VBD6 VBGCLK DVSS2 DVDD2 VBD5 VBD4 VBD3 VBD2 VBD1 VBD0 VBCTL0 VBHSYNC VBVSYNC

102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65

Reserved for EMI, Place close to U18

L12 VDDV WB201209B121QNT03 C35 10U/10V_8

C36 .1U_4

[6]

VADE

DVDD VADE VBCAD VBHCLK DVDD DVDD LCDID0 LCDID1 LCDID2 R27 R26 +5V 100_4 100_4

[6] VBCAD [6] VBHCLK

[10] PNL_DATA [10] PNL_CLK

302ELV/302LV

1

C

[10] LCDID0 [10] LCDID1 [10] LCDID2

[7,11] INTA# [7,11,14,15,16,19,20] PCIRST#

[10] LCDON [10] BKLON

PFTEST1 PFTEST2 PFTEST0 LCDON BKLON

103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128

DVDD4 VADE DVSS4 RESERVED VBCAD VBHCLK DVSS5 DVDD5 OVDD GPIOA(GPI) GPIOB(GPI) GPIOC(GPI) GPIOD(GPI) LDDCDATA LDDCCLK V5V V2HSYNC V2VSYNC LCDSENSE INTA# EXTRSTN PFTEST1 PFTEST2 PFTESTO GPIOG(GPO) GPIOH(GPO)

DVDD1 VBDE VBCTL1 DVSS1 OVDD VBCLK DVSS0 TVCLKO TSCLKI DVDD0 PLL1VDD VBOSCO VBRCLK PLL1GND RESERVED IOCS DAC_GND DAC_VDD RESERVED IOC RESERVED IOY RESERVED IOCOMP V2COMP DAC_GND

64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39

DVDD VBDE VBCTL1 VDDV VBCLK

VBDE [6] VBCTL1 [6] VBCLK [6] 2

C31

*22P_4 Y4 *14.318MHz

DVDD TVPLL1VDD VBOSCO R_VBRCLK R294

0_4

C554 R295

*22P_4 0_4

C

VBRCLK [2]

DACVDD IOC IOY IOCOMP V2COMP T46 T45 T44 +3V LPLLVDD L8 WB201209B121QNT03 C20 10U/10V_8

C28 +5V

C12 .1U_4

.1U_4

C29 10U/10V_8B

C27 .1U_4 LVDSPLLVDDL RESERVED LVDSPLLVSS LAVSS RESERVED RESERVED LAVDD RESERVED RESERVED LAVSS RESERVED RESERVED LAVDD RESERVED RESERVED LVDSPLLVSS RESERVED RESERVED LVDSPLLVDD LAVDD LX3P LX3N LAVSS LXC1P LXC1N LAVDD LX2P LX2N LAVSS LX1P LX1N LAVDD LX0P LX0N LAVSS EXTSWING DACVDD V2RSET

+3V TVPLL1VDD L11 WB201209B121QNT03 C25 C30 302ELV .1U_4 10U/10V_8 1U_4

B

C32

[10] LXC2+ [10] LXC2[10] LX6+ [10] LX6[10] LX5+ [10] LX5[10] LX4+ [10] LX4[10] LXC1+ [10] LXC1[10] LX2+ [10] LX2[10] LX1+ [10] LX1[10] LX0+ [10] LX0A

LXC2+ LXC2LX6+ LX6LX5+ LX5LX4+ LX4LXC1+ LXC1LX2+ LX2LX1+ LX1LX0+ LX0-

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 LVDD1 LXC2LXC2+ LX5LX5+ LVDD1 LX6LX6+ LX4LX4+ LX2LX2+ LVDD2 LXC1LXC1+ LX0LX0+ LVDD2 LX1LX1+ LPLLVDD C13 *100P_4 LPLLVDD L6 BK1608LL121 R23 *0_6 LVDD1 R19 24K/F_4 C10 LVDD2 ISET DACVDD EXTSWING R20

R21

147_4 +3V C19 L7 WB201209B121QNT03 C23 10U/10V_8 1U_4 .1U_4 V2COMP DACVDD C11 1U_4 C26 .1U_4

6.2K_4

A

+3V L13 WB201209B121QNT03 C39 10U/10V_8

DVDD

+3V LVDD2 L10 WB201209B121QNT03 C22 10U/10V_8

+3V LVDD1 L9 WB201209B121QNT03 C21 10U/10V_8

PROJECT : ZL5C14 1U_4 C15 .1U_4 Size Date: Document Number

C38 .1U_4

C40 .1U_4

C42 .1U_4

C37 .1U_4

C34 .01U_4

C33 .01U_4

C16 .1U_4

C17 .1U_4

C18 .01U_4

Quanta Computer Inc.302ELV(LVDS)Thursday, March 10, 20052

Rev 3B Sheet 91

of

26

8

7

6

5

4

3

8

7

6

5

4

3

2

1

+3V +3V [9] BKLON R6 R7 *1K_4 5 100K_4 3V_ALWAYS D3 1 D2 1 MTW355 2 MTW355 2 +3V 2 +3V 1 2 3 U2 4 DISPON PNL_DATA PNL_CLK LCDID0 LCDID1 LCDID2 R283 R284 R286 R285 R287 2.7K_4 2.7K_4 10K_4 10K_4 10K_4 +3V [9] [9] [9] [9] [9] [9] VADJ 3 4 1 2 LID# R9 D25 1 1K_4 MTW355 2 LID591# [20] LIDSB# [12] L39 BK1608LL121 C538 .1U_4 CONTRAST [20] [9] [9] [9] [9] [9] [9] LCD3V +3V U17 C543 .1U_4 4 6 3 IN IN ON/OFF AAT4280C C

CN1 FOXCONN_LVDS LXC2LXC2+ LX4LX4+ LX2LX2+ LX1LX1+ LX0LX0+ LXC1LXC1+ LXC2LXC2+ LX4LX4+ LX2LX2+ LX1LX1+ LX0LX0+ LXC1LXC1+ PNL_CLK PNL_DATA 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 41 42 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 43 44 LX6LX6+ LX5LX5+ VIN_INV VADJ DISPON LCDID0 LCDID1 LCD3V +5V LCDID2 +3V LCDID2 [9] LX6- [9] LX6+ [9] LX5- [9] LX5+ [9]

SN74LVC1G08DCKR

[12] FPBACK#D

R8 10K_4

Q1

R1 10K_4

D

[20] EC_FPBACK#

1 3 PDTC143TT

SW1 SW-MPU-101-6EB-4P

Lid Switch

LCDID0 [9] LCDID1 [9]

80milOUT GND GND 1 2 5 LCDVCC C542 .1U_4 R288 C544 10U/10V_8 0_8 C539 .1U_4

VIN

VIN_INV L38 0_8 C535 *10U/25V_1210

[9] PNL_CLK [9] PNL_DATA

45

C540 .01U_4

C541 10U/10V_8

C536 1000P_4

C537 .1U_4

[9] LCDON

LCDON

[12] MONITOR_PLUG# C6 F1 +5V 2 1 2 FUSE1A6V_POLY [7] CRT_R [7] CRT_G [7] CRT_B CRT_R CRT_G CRT_B R2 75/F_4B

.1U_4 16 +5V_CRT2 CN12 CRT_DFDS15FR0G6

+3V

D17

1 EP05FA20

25 MILCRT_R1 L2 FBM-10-160808-600 CRT_G1 L3 FBM-10-160808-600 CRT_B1 L1 FBM-10-160808-600 C532 C533 C534 C3 C2 10P_4 10P_4 10P_4 6 1 7 2 8 3 9 4 10 5

1 2 MTW355 3 2 1 3 2 1 3 CRT_B D29 *DA204UB

11 12 13 14 15

1 D1

D28 *DA204U

R3 75/F_4

R4 75/F_4

C1

10P_4 10P_4 10P_4

+5V_CRT2 5 1 [7] VSYNC VSYNC +5V_CRT2 3 R404 [7] HSYNC 1K_4 HSYNC 1 2 3 4 HSYNC_1 L4 BLM18BA220SN1 CRTHSYNC +5V_CRT2 R5 Q35 1 R405 2.7K_4 +3V CRTDDAT 2 2N7002E CRTDCLK 3 2.7K_4 R282 2.7K_4 C5 C4 2 1 5 2 4 VSYNC_1 L5 BLM18BA220SN1 CRTVSYNC 1 2

17

D30 *DA204U

U31 SN74AHCT1G125DCH

3 D31 *DA204U

U32 SN74AHCT1G125DCH

10P_4 10P_4 2

3 D32 *DA204U

[7] DDC1BC

DDC1BC

A

R406 [7] DDC1BD DDC1BD

2.7K_4 1 Q36

2

46

80mil

CRT_R

CRT_G

VSYNC

HSYNC

A

C7 3 2N7002E

C531

10P_4 10P_4

PROJECT : ZL5

Quanta Computer Inc.Size Date:8 7 6 5 4 3

Document Number

CRT/LVDSThursday, March 10, 20052

Rev 3B Sheet 101

of

26

8

7

6

5

4

3

2

1

[14,15] AD[0..31]

AD[0..31] AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 R151 J5 J4 H2 H1 J3 K4 J2 J1 K5 K2 L3 K1 L1 L4 L5 L2 N5 P2 P3 P4 R2 R3 R1 T1 P5 T2 U1 U2 T3 R5 U3 V1 U26A C295 IDEAVDD IDEAVSS ICHRDYA IDREQA IIRQA CBLIDA IIOR#A IIOW#A IDACK#A IDSAA2 IDSAA1 IDSAA0 IDECSA#1 IDECSA#0 ICHRDYB IDREQB IIRQB CBLIDB Y3 Y4 W10 V10 Y11 U12 V11 Y9 Y10 T11 U11 W11 T12 V12 W17 Y17 T16 U17 T14 W16 V16 Y18 T15 V17 U16 W18 U10 V9 W8 T9 Y7 V7 Y6 Y5 W6 U8 W7 V8 U9 Y8 T10 W9 Y16 V15 U14 W14 V13 T13 Y13 Y12 W12 W13 U13 Y14 V14 W15 Y15 U15 IDEAVDD IDEAVSS PHDRDY PDDREQ IRQ14 R194 10K_4 PDIOR# PDIOW# PDDACK# PDA2 PDA1 PDA0 PDCS3# PDCS1# SDIORDY SDDREQ IRQ15 10K_4 SDIOR# SDIOW# SDDACK# SDA2 SDA1 SDA0 SDCS3# SDCS1# PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15 SDD0 SDD1 SDD2 SDD3 SDD4 SDD5 SDD6 SDD7 SDD8 SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15 SDD[0..15] [19] .01U_4 C287 .1U_4 AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 SERIRQ R166 RN5 1 3 5 7 RN7 1 3 5 7 RN21 1 3 5 7 RN20 1 3 5 7 RN11 1 3 5 7 RN8 1 3 5 7 8.2K_4

+3V

+1.8V 0_6 C426 .1U_4

[12,14,15,20] SERIRQ

REQ1# SERR#

D

[14] REQ1# [15] REQ0#

REQ4# REQ3# REQ2# REQ1# REQ0# GNT4# GNT3# GNT2# GNT1# GNT0# CBE3# CBE2# CBE1# CBE0# INTA# INTB# INTC# INTD# FRAME# IRDY# TRDY# STOP# SERR# PAR DEVSEL# PLOCK#

8.2K_8P4R 2 4 6 8D

F1 F2 E1 H5 F3 H3 G1 G2 G3 H4 K3 M4 P1 R4 E3 F4 E2 G4 M3 M1 M2 N4 M5 N3 N1 N2

PREQ#4 PREQ#3 PREQ#2 PREQ#1 PREQ#0 PGNT#4 PGNT#3 PGNT#2 PGNT#1 PGNT#0 C/BE#3 C/BE#2 C/BE#1 C/BE#0 INT#A INT#B INT#C INT#D FRAME# IRDY# TRDY# STOP# SERR# PAR DEVSEL# PLOCK# PCICLK PCIRST#

PHDRDY [19] PDDREQ [19] IRQ14 [19] PDIOR# [19] PDIOW# [19] PDDACK# [19] PDA2 [19] PDA1 [19] PDA0 [19] PDCS3# [19] PDCS1# [19] SDIORDY [19] SDDREQ [19] IRQ15 [19] SDIOR# [19] SDIOW# [19] SDDACK# [19] SDA2 [19] SDA1 [19] SDA0 [19] SDCS3# [19] SDCS1# [19] PDD[0..15] [19]

PCI

PLOCK# FRAME# PAR STOP#

8.2K_8P4R 2 4 6 8 8.2K_8P4R 2 4 6 8 8.2K_8P4R 2 4 6 8 8.2K_8P4R 2 4 6 8 8.2K_8P4R 2 4 6 8

[14] GNT1# [15] GNT0# [14,15] [14,15] [14,15] [14,15] [7,9] [15] [15] [14] CBE3# CBE2# CBE1# CBE0# INTA# INTB# INTC# INTD#

INTB# INTA# INTC# REQ2#

REQ4# REQ3# REQ0# GNT1#

[14,15] FRAME# [14,15] IRDY# [14,15] TRDY# [14,15] STOP# [14,15] SERR# [14,15] PAR [14,15] DEVSEL# PLOCK# [2] 96XPCLK

R328

IDE

IIOR#B IIOW#B IDACK#B IDSAB2 IDSAB1 IDSAB0 IDECSB#1 IDECSB#0

GNT3# GNT2# INTD# GNT4#

C

Y2 SB_PCIRST# C3

GNT0# IRDY# TRDY# DEVSEL#

C

[2] ZCLK1 [7] ZSTB0 [7] ZSTB-0 [7] ZSTB1 [7] ZSTB-1 [7] ZUREQ [7] ZDREQ

V20 M19 N20 J20 K20 N16 N17 SVDDZCMP R19 SZCMP_N N18

ZCLK ZSTB0 ZSTB0# ZSTB1 ZSTB1# ZUREQ ZDREQ VDDZCMP ZCMP_N ZCMP_P VSSZCMP Z1XAVDD Z1XAVSS Z4XAVDD Z4XAVSS VZREF

963L-1

IDA0 IDA1 IDA2 IDA3 IDA4 IDA5 IDA6 IDA7 IDA8 IDA9 IDA10 IDA11 IDA12 IDA13 IDA14 IDA15 IDB0 IDB1 IDB2 IDB3 IDB4 IDB5 IDB6 IDB7 IDB8 IDB9 IDB10 IDB11 IDB12 IDB13 IDB14 IDB15

+1.8V

Put near SiS961 Chip.ZSTB0 ZSTB1 R356 R359 *4.7K_4 *4.7K_4 *4.7K_4 *4.7K_4

ZSTB-0 R355 ZSTB-1 R357

+3V 5 1 R167 C491 *8.2K_4 *.1U_4B

ZCLK1 R343 *33_4 C620B

SZCMP_P R18 SVSSZCMP P18 SZ1XAVDD U20 SZ1XAVSS U19 SZ4XAVDD T20 SZ4XAVSS T19 SZVREF R20

SB_PCIRST#

R168

0_4

U11 4 PCIRST# SN741G32

2 3

PCIRST# [7,9,14,15,16,19,20]

*22P_4

MuTIOLZAD0 ZAD1 ZAD2 ZAD3 ZAD4 ZAD5 ZAD6 ZAD7 ZAD8 ZAD9 ZAD10 ZAD11 ZAD12 ZAD13 ZAD14 ZAD15 ZAD16 M18 N19 M17 M16 M20 L16 L20 L18 K18 K19 K17 K16 H20 J18 H19 H18 P20

96XPCLK R170 *33_4 C286 *22P_4 [7] ZAD[0..16] 963L

3V_S5

R242 1.8V_S5 3V_S5 47K_4 S5_PWRGD [12] 3 Q34 D16 RB500V 47K_4 2 4.7K_4 2 3 2N7002E Q25 270P_4 MMBT3904 1 1 C488

R244

1

ZAD16 ZAD15 ZAD14 ZAD13 ZAD12 ZAD11 ZAD10 ZAD9 ZAD8 ZAD7 ZAD6 ZAD5 ZAD4 ZAD3 ZAD2 ZAD1 ZAD0 2

R251

+1.8V +3V R327 150/F_6A

+3V L49 WB201209B121QNT03 C412 C610 1U_4 SZ1XAVDD C611 .1U_4 SZ1XAVSS L50 WB201209B121QNT03 C631 10U/10V_8 C609 1U_4 SZ4XAVDD

+1.8V L24 WB201209B121QNT03 R348 C608 .1U_4 SZ4XAVSS C384 10U/10V_8 C407 .1U_4 C408 .1U_4 R345 56_6SZCMP_P SVSSZCMP SVDDZCMP 56_6SZCMP_N

C495 .1U_4

C613 .1U_4

SZVREF 10U/10V_8 R338 49.9/F_6 C617 .1U_4

A

PROJECT : ZL5SIS962 Vref = 0.5 SIS963 Vref=0.25Size Date:8 7 6 5 4 3 2

Quanta Computer Inc.Document Number

963L(PCI/IDE/MuTIOL)Thursday, March 10, 2005 Sheet 111

Rev 3B of 26

8

7

6

5

4

3

2

1

U26B OSC25MHI OSC25MHO R371 TXCLK [16] MIITXEN R372 MIITXD0 R241 MIITXD1 R240 MIITXD2 R250 MIITXD3 R239 0_4 0_4 0_4 0_4 0_4 TXEN [16] TXD0 [16] TXD1 [16] TXD2 [16] TXD3 [16] D14 MIIRXCLK MIIRXDV 2 1 Y5 R367 10M_4 32.768KHz C634 18P_4 3 4 SB_32KXI SB_32KXO BATOK [7,20] PWROK VCCRTC C434 *.1U_4 C1 E4C

T60 T59 [6] LDTREQ# T58 [3] THERMTRIP# [20] LAD[0..3] LAD0 LAD1 LAD2 LAD3 [20] -LFRAME C633 18P_4 [11,14,15,20] SERIRQ LDRQ# SERIRQ

T18 P16 R17 R16 Y20 U18 T17 W20 V19 Y19 V18 W19

INIT# A20M# SMI# INTR NMI IGNNE# FERR# STPCLK# CPUSLP#

OSC25MHI OSC25MHO MIITXCLK

2

A8 A9 A6 B6 E8 D7 C6 B4

C639 Y7 25MHz C638

10P_4

+3V

*10M_4 1

R232 10P_4 [3] NPWROK R403 0_6 *10K_4 PWROK [7,20]

CPU_S

MIITXEN MIITXD0

TO CHIPSET POWER GOODD

D

APICCK APICD0/THERM2# APICD1/GPIOFF#

APIC

MIITXD1 MIITXD2

V5 T7 U6 W5 W4 U7 V6

LAD0 LAD1 LAD2 LAD3 LFRAME# LDRQ# SIRQ

MIITXD3

JP1 1 2 1 RB500V D12 1 RB500V D13 1 R186

*RTC_RST 2 *RB500V 2 10K_4 BATOK C629 10U/10V_8

LPCA7 C7 C8 D8 A5 B5 A4 RXCLK [16] RXDV [16] RXER [16] RXD0 [16] RXD1 [16] C483 MIIRXD2 RXD2 [16] MIIAVSS RXD3 [16] MIIRXER

3V_S5

RTCR_3VRTC 2

W:30 milVCCRTC C309 .1U_4 C299 1U_6

C2 D2 D3 D1

OSC32KHI OSC32KHO BATOK PWROK

MII RTC

MIIRXD0 MIIRXD1

Analog power of MIIMIIAVDD

3V_S5 L27 WB201209B121QNT03 C482 .01U_4 C432

R169 1K_4 RTC_N02 1 BT1 MMBT3904 4.7K_4 R141 15K_6 BATCON 2 2 1 3 RTC_N01 Q24 R152 3K_6 R142 5VPCU

C294 .1U_4 10U/10V_8 .1U_4

RTCVDD RTCVSS

963L-2GPIO

MIIRXD3

C

MIICOL MIICRS MIIMDC

B7 E9 C5 E7 B9 B8 MIMDC R249 0_4 0_4

COL [16] CRS [16] LIDSB# MDC [16] MDIO [16] PME# DNBSWON# KBSMI# R402 R236 R235 R207 R121 R119 R254 R238 R245 R237 R247 R224 R325 3V_S5 4.7K_4 4.7K_4 4.7K_4 4.7K_4 4.7K_4 4.7K_4 4.7K_4 4.7K_4 4.7K_4 4.7K_4 4.7K_4 4.7K_4 4.7K_4 SENTEST +3V RN3 MONITOR_PLUG# SWI# MONITOR_PLUG# [10] SWI# [20] LIDSB# [10] +3V +3V SCI# [20] LAD0 LAD3 LAD2 LAD1 1 3 5 7 4.7K_8P4R 2 4 6 8 CD_SDIN0 CD_SDIN1 SMBDAT SMBCLK FPBACK# CLKRUN# MONITOR_PLUG# MAX6648AL LDRQ# SERIRQ MB_ID0 R253 R252 R233 R178 R161 R136 R139 R165 R164 R163 R229 R243 R255 4.7K_4 4.7K_4 4.7K_4 4.7K_4 4.7K_4 4.7K_4 4.7K_4 4.7K_4 *100K_4 1K_4 0_4 100K_4 100K_4B

[2,5] SMBDAT [2,5] SMBCLK

SMBDAT SMBCLK

B2 A1

GPIO20/SMDAT GPIO19/SMCLK

+3V

[17] CD_SDIN0 [17] CD_SDIN1 [17] CD_SDOUTA [17] CD_SYNC R157 R199 [17] CD_RESET# [17] CD_BITCLKA 0_4 AC_SDOUT 0_4 AC_SYNC

A2 D5 W2 T5 D6 Y1

AC_SDIN0 AC_SDIN1 AC_SDOUT AC_SYNC AC_RESET# AC_BIT_CLK

MIIMDIO MIIAVDD MIIAVSS

MIMDIO R248 MIIAVDD MIIAVSS

AC97

SWI# SCI#

GPIO0 [2] REFCLK1 [17] PCSPK [20] DNBSWON# [14,15,20] PME# [11] S5_PWRGDB

V2 T8 T4 T6 W1 U5 U4 C4 C14 E6 B3 F5 D4

EMAIL_LED# SYSSPKOFF#

EMAIL_LED# [21] SYSSPKOFF# [17] *0_4 MAX6648_AL MAX6648_AL [3,20]

RING# GPIO15

SENTEST DNBSWON# PME# PSON#

W3 G5 V3 A14 B14 D14 A3 A15

OSCI ENTEST SPK PWRBTN# PME# PSON# AUXOK ACPILED

GPIO1/LDRQ1# GPIO2/THERM#

GPIO16 GPIO17 GPIO18

MAX6648AL KBSMI# CLKRUN# MB_ID0

R134

ACPI /others

GPIO

GPIO3/EXTSMI# GPIO4/CLKRUN# GPIO5/PREQ5# GPIO6/PGNT5#

KBSMI# [20] CLKRUN# [14,15,20]

S3_AUX_SW# PSON#

C489 .1U_4

[10] FPBACK#

FPBACK# S3_AUX_SW# GPIO15 GPIO16 GPIO17 GPIO18

B1 E5 E13 A16 D13 B15

GPIO13/DPRSLPVR GPIO7/GPWAK# GPIO14/AGPSTOP# GPIO8/RING GPIO15/VR_HILO# GPIO16/LO_HI# GPIO17/VGATEM# GPIO11/STP_PCI# GPIO18/PMCLK GPIO12/CPUSTP# 963L CPUSTP# CPUSTP# [2] [6] LDTREQ# STP_PCI# STP_PCI# [2] LIDSB# SCI# RING#

KBC

GPIO9/AC_SDIN2 GPIO10/AC_SDIN3

SPEEDSTEP

Reserved for PowerNowRING# [14]

R329 *10K_4

R330 *10K_4 CPUSTP# CPUSTP# [2]

3

R332

*10K_4 2 1

Q23 *MMBT3904

2 1

3 Q21 *MMBT3904

Place close to ball pinA

3V_S5 R331 R159 0_4 C290 *DTC144EU 10P_4 1 [14,20] SUSB# 3 R326 Q31 2 *10K_4 3V_S5 3V_S5 PSON# S3_AUX_SW# 2 *DTC144EU 1 3 R138 *10K_4 3 Q30 2 SUSB# 1 4 U24 *SN74AHC1G32DCKR SUSC# [20] 5 CD_BITCLKA *0_4A

REFCLK1 R172 *33_4 C293 *22P_4

PROJECT : ZL5PSON# R369 0_4 0_4 SUSB# [14,20] SUSC# [20] Size Date: Document Number

Quanta Computer Inc.963L(MISC SIGNAL)Thursday, March 10, 20052

S3_AUX_SW# R216

Rev 3B Sheet 121

of

26

8

7

6

5

4

3

8

7

6

5

4

3

2

1

3V_S5 R246 U26C U14 AT93C46D

U26D +1.8V G15 J15 J19 L15 L19 N15 P19 K15 G6 H15 L6 M15 R6 R10 R14 P15 R15 H6 K6 M6 P6 R7 R9 R11 R13 J6 N6 R8 R12 VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ PVDDZ IVDD IVDD IVDD IVDD IVDD IVDD IVDD VTT VTT OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD PVDD PVDD PVDD PVDD IVDD_AUX IVDD_AUX OVDD_AUX OVDD_AUX OVDD_AUX OVDD_AUX OVDD_AUX PVDD_AUX PVDD_AUX 963L VSSZ VSSZ VSSZ VSSZ VSSZ VSSZ VSSZ VSSZ VSSZ VSSZ VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS H8 H9 H10 H11 H12 H13 J8 J9 J10 J11 J12 K8 K9 K10 K11 L8 L9 L10 L11 M8 M9 M10 M11 N8 N9 N10 N11 N12 N13

4.7K_4 C414 8 7 6 5 .1U_6

[2] UCLK48M T42 T38 T37 T34 USBP2+ USBP2USBP3+ USBP3USBP4+ USBP4USBP5+ USBP5USBP0+ USBP0USBP1+ USBP1-

V4 B18 C18 D18 D19 E14 D15 E18 F18 E16 E15 G18 G19 G20 G17 J16 H16 H17 G16 D16 D17 E17 F17 F19 E19 B19 B17 A12 B12 C12 D12 E12 A13 B13 C13 D11 C11

NC USBCLK48M NC UV0+ UV0UV1+ UV1UV2+ UV2UV3+ UV3UV4+ UV4UV5+ UV5OC0# OC1# OC2# OC3# OC4# OC5# USBVDD USBVDD USBVDD USBVDD USBVSS USBVSS USBVSS USBVSS NC NC NC NC NC IDP_OUT0 NC IPD_OUT1 NC NC NC NC NC USBREFAVDD NC NC NC 963L NC NC

E11 C19 A19 A20 F20 D20 E20 C20 B16 A17 F16 A18 C15 C16 C17 B11 D10 A11 E10 D9 B10 A10 C10 C9 B20 GPIO21 GPIO22 GPIO23 GPIO24

T36 T74 T70 T63

GPIO24 GPIO21 GPIO22 GPIO23

1 2 3 4

CS SK DI DO

VCC NC ORG GND

R256

10K_4

D

USBOC0# USBOC1# [15] USBOC2# [15] USBOC3# USBOC4# [15] USBOC5#C

USBOC0# USBOC1# USBOC2# USBOC3# USBOC4# USBOC5#

OSC12MHO USBREF

USBREF USBPVDD USBPVSS IVDD_AUX IVDD_AUX

R230

412/F_4

USB

USBPVDD USBPVSS

1

[15] [15] [15] [15] [15] [15] [15] [15]

OTHERS

GPIO21 GPIO22 GPIO23 GPIO24 OSC12MHI

C637 R370 2

15P_6 CPU_VCCA

OSC12MHI 10M_4 OSC12MHO

Y6 12MHz C636 15P_6 +3V

963L -4Power

3VSUS

L25 0_8 C430 10U/10V_8

USBVDD C431 C428 1U_6 .1U_6

963L-3

IVDD_AUX IVDD_AUX NC NC NC

Power Decoupling Capacitor Place close to chip ball pinCPU_VCCA 3V_S5 C340 10U/10V_8 .1U_6 .1U_6 .1U_6 .01U_6 .01U_6 +1.8V +3V C622 10U/10V_8 10U/10V_8 .1U_6 .1U_6 .01U_6 .01U_6 1000P_6 1000P_6 C383 C389 C368 C371 C396 C410 C380 C360 C357 10U/10V_8 1U_6 1.8V_S5 C486 C427 .1U_6 .1U_6 C358 .1U_6 .1U_6 3V_S5 1.8V_S5

C

T71 T41 T69 T32 T31 T68 T72 T65 T43 USBPVDD C363 C372 C306 C361

C496 C416 C415 C498 C417 C420

F9 F12 F7 F10 F11 F14 F15 F8 F13

T64 T61 UCLK48M R162 *33_4 C283B

J13 J17 K12 K13 L12 L13 L17 M12 M13 P17

T75 T39 T33 T62

B

*22P_6

C619 C626 C364

1U_6 .1U_6 .1U_6 .01U_6 .01U_6 1000P_6 1000P_6

Near 200 MILES

T67 T73 T35 T66

3VSUS 1.8V_S5A

Power Decoupling Capacitor Place close to chip ball pinUSBPVDD

3VSUSA

R365 R366 R362 R363 R361 R368

10K_4 10K_4 10K_4 10K_4 10K_4 10K_4

USBOC0# USBOC1# USBOC2# USBOC3# USBOC4# USBOC5#

IVDD_AUX R160 C485 .1U_6 C484 1U_6

0_6 C492 10U/10V_8

C462 .1U_6 USBPVSS

L26 WB201209B121QNT03 C481 C632 1U_6 10U/10V_8 Size Date: Document Number

PROJECT : ZL5

Quanta Computer Inc.963L(USB/POWER)Thursday, March 10, 20052

Rev 3B Sheet 131

of

26

8

7

6

5

4

3

5

4

3

2

1

ID Select Interrupt Pin Grant Indicate

: AD17 : INTD# : GNT1#[11,15] AD[31..0] AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 [11,15] [11,15] [11,15] [11,15] CBE3# CBE2# CBE1# CBE0# 3 4 5 7 8 9 10 11 15 16 17 19 23 24 25 26 38 39 40 41 43 45 46 47 49 51 52 53 54 55 56 57 12 27 37 48 20 28 29 31 32 33 34 35 36 1 2 21 13 59 70 60 61 64 65 67 68 69 AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 C/BE3# C/BE2# C/BE1# C/BE0# PCIRST# PCIFRAME# PCIIRDY# PCITRDY# PCIDEVSEL# PCISTOP# PCIPERR# PCISERR# PCIPAR PCIREQ# PCIGNT# PCIPCLK PCIIDSEL RI_OUT#/PME# SUSPEND# MF0/INTA MF1 MF2/REQ MF3/IRQSER MF4 MF5/GNT MF6/CLKRUN CAD31 CAD30 CAD29 CAD28 CAD27 CAD26 CAD25 CAD24 CAD23 CAD22 CAD21 CAD20 CAD19 CAD18 CAD17 CAD16 CAD15 CAD14 CAD13 CAD12 CAD11 CAD10 CAD9 CAD8 CAD7 CAD6 CAD5 CAD4 CAD3 CAD2 CAD1 CAD0 CC/BE3# CC/BE2# CC/BE1# CC/BE0# CRST# CFRAME# CIRDY# CTRDY# CDEVSEL# CSTOP# CPERR# CSERR# CPAR CREQ# CGNT# CCLK CSTSCHNG CCLKRUN# CBLOCK# CINT# SPKROUT CAUDIO# 144 142 141 140 139 129 128 127 124 121 120 118 116 115 113 98 96 97 93 95 92 91 89 87 85 82 83 80 81 77 79 76 125 112 99 88 119 111 110 109 107 105 104 133 101 123 106 108 135 136 103 132 62 134 A_CAD31 A_CAD30 A_CAD29 A_CAD28 A_CAD27 A_CAD26 A_CAD25 A_CAD24 A_CAD23 A_CAD22 A_CAD21 A_CAD20 A_CAD19 A_CAD18 A_CAD17 A_CAD16 A_CAD15 A_CAD14 A_CAD13 A_CAD12 A_CAD11 A_CAD10 A_CAD9 A_CAD8 A_CAD7 A_CAD6 A_CAD5 A_CAD4 A_CAD3 A_CAD2 A_CAD1 A_CAD0 A_CC/BE3# A_CC/BE2# A_CC/BE1# A_CC/BE0# A_CRST# A_CFRAME# A_CIRDY# A_CTRDY# A_CDEVSEL# A_CSTOP# A_CPERR# A_CSERR# A_CPAR A_CREQ# A_CGNT# R215 10_4 A_CSTSCHG A_CCLKRUN# A_CBLOCK# A_CINT# A_CAUDIO R234 *10K_4 +3V PCMSPK [17] A_CCD1# A_CAD2 A_CAD4 A_CAD6 A_RSVD/D14 A_CAD8 A_CAD10 A_CVS1# A_CAD13 A_CAD15 A_CAD16 A_CRSVD/A18 A_CBLOCK# A_CSTOP# A_CDEVSEL# A_CTRDY# A_CFRAME# A_CAD17 A_CAD19 A_CVS2# A_CRST# A_CSERR# A_CREQ# A_CC/BE3# A_CAUDIO A_CSTSCHG A_CAD28 A_CAD30 A_CAD31 A_CCD2# +5V C508 .1U_4 C510 10U/10V_8 5 6 5V1 5V2 VPP C459 10 C500 .1U_4 +3V C499 .1U_4 C509 10U/10V_8 3 4 3.3V1 3.3V2 -VCCD0 -VCCD1 VPPD0 VDDP1 16 8 -SHDN -OC GND 7 AVPP C501 10U/10V_8 VCCD0# VCCD1# VPPD0 VPPD1 C379 .01U_4 C388 .01U_4 C507 .01U_4 C506 .01U_4 AVPP .1U_4 C460 .1U_4D

U15 TPS2211A U13 PCI1410A 9 12V VCC1 VCC2 VCC3 13 12 11 VCCCB C376 .1U_4 C362 10U/10V_8 VCCCB

Request Indicate : REQ1#

D

1 2 15 14

C435 .1U_4

C436 .1U_4

CN22 A_CAD0 A_CAD1 A_CAD3 A_CAD5 A_CAD7 A_CC/BE0# A_CAD9 A_CAD11 A_CAD12 A_CAD14 A_CC/BE1# A_CPAR A_CPERR# A_CGNT# A_CINT# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68

CARDBUS SLOTSKTA/VCC1 SKTA/VCC2 SKTA/VPP1 SKTA/VPP2 17 51 18 52 VCCCB AVPP

C

[7,9,11,15,16,19,20] PCIRST# [11,15] FRAME# [11,15] IRDY# [11,15] TRDY# [11,15] DEVSEL# [11,15] STOP# +3V [11,15] SERR# [11,15] PAR [11] REQ1# [11] GNT1# [2] PCLK_PCM

GND1 SKTAAD0/D3 SKTAAD1/D4 SKTAD3/D5 SKTAD5/D6 SKTAAD7/D7 -SKTACBE0/CE1# SKTAAD9/A10 SKTABAD11/OE# SKTAAD12/A11 SKTAAD14/A9 -SKTACBE1/A8 SKTAPAR/A13 -SKTAPERR/A14 -SKTAGNT/WE# -SKTAINT/RDY

C

UPPER PINA_CCLK1 A_CIRDY# A_CC/BE2# A_CAD18 A_CAD20 A_CAD21 A_CAD22 A_CAD23 A_CAD24 A_CAD25 A_CAD26 A_CAD27 A_CAD29 A_CRSVD/D2 A_CCLKRUN# SKTAPCLK/A16 -SKTAIRDY/A15 -SKTACBE2/A12 SKTAAD18/A7 SKTAAD20/A6 SKTAAD21/A5 SKTAAD22/A4 SKTAAD23/A3 SKTAAD24/A2 SKTAAD25/A1 SKTAAD26/A0 SKTAAD27/D0 SKTAAD29/D1 SKTARSVD/D2 -SKTACLKRUN/WP GND2 GND3 -SKTACD1/CD1# SKTAAD2/D11 SKTAD4/D12 SKTAAD6/D13 SKTARSVD/D14 SKTAAD8/D15 SKTAAD10/CE2# -SKTAVS1/VS1# SKTAAD13/IORD# SKTAAD15/IOWR# SKTAAD16/A17 -SKTRSVD/A18 -SKTALOCK/A19 -SKTASTOP/A20 -SKTADEVSEL/A21

R257

10K_4

A_CCLK1 C374 *22P_4

GND5 GND6 GND7 GND8 GND9 GND10 GND11 GND12 GND13 GND14 GND15 GND16 GND17 GND18 GND19 GND20

69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84

AD17 R259 +3V [12,20] SUSB# R226 R222 10K_4 PCM_PME# *0_4

100/F_4

[11] INTD# [11,12,15,20] SERIRQ [12,15,20] CLKRUN#B

T40 SERIRQ T30 CB_RI# CLKRUN#T29

NC NC NC NC

85 86 87 88

R231 +3V 18 44 63 PCI_VCC2 PCI_VCC1 Aux_VCC Globle_RST# RSVD/D2 RSVD/A18 RSVD/D14 VCCD1# VCCD0# 14 86 102 122 138 30 50 VCC5 VCC4 VCC3 VCC2 VCC1 PCI_VCC4 PCI_VCC3 VPPD1 VPPD0 66 143 100 84 74 73 72 71 CB_RSMRST# A_CRSVD/D2 A_CRSVD/A18 A_RSVD/D14 VCCD1# VCCD0# VPPD1 VPPD0 R228 C421

*0_4

PCIRST# +3V +3V R364 2 Q33 *DTC144EU

B

100K_4

C433 .1U_4

C377 .1U_4

C375 .1U_4

C437 .1U_4

C497 .1U_4

.22U_4 10K_4 PCM_PME# 1

3

PME# [12,15,20]

+3V

LOWER PIN-SKTATRDY/A22 -SKTAFRAME/A23 SKTAAD17/A24 SKTAAD19/A25 -SKTAVS2VS2# -SKTARST/RESET 0SKTASERR/WAIT# -SKTAREQ/INPACK# -SKTACBE3/REG# SKTAAUDIO/BVD2 -SKTASTSCHG/BVD1 SKTAAD28/D8 SKTAAD30/D9 SKTAAD31/D10 -SKTACD2/CD2# GND4A

C487 .1U_4

C494 .1U_4

C503 .1U_4

C502 .1U_4

C505 10U/10V_8

R360 CCD2# CCD1# CVS2 CVS1 137 75 117 131 C490 C429 C382 A_CCD2# A_CCD1# A_CVS2# A_CVS1# C493 *10K_4 CB_RI# 1

2

Q32 *DTC144EU

PCLK_PCM R258 *33_4 C504A

3

RING# [12]

*15P_4

6 22 42 58 78 94 114 130

GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8

100P_4 100P_4 100P_4 100P_4

VCCCB1 VCCCB2

126 90

VCCCB C461 .1U_4 C378 .1U_4 C463 10U/10V_8

A_CRST#

R221

*10K_4

VCCCB

FOX_WZ21131-G2

PROJECT : ZL5

Quanta Computer Inc.Size Date:5 4 3 2

Document Number

PCMCIA(PCI1410)Thursday, March 10, 20051

Rev 3B Sheet 14 of 26

1

2

3

4

5

6

7

8

U6

ID Select Interrupt Pin Grant IndicateA

: AD22 : INTB# , INTC#

PCLK_MP R66

*22_4 C161 *10P_4 [11,14] AD[0..31] AD[0..31] [20] USBPWR_ON# R94 0_4

5VSUS USBPWRON# R92 *0_4

2 3 4 1 9

IN1 IN2 EN# GND GND-C

OUT3 OUT2 OUT1 OC#

8 7 6 5

USBPWR2

R100 R96

0_4 *6.34K/F_6

USBOC2# [13]

Request Indicate : REQ0# : GNT0#

IDSEL_MP R48

150_4

AD22

TPS2061DGNR U9

CN17 +3V 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123

MINI-PCIRING LAN2 LAN4 LAN6 LAN8 LED_YP LED_YN NC2 +5V -INTA R(IRQ4) +3VAUX -RST +3V -GNT GND -PME (V) AD30 +3V AD28 AD26 AD24 IDSEL GND AD22 AD20 PAR AD18 AD16 GND -FRAME -TRDY -STOP +3V -DEVSEL GND AD15 AD13 AD11 GND AD9 -CBE0 +3V AD6 AD4 AD2 AD0 (V) SERIRQ GND M66EN SDOUT SDIN1 -RESET -MPCICACK AGND +SPK -SPK AGND NC4 +3VAUX 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 +3V 5VSUS USBPWRON# 2 3 4 1 9 IN1 IN2 EN# GND GND-C OUT3 OUT2 OUT1 OC# 8 7 6 5 USBPWR3A

[21] WIRELESS_LED [20] RF_EN [11] INTC#

D4 1 MTW355

2

[2] PCLK_MP [11] REQ0# AD31 AD29 AD27 AD25 [11,14] CBE3# CBE3# AD23 AD21 AD19B

[11,14] CBE2# [11,14] IRDY# [12,14,20] CLKRUN# [11,14] SERR# +3V [11,14] CBE1#

AD17 CBE2#

R42 CBE1# AD14 AD12 AD10 AD8 AD7 AD5 AD3 AD1

10K_4

+5V

C

125 GND

126 GND

+5V

TIP LAN1 LAN3 LAN5 LAN7 LED_GP LED_GN NC1 -INTB +3V R(IRQ3) GND PCICLK GND -REQ +3V AD31 AD29 GND AD27 AD25 (V) -CBE3 AD23 GND AD21 AD19 GND AD17 -CBE2 -IRDY +3V -CLKRUN -SERR GND -PERR -CBE1 AD14 GND AD12 AD10 GND AD8 AD7 +3V AD5 (V) AD3 +5V AD1 GND SYNC SDIN0 BITCLK -AC_PRIMARY BEEP AGND +MIC -MIC AGND -RI +5VA

R124 R122

0_4 *6.34K/F_6

USBOC3# [13]

+5V INTB# [11] 3VSUS PCIRST# [7,9,11,14,16,19,20] GNT0# [11] PME# AD30 AD28 AD26 AD24 IDSEL_MP AD22 AD20 AD18 AD16 PAR [11,14] [13] USBP2[13] USBP2+ FRAME# [11,14] TRDY# [11,14] STOP# [11,14] DEVSEL# [11,14] AD15 AD13 AD11 USBPWR3 AD9 CBE0# AD6 AD4 AD2 AD0 SERIRQ [11,12,14,20] CBE0# [11,14] [13] USBP3[13] USBP3+ L20 4 1 4 1 3 2 3 2 4 1 USBPWR2 L17 4 1 3 2 3 2 PME# [12,14,20] 5VSUS USBPWRON#

TPS2061DGNR U16 2 3 4 1 9 IN1 IN2 EN# GND GND-C OUT3 OUT2 OUT1 OC# 8 7 6 5 USBPWR5

R267 R268

0_4 *6.34K/F_6

USBOC5# [13]

TPS2061DGNR

C240 47U/6.3V_1210 L19 BK2125HS330 USB2POWER CN18 BUSBP2BUSBP2+ C226 *10P_4 C233 *10P_4 1 2 3 4 5 6 7 8B

DLW21HN900SQ2L

USB_DFHD04MR671

C251 47U/6.3V_1210 L21 BK2125HS330 USB3POWER CN19 BUSBP3BUSBP3+ C243 *10P_4 C246 *10P_4 1 2 3 4 5 6 7 8

DLW21HN900SQ2L

USB_DFHD04MR671

SDIN1_MINI

R33

*10K_4

3V_S5 USBPWR5 L33 [13] USBP5[13] USBP5+ 4 1 4 1 3 2 3 2

C521 47U/6.3V_1210 L32 BK2125HS330 USB5POWER CN24 BUSBP5BUSBP5+ C678 *10P_4 C679 *10P_4 1 2 3 4 5 6 7 8C

3VSUS

DLW21HN900SQ2L

USB_DFHD04MR671

MINIPCI_DGMC4000382

VIN

+5V BT_POWERON# [20] C221 C557 C50 C709 .1U_6 .1U_6 L41 .1U_6 .1U_6 [13] USBP4+ [13] USBP44 1 4 1 3 2 3 2 C587 *10P_4 C588 *10P_4 .01U_4 [21] BT_LED C586 3VSUS 1 Q29 AO3403 3 L42 BK2125HS330 2 C590 10U/10V_8 BT_POWER BUSBP4+ BUSBP4CN5 1 2 3 4 5 6 7 8 PTWO_MINIUSBD

DLW21HN900SQ2L

D

+3V

+5V

VIN

C186 .1U_4

C54 .1U_4

C53 .1U_4

C169 .1U_4

C41 .1U_4

C187 .1U_4

C642 *.01U_6

C683 *.01U_6

C684 *.1U_6

C641 *.1U_6

C640 *.1U_6

C682 *10U/25V_1210 Size Date: Document Number

PROJECT : ZL5

Quanta Computer Inc.MINI PCI/USBThursday, March 10, 20057

Rev 3B Sheet 158

of

26

1

2

3

4

5

6

5

4

3

2

1

VDD33 [12] [12] [12] [12] [12] [12] [12] [12] [12] [12] [12] [12] [12] [12] [12] [12] [12] 1 MDC MDIO TXD0 TXD1 TXD2 TXD3 TXEN TXCLK RXDV RXD0 RXD1 RXD2 RXD3 RXCLK COL CRS RXER R349 Y3 25MHz C624 27P_4 2 *1M_4

R337

1.5K_4 U25 MDC MDIO TXD0 TXD1 TXD2 TXD3 TXEN TXCLK RXDV RXD0 RXD1 RXD2 RXD3 RXCLK COL CRS RXER LAN_XIN LAN_XOUT ACT# LANLED1 LANLED2 100MBPS# LANLED4 PWFBIN VDD33 VDD33 25 26 6 5 4 3 2 7 22 21 20 19 18 16 1 23 24 46 47 9 10 12 13 15 8 14 48 11 17 45 MDC MDIO TXD0 TXD1 TXD2 TXD3 TXEN TXC RXDV RXD0 RXD1 RXD2 RXD3 RXC COL CRS RXER/FXEN X1 X2 LED0/PHYAD0 LED1/PHYAD1 LED2/PHYAD2 LED3/PHYAD3 LED4/PHYAD4 PWFBIN DVDD33 DVDD33 DGND DGND DGND RTL8201CP PWFBOUT AVDD33 AGND AGND 32 36 29 35 PWFBOUT AVDD33

3V_S5 L52 BK1608HS220 C612 22U/10V_8

VDD33 3V_S5 L51 BK1608HS220 C615 C614 10U/10V_8D

AVDD33

C616 .1U_4

C623 .1U_4

C338 .1U_4

C618 .1U_4

C627 10U/10V_8

.1U_4

D

NC

27

TPRXTPRX+ TPTXTPTX+ RTSET ISOLATE RPTR SPEED DUPLEX ANE LDPS MII/SNIB/RTT3 RESETB

30 31 33 34 28 43 40 39 38 37 41 44 42

RDRD+ TDTD+

C621

27P_4

Place close to PWFBINPWFBIN C630 L53 C625 .1U_4 0_8

Place close to PWFBOUTPWFBOUT C628

RTL8201BL : R5 (5.9K 1%) RTL8201CL/RTL8201CP : R5 (2K 1%)

> 60mil

> 60mil

22U/10V_8 R336

.1U_4

CN16 2K/F_4 VDD33 100MBPS# LANLED2 1 D26 1 D27 R35 2 MTW355 2 MTW355 220_4 12 LANACT# 18 LED1_YELP_Y LED1_YELN_YC

LED0 LED1 LED2 LED3 LED4 Link Dupx 10Act 100Act COLC

R193 [7,9,11,14,15,19,20] PCIRST# R196 *0_4 R342 5.1K_6 R188 C304 .1U_4 0_4

5.1K_6 LAN_RX2 5.1K_6 RJ45_RX-

3 4 5 6 LAN_TX2 7 8 9 10 2

RX2RX2+ RX1TX2TX2+ RX1+ TX1TX1+ LED2_AMBER_A1 LED2_P_A2 LED2_GRNN_A3 RING TIP FOXCONN_JM34F23-P2053B

1. You could simply connect RESETB to PCI Reset. And just discard R30, R28, C20. 2. If Wake on Lan feature is needed, you have to supply power from auxiliary power for all LAN-related circuit including RTL8201BL/CL/CP and MAC. In this kind of application, discard R29 and retain other components for one resetting upon power up.

NC GND GND

11 17 16

VDD33

R173

R346 5.1K_6

R187 5.1K_6

R177 5.1K_6

R340 5.1K_6

R344 5.1K_6 VDD33

RJ45_RX+ RJ45_TXRJ45_TX+

C90B

VDD33

R34 ACT#

220_4 15 1 13 14

Reserved for 8201CL/CP LED Mode Change to compatible with BLCOL R354 5.1K_4 VDD33 R335 49.9/F_6

.1U_6 PWFBOUT R45 TIPL 49.9/F_6 U19 RD+ RD1 3 2 4 RD+ RDC RDNC RX+ RXC RXNC 16 14 15 13 RJ45_RX+ RJ45_RXTIPL RINGL

Reserved for ensuring 8201BL/CL/CP latch to UTP Mode.RXER R339 5.1K_4

Place Close to Transformer Side

C555 470P/3KV_1808 CN3 1 2 C556 ACES-MDC LAN_RX2 RINGL LAN_TX2 R38 75_6 R39 75_6 R41 75_6 R40 75_6A

Reserved for ensuring 8201CL/CP latch to normal operation mode.CRS R341 5.1K_4 R333 49.9/F_6 ACT#A

TD+ TDR334 49.9/F_6 C88 C89 *.1U_6 .1U_6 C607 .1U_6

7 6 8 5

TD+ TDC TDNC NS681686

TX+ TXC TXNC

10 11 9 12

RJ45_TX+ RJ45_TX470P/3KV_1808

R351

5.1K_4 5.1K_4 5.1K_4 5.1K_4 5.1K_4

VDD33

100MBPS# R350 LANLED2 LANLED1 LANLED4 R353 R352 R347

PROJECT : ZL5C571 1000P/2KV_1808 Size Date: Document Number

Place Close to Chip Side

Quanta Computer Inc.LAN RTL8201CPThursday, March 10, 2005 Sheet1

Rev 3B 16 of 26

5

4

3

2

1

2

3

4

5

6

7

8

+3V R264 +3V C518 .1U_4 C517 .1U_4 C515 .01U_4 C519 U30 10U/10V_8 1 9 DVDD1 DVDD2 AVDD1 AVDD2 VAUX [12] CD_SDOUTA [12] CD_BITCLKA [12] CD_SDIN0 [12] CD_SYNC [12] CD_RESET# R380 R379 AUDGND AUDGND AUDGND AC_BITCLKA AUDGND AUDGND AUDGND MIC 22P_4 AUDGND LINEINL_AMP LINEINR_AMPB

0_4 +3V U27 4 U28 R262 4 2 SN74LVC1G86DCKR 1 3 5 0_4 BEEP R263 C514A

VDDA 25 38 34 48 43 44 47 37 AUDGND CODAC_MUTE# [18] VDDA C680 C693 C694 L34 C690 TI321611U480 C512

+5V [14] PCMSPK C511 [12] SYSSPKOFF# 1 [12] PCSPK 2 *SN74LVC1G08DCKR 3 5

A

10U/10V_8 .1U_4

1000P_4 .1U_4

10U/10V_8 .1U_4

*2.2K_4 .01U_4

22_4 0_4

AC_BITCLKA

5 6 8 10 11 13 14 15 18 20 19 21 22 23 24

C663 C520 C522 C677 C686 C681 C691

.1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4

SDATA-OUT SPDIFO/TEST BIT-CLK SDATA-IN GPIO0 SYNC GPIO1 RESET# EAPD(JD) PHONE AUX-L AUX-R CD-L CD-R CD-GND MIC1 MIC2 LINE-IN-L LINE-IN-R VIDEO-L VIDEO-R DC VOL PC-BEEP NC ID0# ID1# XTL-IN XTL-OUT DVSS1 DVSS2 ALC203 AVSS1 AVSS2 VREF VREFOUT AFILT1 AFILT2 VRAD VRDA LINE-OUT-L LINE-OUT-R MONO-OUT HP-OUT-L HP-OUT-R

VREFOUT R277 MIC 39 41 AOUTL AOUTR AOUTL [18] AOUTR [18] C528

3K_6 L36 MIC1 BK1608HS121 C530 47P_4 AUDGND SYS_MIC_1 INT_MIC 1 2 6 3 4 5

MIC INCN25 7

10U/10V_8

C516

8

MIC_DFTJ06MS490 35 36

AUDGNDB

AUDGND AUDGND BEEP

C666 C672 C651

.1U_4 .1U_4 1U_6

16 17 12 40

33 27 28 29 30 31 32 26 42 AC97_VREF VREFOUT AFILT1 AFILT2 VRAD VRDA C698 1U_6 C697 1U_6 C696 C695 C699 R270 R273 LINEINL_AMP LINEINR_AMP C527 4.7U/10V_8 C523 4.7U/10V_8 R279 BK1608HS121 R274 BK1608HS121 L35 *BK1608LL121 1000P_4 1000P_4 4.7U/10V_8 100P_6 100P_6 L37 *BK1608LL121

*1500P_6 C529 LINEINL LINEINR *1500P_6 C525

LINE INAUDGND 1 2 6 3 4 5 LIN_DFTJ06MS481 CN27 7

R390 R386 [2] 14M_CODEC R377 0_4 Y8 1 C659 *22P_4 *24.576MHz 2

*1K_4 1K_4 CODECXI CODECXO

45 46 2 3 4 7

AUDGND

8

C658 *22P_4

AUDGND AUDGNDAUDGND AUDGND AUDGND AUDGNDAUDGND

AUDGND

C

C

For EMI requestC700 C701 C702 3V_S5 CN9 [12] CD_SDOUTA [12] CD_SYNC [12] CD_SDIN1 [12] CD_RESET#D

CN7 CN10 1 2 *INT_MIC AUDGND INT_MIC 2 1 ACES-MDC C526 22P_4 CN8 1 2 *INT_MIC R102 0_6 R98 0_6 AUDGND R112 0_6 INT_MIC_R R114 0_6 INT_MIC

100P_4 100P_4 100P_4 1000P_4

C703 C704

C643 RSV RSV 3.3V GND GND AC_BCLK 2 4 6 8 10 12 1000P_4 1000P_4 .01U_4 .01U_4 .1U_4 C705 C706 CD_BITCLKA [12] R376 C708 *22_4 C644 *10P_4 AUDGND .01U_4 C707

AUDGND

R373

33_4

SDIN1_M

1 3 5 7 9 11

GND AC_SDO GND AC_SYNC AC_SDI AC_RST# MDC

D

C635 *10P_4

PROJECT : ZL5

Quanta Computer Inc.Size Date: Document Number

CODEC(ALC203)/MDC1.5Thursday, March 10, 20057

Rev 3B Sheet 178

of

26

1

2

3

4

5

6

5

4

3

2

1

+5V AVDD AVDD R382 R383 C650 C667 AUDGNDD

AVDD 0_8 0_8 C668 .1U_4 C670 10U/10V_8 C669 10U/10V_8D

C648 10U/10V_8

C655 C662 .1U_4 .1U_4 1U_6 R389 AUDGND 25 15 8 U29 10 7 D23 HPS HPL HPR OUTL+ OUTLOUTROUTR+ PVDDL PGNDL PVDDR PGNDR 20 14 13 4 5 17 18 6 3 16 19 C685 MAX9755AETI .1U_4 10U/10V_8 .1U_4 10U/10V_8 R278 *0_6 AUDGND C671 AUDGND C689 C654 C653 100K_6 SPKPLG SPKL_R SPKR_R L55 L54 R401 470P_4 1K/F_6 1K/F_6 AUDGND AUDGND AUDGND R265 R269 *0_6 0_6C

.1U_4 AUDGND

AUDGND

R378 [17] AOUTL [17] AOUTR R381 0_4 R385 0_4 R384 *100K_6 AVDD AUDGND R400 10K_6C

LINE OUTBK1608HS121 BK1608HS121 C687 C692 470P_4 SPKL_SYS SPKR_SYS SPKPLG CN26 1 7 2 6 3 4 5 8 HP_DFTJ06MS503

VDD

HPVDD C1P

INL INR NC NC

C664

1U_6

C1N CPVDD

*100K_6

C657

1U_6

2 28 1 27

HPSSPKL SPKR INSPKL+ INSPKLINSPKRINSPKR+ R397 R394

2

1 MTW355 301/F_6 301/F_6

R393 AVDD

GAIN1

24 23

GAIN_SEL GND CPGND GND /SHDN VBIAS CPVSS 11 VSS 12

[20] AMP_MUTE#

1 D22 MTW355

2

MUTE

22 21

26

1U_6

AUDGND

AUDGND 1U_6

SPKR HP GAIN1 MODE MODEAUDGND

0B

10.5 9

3C673 C674 47P_4 AUDGND

1

0INSPKR+ R272 INSPKL+ R266 C513 C665 .01U_4 .01U_4 0_6 INSPKR+_R INSPKR0_6 INSPKL+_R INSPKLL31 L30 L29 L28 BK1608LL121 BK1608LL121 BK1608LL121 BK1608LL121

9

[17] CODAC_MUTE#

1 2 D24 *MTW355

C688

47P_4 INSPKR+N INSPKR-N INSPKL+N INSPKL-N C676 47P_4 AUDGND

SPEAKER CON.CN11 4 36 25 1 R388 R387 C524 C660 AUDGND 0_6 0_6 .1U_4 1000P_4

B

AVDD

C675 47P_4 AUDGND

R_L_SPEAKERS

R392 *1K_6 GAIN1 R391A

AUDGND

R271 R260 R261

*0_6 *0_6 *0_6 AUDGND

1K_4 AUDGND

PROJECT : ZL5

A

Quanta Computer Inc.Size Date: Document Number

AUDIO AMPThursday, March 10, 2005 Sheet1

Rev 3B 18 of 26

5

4

3

2

1

2

3

4

[11] PDD[0..15]

CN23 HDD_DFHS44FR975 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15 PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 -RST_HDD0 PDD7 PDD6 PDD5 PDD4 PDD3 PDD2 PDD1 PDD0 [11] PDDREQ [11] PDIOW# [11] PDIOR# [11] PHDRDY [11] PDDACK# [11] IRQ14 [11] PDA1 [11] PDA0 [11] PDCS1# 1 MTW355 *100P_4 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15

+5V

+3V 2 Q22

R223 -RST_HDD0 -RST_RBAY0 R225 R227 0_4 0_4 10K_4 3

1 DTC144EU

PCIRST# [7,9,11,14,15,16,20]A

A

PHDRDY IRQ14

PSEL

R374 R375

470_4 *10K_4 PDA2 [11] PDCS3# [11]

+5V

C661 150U/6.3V_7343

C656 .1U_4

C652 1000P_4

C647 .1U_4

C649 .1U_4

C646 .1U_4

PDD7

R358

10K_4

[21] IDELED#

2 D21

HDLED# C645 +5V

46

[11] SDD[0..15]

CN15 ODD_DFHS50FR245 SDD8 SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15 SDD0 SDD1 SDD2 SDD3 SDD4 SDD5 SDD6 SDD7 IDELED# -RST_RBAY0 SDD7 SDD6 S