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  • 8/18/2019 A Zero Voltage Transition Bidirectional

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    3152 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 62, NO. 5, MAY 2015

    A Zero-Voltage-Transition BidirectionalDC/DC Converter

    Serkan Dusmez, Student Member, IEEE , Alireza Khaligh, Senior Member, IEEE , and

    Amin Hasanzadeh, Member, IEEE 

    Abstract —A three-level (TL) bidirectional dc/dc con-verter is a suitable choice for power electronic systems witha high-voltage dc link, as the voltage stress on the switchesis half and inductor current ripple frequency is twice theconverter’s switching frequency. This study proposes azero-voltage transition (ZVT) TL dc/dc converter to en-able operation with higher switching frequency in orderto achieve higher power density and enhance efficiency.Two identical ZVT cells, each one composed of two res-onant inductors, a capacitor, and an auxiliary switch, are

    integrated with the conventional TL topology to enablesoft switching in all four switches in both buck and boostoperation modes. In addition, a variable dead-time con-trol is proposed to increase the effective duty ratio atheavy loads. The proposed soft-switching feature has beendemonstrated under different loading conditions. A 650-Wprototype is designed and fabricated, which exhibits 95.5%at full load.

    Index Terms —Bidirectional three-level (TL) converter,nonisolated dc/dc converter, power electronics, zero-voltage transition (ZVT) cell.

    I. INTRODUCTION

    IN bidirectional nonisolated buck/boost dc/dc converter ap-plications, a two-quadrant nonisolated buck/boost converter

    has been preferred in many studies due to its simple two-switch

    structure, low cost, and high efficiency [1]–[6]. However, in

    high-voltage (400–600 V) and medium- to high-power appli-

    cations such as the dc/dc bidirectional converter in electric

    vehicles, the two-switch structure exhibits several shortcom-

    ings: 1) low efficiency at light load due to high-power losses

    Manuscript received June 22, 2014; revised September 22, 2014;accepted October 12, 2014. Date of publication February 19, 2015; dateof current version April 8, 2015. This work was supported in part bythe National Science Foundation Division of Electrical, Communicationsand Cyber Systems under Grant 1307228 and in part by Genovation

    Cars, Inc.S. Dusmez was with the Power Electronics, Energy Harvesting and

    Renewable Energies Laboratory, Electrical and Computer EngineeringDepartment, University of Maryland, College Park, MD 20742 USA. Heis now with the Electrical and Computer Engineering Department, TheUniversity of Texas at Dallas, Richardson, TX 75080 USA.

    A. Khaligh is the Director of the Power Electronics Energy Harvestingand Renewable Energies Laboratory, Institute for System Research,and Electrical and Computer Engineering Department, University ofMaryland, College Park, MD 20742 USA (e-mail: [email protected]).

    A. Hasanzadeh was with the Power Electronics, Energy Harvestingand Renewable Energies Laboratory, Electrical and Computer Engineer-ing Department, University of Maryland, College Park, MD 20742 USA.

    Color versions of one or more of the figures in this paper are availableonline at http://ieeexplore.ieee.org.

    Digital Object Identifier 10.1109/TIE.2015.2404825

    associated with the parasitic capacitances of the switches;

    2) utilization of insulated-gate bipolar transistors (IGBTs)

    instead of metal–oxide–semiconductor field-effect transistors

    (MOSFETs) in high-voltage applications, whereas the switch-

    ing frequency of the converter is limited by the IGBT’s max-

    imum switching frequency under hard switching. As a result,

    the passive components such as the inductors and capacitors

    render a large volume. To increase the input current ripple fre-

    quency, interleaved structures are studied [7]–[9]. Interleavingreduces the size of the passive components but still requires

    high-voltage rating switches. In order to equally distribute the

    voltage stress among the switches and to use MOSFETs at

    high voltages while still increasing the inductor current ripple

    frequency to twice the switching frequency, a three-level (TL)

    output voltage buck/boost dc/dc converter has been proposed

    and suggested for use in high-voltage applications [10].

    To increase power density through higher switching frequen-

    cies without sacrificing converter efficiency, soft-switching

    techniques are employed [11]–[13]. A common way to achieve

    soft switching is to use interleaving circuits where the stored

    energy in the interleaving inductor is used to discharge the

    parasitic capacitances of the switches [14]–[17]. Similarly, an

    auxiliary inductor can be coupled to the main inductor to reduce

    the cost of the circuit [18]–[22].

    Another method to effectively achieve soft switching is

    through employing an auxiliary switch to store the switching

    energy in the auxiliary capacitor, which is then used to soft-

    switch the main switch either during turn-on or turn-off in-

    stants. Soft-switching cells, consisting of an auxiliary switch,

    a resonant inductor, and a capacitor, are common [23]–[26]. In

    [23], the soft-switching cell is used to turn off the switch under

    zero current and turn on the auxiliary switch under near-zero

    current. Another ZCS was introduced in [24] for the boost con-

    verter, which is then generalized for other converter types suchas buck, buck/boost, SEPIC, and Cuk. In [25], unified analysis

    for these soft-switching cells was explored. In [26], a similar

    soft-switching cell used in this paper has been proposed for

    bidirectional nonisolated buck/boost dc/dc converter. However,

    no soft-switched nonisolated TL converter has been explored in

    the literature.

    Reducing the switching losses is critical to achieve higher

    efficiency. In this regard, this paper proposes a zero-voltage

    transition (ZVT) TL bidirectional dc/dc converter for a wide

    load range, as illustrated in Fig. 1. Two identical soft-switching

    cells are deployed for each pair of switches, ensuring that all

    four switches are turned on under zero voltage in both boost

    0278-0046 © 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.

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    DUSMEZ et al .: ZERO-VOLTAGE-TRANSITION BIDIRECTIONAL DC/DC CONVERTER 3153

    Fig. 1.   Proposed bidirectional TL dc/dc converter with an auxiliaryZVT cell.

    and buck modes. Thus, the proposed ZVT TL converter can

    be operated at higher switching frequencies, the input current

    ripple frequency can be doubled, and the size of the inductor

    can be significantly reduced.

    The common issue with the soft-switching converters is

    the limited soft-switching operation range due to the outputcurrent dependence of the soft-switching operation. When the

    ZVT cell designed for a light-load condition operates under

    heavy load, the effective on-time of the switches becomes less

    than the reference. To partially compensate this negative effect

    on the duty ratio of the main switch, the auxiliary switch

    is controlled through adjusting the dead time with respect to

    peak inductor current. The improvement on the effective duty

    ratio using the proposed variable dead-time control is analyzed

    and compared with the conventional fixed dead-time approach

    within the content of this paper. Although the improvement on

    the duty ratio is analyzed in this paper, the proposed technique

    is a possible solution for secondary control objectives, such as

    capacitor voltage balancing.

    II. PROPOSED B IDIRECTIONAL Z VTTL DC/DC CONVERTER

    The proposed converter achieves ZVT for all the switches

    during turn-on instants in all operation modes. The ZVT cell

    contains two resonant inductors, one resonant capacitor, and an

    auxiliary switch to eliminate the turn-on losses of switches by

    creating a resonance between the inductor and the capacitor.

    The energy stored in the auxiliary inductor during normal

    operation is transferred to the capacitor when the main switch is

    turned off. This energy is then recycled through the body diodeof the main switch before it is turned on. An identical ZVT cell

    TABLE ISUMMARY OF THE  ZVT OPERATION

    is placed between switches S 3 and S 4 to soft-switch the bottomtwo switches. The basic operation principle of the ZVT cell is

    identical in each transition mode for both boost and buck op-

    erations. Table I summarizes the ZVT cell operation depending

    on the buck and boost modes, used resonant inductor, auxiliary

    switch, and soft-switched MOSFET.

    The equivalent circuits and operation waveforms are given

    in   Figs. 2   and   3, respectively. Here, the operation principle

    will be given for the turning-on instant of  S 2   in boost modewhen   d > 0.5. It should be noted that   Lr3   is not involvedduring this switching-state transition and can be assumed as

    an additional contributing inductance to  Lin. For the sake of symmetrical operation, the resonant inductors are chosen equal,

    i.e., Lr1  =  Lr2  =  Lr3  =  Lr4  =  Lr.Operation Interval 1   [t < t0]:   Before   t0, both  S 2   and  S 3

    are on,  L in  stores energy, and the converter operates in boostoperation mode of the TL converter. In this mode, iLr1(t0) = 0.If the on-time of the auxiliary switch is equal to the quarter of 

    the resonance period, the resonant capacitor voltage becomes

    zero at   t0,   (vCr1(t0) = 0). This will be explained in lattersections. The current of  Lr2 is equal to

    iLr2(t) = iLr2(t7) +  V in

    Lin + 2Lrt.   (1)

    This time interval is determined by the effective on-time duty

    ratio of  S 2.Operation Interval 2  [t0 ≤ t < t1]:   At t  =  t0, S 2   is turned

    off. The current of  Lr2  begins to resonate in the resonance tank composed of  Lr1 − Lr2 − C r1. The sum of the voltages of theinductors   vL1 + vL2   is equal to   vcr1. During this short timeinterval, the parasitic capacitance of the upper switch, i.e., C 1,discharges over the output capacitor and transfers its energy

    while   C 2   is charged as   vS 1(to) = V o/2, and   vS 1 + vCr1 +

    vS 2  =  V o/2 during t01. The initial conditions can be noted as

    iLr2(t0) = iLr2(t7) +

      V in

    Lin + 2Lr

    t70   (2)

    iLr1(t0) = 0   (3)

    vCr1(t0) = 0.   (4)

    The natural frequency of the resonant tank is expressed as

    ω =  1√ 2LrC r1

    .   (5)

    Operation Interval 3   [t1 ≤ t < t2]:   C 1   is completely dis-charged at the end of operation interval 2, as current begins

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    3154 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 62, NO. 5, MAY 2015

    Fig. 2.   Operation intervals and equivalent circuits. (a) Operation interval 1:  t < t0. (b) Operation interval 2:  t0  < t < t1. (c) Operation interval 3:t1  < t < t2. (d) Operation interval 4: t2  < t < t3. (e) Operation interval 5: t3  < t < t4. (f) Operation interval 6: t4  < t < t5. (g) Operation interval 7:t5  < t < t6. (h) Operation interval 8:  t6  < t < t7.

    commutating from Lr2  to  Lr1, and D1  conducts. C 2  continuesto get charged. This interval occurs very quickly as   C 1   is

    typically on the order of several hundreds of picofarads andis not included in the calculations for simplicity. The energy

    stored in Lr2  is transferred to resonant capacitor  C r1   throughDa1. For this interval, the resonant inductor currents can beexpressed as

    iLr2(t) = iLr2(t0)cos(ωt)   (6)

    iLr1(t) = iLr2(t0) (1 − cos(ωt)) .   (7)

    The resonant capacitor voltage can be written as

    vCr1(t) =   iLr2(t0)C r1ω

      sin(ωt).   (8)

    At t  =  t2, iLr2  becomes zero as it transfers all its energy to theresonant capacitor

    iLr2(t2) = 0.   (9)

    From this final state condition,  t02  can be found as

    t02  =  π

    2ω.   (10)

    Operation Interval 4  [t2 ≤ t < t3]:   At t  =  t2, the resonantinductor current iLr1  is the same as iLr2(t0). The resonant ca-pacitor voltage can be found from the energy transfer between

    vcr1  and  iLr2 as

    vCr1(t2) = 

    2LrC r1

    i2Lr2(t0).   (11)

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    Fig. 3.   Switching scheme and circuit waveforms of the proposed ZVTconverter.

    The energy stored in vcr1 will be used to achieve soft switchingin the latter stage. In this time interval, the resonant inductor

    current iLr1 can be written as

    iLr1(t) = iLr1(t2) −

    V o/2 − V inLin + Lr

    t.   (12)

    Operation Interval 5  [t3 ≤ t < t4]:   Before S 2  is turned on,the auxiliary switch, i.e., S a1, is turned on to transfer the energystored in the capacitor to the resonant inductor, i.e.,  iLr2.  S a1is turned on under zero current; thus, there is no switching

    turn-on loss for the auxiliary switches.  vLr2   is half the  vCr1,

    and iLr2  sinusoidally increases.  C 2   is first quickly charged tovCr1 + V o/2 and then discharged as vCr1 decreases. At t =  t3,the initial conditions are as follows:  iLr2(t3) = 0,  vcr1(t3) =vcr1(t2). In this interval, the resonant inductor currents andcapacitor voltage are

    vCr1(t) = vCr1(t3)cos(ωt)   (13)

    iLr2(t) = − C rvCr1(t3)ω sin(ωt)   (14)

    iLr1(t) = iLr1(t3) + C rvCr1(t3)ω sin(ωt)   (15)

    t34  =  π

    .   (16)

    At the end of this mode, vCr1(t4) = vCr1(t0) = 0.

    Operation Interval 6 [t4 ≤ t < t5]:   When the energy storedin the resonant capacitor is completely transferred via   S a1,C 2   quickly discharges to zero. This time interval can beexpressed as

    t45  =

    8Lr iLr2(t4) − iLr2(t4)2

    −  C 2V  2o8L

    r V o

    .   (17)

    At  t  =  t5, the current of  D1   increases to approximately twicethe load current.

    Operation Interval 7   [t5 ≤ t < t6]:   When  vS 2   reaches to−0.7 V, the body diode of   S 2   conducts. This time period isthe ZVT period.  S 2  can be turned on at any time during thisinterval. At t  =  t5, the initial conditions are

    iLr2(t5) = − 

    C r1v2

    Cr1(t2)

    2Lr(18)

    iLr1(t5) = iLr1(t4) + C r1vCr1(t4)ω sin(ωt4)   (19)

    where vLr2  is equal to V o/4, and iLr2  linearly decreases, i.e.,

    iLr2(t) = iLr2(t5) +  V o4Lr

    (20)

    iLr1(t) = iLr1(t5) −   V o4Lr

    t.   (21)

    Operation Interval 8 [t6 ≤ t < t7]:   This interval starts afterthe main switch S 2  is turned on. At t  =  t6, the main switch S 2is turned on while its body diode is conducting. The ZVT can

    be achieved at this instant. With the assumption of negligiblet45  in comparison to t56, t46 ∼= t56, the ZVT time interval canbe expressed as

    t56  = 4Lr (iLr2(t6) − iLr2(t5))

    V o.   (22)

    First, the current of the body diode of S 2 reaches to zero. In thistime interval, S 2 begins to conduct, and input current commutesfrom Lr1  to  Lr2. At  t  =  t6, iLr1  is

    iLr1(t6) = iLr1(t5) −   V o4Lr

    t56.   (23)

    The resonant inductor currents for this interval can be

    expressed as

    iLr1(t) = iLr1(t6) −   V o4Lr

    t   (24)

    iLr2(t) = iLr2(t6) +  V o4Lr

    t.   (25)

    At  t =  t7, the input current commutation from  Lr1   to  Lr2   iscompleted, and  iLr1  becomes zero. This time interval can beexpressed as

    t67  =  4Lr (iLr2(t7) − iLr2(t6))

    V o.   (26)

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    3156 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 62, NO. 5, MAY 2015

    III. DESIGN  C ONSIDERATIONS FOR  ZVT FEATURE

    The time between the turning-off action of   S a1   and theturning-on action of the main switch S 2, which is denoted byt46, should be as short as possible to achieve ZVT with thesmallest amount of energy stored in the resonance tank. This

    would minimize the size of the resonant tank elements and

    allows achieving higher efficiency as the circulating current in

    the resonant tank would be less. To achieve ZVT, the auxiliary

    switch should be turned on at least  t36  before the main switchis turned on. It should be highlighted that   t34   is the timeduration in which the stored energy in the auxiliary capacitor is

    transferred to the auxiliary inductor, and t45 is the time requiredto discharge the parasitic capacitance of the switch. For the

    ideal case, the minimum required time is  t35.   t56   is the timeduration added to guarantee the soft switching of the main

    switch taking the mismatch between the actual and datasheet

    values of the switch. Considering this added time margin, the

    auxiliary switch should be turned on at least   t36   before the

    main switch is turned on. Once  t46   is determined,  Lr   can becalculated accordingly.

    A. Constant Power Loads 

    The minimum value of  Lr   can be determined for constantpower loads with predefined  P o,  V o,  V in, and  L in   and steady-state duty ratio (D). For simplicity in calculations, it is assumedthat iLr2  does not vary during t45, and |iLr2(t5)| = |iLr2(t0)|,which yields

    Lr ≥   V o4iLr2(t0)

    t46.   (27)

    In order to have zero voltage across  C r1   from   t =  t4   to   t =t0, the reverse resonance time, i.e.,   t34, should be equal toone fourth of the natural resonance period, i.e.,   t02, which isinitiated by turning on  S a1. If  t34   is forced to be shorter thant02, vCr1(t0) would be higher than zero. C r1 can be calculatedfrom (5) and (10), by equalizing t34  and  t02  time periods, as

    C r1  =  2

    Lrπ2t202.   (28)

    Since two quarter resonance periods take place during the off-

    time of the switch, their sum should be shorter than  (1 − D)T s,where T s  represents the switching period

    t02  < T s(1 − D)

    2  .   (29)

    As the quarter resonance period  t02   increases, the requiredcapacitance also increases while the voltage stress on  S 2   re-duces. The additional voltage stress across S 2 is equal to that of vcr1(t2) and can be expressed as

    vcr1(t2) = iLr2(t0)

     2LrC r1

    .   (30)

    B. Variable Power Loads 

    From (27), it can be observed that the ZVT feature is depen-dent on the load current as it determines the stored energy in the

    Fig. 4.   Illustration of ZVT operation with fixed and variable dead timesfor evaluation of t67. (a) Fixed dead time. (b) Variable dead time.

    resonant inductor. Therefore, for wide-load-range applications,

    the minimum input current at which the ZVT feature is desired

    should be determined for the given application, i.e.,

    tZV T  ≥ tdt + tm   (31)where  tdt  denotes the selected dead time, and   tm   is the timemargin, representing the time from turn-on instant of the main

    switch until   iLr2   becomes zero, and should be included in

    the calculations ensuring that the switch is switched underzero voltage. Minimum   Lr   for variable power loads can bedetermined as

    Lr ≥   V o4iLr2(t0)

    tZV T .   (32)

    In case the auxiliary switch is turned off   tdt   seconds beforethe main switch is turned on,  D1  would conduct for the timeduration of  tZV T .

    The selected Lr  should be sufficiently large to achieve softswitching for   S 2   at minimum load current. However, the se-lected  Lr  would cause losing effective on-time of the switch

    as the load gets heavier. This issue is illustrated in  Fig. 4(a).Here, it is assumed that the load current is larger than  I _min,and Lr is found using (27) for the ideal case, assuming tdt  = 0.As shown in the figure, the reduction in the duty ratio, which

    is denoted by  DL, increases under heavy load. The reductionin the duty cycle should be compensated similar to dead-time

    compensation applied in three-phase inverters [27]. To reduce

    this effect, the phase of the gating signal of the auxiliary switch

    should be varied such that the main switch is turned on right

    before the current of the main-switch body diode reaches zero.

    In this regard, a variable dead-time control is proposed in this

    paper, as shown in Fig. 4(b). The gating signals for the auxiliary

    switches are practically achieved by right-aligned pulsewidth

    modulation (PWM) signal with inserted fixed dead time. Atheavy loads, instead of turning off the auxiliary switch with

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    TABLE IIDESIGN PARAMETERS

    fixed   tdt   seconds, before the main switch is turned on, thedischarging of the resonant capacitor can be initiated earlier

    by adjusting the dead time between the main and auxiliary

    switch signals. Hence, the resonant inductor current crosses

    zero tm  seconds after the main switch is turned on. At the idealcase, i.e., tm  = 0, this could reduce DL  to  DL/2, as illustratedin Fig. 4(b).

    It is important to note that the proposed variable dead-time

    approach can be used for achieving supplementary control

    objectives such as dc-link capacitor voltage balancing. The vari-

    able dead time has not been considered in any soft-switchingliterature because it may not be necessary in two-level convert-

    ers. One of the difficulties in TL converters is the unbalanced

    dc-link capacitor voltages, which may occur due to the un-

    symmetrical circuit layout, differences in the equivalent series

    capacitance of capacitors, delays in the gate driver circuit, etc.

    The unbalanced voltage problem could be solved by controlling

    the duty cycles of the main switches independently, letting ca-

    pacitors charge/discharge more or less with respect to the other

    dc-link capacitors. However, the common approach is to use

    the same PWM duty-cycle generator for both of the switches

    due to its simple control and, more importantly, for stable

    operation. In this regard, developed secondary variable dead-

    time control can be adopted to balance the dc-link capacitors aswell as contribute to the duty-cycle compensation, correcting

    the unbalanced ZVT current injection due to unsymmetrical

    ZVT circuit parameters and so on. However, in this paper, only

    partial duty-cycle compensation has been studied, and capacitor

    voltage balancing is out of the scope of this paper.

    C. Example Application 

    This section provides a ZVT cell design procedure for a

    variable power load. The example design specifications are

    provided in Table II. The converter operates in CCM at full-

    load range.The first design parameter to be determined is tZV T . As pre-viously discussed, t45 is relatively short, on the order of severalnanoseconds. The variation of  t45  at minimum load current ac-cording to Lr is plotted in Fig. 5(a) for maximum and minimumoutput voltages. As the output voltage increases, more energy

    is stored in the parasitic capacitances of the switches, which

    extends the discharge time to 5 ns. At  P o = 250  W, the deadtime, i.e., tdt, is chosen as 30 ns. This would be 5 ns for an idealcase; however, it is reasonable to insert a dead time to ensure

    that soft switching will be robust to the mismatch of the actual

    and datasheet values as well as to compensate the previous

    simplifications. Since the switching period is 5 µs and consid-

    ering the turn-on and turn-off time of MOSFETs,  tm  is chosenas 20 ns to ensure that the auxiliary switch turns off 30 ns

    before the main switch is turned on. This way, the resonant

    current will become zero after   tm + tdt  = 50   ns. The ZVTtime period corresponds to 1% of the switching period. The

    reduction in the duty cycle, i.e.,  t67/DT s, can be expressed as

    DL  =  (tdt + 2tm)

    DT s.   (33)

    To find  Lr, the worst condition should be considered; thatis, P o =  P o,min, and V o  =  V o,max. Assuming that Lin  is largeenough and input current is constant,  iLr2(t0)   in (32) can beapproximately equal to the input current. For this example,  Lris calculated as 1   µH. The highest ZVT time, i.e.,   t57/2, is50 ns for minimum load at  V o =  V o,max. At maximum load,the ZVT period increases to 130 ns. For V o =  V o,min, the ZVTperiod for minimum load is 55 ns, and at maximum output

    power, it increases up to 145 ns. The same amount of time is

    required for the main switch current to reach the input current,

    i.e.,   t57/2. For a fixed   tdt   of 30 ns,   t67   can be calculatedusing  t57

    −tdt  as 70 and 230 ns for the lightest and heaviest

    load conditions at  V o  =  V o,max, respectively. Similarly, whenV o =  V o,min,   t67  becomes 80 and 260 ns for the lightest andheaviest load conditions, respectively.

    In CCM, the duty ratios for  V o  =  V o,min   and  V o =  V o,maxare 44% (corresponding to 2.22 µs) and 50% (corresponding to2.5  µs). Using (33),  DL   is calculated as 3.6% and 11.6% forlight- and heavy-load conditions at  V o  =  V o,min, respectively.Similarly, for  V o  =  V o,max, it is calculated as 2.8% and 9.6%,respectively. Using the proposed variable dead-time approach,

    DL   can be effectively reduced as shown in   Fig. 5(b). Thedead-time curve used to accomplish  DL  reduction is given inFig. 5(c).

    The acquired data are summarized in Table III. It can be seenthat DL   is reduced from 11.6% to 7.4% for low output voltageand heavy-load conditions. If  tm  is chosen smaller at the initialstep,   DL  can be reduced even further, to half the   DL   valuewith fixed dead time at the ideal case, when  tm = 0. However,further duty-cycle compensation is still required.

    Once   tdt   and   Lr   are determined,   C r   can be determinedfrom (28) and (29). As mentioned before, the pulsewidth of 

    S a1  should be equal to  t02   to have zero voltage across  vcr   att =  t0. When a dead time is inserted, (29) should be modifiedto incorporate tdt. Thus,

    t02  <

      T s(1

    −D)

    2   − tdt.   (34)The highest tdt   is achieved when output power is maximum

    and output voltage is lowest. However, for this case,  T s(1 −D)/2 − tdt   for the   V o =  V o,max   condition is smaller; hence,t02  should be determined based on maximum output voltage.This determines the upper bound for choosing   t02, which iscalculated as 1.14  µs. The variation of the capacitance valueand voltage stress of the resonant capacitor for various   t02values from 0.1 to 1.14   µs is given for the heaviest loadcondition in Fig. 6. Here,  C r  can be determined based on thetradeoff between the capacitance value and the voltage stress.

    In addition, there should be sufficient margin for duty-cycle

    compensation. Once   t02   is determined, the duty ratio of  S a1can be found by dividing  t02  by  T s.

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    Fig. 5.   Curves for the ZVT operation. (a) Switch parasitic capacitance discharge time according to various  Lr . (b) Reduction in effective dutyratio for various output power values when   Lr   = 1   µH. (c) Required dead time for the proposed variable dead-time control at various outputpower values.

    TABLE IIIACQUIRED DATA FOR  ZVT OPERATION

    Fig. 6.   Capacitance and voltage stress variation of the resonant ca-pacitor at various t02  values.

    IV. SIMULATION AND  E XPERIMENTAL  R ESULTS

    Here, simulation and experimental results are provided toverify the operation of the converter. The switching frequency

    of the main and auxiliary switches is 200 kHz, where the

    frequency of the inductor and output capacitor current ripples

    is 400 kHz. The resonant inductors, i.e.,   Lr , are 1   µH, andthe resonant capacitors, i.e.,  C r, are 100 nF each. Only boostoperation mode is presented here, as buck operation is similar

    to boost operation.

    The simulation waveforms for  d = 0.53  and  d = 0.4  usingideal switches are given in   Fig. 7(a)   and  (b), respectively. In

    boost operation, only S 2 and S 3 are switched while body diodesof   S 1   and   S 4   conduct. The additional voltage stress on themain switches can be clearly observed. The duty ratio of the

    auxiliary switch calculated from the analysis match with onefourth of the resonant period, such that the resonant capacitor

    voltage is almost zero. The simulation waveforms agree with

    the theoretical analysis.

    The simulation waveforms for boost operation utilizing non-

    ideal switches when   d = 0.4   are presented in   Fig. 7(c). In

    the figures, it can be clearly seen that  C oss   of the switches,particularly that of the auxiliary switches, causes to form a

    resonant tank between Lr − Lr − C r − C oss. Without includ-ing the internal resistances, this oscillation keeps circulating

    back and forth. As seen from the input inductor voltage, this

    oscillation causes inductor current to have a small oscillating

    current in addition to the linearly increasing current.

    A 650-W proof-of-concept prototype, shown in   Fig. 8, is

    designed to serve as a proof-of-concept and to show ZVT oper-

    ation of the circuit. The circuit parameters are the same as those

    of the simulation. The current ratings of the switches are chosen

    based on the root mean square (rms) value. As the ZVT circuit

    does not impose additional current stress on the main switches,the main-switch rms current can be found as in a traditional

    TL converter [10]. The voltage rating of the main switches is

    the sum of half the output voltage and the resonant capacitor

    voltage, which was given in (30). It can be expressed as

    V main  = V o

    2  + iLr2(t0)

     2LrC r1

    .   (35)

    On the other hand, the current rating of the auxiliary switch

    is equal to

    I aux,rms  =  iLr2(t0) 2 + π8ωT s

    .   (36)

    The component parameters used in the experiments are given

    in Table IV. Fig. 9 presents the input inductor current waveform

    and gate–source voltages of  S 2   and S 3. This figure illustratesthe boost mode operation of the TL converter, where the current

    ripple frequency is twice the switching frequency.

    The ZVT operation of the converter has been presented in

    the experimental results provided in  Figs. 10  and  11.   Fig. 10

    presents the ZVT operation during boost mode of operation

    for   d

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    Fig. 7.   Simulation waveforms for boost operation mode. (a) d  = 0.53 with ideal switches. (b) d  = 0.4 with ideal switches. (c)  d  = 0.4 with nonidealswitches.

    Fig. 8.   Photograph of the designed experimental prototype.

    TABLE IVCOMPONENT PARAMETERS

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    Fig. 9.   Experimentalwaveforms of normal boostoperation; gate–sourcevoltages S 2  and  S 3  and inductor current for (a)  d <  0.5 and (b) d >  0.5.

    voltage waveforms are presented, from which ZCS operationcan be clearly seen. The experimental waveforms agree with

    the simulation results presented in   Fig. 7(c). Different than

    simulation, the oscillations are damped due to the internal

    resistances of the components in the experiments. Likewise,

    ZVT operation for boost mode for d

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    Fig. 11.   Experimental waveforms of ZVT operation boost mode whend <  0.5  (high current). (a) Gate–source and drain–source voltages andcurrent of S 2  and gate–source voltage of  S a1  for two switching periods.

    (b) Zoomed-in snapshot. (c) Gate–source and drain–source voltagesand current of S a1  and gate–source voltage of S 2.

    In addition, the very high frequency oscillation observed on

    the gate signals is due to the high parasitic capacitance of the

    differential probe. Since the grounds of the probes should be

    isolated, a regular and a differential voltage probe are used

    for sensing gates of the signals. To prove this claim, the

    regular and differential probes have been connected to the gate–

    source terminal of  S 2 (purple waveform) and S a1  (green wave-form) in  Fig. 10(b), respectively. As it can be seen, the very

    high frequency oscillations are only on the   S a1   gate signal.

    In   Fig. 10(c), these two probes are replaced. This time, theoscillations are observed on the S 2  gate signal. Thus, the high-

    Fig. 12.   Efficiency curve of (a) the proposed topology at  V  o   = 180  Vand V  o   = 220 V and (b) the hard-switched TL converter.

    frequency oscillations on the gate signals are completely due to

    the differential probe parasitics.

    The efficiency curves for two different output voltage levels,

    along with hard-switched converter efficiency, are presentedin   Fig. 12. It can be seen that the designed prototype ex-

    hibits 95.5% at full load, whereas the peak efficiency of the

    hard-switched converter is 91%. Considering the typical effi-

    ciencies of industrial nonisolated bidirectional dc/dc converters,

    which are between 90% and 95%, the proposed ZVT converter

    provides competitive efficiency to its counterparts. In addition,

    it should be noted that the proposed ZVT converter inherently

    reduces the required input boost inductance and output filter

    capacitance by half due to the TL structure, in comparison to

    the state-of-the-art converters. Moreover, it allows using low-

    voltage rated switch.

    V. CONCLUSION

    In this paper, a ZVT bidirectional TL dc/dc converter, em-

    ploying two identical ZVT cells to fully soft-switch all four

    switches in bidirectional power flow during turning-on instants

    of the main switches, has been introduced. The design proce-

    dures of the ZVT cell components were provided. Furthermore,

    an actively controlled variable dead-time approach has been

    introduced to minimize the reduction in the duty ratio due

    to the soft-switching period, during the converter’s operation

    under heavy loads. A 650-W prototype has been designed to

    demonstrate the operation of the converter. The peak efficiency

    at 200-kHz switching frequency is recorded as 95.5%.

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    Serkan Dusmez   (S’11) received the B.S.(Hons.) and M.S. degrees in electrical engineer-ing from Yildiz Technical University, Istanbul,Turkey, in 2009 and 2011, respectively. He re-ceived the M.S. degree in electrical engineeringfrom Illinois Institute of Technology, Chicago, IL,USA, in 2013. He is currently working towardthe Ph.D. degree at The University of Texas atDallas, Richardson, TX, USA.

    During 2012–2013, he was a Faculty Re-search Assistant with the Power Electronics,

    Energy Harvesting and Renewable Energies Laboratory, Electrical andComputer Engineering Department, University of Maryland, CollegePark, MD, USA. He is the author/coauthor of over 35 journal andconference papers. His research interests include design of power

    electronic interfaces and energy management strategies for renewableenergy sources, integrated power electronic converters for plug-in elec-tric vehicles, and real-time fault diagnosis of power converters.

    Alireza Khaligh  (S’04–M’06–SM’09) is the Di-rector of the Power Electronics, Energy Har-vesting and Renewable Energies Laboratoryin the Electrical and Computer Engineer-ing Department and the Institute for Sys-tems Research at the University of Maryland(UMD), College Park,MD,USA. He is an author/ coauthor of over 130 journal and conferencepapers.

    Dr. Khaligh is a recipient of various awards

    and recognitions, including the 2013 GeorgeCorcoran Memorial Award from the Electrical and Computer Engineer-ing Department of UMD, the 2013 Best Vehicular Electronics Award fromthe IEEE Vehicular Technology Society, and the 2010 Ralph R. TeetorEducational Award from the Society of Automotive Engineers. He is theProgram Chair of the 2015 IEEE Applied Power Electronics Conferenceand Exposition. He was the General Chair of the 2013 IEEE Transporta-tion Electrification Conference and Exposition and the Program Chairof the 2011 IEEE Vehicle Power and Propulsion Conference. He is anEditor of the IEEE TRANSACTIONS ON   VEHICULAR   TECHNOLOGY andan Associate Editor of the IEEE T RANSACTIONS ON  T RANSPORTATIONELECTRIFICATION. He was a Guest Editor or a Guest Associate Editorof various IEEE Transactions including the IEE E TRANSACTIONS ONPOWER   ELECTRONICS and the IEEE TRANSACTIONS ON   INDUSTRIALELECTRONICS.

    Amin Hasanzadeh  (M’11) received the B.Sc. degree from Sharif Uni-versity of Technology, Tehran, Iran, the M.Sc. degree from Khajeh NasirToosi University of Technology, Tehran, Iran, and the Ph.D. degree fromSharif University of Technology, in 1999, 2001, and 2009, respectively,all in electrical engineering.

    He was a Post-Doctoral Research Associate with the Power Electron-ics, Energy Harvesting and Renewable Energies Laboratory, Electricaland Computer Engineering Department, University of Maryland, CollegePark, MD, USA.