a single-stage capacitive ac-link ac-ac power converter

0885-8993 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.

This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2018.2841398, IEEETransactions on Power Electronics

Abstract—A single-stage three-phase ac-ac converter

benefiting from a high frequency alternating link voltage is

proposed in this paper. In this converter, a very small film

capacitor can transfer the energy from the input to the

output, owing to the high frequency alternating voltage of

the link. This eliminates the need for large electrolytic

capacitors that are typically used in dc-link ac-ac

converters. Moreover, a compact high frequency

transformer at the link can replace the bulky low frequency

transformers, in case isolation is required. These features

increase the power density as well as reliability of the

proposed converter in comparison with the conventional

dc-link converters. The number of required switches in the

proposed converter is 12, which is less than the number of

switches needed in matrix converters, leading to lower

switching and conduction losses. Despite being single-stage,

the proposed ac-ac converter is capable of both stepping up

and stepping down the voltage and also frequency

transformation. This eliminates the need for using cascaded

power converters. In this paper, the operation principles of

the proposed ac-ac converter are investigated, and variable

switching frequency and fixed switching frequency control

methods for operating this converter are introduced. The

performance of the converter is verified through simulation

and experiment.

Index Terms—ac-ac converter, high frequency link, solid state

transformer.

I. INTRODUCTION

Three-phase ac-ac converters are the key elements in variety of

applications such as wind power generation, solid state

transformers (SST), and industrial motor drives, where

downtime costs are significant, and reliability is highly

demanded [1, 2]. Different three-phase ac-ac converter

topologies have been proposed in the literature. These

converters can be categorized as single-stage and two-stage

conversion systems. In a two-stage ac-ac converter, the power

is transferred through a large energy storage component, which

is a capacitor or an inductor, forming the dc link in these

converters [3]. In low voltage systems, a two-level back-to-

back converter is usually employed, which includes a rectifier

and a two-level voltage source inverter as the first and second

stages of the converter, respectively [4]. In case the bi-

directional power flow is desired, a PWM rectifier can be

adopted for the first stage, which can draw sinusoidal currents

from the ac source [5]. Typically, the dc-link energy storage

element used in two-stage converters has a relatively large

physical volume in comparison with the total volume of the

converter, leading to low power densities. More importantly,

electrolytic capacitors have high rate of failures, which lower

the service lifetime of the converter [5]. Electrolytic capacitors

are very sensitive to temperature and their failure rates increase

significantly at higher temperatures [6].

To eliminate the large dc-link components, single-stage ac-ac

power converters can be used. These converters can be direct,

in which the input power is directly transferred to the output, or

indirect, in which the input power is transferred to the load

through a small energy storage. Matrix converters are among

direct single-stage ac-ac converters. High power densities can

be achieved in matrix converters, where the ac-ac conversion is

accomplished without using a large energy storage component

[7]. In these converters, the ac power is directly transferred to

the output side, which can be a three-phase load or a motor. The

major weak point in these types of converters is the limited

output to input voltage ratio and the large number of

semiconductor switches [6, 7]. A number of modified

configurations, as presented in [8], address these issues, but

inevitably the input power quality is deteriorated at the expense

of output drive capability. High power density and elimination

of energy storage element is achieved in matrix converters at

the expense of large number of semiconductors, high switching

and conduction losses, and complex control.

Other than these two major families of ac-ac converters, other

topologies can also be found in the literature. Recently,

considerable amount of effort has been devoted to developing

ac-ac converters with small number of switches, among them is

the converter proposed in [9]. In this converter, six switches are

employed in two switch legs as well as one leg consisting of

three series dc electrolytic capacitors operating as the dc-link

energy storage component. Although the number of switches is

reduced in this converter, the voltage balancing strategy for the

three capacitors in the dc-link can be a major problem. In [10],

a bidirectional PWM buck-boost ac-ac converter is proposed

with only six switches, however, it needs three inductors as

energy transferring elements. In [11], a unidirectional three-

phase ac-ac converter is proposed that combines three single-

phase three-leg ac-ac converters. Although this converter has

the advantages of multilevel input and output voltages as well

as low THD of the currents, it still requires three large dc-link

electrolytic capacitors. In [12], a T-type family of ac-ac

converters is proposed, which is able to directly perform the ac-

ac conversion in a single-stage, and realize a modular converter

for reducing the voltage stress of the switches. However, in the

A Single-Stage Capacitive AC-Link AC-AC

Power Converter

Ehsan Afshari, Student Member, IEEE, Masih Khodabandeh, Student Member, IEEE,

Mahshid Amirabadi, Member, IEEE

E. Afshari, M. Khodabandeh, and M. Amirabadi are with the Electrical and

Computer Engineering Department, Northeastern University, Boston, MA 02115, USA (e-mail: [email protected],

[email protected], and [email protected]).

mailto:[email protected]

mailto:[email protected]



three-phase structure, the control algorithm is complex and the

converter needs 36 switches, leading to higher losses.

Resonant ac-ac converters have been proposed in [13-16] as an

alternative to the conventional dc-link converters. These

converters utilize a high frequency link to introduce zero

voltage or zero current switching transitions. Since the link

inductor and capacitor in these types of converters need to

continuously resonate, high reactive rating for the link

components is required, which leads to higher power losses in

the ac-link. Another type of ac-link converter is proposed in

[17], which utilizes 24 reverse blocking IGBTs (RB-IGBT) and

benefits from zero voltage switching for the output-side

switches. However, this converter cannot operate properly

without a transformer. Also, the input and output currents of

this converter do not have pure sinusoidal waveforms. In [18],

a three-phase PWM Ćuk ac-ac converter, which requires six

switches and three capacitors as energy transferring elements,

is modeled and analyzed; the voltage gain is reported to be

limited to 2.5. The Ćuk-based converter proposed in [18], is

modified in [19] such that the three switches at each side of the

converter are replaced by a diode bridge and a switch, which

reduces the switch count of the converter. Although the number

of switches in the Ćuk-based ac-ac converters proposed in [18]

and [19] are small, they require three capacitors for transferring

energy. Also, these converters are not capable of frequency

transformation, which is a major drawback, and limits their

applications.

Universal power converters are another class of single-stage

power converters that eliminate the need for large electrolytic

capacitors. These converters are typically categorized as

indirect single-stage converters in which a small energy storage

component transfers the power from input to output.

Additionally, in most universal converters, galvanic isolation

can be provided through a single-phase high frequency

transformer added to the link. These converters, which can have

any number of sources and loads with any forms, any number

of phases, any frequency or voltage amplitude, extend the

principles of the operation of indirect dc-dc converters to multi-

phase systems. The converter proposed in [20], extends the

operation of the dc-dc flyback converters to function as a three-

phase ac-ac conversion system. Although this converter needs

only six active devices to perform the three-phase ac-ac power

conversion, the ratings of the switches are high and three

individual single-phase transformers are required. In [21], the

principles of the operation of a dc-dc buck-boost converter was

extended to a three-phase ac-ac converter. Similar to the

conventional dc-dc buck-boost converter, an inductor transfers

the power from input phases to output phases of this converter,

and the switches have hard switching. In [22], a capacitor was

added to the link of the universal buck-boost converter to allow

the switches to benefit from zero voltage turn-on and soft turn-

off. There are four modes in each switching cycle of this

converter, during the first mode the link inductor is charged

from one of the input phase pairs, and in mode 3 it is discharged

to one of the output phase pairs. Modes 2 and 4 are resonating

modes that facilitate the soft-switching. One drawback of this

converter is the long resonating modes. Moreover, in each

switching cycle, the currents of only one input phase and one

output phase are regulated. In [23], the buck-boost universal

converter was further modified to allow the link inductor to be

charged and discharged in both positive and negative directions.

This resulted in shorter resonating modes. Moreover, in the

three-phase ac-ac configuration proposed in [23], each charging

and discharging mode is split into two modes to allow the

currents of all three input phases and all three output phases to

be regulated in each switching cycle; hence, having low current

THDs. The performance of this converter was studied in detail

in [6]. Despite its numerous advantages, the converter proposed

in [23] requires a large number of switches, i.e. 24 switches for

the three phase ac-ac configuration. To overcome this

limitation, in [24-26], several modified universal

configurations, which require a smaller number of switches

compared to the converter proposed in [23], were proposed.

Despite reducing the number of switches, the conduction losses

were increased in these converters. In [27], the Dyna-C

topology, which is another family of single-stage universal

converters, is proposed for SST applications. This converter

consists of two three-phase switch bridges connected through a

high-frequency transformer; the magnetizing inductance of this

transformer acts as the energy transferring component. In this

paper, the control of the universal buck-boost converter

proposed in [22] was modified such that there are two charging

modes and two discharging modes in each cycle, while keeping

the number of active devices equal to 12. However, the reported

efficiencies were poor mainly because of the high conduction

losses of the incorporated active devices and losses related to

the diode reverse recovery [28, 29]. In [30], an auxiliary circuit

is added to the Dyna-C converter to enable the soft switching

transition of the switches and improve the efficiency, while

keeping the desirable features of Dyna-C converter, such as step

up/down of the voltage, realizing multiport structure, and high

frequency isolation. The detailed design of this soft switching

topology for an SST application is thoroughly discussed in [31].

Two other families of soft-switching inductive-link universal

power converters inspired by non-inverting dc-dc buck-boost

converters are proposed in [32, 33]. In these converters, which

can operate in buck, boost, or buck-boost modes, the link peak

current is reduced compared to the buck-boost type universal

power converters, potentially leading to lower conduction

losses.

In [34, 35], another class of universal converters, which extends

the principles of the operation of a dc-dc Ćuk converter to

multiphase systems, was proposed and studied. This converter

is dual of the converter proposed in [23]. The link capacitor is

the main energy storage component, and a small inductor can

be added in series with the link capacitor to allow the switches

to benefit from zero current turn-off and soft turn-on. This

converter requires large number of switches; a three-phase ac-

ac configuration needs 24 switches.

In this paper, another class of capacitive-link universal

converters, benefitting from a high frequency alternating link

voltage is studied, analyzed, and evaluated. The proposed

converter has the same number of switches as conventional

PWM back-to-back dc-link converters, while offering high

frequency alternating voltage and current in the link. This

feature eliminates the need for a large unreliable electrolytic

capacitor. Also, in case the galvanic isolation is desired, a

compact high frequency transformer can be placed in the link.

In contrast to the conventional dc-link converters, this converter



has higher power density and longer life-time. In addition, since

the number of switches is smaller than the matrix converters,

the proposed converter can promise higher efficiency compared

with the matrix converters. Moreover, the voltage gain

limitation is not an issue in this converter. It is also capable of

stepping up or stepping down the voltage amplitude as well as

changing the frequency. This topology was first proposed in

[36, 37], and its performance was evaluated through

simulations. This paper provides a thorough analysis on the

behavior of this converter and its control algorithm, and

evaluates the performance of the proposed converter through

both simulations and experiments.

Table I compares the proposed ac-ac converter and a number of

existing ac-ac converter topologies. Since the converters may

not be optimally designed for the simulated (or experimentally

tested) system, the comparison may not be fully conclusive. It

can be observed that the proposed converter promises good

efficiency compared to the existing topologies while offering

the least complex topology with only 12 active switches and

one small energy transferring element.

The paper is structured as follows: In Section II, the operation

principles of the proposed three-phase ac-ac converter is

explained. Section III presents the proposed control strategy

and design consideration. Finally, the performance of the

converter is verified through simulations and experiments in

Sections IV and V, respectively. Concluding remarks are

provided at the end to summarize the features of the proposed

converter.

TABLE I. THE COMPARISON BETWEEN THE PROPOSED CONVERTER AND

EXISTING TOPOLOGIES

Proposed

Converter

This

paper [6] [28] [26] [10]

Tested power (W)

1000 450 50000 1500 1000

No. of active

switches 12 24 12* 16* 6

No. of external

diodes

0 0 12* 16* 6

No. of energy

transferring elements

1 1 1 1 3

Reported

efficiency (%) 90.5 90 89

Not

reported 92.5

*if RB-IGBTs are used in the converters proposed in [26] and [28], there will be 16 and 12 switches in

these converter topologies, respectively, and no external diodes will be needed.

II. PRINCIPLES OF THE OPERATION

This section explores the principles of the operation of the

proposed three-phase capacitive link ac-ac configuration, which

is represented in Fig. 1 (a). As shown in Fig. 1 (a), Vab, Vbc, Vca,

Vabo, Vbco, and Vcao stand for the unfiltered line-line voltages of

the input and output side, respectively.

Two control methods will be discussed for this converter. Fig.

1 (b) depict the link voltage and current of the three-phase

capacitive link converter over a switching (link) cycle (Ts) for

the variable switching frequency control method. In the

proposed converter, the link voltage is charged and discharged

in one direction (positive). As shown in Fig. 1 (b), four different

modes exist in each switching cycle of the first control method,

two of which are charging modes (modes 1 and 2) and the other

modes are discharging modes (modes 3 and 4). The link

capacitor will be energized from two phases of the ac power

source during modes 1 and 2; it will be de-energized to two

output phases during modes 3 and 4. To minimize the required

link capacitance, in this control method, the voltage of the link

capacitor is controlled to be at the boundary of continuous

conduction mode (CCM) and discontinuous conduction mode

(DCM). This method results in having a variable switching

frequency, hence, it is called variable switching frequency

method. In order to have a fixed switching frequency, mode 5,

during which no power is transferred, can be introduced to a

switching cycle. During mode 5, the link voltage and current

are both zero. The link voltage, as shown in Fig. 1 (c), operates

in DCM.

The switching status of the converter depends on two factors,

mode and zone. The control algorithm first checks the mode

that the converter is operating in, which can be 1, 2, 3, 4, or 5.

Modes 1 and 2 stand for charging modes during which the link

capacitor is charged by the input phases, and modes 3 and 4

stand for discharging modes during which the link capacitor

discharges into output phases. During mode 5 that exists only

in the fixed switching frequency method, no power is

transferred to or from the link capacitor. Once the mode is

determined, the switching algorithm selects the proper switches

based on the input and output zones. The zone factor does not

necessarily need to be the same for the input and output sides,

since the input and output voltage/current references do not

necessarily have the same frequencies or phase angles. In order

to determine the input and output zones, the references of the

line-line voltages are needed. The references for the line-line

voltages across the input and output terminals of the converter

are denoted by Vab*, Vbc

*, Vca*, Vabo

*, Vbco*, and Vcao

*,

respectively. Zone determination will be discussed in detail in

Section III. In the following, the behavior of the converter and

the switching algorithm during each mode is explained in four

subsections, A, B, C, and D.

(a)

(b)

(c)

Fig. 1. (a) The proposed three-phase capacitive-ac-link ac-ac converter,

(b) the link voltage and current in variable switching frequency control method, (c) the link voltage and current in fixed switching frequency

control method.

AiBi

Ci

C

HF Isolation

Transformer

2C 2COR

AC

Source

AC

Load

Ao

Bo

Co

Vab

Vbc

Vca

Vabo

Vbco

Vcao

ab

c

aobo co

Link

CurrentLink

Voltage

Mode 1

Mode 2

Mode 3

Mode 4

Vp1

Vp2

Vp3

Ts

t

Link

CurrentLink

Voltage

Mode 1

Mode 2

Mode 3

Mode 4

Vp1

Vp2

Vp3

Ts

Mode 5

t



The following explanations for switch selection are provided

for the condition shown in Table II, which are corresponding to

zones 2 and 8 for the input and output, respectively. It should

be noted that abs(a) denotes the absolute value of (a) and the

positive (+) or negative (-) signs besides the voltages and

currents show their polarities. Also, it is assumed that flowing

current from left to right is considered to be positive.

TABLE II. THE ASSUMED CONDITION FOR DESCRIPTION OF THE OPERATION

PRINCIPLES

Side Line-Line Voltage References Actual Currents

Input abs(+Vab*)> abs(-Vca

*)> abs(-Vbc*)

abs(+iAi)> abs(-iBi)> abs(-iCi)

Output abs(-Vabo

*)> abs(+Vbco*)>

abs(+Vcao*)

abs(-iAo)> abs(+iBo)>

abs(+iCo)

A. First charging mode (mode 1)

The first mode of operation is the first charging mode, during

which the largest input current (absolute value) charges the link

capacitor. Since abs(+Vab*)> abs(-Vca

*)> abs(-Vbc*), According

to Table II, Vab* has the largest absolute value and is positive,

while Vca* and Vbc

* are negative. Therefore, by the end of

charging period, the input side unfiltered line-line voltages are

formed as in Fig. 2 (a) so their averages meet the averages of

the line-line voltage references shown in Fig. 2 (b). As can be

observed in Fig. 2 (b), the highest, second highest, and lowest

absolute line-line voltage references are Vab*, Vca

*, and Vbc*,

respectively. Also, since this is a balanced three-phase three-

wire system, 𝑉𝑎𝑏∗ = −(𝑉𝑐𝑎

∗ + 𝑉𝑏𝑐∗ ). During the first mode, the

second highest absolute line-line voltage (phase pair “ca”) has

to be regulated.

As shown in Fig. 3 (a), none of the switches of the input side

bridge is turned on during the first mode and the anti-parallel

diodes conduct the three-phase input currents. Since iAi has the

largest value and is positive, the anti-parallel diode of S1 starts

conducting and charges the link capacitor and VLink starts

increasing. The anti-parallel diodes of the output side bridge

will let this current flow back toward the input phases. Since

this is a three-phase three-wire system (for input and output

sides), the summation of the corresponding three-phase currents

has to be zero, which implies that 𝑖𝐴𝑖 = −(𝑖𝐵𝑖 + 𝑖𝐶𝑖); hence,

phases Bi and Ci currents, which are both negative, have to flow

through the anti-parallel diodes of switches S5 and S6. It is

obvious that the direction of the input currents determines the

diodes that conduct the current in mode 1. During mode 1, it

can be seen that Vab=+VLink, Vca=-VLink, and Vbc is equal to zero.

Once the average of the unfiltered voltage across the input

phase pair “ca” (shown in blue color in Fig. 2 (a)) meets the

average of input line-line voltage reference Vca*, mode 1 is

ended. As depicted in Fig. 2 (a), during mode 1, the second

highest input line-line voltage is built up.

(a)

(b)

Fig. 2. (a) The unfiltered input line-line voltages during charging interval,

(b) absolute input line-line voltage references during this interval.

Vab (+)Vbc (-)Vca (-)

Mode 1

Charging

Mode 2

0t

|Vab*|

Vab* (+)

|Vca*|

Vca* (-)

Lin

e-L

ine V

olt

age

Refe

rences

(V

)

Time (s)

|Vbc*|

Vbc* (-)

0

(a)

(b)

(c)

(d)

(e)

Fig. 3. The behavior of the three-phase ac-ac capacitive link converter during different modes of operation, (a) mode 1, (b) mode 2, (c) mode 3, (d) mode 4,

and (e) mode 5.

Ao

Bo

Co

S1o S2o S3o

S4o S5o S6o

Ai

Bi

Ci

ILink

VLinkS1 S2 S3

S4 S5 S6

C

Vab

Vbc

Vca

a

bc

ao

boco

Vabo

Vbco

Vcao

S1o S2o S3o

S4o S5o S6o

ILink

VLinkS1 S2 S3

S4 S5 S6

C

Ao

Bo

Co

Ai

Bi

Ci

Vab

Vbc

Vca

a

b

ao

boco

Vabo

Vbco

Vcao

S1o S2o S3o

S4o S5o S6o

ILink

VLinkS1 S2 S3

S4 S5 S6

C

Ao

Bo

Co

Ai

Bi

Ci

Vab

Vbc

Vca

a

b

ao

boco

Vabo

Vbco

Vcao

S1o S2o S3o

S4o S5o S6o

ILink

VLinkS1 S2 S3

S4 S5 S6

C

Ao

Bo

Co

Ai

Bi

Ci

Vab

Vbc

Vca

a

b

ao

boco

Vabo

Vbco

Vcao

S1o S2o S3o

S4o S5o S6o

VLinkS1 S2 S3

S4 S5 S6

C

Ao

Bo

Co

Ai

Bi

Ci

Vab

Vbc

Vca

a

b

ao

boco

Vabo

Vbco

Vcao



It can be observed that during the first charging mode, two

switches at the output side (S1o and S5o) are turned on, as

shown in Fig. 3 (a). The selection of these two switches does

not depend on the input side line-line voltages, but depends on

the output line-line voltage and current references. The output

side switches need to be properly turned on to let the output

three-phase currents freely flow. For the condition of Table II,

it is assumed that abs(-Vabo*)> abs(+Vbco

*)> abs(+Vcao*) and

abs(-iAo)> abs(+iBo)> abs(+iCo). Therefore, switch S1o needs to

be turned on to let the phase Ao current flow. Also, since phase

Bo current is positive (flowing from left to right), switch S5o

needs to be turned on and the anti-parallel diodes of S2o, S4o,

S3o, S5o, and S6o will handle the phase Bo and phase Co

currents and the link current that comes from the input side.

Depending on the value of the input and output currents, the

conduction of the switches/diodes for the output side bridge

may be different in charging modes. However, the switching

algorithm does not change.

B. Second charging mode (mode 2)

In the second charging mode, the lowest input line-line voltage

is regulated and the second largest (in absolute value) input side

current will charge the link capacitor. Since the voltage across

the phase pair “ca” was built up in mode 1, the voltage across

this phase pair will be kept zero, and the voltage across phase

pair “bc” will be regulated in mode 2, as demonstrated in Fig. 2

(a) in purple color. To do so, switch S3 of the input side bridge

is turned on, connecting terminal “c” of the converter to the

positive terminal of the link capacitor (see Fig. 3 (b)), so

that (|𝑖𝐴𝑖| − |𝑖𝐶𝑖|) , which is equal to |𝑖𝐵𝑖|, flows through the

link capacitor, and the link voltage continues to increase. It can

be observed in Figs. 2 (a) and 3 (b) that during mode 2,

Vab=+VLink, Vbc=-VLink, and Vca is equal to zero. Once the average

of the unfiltered voltage across the input phase pair “bc” (Vbc)

meets its reference (average of input line-line voltage reference

Vbc*), mode 2 is ended and the lowest input line-line voltage is

regulated. The output side switching will follow the switching

commands of the first mode so that the output currents and the

link current freely flow. During modes 1 and 2, the control

algorithm regulates the second highest and lowest line-line

voltages at the input side by comparing the averages of these

unfiltered line-line voltages with their references.

C. First discharging mode (mode 3)

For discharging the link capacitor, a similar approach is

extended and the lowest and second highest line-line voltages

will be regulated in modes 3 and 4, respectively. A negative

current (flowing from right to left) has to flow through the link

capacitor to discharge it until the capacitor voltage reaches zero

volts. Since abs(-Vabo*)> abs(+Vbco

*)> abs(+Vcao*), the output

side unfiltered line-line voltages are formed as in Fig. 4 (a) by

the end of discharging period, with regard to the output line-line

voltage references shown in Fig. 4 (b).

In the first discharging mode, the lowest output line-line voltage

is regulated and the second largest output current flows through

the link capacitor to de-energize it. There is no switch transition

from mode 2 to mode 3 at the output side bridge and the output

switches follow the gate commands of mode 2, as it is depicted

in Fig. 3 (c). However, all the anti-parallel diodes at the output-

side stop conducting except for the anti-parallel diode of switch

S3o. Therefore, switch S1o and anti-parallel diode of switch

S3o conduct, and current (|𝑖𝐴𝑜| − |𝑖𝐶𝑜|) , which is equal to

phase Bo current, flows through the link capacitor to discharge

it and transfer the stored energy in the capacitor to the output

side during mode 3. Therefore, the link voltage starts decreasing

until the average of the output unfiltered voltage across the

phase-pair “boco” becomes equal to its reference (average of

Vbco*). Once this condition is met, mode 3 is ended and mode 4

begins. It can be observed in Fig. 4 (a) that during mode 3 Vabo=-

VLink, Vbco=+VLink, and Vcao is equal to zero.

Since it is intended to have the link current flowing from right

to left (in negative direction) during modes 3 and 4, a short-

circuit path needs to be provided at the input side bridge. To

provide the short-circuit path, switches S3 and S6 are turned on

at the input side. These switches are selected to provide a path

for currents of phases Ai and Bi that are flowing through the

anti-parallel diodes of S1 and S5. Switches S3 and S6 also

provide a path for the link current and phase Ci current. During

modes 3 and 4 the input unfiltered line-line voltages are zero.

D. Second discharging mode (mode 4)

In the last discharging mode, the second largest output line-line

voltage is regulated and the largest output phase current

(absolute value) discharges the link capacitor. Since the net

energy of the link capacitor in each cycle is zero, the voltage of

the link capacitor at the end of mode 4 is equal to the voltage

across this capacitor at the beginning of mode 1. Therefore, at

the end of mode 4, the link voltage reaches zero volts. Since

phase pair “boco” was built up in mode 3, phase pair “coao” will

be regulated in mode 4, as shown in Fig. 4 (a). To do so, switch

S6o is turned on, connecting terminal “co” to the positive

terminal of the link capacitor (see Fig. 3 (d)), so that the phase

Co current flows through this switch and the anti-parallel diode

of S3o stops conducting (this diode was conducting in mode 3).

Therefore, the current of phase Ao flows through the link

capacitor and phases Bo and Co currents flow through S5o and

S6o. This also realizes the properties of the three-wire system,

since 𝑖𝐴𝑜 = −(𝑖𝐵𝑜 + 𝑖𝐶𝑜). It can be observed in Fig. 4 (a) that

during mode 4 Vabo=-VLink, Vcao=+VLink, and Vbco is equal to zero.

The input side switches follow the gate commands from the

previous mode. In mode 4, the averages of the unfiltered and

reference voltages do not need to be compared, and mode 4 can

be ended once the link voltage reaches zero, which means that

the power is fully transferred to the output side. In the variable

switching frequency control method, when mode 4 is ended, the

next link cycle begins.

To have a fixed switching frequency, mode 5 is added to the

switching cycle of the converter (in fixed switching frequency

control method), during which the link voltage and current

(a)

(b)

Fig. 4. (a) The unfiltered output line-line voltages and (b) the absolute references of the unfiltered output line-line voltages.

Vabo (-)Vbco (+)Vcao (+)

Mode 4

Mode 3

Discharging

0 t

Lin

e-L

ine V

olt

age

Refe

rences

(V

)

Time (s)

|Vabo*|

Vabo* (-)

|Vbco*|

Vbco* (+)

|Vcao*|

Vcao* (+)

0



remain zero until the end of the switching period (Ts). In order

to initiate this mode, switch S1o is turned off so that the link

capacitor is open circuit and the input and output phase currents

have paths for free-wheeling, as shown in Fig. 3 (e).

E. Switch Stress

As can be observed from the operation principles of the

converter, during charging modes, the output side bridge

provides a short circuit path to let the link current flow back

toward the input phases. This implies that the voltage stress

across the output side bridge switches is zero during charging

modes. Also, it can be observed from Figs. 3 (a) and (b) that

during the charging modes, only one switch/diode of each leg

at the input side bridge conducts. This indicates that the voltage

stress across the other switch of the leg is equal to the link

voltage. The voltage stress of each switch at the input side

bridge is specified in the following for the assumed condition

of Table II.

𝑀𝑜𝑑𝑒 1: 𝑉𝑆1 = 0, 𝑉𝑆2 = 𝑉𝑎𝑏 = 𝑉𝐿𝑖𝑛𝑘 , 𝑉𝑆3 = −𝑉𝑐𝑎 = 𝑉𝐿𝑖𝑛𝑘 , 𝑉𝑆4= 𝑉𝑎𝑏 = 𝑉𝐿𝑖𝑛𝑘 , 𝑉𝑆5 = 0, 𝑉𝑆6 = 0

(1)

𝑀𝑜𝑑𝑒 2: 𝑉𝑆1 = 0, 𝑉𝑆2 = 𝑉𝑎𝑏 = 𝑉𝐿𝑖𝑛𝑘 , 𝑉𝑆3 = 0, 𝑉𝑆4 = 𝑉𝑎𝑏= 𝑉𝐿𝑖𝑛𝑘 , 𝑉𝑆5 = 0, 𝑉𝑆6 = −𝑉𝑏𝑐 = 𝑉𝐿𝑖𝑛𝑘

(2)

A similar analysis can be performed for the output side bridge

switches. During discharging modes, the input side switches

provide the short-circuit current for link current to discharge the

link capacitor, so that the input side can be modeled as a short

circuit. Also, it can be observed that in the output side bridge,

only one switch/diode of each leg conducts at each moment

during discharging modes. This implies that the voltage stress

of the other switch in the corresponding leg will be equal to the

link capacitor. Furthermore, the voltage stress of each switch at

the output side bridge is specified in the following for the

assumed condition of Table II. The peak value for the link

voltage will be calculated in subsection B of section III.

𝑀𝑜𝑑𝑒 3: 𝑉𝑆1𝑜 = 0, 𝑉𝑆2𝑜 = −𝑉𝑎𝑏𝑜 = 𝑉𝐿𝑖𝑛𝑘 , 𝑉𝑆3𝑜 = 0, 𝑉𝑆4𝑜= −𝑉𝑎𝑏𝑜 = 𝑉𝐿𝑖𝑛𝑘 , 𝑉𝑆5𝑜 = 0, 𝑉𝑆6𝑜 = 𝑉𝑏𝑐𝑜= 𝑉𝐿𝑖𝑛𝑘

(3)

𝑀𝑜𝑑𝑒 4: 𝑉𝑆1𝑜 = 0, 𝑉𝑆2𝑜 = −𝑉𝑎𝑏𝑜 = 𝑉𝐿𝑖𝑛𝑘 , 𝑉𝑆3𝑜 = 𝑉𝑐𝑎𝑜= 𝑉𝐿𝑖𝑛𝑘 , 𝑉𝑆4𝑜 = −𝑉𝑎𝑏𝑜 = 𝑉𝐿𝑖𝑛𝑘 , 𝑉𝑆5𝑜= 0, 𝑉𝑆6𝑜 = 0

(4)

The voltage stress of the switches is slightly higher than that of

the conventional dc-link converters. However, given recent

advances in developing high-voltage semiconductor devices,

this issue does not limit the application of the proposed

converter. Although the peak voltage stress of the input and

output sides are equal, the current stress is different. For the

input side bridge, the maximum current passes through the

switches during discharging modes, since during these modes

the link current also passes through the input side switches. For

instance, in mode 4, the current that flows through switch S3 is

equal to iAi+iAo. According to Table II, iAi and iAo are the

maximum input and output currents, respectively. If these two

currents have their peak values, the current passing through

switch S3 will be equal to 𝐼𝑖,𝑝𝑒𝑎𝑘 + 𝐼𝑜,𝑝𝑒𝑎𝑘 in which 𝐼𝑖,𝑝𝑒𝑎𝑘 is

the peak current of the input side and 𝐼𝑜,𝑝𝑒𝑎𝑘 is the peak current

of the output side. The maximum current that passes through

the anti-parallel diodes of the input side switches is equal to the

peak current of the input side (𝐼𝑖,𝑝𝑒𝑎𝑘). On the other hand, for

the output side switches, the maximum current that can flow

through them is equal to the peak value of the output currents

(𝐼𝑜,𝑝𝑒𝑎𝑘), which happens during discharging modes. However,

the current that passes through the anti-parallel diodes of the

output side switches can be higher, since the link current, which

is equal to the maximum input current during mode 1, also

flows through these anti-parallel diodes.

III. CONVERTER CONTROL SCHEME

A. Control Block Diagram

Fig. 5 exhibits the second highest (V1) and lowest (V2) line-line

voltages for the input side. The controller regulates the lowest

and second highest line-line input voltages, as well as the lowest

line-line output voltage. Fig. 6 shows that a full load or source

cycle (1 𝑓𝑠𝑜𝑢𝑟𝑐𝑒⁄ 𝑜𝑟 1 𝑓𝑙𝑜𝑎𝑑

⁄ ) can be divided into 12 zones based

on the absolute value of the line-line voltages and phase

currents. Fig. 6 (a) represents the zone determination of the

converter for the input side, when the power factor is unity,

while Fig. 6 (b) depicts the zone determination, when the power

factor is not unity. For example, in zone 5, Vbc* has the

maximum absolute value among input line-line voltages

(positive polarity) and ic* is the maximum phase current

(negative polarity). The positive sign next to the voltage or

current implies that the voltage or current is positive, while

negative sign means that the voltage or current is negative.

Fig. 7 demonstrates the overall architecture of the proposed

converter and its controller. There are three voltage sensors at

the input side, measuring the unfiltered line-line voltages and

three voltage sensors that measure voltages of the ac source

phases (𝑉𝐴𝑖 , 𝑉𝐵𝑖 , and 𝑉𝐶𝑖). The references of the unfiltered input

line-line voltages, denoted by Vab*, Vbc

*, and Vca*, as well as the

references of the input phase currents, which are typically

preferred to be in phase with the input phase voltages, are

calculated using 𝑉𝐴𝑖 , 𝑉𝐵𝑖 , and 𝑉𝐶𝑖. Also, there are three voltage

sensors measuring the output unfiltered line-line voltages, Vabo,

Vbco, and Vcao. As mentioned in the previous section, modes 1 to

3 are ended once the absolute average value of an input

unfiltered line-line voltage meets the absolute average of its

reference. In Fig. 7, SLL is the absolute average value of the

measured unfiltered line-line voltage corresponding to the input

phase pair with the second highest absolute value of voltage,

which is continuously calculated, while SRR is the absolute

average of the reference of this voltage. Once SLL is equal to

SRR, mode 1 is finished and mode 2 starts. SL is the absolute

average of the measured unfiltered line-line voltage

corresponding to the input phase pair with the lowest voltage

and SR is the absolute average of the reference of this voltage.

When SL meets SR, mode 2 is finished. SLo is the absolute

average of the measured unfiltered line-line voltage

corresponding to the output phase pair with the lowest voltage

and SRo is the absolute average of the reference of this voltage.

Once SLo meets SRo, mode 3 is ended. In Block 1 and Block 2

of Fig. 7, VRR, VLL, VR, VL, VRo, and VLo are determined

according to the input and output zones. VRR and VR are

corresponded to reference voltages V1 and V2 of Fig. 5,

respectively, and VLL and VL are corresponded to the measured

unfiltered input line-line voltages built up during modes 1 and

2, respectively. For example, in zone 5, VRR and VLL correspond



to phase pair “ca”, while VR and VL correspond to phase pair

“bc”. Table III presents the switching pattern of the proposed

converter based on the zones and modes.

B. Design Consideration

Typically, the power rating and RMS values of the input and

output line-line voltages are given for a system to be designed.

Considering the rated power of PT, the capacitor is first charged

from the input side with the average power of PT, and then de-

energized to the output side to transfer the power to the output

(load) side. The input and output line-line voltage references are

given as follows: 𝑉𝑎𝑏∗ = 𝑉𝑖𝑛−𝑙𝑙−𝑝𝑒𝑎𝑘sin (𝜔𝑖𝑛𝑡 + 𝛼𝑖𝑛)

𝑉𝑏𝑐∗ = 𝑉𝑖𝑛−𝑙𝑙−𝑝𝑒𝑎𝑘sin (𝜔𝑖𝑛𝑡 + 𝛼𝑖𝑛 −

2𝜋3⁄ )

𝑉𝑐𝑎∗ = 𝑉𝑖𝑛−𝑙𝑙−𝑝𝑒𝑎𝑘sin (𝜔𝑖𝑛𝑡 + 𝛼𝑖𝑛 +

2𝜋3⁄ )

(5)

𝑉𝑎𝑏𝑜∗ = 𝑉𝑜𝑢𝑡−𝑙𝑙−𝑝𝑒𝑎𝑘sin (𝜔𝑜𝑢𝑡𝑡 + 𝛼𝑜𝑢𝑡)

𝑉𝑏𝑐𝑜∗ = 𝑉𝑜𝑢𝑡−𝑙𝑙−𝑝𝑒𝑎𝑘sin (𝜔𝑜𝑢𝑡𝑡 + 𝛼𝑜𝑢𝑡 −

2𝜋3⁄ )

𝑉𝑐𝑎𝑜∗ = 𝑉𝑜𝑢𝑡−𝑙𝑙−𝑝𝑒𝑎𝑘sin (𝜔𝑜𝑢𝑡𝑡 + 𝛼𝑜𝑢𝑡 +

2𝜋3⁄ )

(6)

where 𝑉𝑖𝑛−𝑙𝑙−𝑝𝑒𝑎𝑘 and 𝑉𝑜𝑢𝑡−𝑙𝑙−𝑝𝑒𝑎𝑘 are the peak values of the

input and output line-line voltage references, respectively, 𝜔𝑖𝑛

and 𝜔𝑜𝑢𝑡 are the input and output angular frequencies,

respectively, and 𝛼𝑖𝑛 and 𝛼𝑜𝑢𝑡 are the phase angles of the input

and output voltage references.

In Fig. 8, Vp1, Vp2, and Vp3 are the values of the link voltage at

the end of modes 1, 2, and 3, respectively. The relation between

the values of V1-V4 and Vp1-Vp3 can be defined as follows

𝑉1 =1

2(𝑉𝑝1)𝑡1𝑓 (7)

𝑉2 =1

2(𝑉𝑝1 + 𝑉𝑝2)𝑡2𝑓 (8)

𝑉3 =1

2(𝑉𝑝3 + 𝑉𝑝2)𝑡3𝑓 (9)

𝑉4 =1

2(𝑉𝑝3)𝑡4𝑓 (10)

where t1-t4 are durations of modes 1 to 4, and f is the link

frequency. The relation between the link current and the value

of the link voltage at the end of each mode can be written as

𝐼1 = 𝐶𝑉𝑝1𝑡1

(11)

𝐼2 = 𝐶𝑉𝑝2 − 𝑉𝑝1

𝑡2 (12)

|𝐼3| = 𝐶𝑉𝑝2 − 𝑉𝑝3

𝑡3 (13)

|𝐼4| = 𝐶𝑉𝑝3𝑡4

(14)

where C is the link capacitance and I1-I4 are the currents that

pass through the link capacitor during modes 1-4, which are

equal to input and output currents corresponding to the phases

forming the maximum input and output line-line voltages. The

value of the link voltage at the end of mode 1 (Vp1) can be

obtained using (7) and (11):

𝑃1 = 𝑉1 × 𝐼1 =1

2(𝑉𝑝1)

2𝑓 → 𝑉𝑝1 = √2𝑃1

𝐶𝑓 (15)

where P1 is the average of the transferred power during mode

1. This process can be extended to the other modes to obtain the

value of the link voltage at the end of modes 2 and 3:

𝑉𝑝2 = √2(𝑃1 + 𝑃2)

𝐶𝑓 (16)

𝑉𝑝3 = √2(𝑃1 + 𝑃2 − 𝑃3)

𝐶𝑓= √

2𝑃4𝐶𝑓

(17)

Fig. 5. The references of the second highest (V1) and lowest (V2) line-line

voltages.

Fig. 6. Zone determination based on the line-line voltages and phase currents

references, (a) unity power factor, (b) non-unity power factor.

Time (s)

Vo

ltag

e

|Vab*|

|Vbc*|

|Vca*|

V1

V2

12

34

56 7

89 10

1112

12

34

56 7

89

1011

12

+Vab* -Vca* +Vbc* -Vab* +Vca* -Vbc*+iA* -iC* +iB* -iA* +iC* -iB*-iB*

Vo

ltag

e an

d C

urr

ent

and

Zo

ne

Vo

ltag

e an

d C

urr

ent

and

Zo

ne

(a)

(b)

Time (s)

Current

Voltage

Zone

Current

Voltage

Zone

+Vab* -Vca* +Vbc* -Vab* +Vca* -Vbc*+iA* -iC* +iB* -iA* +iC* -iB*-iB*

(a)

(b)

Fig. 8. The link voltage and current of the converter during different modes of operation in (a) variable switching frequency control method

and (b) fixed switching frequency control method.

t4t2t1 t3

Vp1 Vp3

Vp2

Lin

k V

olt

age

Lin

k C

urr

ent

I1=

|iA|

I2=

|iB|

I3=

|iBo|

I4=

|iAo|

t4 t5t2t1 t3

Vp1 Vp3

Vp2

Lin

k V

olt

age

Lin

k C

urr

ent

I1=

|iA|

I2=

|iB|

I3=

|iBo|

I4=

|iAo|

Fig. 7. The control block diagram.

VRR

VLL

VR

VL

SLL > SRR

&&

Mode ==1

SRR

SLL

SR

SL

Start

Mode

2

Start

Mode

3

Yes

Yes

Block

1

Vca

VRo

VLo

SLo > SRo&&

Mode==3

SRo

SLo

Start

Mode

4YesBlock

2

VLink==0 V&&

Mode==4

YesStart

Mode 1

VLink

Reset

SRR and

SLL

Reset

SR and

SL

Reset

SRo and

SLo

Output zones

Input zones

Sw

itchin

gs

Vbc

Vab

Vab*

Vbc*

Vca*

Vcao

Vbco

Vabo

Vabo*

Vbco*

Vcao*

VLink

L

Filte

r

LC

Filte

r

VL

ink

Vca

Vab

Vbc

VA

i

VB

i

Vcao

Vab

oVbco

VC

i

Input

Sw

itch

esO

utp

ut

Sw

itches

SL > SR

&&

Mode ==2



In (16) and (15), P2, P3, and P4 are the average values of power

transferred during modes 2, 3, and 4, respectively. Considering

(7)-(17), the duration of each mode can be calculated as

𝑡1 =2𝑉1

√2𝑓𝑃1𝐶

(18)

𝑡2 =2𝑉2

√2𝑓𝑃1𝐶

+√2𝑓(𝑃1 + 𝑃2)

𝐶

(19)

𝑡3 =2𝑉3

√2𝑓𝑃4𝐶

+√2𝑓(𝑃1 + 𝑃2)

𝐶

(20)

𝑡4 =2𝑉4

√2𝑓(𝑃4)𝐶

(21)

In the variable switching frequency control method that has 4

modes in each switching cycle, the summation of t1-t4 should be

equal to the link frequency.

𝑡1 + 𝑡2 + 𝑡3 + 𝑡4 =1

𝑓 (22)

2𝑉1

√2𝑓𝑃1𝐶

+2𝑉2

√2𝑓𝑃1𝐶

+ √2𝑓(𝑃1 + 𝑃2)

𝐶

+2𝑉3

√2𝑓𝑃4𝐶

+ √2𝑓(𝑃1 + 𝑃2)

𝐶

+2𝑉4

√2𝑓(𝑃4)𝐶

=1

𝑓

(23)

The design can be carried out for the worst condition, when the

summation of t1-t4 has the highest value so that at this point the

link frequency is minimum. After simplification, a relation

between the link capacitance, rated power, the minimum value

of the link frequency (𝑓𝑚𝑖𝑛) at rated power, and the peak values

of the input and output voltage references is obtained, as shown

in the following.

𝐶 =𝑃𝑇

2𝑓𝑚𝑖𝑛(𝑉𝑖𝑛−𝑙𝑙−𝑝𝑒𝑎𝑘 + 𝑉𝑜𝑢𝑡−𝑙𝑙−𝑝𝑒𝑎𝑘)2 (24)

Since the values of V1-V4 change over time, the link frequency

also changes. However, the range of link frequency variation is

small in comparison to the minimum link frequency. For the

design of this converter, a minimum link frequency at rated

power should be chosen at first. The control algorithm controls

the converter operation such that the total average power is

transferred to the output side in a full link cycle. In this paper,

the rated power (PT) of the simulated and tested system with

variable frequency control method is 1000 W, the input line-

line voltage is 100 V [RMS], and the output line-line voltage is

150 V [RMS], and the minimum link frequency is selected 4.5

kHz. Therefore, based on (24), the value of the link capacitance

will be equal to 0.88 μF (0.9 μF is selected in experiments and

simulation). As mentioned earlier, the link frequency is not

fixed in the variable switching frequency control method, and

according to (23), it depends on the values of V1-V4, P1-P4, and

C: 𝑓

=1

(

2𝑉1

√2𝑃1𝐶

+2𝑉2

√2𝑃1𝐶+ √

2(𝑃1 + 𝑃2)𝐶

+2𝑉3

√2𝑃4𝐶+√

2(𝑃1 + 𝑃2)𝐶

+2𝑉4

√2𝑃4𝐶 )

2

(25)

Based on (25), the link frequency will vary as the values of V1-

V4 and P1-P4 change over time. The link peak voltage at each

moment can be determined as follows:

𝑉𝑝2 = √2𝑃𝑇

𝑓𝐶 (26)

The link peak voltage in each link cycle, Vp2, changes over time

as the link frequency in each link cycle varies due to changes in

the instantaneous values of V1-V4 and P1-P4. The range of link

frequency variation depends on the input and output voltage and

current references, including their amplitudes, angular

frequencies, and phase angles, as well as the link capacitance.

Fig. 9 (a) shows the link frequency and the link peak voltage

(Vp2) when the input and output angular frequencies are both

equal to 377 rad/s, and the phase angles of the input and output

voltage references are both zero. For this case, the link

frequency changes between 4.44 kHz and 5.92 kHz over a full

cycle. Fig. 9 (b) shows the link frequency and link peak voltage

when the input and output angular frequencies are both 377

rad/s, but the input and output voltage references have a 30˚

TABLE III. THE SWITCHING PATTERN OF THE PROPOSED THREE-PHASE AC-AC CONVERTER

Zone 1 2 3 4 5 6 7 8 9 10 11 12

Mode Side

1

Input - - - - - - - - - - - -

Output S2o

S4o

S2o

S4o

S3o

S4o

S3o

S4o

S3o

S5o

S3o

S5o

S1o

S5o

S1o

S5o

S1o

S6o

S1o

S6o

S2o

S6o

S2o

S6o

2

Input S6 S3 S2 S5 S4 S1 S3 S6 S5 S2 S1 S4

Output S2o

S4o

S2o

S4o

S3o

S4o

S3o

S4o

S3o

S5o

S3o

S5o

S1o

S5o

S1o

S5o

S1o

S6o

S1o

S6o

S2o

S6o

S2o

S6o

3

Input S3 S6

S3 S6

S2 S5

S2 S5

S1 S4

S1 S4

S3 S6

S3 S6

S2 S5

S2 S5

S1 S4

S1 S4

Output S2o

S4o

S2o

S4o

S3o

S4o

S3o

S4o

S3o

S5o

S3o

S5o

S1o

S5o

S1o

S5o

S1o

S6o

S1o

S6o

S2o

S6o

S2o

S6o

4

Input S3

S6

S3

S6

S2

S5

S2

S5

S1

S4

S1

S4

S3

S6

S3

S6

S2

S5

S2

S5

S1

S4

S1

S4

Output

S2o

S4o

S6o

S2o

S3o

S4o

S2o

S3o

S4o

S3o

S4o

S5o

S3o

S4o

S5o

S1o

S3o

S5o

S1o

S3o

S5o

S1o

S5o

S6o

S1o

S5o

S6o

S1o

S2o

S6o

S1o

S2o

S6o

S2o

S4o

S6o

5

Input S3

S6

S3

S6

S2

S5

S2

S5

S1

S4

S1

S4

S3

S6

S3

S6

S2

S5

S2

S5

S1

S4

S1

S4

Output S4o

S6o

S2o

S3o

S2o

S3o

S4o

S5o

S4o

S5o

S1o

S3o

S1o

S3o

S5o

S6o

S5o

S6o

S1o

S2o

S1o

S2o

S4o

S6o



phase shift (lead or lag). In this case, the link frequency changes

over a narrower range, between 4.75 kHz and 5.25 kHz. In Fig.

9 (c), it is assumed that the output angular frequency is

increased to 754 rad/s and 𝛼𝑖𝑛 and 𝛼𝑜𝑢𝑡 are both equal to zero.

As seen in this figure, the link frequency changes between 4.44

kHz and 5.54 kHz.

The design and analysis will be slightly different for the fixed

switching frequency control method. As mentioned before, the

link frequency will be constant if this control method is applied.

For this method, (7)-(21) are still valid. In this case, a fixed link

frequency, ffixed, can be first chosen, based on which the value

of the link capacitance is determined.

𝐶 ≤𝑃𝑇

2𝑓𝑓𝑖𝑥𝑒𝑑(𝑉𝑖𝑛−𝑙𝑙−𝑝𝑒𝑎𝑘 + 𝑉𝑜𝑢𝑡−𝑙𝑙−𝑝𝑒𝑎𝑘)2

(27)

The link peak voltage is also constant in this case

𝑉𝑝2 = √2𝑃𝑇𝑓𝑓𝑖𝑥𝑒𝑑𝐶

(28)

One of the advantages of the fixed switching frequency control

algorithm is that t1-t4 can be easily calculated using (18)-(21).

Therefore, an open-loop controller can be used, and measuring

the unfiltered line-line voltages is not required. The duration of

mode 5 can be obtained as

𝑡5 =1

𝑓𝑓𝑖𝑥𝑒𝑑− (𝑡1 + 𝑡2 + 𝑡3 + 𝑡4) (29)

C. Inductive Filter Analysis

The inductive filter design analysis is discussed for the variable

switching frequency control method here; however, it can be

easily extended to fixed switching frequency control method.

At first, the design of an inductive filter is presented for the

input side of the proposed ac-ac converter. During discharging

modes, the input phase currents freely flow through the input

side switches in a short circuit path. The equivalent circuit of

the input side during the discharging modes is shown in Fig. 10.

In this figure, VAi, VBi, and VCi are the input phase sources

(measured as phase-neutral). Since this is a very short time

interval compared to the line cycle, the ac sources are modeled

as dc sources. La, Lb, and Lc are the input side inductive filters,

and iAi, iBi, and iCi are the input phase currents. Also, the

conditions in Table II are assumed for the filter design.

Fig. 10. The equivalent circuit of the input side during discharging modes.

Three KVLs can be written for this circuit (La=Lb=Lc=Li).

𝑉𝐴𝑖 − 𝑉𝐵𝑖 = 𝐿𝑖𝑑𝑖𝐴𝑖𝑑𝑡

+ 𝐿𝑖𝑑𝑖𝐵𝑖𝑑𝑡

(30)

𝑉𝐴𝑖 − 𝑉𝐶𝑖 = 𝐿𝑖𝑑𝑖𝐴𝑖𝑑𝑡

+ 𝐿𝑖𝑑𝑖𝐶𝑖𝑑𝑡

(31)

𝑉𝐵𝑖 − 𝑉𝐶𝑖 = 𝐿𝑖𝑑𝑖𝐶𝑖𝑑𝑡

− 𝐿𝑖𝑑𝑖𝐵𝑖𝑑𝑡

(32)

After simplification, the following equation can be obtained.

(𝑉𝐴𝑖 − 𝑉𝐵𝑖) − (𝑉𝐶𝑖 − 𝑉𝐴𝑖) = 3𝐿𝑖𝑑𝑖𝐴𝑖𝑑𝑡 →

𝐿𝑖 =[(𝑉𝐴𝑖 − 𝑉𝐵𝑖) − (𝑉𝐶𝑖 − 𝑉𝐴𝑖)] × 𝑡𝑑

3∆𝑖𝐴𝑖

(33)

𝑡𝑑 =1

𝑓− (𝑡1 + 𝑡2) (34)

where td is the total discharging time and ∆𝑖𝐴𝑖 is the maximum

allowed current ripple. The worst-case scenario (maximum

ripple in the current) happens when the expression [(𝑉𝐴𝑖 − 𝑉𝐵𝑖) −

(𝑉𝐶𝑖 − 𝑉𝐴𝑖)] has the maximum value, which would be equal to

√3𝑉𝑖𝑛−𝑙𝑙−𝑝𝑒𝑎𝑘 , and discharging time has the longest duration.

td,max has the longest duration when the duration of mode 2 is

almost zero and t1 is maximum. Therefore, td,max can be obtained

as

𝑡𝑑,𝑚𝑎𝑥 =1

𝑓− 𝑡1,𝑚𝑎𝑥 (35)

𝑡1,𝑚𝑎𝑥 =2𝑉1,𝑚𝑎𝑥

√2𝑓𝑃1𝐶

(36)

At the moment that the duration of mode 2 is almost zero, the

whole rated power is transferred during mode 1, such that

P1=PT and at this moment 𝑉1,𝑚𝑎𝑥 =√3

2𝑉𝑖𝑛−𝑙𝑙−𝑝𝑒𝑎𝑘 (see Fig. 5).

Hence, the input filter inductance can be determined by (37).

𝐿𝑖 =√3𝑉𝑖𝑛−𝑙𝑙−𝑝𝑒𝑎𝑘 × 𝑡𝑑,𝑚𝑎𝑥

3∆𝑖𝐴𝑖 (37)

The same method can be extended to design of an inductive

filter at the output side. The output phase currents freely flow

through the output side switches during the charging modes.

Therefore, the output side filter inductance (Lo) can be similarly

obtained as

𝐿𝑜 =√3𝑉𝑜𝑢𝑡−𝑙𝑙−𝑝𝑒𝑎𝑘 × 𝑡𝑐,𝑚𝑎𝑥

3∆𝑖𝐴𝑜 (38)

where ∆𝑖𝐴𝑜 is the maximum allowed current ripple and 𝑡𝑐,𝑚𝑎𝑥

is the maximum duration of charging modes, which happens

when 𝑉1 = 𝑉2 = 0.5𝑉𝑜𝑢𝑡−𝑙𝑙−𝑝𝑒𝑎𝑘 and P1=P2=0.5PT. 𝑡𝑐,𝑚𝑎𝑥 can

be calculated as

𝑡𝑐,𝑚𝑎𝑥 =𝑉𝑖𝑛−𝑙𝑙−𝑝𝑒𝑎𝑘

√𝑓𝑃𝑇𝐶

+𝑉𝑖𝑛−𝑙𝑙−𝑝𝑒𝑎𝑘

√𝑓𝑃𝑇𝐶+ √

2𝑓𝑃𝑇𝐶

=√2𝑉𝑖𝑛−𝑙𝑙−𝑝𝑒𝑎𝑘

√𝑓𝑃𝑇𝐶

(39)

iAi

iBi

iCi

La

Lb

Lc

VAi

VBi

VCi

Fig. 9. The link frequency (f) and link peak voltage (Vp2) over a full cycle (a)

when 𝜔𝑖𝑛 = 377𝑟𝑎𝑑

𝑠, 𝜔𝑜𝑢𝑡 = 377

𝑟𝑎𝑑

𝑠, 𝛼𝑖𝑛 = 0˚, and 𝛼𝑜𝑢𝑡 = 0˚, (b) when

𝜔𝑖𝑛 = 377𝑟𝑎𝑑

𝑠, 𝜔𝑜𝑢𝑡 = 377

𝑟𝑎𝑑

𝑠, 𝛼𝑖𝑛 = 0˚, and 𝛼𝑜𝑢𝑡 = 30˚, (c) when 𝜔𝑖𝑛 =

377𝑟𝑎𝑑

𝑠, 𝜔𝑜𝑢𝑡 = 754

𝑟𝑎𝑑

𝑠, 𝛼𝑖𝑛 = 0˚, and 𝛼𝑜𝑢𝑡 = 0˚.

(a)

(b)

(c)

Time (s)

Vp

2 (

V)

Lin

k F

requen

cy

(Hz)

Lin

k F

req

uen

cy

(Hz)

Vp

2 (

V)

Vp

2 (

V)

Lin

k F

requen

cy

(Hz)



IV. SIMULATION STUDY

In order to evaluate the performance of the proposed ac-ac

converter, the converter is simulated using PSIM software. The

simulation study is performed for both variable and fixed

switching frequency control methods. The system parameters

for simulations and experiments are listed in Table IV.

A. Variable switching frequency control method

According to (24), to have a minimum link frequency of 4.5

kHz at rated power, the value of the employed link capacitance

is equal to 0.9 µF, which is far smaller than that of the

electrolytic capacitors used in back-to-back ac-dc-ac

converters; for a PWM dc-link ac-ac converter, the estimated

dc-link capacitance is 100 µF, based on simulation data, to

achieve similar current THDs and maintain 1% voltage ripple

across the dc-link, under similar conditions. Figs. 11 (a) and

(b) show the input currents, drawn from the ac source, and the

output currents, respectively. It can be observed that the

converter is capable of changing the voltage level as well as

frequency transformation given that the output current

frequency is 120 Hz, while the input current frequency is 60 Hz.

The FFT analysis is performed using PSIM and the input

currents THD is equal to 6.1 %, which can be significantly

improved in case higher link frequency is selected. For instance,

in case the link frequency is 2.25 times higher than the selected

link frequency, the THD will be reduced to 3.8 %. Another

option for reducing the input current THD is use of LCL filter

instead of L filter. However, this is out of the scope of this work,

since the main purpose of this paper is to present the proof of

concept for a new single-stage universal power converter that

can perform the three-phase ac-ac conversion through a series

capacitive ac-link. The output current THD is equal to 3.6 %. It

should be noted that an LC filter is used at the output-side of

the converter that results in lower THD values of the load

currents compared to the input-side currents. The link current

and voltage are represented in Fig. 12; as can be observed,

during charging modes, the link voltage increases and the link

current is positive. During discharging modes, the link voltage

decreases to zero, and the link current is negative. As mentioned

in section II, there are two modes for charging the link capacitor

and two for discharging it. Figs. 13 (a) and (b) demonstrate the

unfiltered line-line voltages for the input and output sides.

During mode 1, Vbc is equal to the link voltage while Vca is zero.

During mode 2, Vca is equal to the link voltage, whereas Vbc is

zero. It can be seen that Vab is equal to the link voltage during

both modes. A similar scenario happens for the output side line-

line voltages, except the phase pair with the lowest line-line

voltage is connected to the link during the first discharging

mode, i.e. mode 3. During mode 3, Vcao is equal to the link

voltage while Vabo is zero. During mode 4, Vabo is equal to the

link voltage, whereas Vcao is zero. Vbco is equal to the link

voltage during both modes 3 and 4. The input and output zones

during the time span shown in Fig. 13 are 7 and 12, respectively.

Fig. 11. The simulation results corresponding to variable switching

frequency operation, (a) input currents (60 Hz), (b) output currents (120

Hz).

Fig. 12. The link voltage and current of the ac-ac converter when variable

switching frequency control is used.

Fig. 13. The simulation results corresponding to variable switching

frequency operation, (a) unfiltered input line-line voltages, (b) unfiltered

output line-line voltages.

Fig. 14 (a) shows the link voltage, and Figs. 14 (b)-(e) represent

the voltage stress of different input-side switches. Fig. 14 (b)

shows the voltage across switch S2 during different modes. Fig.

14 (b) illustrates that in this specific zone, the voltage stress of

S2 (VS2) follows the link voltage (see Fig. 14 (a)) during

charging modes, while the voltage stress of output side switches

is zero. The voltage stress of the output side bridge switches is

shown in Fig. 15. Furthermore, Figs. 16 (a) and (b) demonstrate

the current stress of S1 and S1o, respectively. The positive

current in these figures show that the switch conducts, while the

negative current represents the anti-parallel diode conduction.

Fig. 17 illustrates the total average power that is transferred in

charging modes (PT) along with P1 and P2 that are the averages

of the transferred power during modes 1 and 2. This figure

verifies that the total average transferred power is equal to 1000

W and PT=P1+P2. Also, for more clarification, the

instantaneous values of input and output power are shown in

Fig. 17 (b) and they are equal to 1000 W.

Iin (

A)

Io (

A)

(a)

(b)

Time (s)

VL

ink/1

00

(V

) an

d

ILin

k (

A)

VLink/100 ILink

Time (s)

(a)

(b)Time (s)

Inpu

t L

ine-

Lin

e

Volt

ages

(V

)

Outp

ut

Lin

e-L

ine

Volt

ages

(V

)

Vab Vbc Vca

Vabo Vbco Vcao

Mode 1 starts

Mode 2 starts

Charging modes end

Mode 3 starts

Mode 4 starts

Discharging modes end

TABLE IV. THE SYSTEM PARAMETERS FOR SIMULATIONS AND EXPERIMENTS

Parameters

Variable Switching

Frequency (Simulation and

Experiment)

Fixed

Switching Frequency

(Simulation)

Fixed

Switching Frequency

(Experiment)

Nominal Power 1 kW 1 kW 640 W

Link Frequency 4.5-5.5 kHz 20 kHz 9 kHz

Link Capacitance

0.9 µF 0.12 µF 0.45 µF

Input L-L

Voltage 100 V, 60 Hz 100 V, 60 Hz 80 V, 60 Hz

Output L-L Voltage

150 V, 120 Hz 150 V, 120 Hz 120 V, 60 Hz

Input L Filter 5 mH 5 mH 5 mH

Output LC

Filter

Lo 4.8 mH 4.8 mH 4.8 mH

Co 5 µF 5 µF 5 µF



Fig. 14. (a) The link voltage, (b) voltage across S2 [V], (c) voltage across S3 [V], (d) voltage across S4 [V], (e) voltage across S6 [V] during zone 2

of input side.

Fig. 15. (a) The link voltage, (b) voltage across S2o [V], (c) voltage across

S3o [V], (d) voltage across S4o [V], (e) voltage across S6o [V] during zone 8

of output side.

Fig. 16. The current stress of (a) switch S1 and its anti-parallel diode, (b)

switch S1o and its anti-parallel diode.

Fig. 17. (a) The total average power (PT), average power transferred in mode 1

(P1), and average power transferred in mode 2 (P2), (b) the instantaneous values of the input and active power.

B. Fixed switching frequency control method

For verifying the fixed switching frequency control method, a

0.12 µF link capacitor is employed to achieve a fixed link

frequency of 20 kHz. Figs. 18 (a) and (b) show the input

currents and the output currents, respectively. The simulation is

performed for the rated power (1 kW). The link current and

voltage are represented in Fig. 19; as can be observed, there are

five modes in a switching cycle, including two modes for

charging the link capacitor, two modes for discharging the link

capacitor, and a zero operation mode. During the zero operation

mode, which starts when mode 4 ends, the link voltage and

current remain zero until the end of the cycle. Figs. 20 (a) and

(b) demonstrate the unfiltered line-line voltages for the input

and output sides.

Fig. 18. The simulation results corresponding to fixed switching frequency

operation, (a) input currents (60 Hz), (b) output currents (120 Hz).

Fig. 19. The link voltage and current of the ac-ac converter when fixed-

switching frequency control is used.

Fig. 20. The simulation results corresponding to fixed switching frequency

operation, (a) unfiltered input line-line voltages, (b) unfiltered output line-line

voltages.

V. EXPERIMENTAL RESULTS

A 1-kW prototype, as shown in Fig. 21, has been fabricated, and

the three-phase ac-ac converter is experimentally evaluated.

The prototype consists of three boards: two switch boards for

input-side and output side, and a control board. The

specifications of the experimental setup for both control

methods are listed in Table IV. The control algorithm is

implemented on a TMS320F28335 Delfino microcontroller.

A. Variable switching frequency control method

Fig. 22 (a) shows the input currents that are drawn from the

three-phase ac source. As can be observed, the input currents

are sinusoidal with the frequency of 60 Hz. Fig. 22 (b) pictures

VL

ink

VS

2V

S3

VS

4V

S6

(a)

(b)

(c)

(d)

(e)

Time (s)

Discharging Interval

Mode 1 begins Mode 2 begins

Discharging interval begins

VL

ink

VS

2o

VS

3o

VS

4o

VS

6o

(a)

(b)

(c)

(d)

(e)

Time (s)

Charging Interval

Mode 3 begins Mode 4 begins

Charging interval begins

IS1 (

A)

IS1o (

A)

(a)

(b)

Time (s)

P1 P2PT

PoPi(a)

(b)

Time (s)

Pav

erag

e (W

)P

i an

d P

o (

W)

(a)

(b)Time (s)

Iin

(A

)Io

(A

)

Time (s)

VL

ink

/10

0 (

V)

and

ILin

k (

A)

VLink/100 ILink

(a)

(b)Time (s)

Inpu

t L

ine-

Lin

e

Volt

ages

(V

)

Outp

ut

Lin

e-L

ine

Volt

ages

(V

)

Vab Vbc Vca

Vabo Vbco Vcao

Mode 1 starts

Mode 2 starts

Charging

modes end

Mode 3 starts

Mode 4 starts

Discharging

modes end

Fig. 21. The constructed 1-kW three-phase ac-ac converter prototype.

A: Output Side Board

B: Input Side Board

C: Control Board

D: Input Filter

E: Output Filter

F: Load

G: Grid Sensors

H: AC Source

From the

AC Source



the output phase voltages, when the desired output frequency is

120 Hz. The link voltage and current are shown in Fig. 23. As

can be seen, during mode 1 that the link current is equal to the

highest (absolute value) input phase current and is positive, the

link voltage increases. During mode 2 that the link current is

equal to the second highest (absolute value) input phase current

and still positive, the link voltage increases; however, the rate

of increase is lower than that of the first mode. During

discharging modes, the energy stored in the capacitive-link

discharges into the output. Therefore, the link current is

negative, leading to decrement of the link voltage. During mode

3, the second highest (absolute value) output current discharges

the link capacitor, while the highest output current discharges

the link capacitor in mode 4. It can be seen that once the link

voltage is fully discharged, the next cycle starts. Furthermore,

Figs. 24 (a) and (b) represent the input and output unfiltered

line-line voltages, respectively. It can be observed that the

longest charging and discharging modes are corresponded to

modes 1 and 4, respectively. During charging modes, the output

unfiltered line-line voltages are equal to zero and similarly

during the discharging modes the input unfiltered line-line

voltages are zero. Fig. 25 illustrates the capability of the

proposed converter to change the frequency of the output phase

voltages during the operation of the converter. It can be

observed that the output frequency smoothly changes from 120

Hz to 60 Hz during the full load operation of the converter.

(a)

(b)

Fig. 22. The experimental results of the three-phase ac-ac converter with variable switching frequency control method, (a) input phase currents and

(b) output phase voltages across the resistive load. The output frequency is

120 Hz, while the input frequency is 60 Hz.

Fig. 23. The link voltage and current of the three-phase ac-ac converter

with variable switching frequency control method.

(a)

(b)

Fig. 24. The experimental results of the three-phase ac-ac converter

with variable switching frequency control method, (a) input unfiltered

line-line voltages and (b) output unfiltered line-line voltages.

Fig. 25. The output phase voltages when the frequency changes from 120

Hz to 60 Hz.

The efficiency curve of the converter at different operating

points is given in Fig. 26. The peak efficiceny of the converter

is reported 90.5% when the output power of the converter is

equal to 940 W. Although the peak efficiency of the proposed

converter is 90.5 % at the output power of 940 W, at higher

power levels, the efficiency of the converter will be

significantly improved. The simulation data shows that the

conversion efficiency has a tendency toward ~95 % as the

power increases to 25 kW.

Fig. 26. The efficiency curve of the converter versus output power levels.

B. Fixed switching frequency control method

Figs. 27-29 depict the experimental results corresponding to

the fixed switching frequency control method when the power

is 640 W. The switching frequency is 9 kHz. Fig. 27 (a) shows

the input currents that are drawn from the three-phase ac source.

As can be observed, the input currents are sinusoidal with lower

ripples compared with the variable switching frequency owing

to the higher link frequency. Fig. 27 (b) pictures the output

phase voltages, when the desired output frequency is 60 Hz.

The link voltage and current are shown in Fig. 28. As can be

seen, the charging and discharging modes behavior is similar to

the variable switching frequency control method. The only

difference is the existence of mode 5, during which no power is

transferred and link voltage and current are zero. It can be seen

that once the link voltage is fully discharged, mode 5 starts and

continues until the next switching cycle begins. Furthermore,

Figs. 29 (a) and (b) represent the input and output unfiltered

line-line voltages, respectively. These waveforms are also

similar to those of variable switching frequency control method,

except that during the last mode both input and output unfiltered

line-line voltages remain zero.

(a)

(b)

Fig. 27. The experimental results of the three-phase ac-ac converter with fixed switching frequency control method, (a) input phase currents and (b)

output phase voltages across the resistive load.

2 ms/div5 A/div

T=16.66 ms2 ms/div 50 V/div T=8.33 ms

40 us/div 250 V/div

5 A/div

Mo

de

3

Mode

4

Mo

de

1

Mo

de

2

Link CurrentLink Voltage

40 us/div250 V/div

Mode 1 starts

Mode 2 starts

Charging

modes

end 40 us/div 250 V/div

Mode 3

starts

Mode 4 starts

Discharging

modes

end

40 ms/div100 V/div

Output voltage

frequency changes

80

85

90

95

0 200 400 600 800 1000E

ffic

ienc

y (%

)Output Power (W)

4 ms/div 2 A/div

2 ms/div60 V/div



Fig. 28. The link voltage and current of the three-phase ac-ac converter with

fixed switching frequency control method.

(a)

(b)

Fig. 29. The experimental results of the three-phase ac-ac converter with fixed switching frequency control method, (a) input unfiltered line-line

voltages and (b) output unfiltered line-line voltages.

VI. CONCLUSION

In this paper, a novel three-phase ac-ac converter topology,

which benefits from the high frequency alternating voltage

across a capacitive link, is introduced and studied. The high

frequency voltage variation of the link allows using very small

film capacitors at the link for transferring the power from the

input to the output. Moreover, use of compact high frequency

transformers, in case galvanic isolation is required, is

applicable; this feature significantly reduces the size, weight,

and volume of the converter. Unlike conventional dc-link

converters, this converter does not suffer from the unreliable

characteristics of the large electrolytic capacitors, owing to the

very small film capacitors used for transferring the power, even

at high power applications. This converter is capable of both

stepping up and stepping down the voltage amplitude as well as

changing the output side frequency. Although this converter

performs the ac-ac conversion in a single stage, only 12

switches are required, which is a major advantage over the

matrix converters. The advantages and promising features of

the proposed converter are validated in this paper through

simulations and a 1-kW experimental setup.

ACKNOWLEDGMENT

This research was sponsored by the Office of Naval Research

under grant N00014-17-1-2122.

REFERENCES

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[2] B. A. Welchko, T. A. Lipo, T. M. Jahns, and S. E. Schulz, "Fault tolerant three-phase AC motor drive topologies: a comparison of features, cost, and limitations," IEEE Transactions on Power Electronics, vol. 19, no. 4, pp. 1108-1116, 2004.

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Link CurrentLink Voltage

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Ehsan Afshari (S’15) received B.Sc.

degree in electrical engineering from

Ferdowsi University of Mashhad,

Mashhad, Iran, in 2013, and M.Sc. degree

in electrical engineering from University of

Tehran, Tehran, Iran, in 2016. He is

currently a PhD Candidate at the

Department of Electrical and Computer

Engineering, Northeastern University, Boston, MA.

His areas of interest are power electronics, design and digital

control implementation of power converters, and grid

integration of photovoltaic systems.

Masih Khodabandeh (S’16) received the

B.S. degree in electrical engineering from

Isfahan University of Technology, Isfahan,

Iran, in 2012, and the M.S. degree in

electrical engineering from Sharif

University of Technology, Tehran, Iran, in

2014. He is currently working toward his

PhD degree in the Department of Electrical

and Computer Engineering, Northeastern University, Boston

MA, USA.

His areas of interest are power electronics and soft-switching

capacitive link converters.

Mahshid Amirabadi (S’05–M’13)

received the B.S. degree from Shahid

Beheshti University, Tehran, Iran, in 2002,

the M.S. degree from University of Tehran,

Iran, in 2006, and the Ph.D. degree from

Texas A&M University, College Station,

TX, USA, in 2013, all in electrical

engineering. Following receipt of the Ph.D.

degree, she joined University of Illinois at Chicago as an

assistant professor. Since August 2015 she has been with

Northeastern University where she is an assistant professor. Her

main research interests and experience include design, analysis

and control of power converters, renewable energy systems and

variable speed drives.

Dr. Amirabadi serves as an Associate Editor for the IEEE

TRANSACTIONS ON INDUSTRY APPLICATIONS and the IEEE

TRANSACTIONS ON POWER ELECTRONICS.

a single-stage capacitive ac-link ac-ac power converter

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