A SINGLE-PHASE HYBRID ACTIVE POWER FILTER

WITH PHOTOVOLTAIC APPLICATION

TAN PERNG CHENG

UNIVERSITI TEKNOLOGI MALAYSIA

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Special dedicated to my beloved mother and Chai Ling

iv

ACKNOWLEDGEMENT

I would like to take this opportunity to thank various people who have

provided much assistance and invaluable information to make this project a success.

First of all, I would like to take this opportunity to express my deepest gratitude to

my supervisor of this project, Associate Professor Dr. Zainal bin Salam for his

valuable guidance and generous encouragement throughout the project duration. His

patience in understanding my tasks and problems has brought light to the

development of this project.

I also wish to express my gratitude to the members of academic and technical

staff of Power Electronics and Drives Group, Department of Energy Conversion,

Faculty of Electrical Engineering, Universiti Teknologi Malaysia for the discussions

and technical assistances. Not forgetting my friends and the graduated seniors who

have encouraged and assisted me in needing times.

Last but not least, my utmost thanks go to my beloved mother and Chai Ling

for their unimaginable love, encouragement and support.

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ABSTRACT

The past several years have seen a rapid increase of power electronics-based

loads connected to the distribution system. These types of loads draw nonsinusoidal

current from the mains, degrading the power quality by causing harmonic distortion.

This thesis proposes a single-phase hybrid active power filter with photovoltaic

application. The proposed topology interconnects a passive high-pass filter in

parallel with a shunt active power filter and a DC source that represents the

photovoltaic array. The uniqueness of the proposed topology is the fact that it

improves the harmonic filtering performance of a basic shunt active power filter, as

well as simultaneously supplies the power from the photovoltaic array to the load.

The compensation current reference for the proposed topology is obtained by using

the extension instantaneous reactive-power theorem. This theorem simplifies the

equations for the current reference estimation, thus leading to a more efficient

implementation in digital signal processor. To generate the compensation current

that follows the current reference, the fixed-band hysteresis current control method is

adopted. This work describes the design of circuit topology, control system, high-

pass filter and compensation current reference estimation. The system is verified by

simulation using MATLAB/Simulink simulation package. To validate the result, a

500 VA laboratory prototype is constructed. It is based on the dSPACE DS1104

digital signal processor. Experimental results show that the system effectively

reduces the total harmonic distortion of the source current from 130.2 % to 19.6 %.

Furthermore, it is demonstrated that the system can also supply active power to the

load.

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TABLE OF CONTENTS

CHAPTER TITLE PAGE

TITLE PAGE i

DECLARATION ii

DEDICATION iii

ACKNOWLEDGEMENT iv

ABSTRACT v

ABSTRAK vi

TABLE OF CONTENTS vii

LIST OF TABLES xii

LIST OF FIGURES xiii

LIST OF SYMBOLS xviii

LIST OF ABBREVIATIONS xxiii

LIST OF APPENDICES xxv

1 INTRODUCTION 1

1.1 Overview 1

1.2 Objective of Research 3

1.3 Methodology of Research 4

1.4 Thesis Organisation 5

2 LITERATURE REVIEW 7

2.1 Introduction 7

2.2 Electric Power Quality 7

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2.2.1 Fundamental of Harmonic Distortion 8

2.2.2 Harmonic Distortion Impacts on

Electric Power Quality 9

2.3 Harmonic Mitigation Approaches 10

2.3.1 Passive Filtering of Harmonic 11

2.3.2 Active Filtering of Harmonic 12

2.3.2.1 Shunt Active Power Filter 14

2.3.2.2 Series Active Power Filter 16

2.3.2.3 Hybrid Active Power Filter 18

2.4 Distribution Line Interactive Photovoltaic

Systems 19

2.4.1 Distribution Line Interactive

Photovoltaic Inverter 20

2.4.2 Photovoltaic Interactive Shunt

Active Power Filter 22

2.5 Reference Signal Estimation Techniques 23

2.5.1 Frequency Domain Approaches 24

2.5.1.1 Fourier Transform

Techniques 24

2.5.2 Time Domain Approaches 25

2.5.2.1 Instantaneous Reactive-

Power Theorem 26

2.5.2.2 Extension Instantaneous

Reactive-Power Theorem 27

2.5.2.3 Synchronous-Detection

Theorem 28

2.5.2.4 Synchronous-Reference-

Frame Theorem 29

2.5.2.5 Sine-Multiplication Theorem 29

2.6 Control Techniques for Active Power Filter 30

2.6.1 Linear Control Technique 30

2.6.2 Hysteresis Control Technique 32

2.7 Summary 33

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3 A SINGLE-PHASE HYBRID ACTIVE POWER

FILTER 35

3.1 Introduction 35

3.2 Operation Principle of the Proposed Hybrid

APF 36

3.3 The Proposed System Configuration 38

3.3.1 Proposed Overall System 38

3.3.2 Power Circuit 40

3.3.3 Interfacing Inductor 41

3.3.4 DC-Bus Capacitor 42

3.4 The Control System 43

3.4.1 Overall Control System 43

3.4.2 Compensation Current Reference

Estimation 45

3.4.3 DC-Bus Voltage Control 47

3.4.4 Digital Phase-Lock Loop 49

3.4.5 Digital Low-Pass Filter 51

3.5 Passive High-Pass Filter 53

3.6 Summary 57

4 SIMULATION OF THE PROPOSED HYBRID

ACTIVE POWER FILTER 58

4.1 Introduction 58

4.2 System Modelling via MATLAB/Simulink 59

4.2.1 Distribution Source 59

4.2.2 Nonlinear Load 60

4.2.3 Shunt Active Power Filter 61

4.2.4 Passive High-Pass Filter 63

4.2.5 Overall Control System 66

4.2.5.1 Reference Sinewave

Generator 67

4.2.5.2 Compensation Current

Reference Estimator 70

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4.2.5.3 DC-Bus Voltage Controller

and PV Current Estimator 72

4.2.5.4 Fixed-Band Hysteresis

Current Controller 73

4.3 Basic Shunt Active Power Filter 74

4.4 Summary 75

5 HARDWARE IMPLEMENTATION OF THE

PROPOSED HYBRID ACTIVE POWER FILTER 76

5.1 Introduction 76

5.2 General Description of the Experimental

Set-Up 76

5.3 Experimental Prototype Construction 79

5.3.1 Nonlinear Load 80

5.3.2 Shunt Active Power Filter 81

5.3.2.1 Voltage Source Inverter 81

5.3.2.2 Interfacing Inductor 82

5.3.2.3 DC-Bus Capacitor 83

5.3.3 Gate-Driver Circuit 83

5.3.4 Passive High-Pass Filter 84

5.4 Analogue Signals Measurement 85

5.4.1 Hall-Effect Voltage Transducer 85

5.4.2 Hall-Effect Current Transducer 86

5.4.3 Analogue Prefilter 87

5.5 Controller Hardware and Software Tools 88

5.5.1 DS1104 DSP Controller Board 88

5.5.2 Software Tools 89

5.6 Control Software 91

5.6.1 Control Software Structure 91

5.6.2 Initialisation Routine 92

5.6.3 Service Routine 0 92

5.6.4 Interrupt Service Routine 1 93

5.7 Summary 96

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6 RESULTS AND ANALYSIS 97

6.1 Introduction 97

6.2 Results – Without Compensation 98

6.3 Reference Sinewave Generation 99

6.4 Compensation Current Reference Estimation 101

6.5 Results – Ideal Compensation 104

6.6 Results – Basic Shunt Active Power Filter

Compensation 107

6.7 Results – Proposed Hybrid Active Power

Filter Compensation 111

6.8 Photovoltaic Energy Handling Capability 115

6.9 Harmonic Distortion Analysis 116

6.10 Summary 121

7 CONCLUSIONS AND RECOMMENDATIONS

FOR FUTURE WORK 122

7.1 Conclusions 122

7.2 Recommendations for future work 123

REFERENCES 125

PUBLICATIONS 135

APPENDICES A – K 136 – 214

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LIST OF TABLES

TABLE NO. TITLE PAGE

5.1 Experimental prototype parameters 80 5.2 AC smoothing inductor specification 81 5.3 2.5 mH inductor specification 82 5.4 HPF inductor specification 85 5.5 Analogue prefilter specification 87 6.1 Calculated THD for the source current 121

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LIST OF FIGURES

FIGURE NO. TITLE PAGE

1.1 Current distortion caused by nonlinear resistor 1 2.1 Fourier series representation of a distorted waveform 8 2.2 Harmonic currents flowing through the system impedance result in harmonic voltages at the PCC 10 2.3 Common types of passive filters and their configurations 11 2.4 Generalised block diagram for APF 13 2.5 Subdivision of APF according to power circuit configurations and connections 14 2.6 Principle configuration of a VSI based shunt APF 15 2.7 Shunt APF harmonic filtering operation principle 16 2.8 Principle configuration of a VSI based series APF 17 2.9 Operation principle of series APF: (a) single-phase equivalent of series APF, (b) fundamental equivalent circuit, and (c) harmonic equivalent circuit 18 2.10 Hybrid APFs: (a) combination of shunt APF and shunt passive filter and (b) combination of series APF and shunt passive filter 19 2.11 Operation principle of a PV cell 20 2.12 Configuration of a distribution line interactive PV inverter system 21 2.13 Configuration of a PV interactive shunt APF system 22 2.14 Subdivision of reference signal estimation techniques 24

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2.15 Block diagram of linear control technique 31 2.16 Gating signal generation by linear controller 31 2.17 Block diagram of hysteresis control technique 32 2.18 Gating signal generation by hysteresis controller 33 3.1 Operation principle of the proposed hybrid APF

without PV power 36 3.2 Operation principle of the proposed hybrid APF

with PV power 37 3.3 System configuration of the proposed hybrid APF 39 3.4 Power circuit of the proposed hybrid APF 40 3.5 Switching ripple of the compensation current 41 3.6 Overall control system of the proposed hybrid APF 44 3.7 PI controller for DC-bus voltage control 48 3.8 A digital phase-lock loop model in z-domain 49 3.9 Block diagram of the digital low-pass filter for DC

components extraction 52 3.10 Graphical plot of HPF impedance transfer function

( )(sZ hp ) 55 3.11 Simplified model of the proposed hybrid APF 55 3.12 Graphical plot of source current to injected current

transfer function ( )(sH cds ) 56 4.1 Complete simulation model of the proposed hybrid APF connected to a DC source 59 4.2 Detail of “Distribution Source” block 60 4.3 Detail of “Nonlinear Load” block 61 4.4 Detail of “Shunt APF” block 62 4.5 Detail of “Passive HPF” block 63 4.6 Frequency response of the HPF impedance transfer function 65

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4.7 Frequency response of the source current to injected current transfer function 66 4.8 Detail of “Overall Control System” block 67 4.9 Detail of “Reference Sinewave Generator” block 68 4.10 Detail of “Phase Delay Compensation” block 68 4.11 Detail of “Compensation Current Reference Estimator” block 70 4.12 Detail of “DC-Bus Voltage Controller and PV Current Estimator” block 72 4.13 Detail of “Fixed-Band Hysteresis Current Controller” block 74 4.14 Complete simulation model of the basic shunt APF connected to a DC 74 5.1 Overall control block diagram of the experimental set-up 77 5.2 Actual overall experimental set-up 78 5.3 Actual experimental prototype. (1) interfacing inductor, (2) gate drivers, (3) VSI with DC-bus capacitor, (4) rectifier load, (5) DS1104 connector board, (6) smoothing inductor, (7) current and voltage transducers, (8) passive HPF 79 5.4 Schematic of experimental single-phase full-bridge VSI 82 5.5 DC-bus capacitor 83 5.6 Functional block diagram of gate driver circuit 84 5.7 Voltage signal measurement using LV25-P Hall-Effect voltage transducer 86 5.8 Current signal measurement using LA25-NP Hall-Effect current transducer 87 5.9 Analogue prefilter circuit 88 5.10 Block diagram of the DS1104 DSP controller board 89

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5.11 Graphical user interface of ControlDesk software 90 5.12 DS1104 control software structure 92 5.13 Initialisation routine flowchart 94 5.14 Service routine 0 flowchart 94 5.15 Interrupt service routine 1 flowchart 95 6.1 Simulation results – without compensation: source voltage and load current waveforms 98 6.2 Experimental results – without compensation:

source voltage and load current waveforms 99 6.3 Simulation results – PLL generated reference sinewave: source voltage and the generated reference sinewave waveforms 100 6.4 Experimental results – PLL generated reference sinewave: source voltage and the generated reference sinewave waveforms 100 6.5 Simulation results: load current and HPF current waveforms 101 6.6 Experimental results: load current and HPF current waveforms 102 6.7 Simulation results: estimated active load current, reactive load current, harmonic load current and reactive HPF current waveforms 103 6.8 Experimental results: estimated active load current, reactive load current, harmonic load current and reactive HPF current waveforms 104 6.9 Experimental prototype arrangement 105 6.10 Simulation results – ideal compensation condition: load current, compensation current, and source current waveforms 106 6.11 Experimental results – ideal compensation condition: load current, compensation current, and source current waveforms 107

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6.12 Simulation results – basic shunt APF compensation: source voltage, load current, compensation current and source current waveforms 108 6.13 Experimental results – basic shunt APF compensation: source voltage, load current, compensation current and source current waveforms 109 6.14 Simulation result – the relationship between the

compensation current reference and hysteresis band 110 6.15 Experimental result – the relationship between the

compensation current reference and hysteresis band 111 6.16 Simulation results – proposed topology compensation: source voltage, load current, HPF current, compensation current and source current waveforms 113 6.17 Experimental results – proposed topology compensation: source voltage, load current, HPF current, compensation current and source current waveforms 114 6.18 Simulation results – proposed hybrid APF with 250 W PV power generations: load current, compensation current and source current waveforms 115 6.19 Experimental results – proposed hybrid APF with 250 W PV power generations: load current, compensation current and source current waveforms 116 6.20 Spectrum of load current – without compensation: (a) simulation result and (b) experimental result 117 6.21 Spectrum of source current – with ideal compensation condition: (a) simulation result and (b) experimental result 118 6.22 Spectrum of source current – with basic shunt APF compensation: (a) simulation result and (b) experimental result 119 6.23 Spectrum of source current – with proposed topology compensation: (a) simulation result and (b) experimental result 120

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LIST OF SYMBOLS

a - Constant of )(1 zH

1LPFa , 2LPFa - Coefficients of )(zGLPF

A - Gain coefficient of )(sZ hp

c - Constant of )(2 zH

C - Capacitor

0C , 1C - Coefficients of z∆

dC - DC Smoothing capacitor

fC - DC-bus capacitor

hpC - High-pass filter capacitor

CfE - Energy in DC-bus capacitor

refCfE , - Reference energy in DC-bus capacitor

0f - Resonant frequency of passive high-pass filter

cf - Cut-off frequency of analogue prefilter

1cf - Cut-off frequency 1 of analogue prefilter

2cf - Cut-off frequency 2 of analogue prefilter

LPFf - Cut-off frequency of low-pass filter

rf - Parallel resonant frequency of low-pass filter

sf - Sampling frequency of discrete system

1sf - Sampling frequency 1 of the proposed scheme

2sf - Sampling frequency 2 of the proposed scheme

)(sGLPF - Transfer function of low-pass filter in s-domain

LPFG - Coefficient of )(zGLPF

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GD1 - Gate driver circuit 1

GD2 - Gate driver circuit 2

H - Hysteresis tolerance band of current controller

)(sH - Closed-loop transfer function of phase-lock loop in s-domain

)(zH - Closed-loop transfer function of phase-lock loop in z-domain

)(1 zH - Loop filter transfer function in z-domain

)(2 zH - Digitally-controlled oscillator transfer function in z-domain

)(sH cds - Transfer function of source current to injected current in

s-domain

maxH - Maximum crest of )(sH cds

CfI - Amplitude of DC-bus capacitor charging current

fi - Compensation current

ffi , - Compensation current fundamental component

hfi , - Compensation current harmonics components

reffi , - Compensation current reference signal

1,reffi - First component of compensation current reference signal

2,reffi - Second component of compensation current reference signal

hpi - High-pass filter current

hpI - rms value of high-pass filter current

phpi , - High-pass filter current active component

qhpi , - High-pass filter current reactive component

hysteresisi - Error of hysteresis current comparator

Li - Load current

LI - rms value of load current 'Li - Load current shifted by o90

fLi , - Load current fundamental component

hLi , - Load current harmonics component

qLi , - Load current reactive component

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noisei - Noise current

PVi - PV current

PVI - Amplitude of PV current

si - Source current

fsi , - Source current fundamental component

hsi , - Source current harmonics components

swi - Switching ripple of the compensation current

αi - α -axis of load current

βi - β -axis of load current

IK - Integration constant of PI controller

pK - Proportional constant of PI controller

L - Inductor

fL - APF interfacing inductor

hpL - High-pass filter inductor

sL - Source inductor

smoothL - AC smoothing inductor

hM - rms value of harmonic component h of the quantity M

p - Instantaneous active power

p - DC component of instantaneous active power

p~ - AC component of instantaneous active power

Lp - Instantaneous active load power

PVP - Active power of PV array/DC source

q - Instantaneous reactive power

Q - Quality factor of )(sZ hp

q - DC component of instantaneous reactive power

q~ - AC component of instantaneous reactive power

hpq - Instantaneous reactive HPF power

Lq - Instantaneous reactive load power

R - Resistor

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BR - Bleed resistor

hpR - High-pass filter resistor

LR - Load resistor

0s , 1s - Poles of )(sH

nS - Rectifier load nominal complex power

)sin( tω - Reference sinewave

)90sin( o−ωt - 90˚ delayed reference sinewave

T - Period of source voltage

sT - Sampling period of discrete system

swT - Period of switching ripple

CfV - DC-bus voltage

fv - Compensation voltage

reffv , - Compensation voltage reference signal

sv - Source voltage

sV - rms value of source voltage

'sv - Source voltage shifted by o90

fsv , - Source voltage fundamental component

hsv , - Source voltage harmonics components

uv - Distribution voltage

αv - α -axis of source voltage

βv - β -axis of source voltage

ω - Damped frequency

0ω - Series resonant frequency of )(sZ hp

1ω - Parallel resonant frequency of )(sH cds

nω - Natural undamped frequency of low-pass filter

pω - Pole frequency of )(sZ hp

0z , 1z - Poles of )(zH

1−z - Unit delay

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eqZ - Series APF equivalent impedance

fZ - Series APF impedance

)(sZ hp - High-pass filter impedance transfer function

sZ - Source impedance

)(sZ s - Source impedance transfer function

fsZ , - Source impedance fundamental component

hsZ , - Source impedance harmonics components

CfE∆ - Energy loss of DC-bus capacitor in one cycle

LI∆ - Peak rms value of reactive and harmonic load current

ppswI −∆ , - Peak-to-peak switching ripple

CfV∆ - Maximum/minimum DC-bus capacitor voltage

z∆ - Characteristic equation of )(zH

θ - Phase angle of load current

nθ - Phase angle of n-th load current component

)(zfdθ - Feedback signal of digital phase-lock loop

)(zinθ - Input signal of digital phase-lock loop

φ - Phase angle of source voltage

σ - Damping factor

0αβ - Orthogonal coordinates of stationary reference frame

ζ - Damping ratio

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LIST OF ABBREVIATIONS

AC - Alternating current

ADC - Analogue-to-digital converter

APF - Active power filter

ASD - Adjustable-speed motor drive

CPU - Central processing unit

DAC - Digital-to-analogue converter

DC - Direct current

DCO - Digitally-controlled oscillator

DSP - Digital signal processor

EMI - Electromagnetic interference

ESL - Equivalent series inductance

ESR - Equivalent series resistance

FFT - Fast Fourier Transform

HPF - High-pass filter

I/O - Input/output

IGBT - Insulated gate bipolar transistor

LPF - Low-pass filter

MOSFET - Power metal oxide-semiconductor field-effect transistor

p-q - Instantaneous reactive-power

PCC - Point of common coupling

PCI - Peripheral component interconnect

PI - Proportional-integral controller

PLL - Phase-lock loop

PQ - Power quality

PV - Photovoltaic

PWM - Pulse width modulation

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rms - Root-mean-square

RE - Renewable energy

RTI - Real-time interface

RTLib - Real-time library

RTW - Real-time workshop

THD - Total harmonic distortion

THD12.5 kHz - Total harmonic distortion calculated up to 12.5 kHz

VSI - Voltage source inverter

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LIST OF APPENDICES

APPENDIX TITLE PAGE

A Derivation of minimum interfacing inductor ( min,fL ) 136 B Derivation of )(tpL , )(tqL and )(tqhp based on extension p-q theorem 139 C Proportional constant ( pK ) calculation using energy-balance principle 147 D Coefficients ( 1C and 0C ) derivation for the digital phase-lock loop 150 E )(sZ hp and )(sH cds derivation for the passive high-pass filter 153 F AC smoothing inductor ( smoothL ), interfacing inductor ( fL ) and HPF inductor ( hpL ) design 158 G Schematic of IGBT gate driver circuit 169 H Program listing for the DS1104 DSP controller board 171 I Conference paper presented at PECon 2004 195 J Conference paper presented at PEDS 2005 202 K Conference paper presented at PEMD 2006 209

CHAPTER 1

INTRODUCTION

1.1 Overview

The power quality (PQ) problems in power distribution systems are not new,

but only recently the effects of these problems have gained public awareness.

Advances in semiconductor device technology have fuelled a revolution in power

electronics over the past decade, and there are indications that this trend will

continue [1]. However these power equipments which include adjustable-speed

motor drives (ASDs), electronic power supplies, direct current (DC) motor drives,

battery chargers, electronic ballasts are responsible for the rise in related PQ

problems [2]-[4]. These nonlinear loads are constructed by nonlinear devices, in

which the current is not proportional to the applied voltage. A simple circuit as

shown in Figure 1.1 illustrates the concept of current distortion. In this case, a

sinusoidal voltage is applied to a simple nonlinear resistor in which the voltage and

current vary according to the curve shown. While the voltage is perfectly sinusoidal,

the resulting current is distorted.

Figure 1.1 Current distortion caused by nonlinear resistance

Nonlinear Resistor

V

I

i(t)

v(t)

2

Nonlinear loads appear to be prime sources of harmonic distortion in a power

distribution system. Harmonic currents produced by nonlinear loads are injected

back into power distribution systems through the point of common coupling (PCC).

These harmonic currents can interact adversely with a wide range of power system

equipment, most notably capacitors, transformers, and motors, causing additional

losses, overheating, and overloading [2]-[4].

There are set of conventional solutions to the harmonic distortion problems

which have existed for a long time. The passive filtering is the simplest conventional

solution to mitigate the harmonic distortion [5]-[7]. Although simple, these

conventional solutions that use passive elements do not always respond correctly to

the dynamics of the power distribution systems [8]. Over the years, these passive

filters have developed to high level of sophistication. Some even tuned to bypass

specific harmonic frequencies. However, the use of passive elements at high power

level makes the filter heavy and bulky. Moreover, the passive filters are known to

cause resonance, thus affecting the stability of the power distribution systems [9]. As

the regulatory requirements become more stringent, the passive filters might not be

able to meet future revisions of a particular Standard.

Remarkable progress in power electronics had spurred interest in active

power filter (APF) for harmonic distortion mitigation [10]-[15]. The basic principle

of APF is to utilise power electronics technologies to produce currents components

that cancel the harmonic currents from the nonlinear loads [10]. Previously, majority

of controllers developed for APF are based on analogue circuits [11], [12]. As a

result, the APF is inherently subjected to signal drift. Digital controller using digital

signal processor (DSP) or microprocessor is preferable, primarily due to its

flexibility and immunity to noise signals [13]-[15]. However it is known that using

digital methods, the high order harmonics are not filtered effectively. This is due to

the hardware limitation of sampling rate in real-time application [15]. Moreover, the

utilisation of fast switching transistors (i.e. IGBT) in APF application causes

switching frequency noise to appear in the compensated source current. This

switching frequency noise requires additional filtering to prevent interference with

other sensitive equipments.

3

The idea of hybrid APF has been proposed by several researchers [16]-[18].

In this scheme, a low cost passive high-pass filter (HPF) is used in addition to the

conventional APF. The harmonics filtering task is divided between the two filters.

The APF cancels the lower order harmonics, while the HPF filters the higher order

harmonics. The main objective of hybrid APF, therefore is to improve the filtering

performance of high-order harmonics while providing a cost-effective low order

harmonics mitigation.

Recently, there is an increasing concern about the environment. The need to

generate pollution-free energy has triggered considerable effort toward renewable

energy (RE). RE sources such as sunlight, wind, flowing water and biomass offer

the promise of clean and abundant energy [19]-[21]. They do not generate any

greenhouse gases and are inexhaustible [22]. Solar energy, in particular, is especially

attractive in a sunshine country like Malaysia. This energy is in DC form from

photovoltaic (PV) arrays. It is converted into a more convenient alternating current

(AC) power through an inverter system. Efforts have been made to combine the APF

with PV array [23]-[25]. However, it appears that no attempt has been made to

combine a hybrid APF with PV array.

1.2 Objective of Research

The objective of the research is two-fold: (1) to propose a new variation of

hybrid APF topology with PV application. (2) to propose a simple current reference

estimation method for the proposed topology.

To achieve the first objective, this research proposes a hybrid APF topology

for a single-phase system, connected to a DC source that represents the PV array.

The topology is unique because it effectively filters harmonic currents of low and

high frequencies to obtain sinusoidal source current. Furthermore, it simultaneously

supplies the power from the PV array to the load.

4

For the second objective, this research proposes the application of the

extension instantaneous reactive-power (p-q) theorem to estimate the compensation

current reference. Although the estimation of current reference based on extension

p-q theorem is not new [24]-[26], this approach has not yet being applied to a single-

phase hybrid APF system involving passive HPF, shunt APF and a PV array. Using

the extension p-q theorem, the resulting equations for the current reference is simpler

compared with the conventional p-q theorem presented in [27]. This will lead to

more efficient digital controller implementation using DSP.

1.3 Methodology of Research

In the elaboration of the research, a harmonic analysis of source current

distortion has been carried out. It has featured a nonlinear full-bridge diode rectifier

with DC smoothing capacitor and resistive load as a harmonic currents source. The

time domain simulation is performed using MATLAB/Simulink simulation package.

Afterwards, an extensive computer simulation involving the power circuit of the

shunt APF, passive HPF, a DC source that represents the PV array, current reference

estimation based on extension p-q theorem, phase-lock loop (PLL) circuit and fixed-

band hysteresis current controller is carried out.

Once satisfactory simulation results are obtained, the proposed topology is

tested in the laboratory with an experimental prototype. The prototype is designed to

compensate the distorted current produced by nonlinear load, as well as

simultaneously supplies the power from the PV array to the load. The proposed

algorithm and control system are implemented using a dSPACE DS1104 DSP

controller board.

Although the original work is intended to include the PV array, the

experimental set-up using PV array is not possible due to facility and time constraints.

However, the PV array can be adequately replaced with a DC source. This is

because the PV array is fundamentally a DC source that produces electricity in DC

form.

5

Finally, a harmonic analysis is carried out to validate the filtering

performance of the proposed hybrid APF in comparison to a basic shunt APF. The

experimental results are analyzed and compared with the results obtained from the

computer simulation.

1.4 Thesis Organisation

This thesis consists of this introductory chapter and six other chapters

arranged as follows:

Chapter 2 covers the literature review and a brief discussion of harmonic

distortion problems, conventional mitigation methods using passive filters and

improved mitigation methods using APF approaches. The efforts in combining the

PV array with the APF are discussed briefly. Different types of compensation

reference signal estimation techniques suitable for APF applications are reviewed. A

brief overview of the control strategies for APF is also provided in this chapter.

Chapter 3 presents the proposed hybrid APF topology. This chapter

elucidates the topology, operating principles and control of the proposed hybrid APF

and illustrates how this system can be used to supply the PV power to the load.

Emphasis is given to a discussion on the design consideration of the passive HPF.

Chapter 4 concerns the system level simulation using MATLAB/Simulink.

The computer simulation design is described in detail.

Chapter 5 describes the design and construction of the experimental

prototype to validate the proposed hybrid APF. Detailed description of each

hardware components is provided.

6

Chapter 6 provides the simulation and experimental results. Comparison

between the simulation and experimental results is discussed in detail. A harmonic

analysis is carried out to evaluate the filtering performance of the proposed hybrid

APF in comparison to a basic shunt APF.

Chapter 7 summarises the research undertaken and highlights the

contribution of this thesis. It offers recommendations for further research.

CHAPTER 2

LITERATURE REVIEW

2.1 Introduction

This chapter reviews the development of active power filter (APF)

technologies. The discussion also includes a brief overview of harmonic distortion

problems and their impacts on electric power quality (PQ). The conventional

harmonic mitigation approaches using passive filters are presented first, followed by

the improved mitigation methods using APF techniques. The efforts in combining

the photovoltaic (PV) system with the APF are discussed briefly. In addition,

different types of reference signal estimation techniques are reviewed. Finally, an

overview on the APF control strategies is also provided.

2.2 Electric Power Quality

Power systems are designed to operate at frequencies of 50 or 60 Hz.

However, certain types of loads produce currents and voltages with frequencies that

are integer multiples of the 50 or 60 Hz fundamental frequency. These frequencies

components are a form of electrical pollution known as harmonic distortion.

Harmonic distortion has sparked research that has led to the present-day

understanding of PQ problems [2]-[4], [28]-[30]. In this section, the concept of

harmonic distortion is introduced and its impacts on electric PQ are discussed.

8

2.2.1 Fundamental of Harmonic Distortion

Due to the proliferation of nonlinear loads from power electronics converters,

one of the electric PQ issues that received much attention is the harmonic distortion.

These nonlinear loads control the flow of power by drawing currents only during

certain intervals of the 50/60 Hz period. Thus, the current drawn by the nonlinear

load is nonsinusoidal and appear chopped or flattened.

Figure 2.1 illustrates that any periodic, distorted waveform can be expressed

as a sum of pure sinusoids. The sum of sinusoids is referred to as a Fourier series,

named after the great mathematician who discovered the concept. The Fourier

analysis permits a periodic distorted waveform to be decomposed into an infinite

series containing DC component, fundamental component (50/60 Hz for power

systems) and its integer multiples called the harmonic components. The harmonic

number (h) usually specifies a harmonic component, which is the ratio of its

frequency to the fundamental frequency [4].

Figure 2.1 Fourier series representation of a distorted waveform

The total harmonic distortion (THD) is the most common measurement

indices of harmonic distortion [3], [4], [28], [31], [32]. THD applies to both current

and voltage and is defined as the root-mean-square (rms) value of harmonics divided

by the rms value of the fundamental, and then multiplied by 100% as shown in the

following equation:

50 Hz(h = 1)

150 Hz(h = 3)

+

+

+....

250 Hz(h = 5)

9

%1001

1

2max

×=∑>

M

MTHD

h

hh

, (2.1)

where hM is the rms value of harmonic component h of the quantity M .

THD of current varies from a few percent to more than 100%. THD of

voltage is usually less than 5%. Voltage THDs below 5% are widely considered to

be acceptable, while values above 10% are definitely unacceptable and will cause

problems for sensitive equipment and loads [4].

2.2.2 Harmonic Distortion Impacts on Electric Power Quality

For nearly all analyses, it is sufficient to treat nonlinear loads simply as

harmonic currents source [3], [4]. As Figure 2.2 shows, voltage distortion is the

result of distorted currents passing through the linear, series impedance of power

distribution system. Although the source bus is a pure sinusoid, there is a nonlinear

load that draws a distorted current. The harmonic currents passing through the

impedance of the system cause a voltage drop for each harmonic. This results in

harmonic voltages appearing at the PCC. The amount of voltage distortion depends

on the source impedance and the current.

Harmonics have a number of undesirable effects on electric PQ. These falls

into two basic categories: short-term and long-term. Short-term effects are usually

the most noticeable and are related to excessive voltage distortion. On the other hand,

long-term effects often go undetected and are usually related to increased resistive

losses or voltage stresses [28]. In addition, the harmonic currents produced by

nonlinear loads can interact adversely with a wide range of power system equipment,

most notably capacitors, transformers, and motors, causing additional losses,

overheating, and overloading. These harmonic currents can also cause interferences

with telecommunication lines and errors in metering devices [2]-[4], [30], [31].

10

Figure 2.2 Harmonic currents flowing through the system impedance result in

harmonic voltages at the PCC

Because of the adverse effects that harmonics have on electric PQ, certain

Standards have been developed to define a reasonable framework for harmonic

control [33]. The objective of such Standard is to propose steady-state harmonic

limits that are acceptable by both electric utilities and their customers.

2.3 Harmonic Mitigation Approaches

Harmonic distortion in power distribution systems can be suppressed through

three basic approaches [34] namely:

(1) Passive filter.

(2) Active power filter.

(3) Hybrid active power filter.

This section discusses general properties of various approaches for harmonic

distortion mitigation. The advantages, disadvantages, and limitations of these

approaches are also compiled in this section.

(Voltage Drop)+ _

PCC

Distorted Voltage

PureSinusoid Distorted Load

CurrentNonlinear

Load

11

2.3.1 Passive Filtering of Harmonic

Conventional solutions to the harmonic distortion problems have existed for a

long time. The passive filtering is the simplest conventional solution to mitigate the

harmonic distortion [4]-[8], [34]. Passive filters are inductance, capacitance, and

resistance elements configured and tuned to control harmonics. Figure 2.3 shows

common types of passive filters and their configurations.

Figure 2.3 Common types of passive filters and their configurations

The single-tuned “notch” filter is the most common and economical type of

passive filter [4], [5], [7]. The notch filter is connected in shunt with the power

distribution system and is series-tuned to present low impedance to a particular

harmonic current. Thus, harmonic currents are diverted from their normal flow path

through the filter.

Another popular type of passive filter is the high-pass filter (HPF) [4], [6]. A

HPF will allow a large percentage of all harmonics above its corner frequency to

pass through. HPF typically takes on one of the three forms, as shown in Figure 2.3.

The first-order, which is characterised by large power losses at fundamental

frequency, is rarely used. The second-order HPF is the simplest to apply while

providing good filtering action and reduced fundamental frequency losses [8]. The

filtering performance of the third-order HPF is superior to that of the second-order

HPF. However, it is found that the third-order HPF is not commonly used for low-

voltage or medium-voltage applications since the economic, complexity, and

reliability factors do not justify them [7].

Single-tuned 1st-orderHigh-pass

2nd-orderHigh-pass

3rd-orderHigh-pass

L

CR

CR L

C

R L

C

C

Load

Load

Load

Load

12

Although simple and least expensive, the passive filter inherits several

shortcomings. The filter components are very bulky because the harmonics that need

to be suppressed are usually of the low order [4], [8]. Furthermore the compensation

characteristics of these filters are influenced by the source impedance. As such, the

filter design is heavily dependent on the power system in which it is connected to [7].

The passive filter is also known to cause resonance, thus affecting the stability of the

power distribution systems [8], [9], [34].

Frequency variation of the power distribution system and tolerances in

components values affect the filtering characteristics. The size of the components

become impractical if the frequency variation is large [8], [9]. As the regulatory

requirements become more stringent, the passive filters might not be able to meet

future revisions of a particular Standard. This may required a retrofit of new filters.

2.3.2 Active Filtering of Harmonic

Remarkable progress in power electronics had spurred interest in APF for

harmonic distortion mitigation [1], [9], [10], [34], [35]. The basic principle of APF

is to utilise power electronics technologies to produce specific currents components

that cancel the harmonic currents components caused by the nonlinear load. Figure

2.4 shows the components of a typical APF system and their connections. The

information regarding the harmonic currents and other system variables are passed to

the compensation current/voltage reference signal estimator. The compensation

reference signal from the estimator drives the overall system controller. This in turn

provides the control for the gating signal generator. The output of the gating signal

generator controls the power circuit via a suitable interface. Finally, the power

circuit in the generalised block diagram can be connected in parallel, series or

parallel/series configurations depending on the interfacing inductor/transformer used.

13

Figure 2.4 Generalised block diagram for APF

APFs have a number of advantages over the passive filters. First of all, they

can suppress not only the supply current harmonics, but also the reactive currents.

Moreover, unlike passive filters, they do not cause harmful resonances with the

power distribution systems. Consequently, the APFs performances are independent

of the power distribution system properties [9], [34].

On the other hand, APFs have some drawbacks. Active filtering is a

relatively new technology, practically less than four decades old. There is still a

need for further research and development to make this technology well established.

An unfavourable but inseparable feature of APF is the necessity of fast switching of

high currents in the power circuit of the APF. This results in a high frequency noise

that may cause an electromagnetic interference (EMI) in the power distribution

systems [34].

APF can be connected in several power circuit configurations as illustrated in

the block diagram shown in Figure 2.5. In general, they are divided into three main

categories, namely shunt APF, series APF and hybrid APF.

supplyinterfacinginductor/

transformernonlinear Load

power circuit

interface

system variablesdetection

reference signalestimator

overall systemcontroller

gating signalsgenerator

switchingpattern

controleffort

referencesignal

compensatedvariables

14

Figure 2.5 Subdivision of APF according to power circuit configurations and

connections

2.3.2.1 Shunt Active Power Filter

This is most important configuration and widely used in active filtering

applications [1], [9]-[15], [35], [36]. A shunt APF consists of a controllable voltage

or current source. The voltage source inverter (VSI) based shunt APF is by far the

most common type used today, due to its well known topology and straight forward

installation procedure [11]-[15], [36].

Figure 2.6 shows the principle configuration of a VSI based shunt APF. It

consists of a DC-bus capacitor ( fC ), power electronic switches and an interfacing

inductors ( fL ). Shunt APF acts as a current source, compensating the harmonic

currents due to nonlinear loads. The operation of shunt APF is based on injection of

compensation current which is equivalent to the distorted current, thus eliminating

the original distorted current. This is achieved by “shaping” the compensation

current waveform ( fi ), using the VSI switches. The shape of compensation current

is obtained by measuring the load current ( Li ) and subtracting it from a sinusoidal

reference. The aim of shunt APF is to obtain a sinusoidal source current ( si ) using

the relationship: fLs iii −= .

Active Power Filter

series APF hybrid APFshunt APF

current-sourceinverter

voltage-sourceinverter

shunt APF+

series APF

series APF+

shunt PF

shunt APF+

shunt PF

APF in serieswith

shunt PF

Note:APF: Active power filter, PF: Passive filter

15

Figure 2.6 Principle configuration of a VSI based shunt APF

Suppose the nonlinear load current can be written as the sum of the

fundamental current component ( fLi , ) and the current harmonics ( hLi , ) according to

hLfLL iii ,, += (2.2)

then the injected compensation current by the shunt APF should be

hLf ii ,= (2.3)

the resulting source current is

fLfLs iiii ,=−= (2.4)

which only contains the fundamental component of the nonlinear load current and

thus free from harmonics. Figure 2.7 shows the ideal source current when the shunt

APF performs harmonic filtering of a diode rectifier. The injected shunt APF current

completely cancels the current harmonics from the nonlinear load, resulting in a

harmonic free source current.

From the nonlinear load current point of view, the shunt APF can be regarded

as a varying shunt impedance. The impedance is zero, or at least small, for the

harmonic frequencies and infinite in terms of the fundamental frequency. As a result,

reduction in the voltage distortion occurs because the harmonic currents flowing

+-

Cf

VSI

NonlinearLoad

Lf

is

if

AC Source iL

16

through the source impedance are reduced. Shunt APFs have the advantage of

carrying only the compensation current plus a small amount of active fundamental

current supplied to compensate for system losses [10], [35]. It can also contribute to

reactive power compensation. Moreover, it is also possible to connect several shunt

APFs in parallel to cater for higher currents, which makes this type of circuit suitable

for a wide range of power ratings [34].

Figure 2.7 Shunt APF harmonic filtering operation principle

2.3.2.2 Series Active Power Filter

The series APF is shown in Figure 2.8. It is connected in series with the

distribution line through a matching transformer [37]-[40]. VSI is used as the

controlled source, thus the principle configuration of series APF is similar to shunt

APF, except that the interfacing inductor of shunt APF is replaced with the

interfacing transformer.

The operation principle of series APF is based on isolation of the harmonics

in between the nonlinear load and the source. This is obtained by the injection of

harmonic voltages ( fv ) across the interfacing transformer. The injected harmonic

voltages are added/subtracted, to/from the source voltage to maintain a pure

sinusoidal voltage waveform across the nonlinear load. The series APF can be

thought of as a harmonic isolator as shown in Figure 2.9. It is controlled in such a

20 40 60 t [ms]

1

-1

0

1

-1

0

1

-1

0

i Li f

i s

17

way that it presents zero impedance for the fundamental component, but appears as a

resistor with high impedance for harmonic frequencies components. That is, no

current harmonics can flow from nonlinear load to source, and vice versa.

Figure 2.8 Principle configuration of a VSI based series APF

Figure 2.9 Operation principle of series APF: (a) single-phase equivalent of

series APF, (b) fundamental equivalent circuit, and (c) harmonic equivalent circuit

Series APFs are less common than their rival, i.e. the shunt APF [1], [10].

This is because they have to handle high load currents. The resulting high capacity

of load currents will increases their current rating considerably compared with shunt

APF, especially in the secondary side of the interfacing transformer. This will

increase the RI 2 losses [10]. However, the main advantage of series APFs over

shunt one is that they are ideal for voltage harmonics elimination [1]. It provides the

load with a pure sinusoidal waveform, which is important for voltage sensitive

devices (such as power system protection devices). With this feature, series APF is

suitable for improving the quality of the distribution source voltage.

(a) (b) (c)

Zs

vs

+

-

Zf

if

+-vf

is iL

Zs,f

vs,f

+

-

Zf

if,f

is,f iL,fZeq=0

Zs,h

vs,h

+

-

Zf

if,h

is,h iL,hZeq=∞

+-

Cf

VSI

NonlinearLoad

is vf

AC Source iL

18

2.3.2.3 Hybrid Active Power Filter

Previously, majority of the controllers developed for APF are based on

analogue circuits [9], [11], [12], [36]-[38]. As a result, the APF performance is

inherently subjected to signal drift [15]. Digital controllers using DSPs or

microcontrollers are preferable, primarily due to its flexibility and immunity to noise

[13]-[15], [39], [40]. However it is known that using digital methods, the high-order

harmonics are not filtered effectively. This is due to the hardware limitation of

sampling rate in real-time application [15]. Moreover, the utilisation of fast

switching transistors (i.e. IGBT) in APF application causes switching frequency

noise to appear in the compensated source current. This switching frequency noise

requires additional filtering to prevent interference with other sensitive equipment.

Technical limitations of conventional APFs mentioned above can be

overcome with hybrid APF configurations [16]-[18], [41]-[45]. They are typically

the combination of basic APFs and passive filters. Hybrid APFs, inheriting the

advantages of both passive filters and APFs, provide improved performance and

cost-effective solutions [42]. The idea behind this scheme is to simultaneously

reduce the switching noise and electromagnetic interference [34].

There are various hybrid APFs reported in literature [10], [41], [42], but the

two most prominent ones are shown in Figure 2.10. Figure 2.10 (a) is the system

configuration of the hybrid shunt APF. Both the shunt APF and passive filter are

connected in parallel with the nonlinear load [16]-[18]. The function of the hybrid

APF can thus divided into two parts: the low-order harmonics are cancelled by the

shunt APF, while the higher frequency harmonics are filtered by the passive HPF.

This topology lends itself to retrofit applications with the existing shunt APF.

Figure 2.10 (b) shows the system configuration of hybrid series APF, in

which the series APF is coupled to the distribution line by an interfacing transformer

[43]-[45]. The shunt passive filter consists of one or more single-tuned LC filters

and/or a HPF. The hybrid series APF is controlled to act as a harmonic isolator

between the source and nonlinear load by injection of a controlled harmonic voltage

source. It is controlled to offer zero impedance (short circuit) at the fundamental

19

frequency and high impedance (ideally open circuit) at all undesired harmonic

frequencies. This constrains all the nonlinear load current harmonics to flow into the

passive filter, decoupling the source and nonlinear load at all frequencies, except at

the fundamental.

Figure 2.10 Hybrid APFs: (a) combination of shunt APF and shunt passive filter

and (b) combination of series APF and shunt passive filter

2.4 Distribution Line Interactive Photovoltaic Systems

Recently, there is an increasing concern about the environment. The need to

generate pollution-free energy has triggered considerable effort toward renewable

energy (RE) system [19]-[22]. RE sources such as sunlight, wind, flowing water,

and biomass offer the promise of clean and abundant energy. Among the RE sources,

solar energy, is especially an attractive option in Malaysia, a country with abundant

supply of solar energy [22]. This useful energy is supplied in the form of DC power

from PV arrays bathed in sunlight and converted into more convenient AC power

through an inverter system [46].

Nonlinear LoadAC Source

Shunt PassiveFilterShunt APF

(a)

AC SourceNonlinear Load

Series APF Shunt PassiveFilter

(b)

20

Distribution line interactive PV inverters have been proposed [47]-[49]. They

merely provide real power from the PV array to the distribution line and fixed loads.

Efforts have been made to combine the shunt APF with PV system [23]-[25], [50],

[51]. The PV interactive shunt APF system can supply real power from the PV array

to loads, and support reactive and harmonic power simultaneously to utilise its

utmost installation capacity. This section reviews the distribution line interactive PV

inverter and the PV interactive shunt APF. A brief discussion on their operation

principles will be given.

2.4.1 Distribution Line Interactive Photovoltaic Inverter

PV technology was invented in the mid-20th century, using semiconductor

devices to convert sunlight into electric energy. This technology has many excellent

features: it causes little environmental burden, it is of a modular type technology that

can be easily expanded, and it is applicable almost everywhere [21], [22]. Figure

2.11 illustrates the operation principle of a PV cell. When the PV cell is exposed to

sunlight, electrical charges are generated and this can be conducted away by metal

contacts as DC electricity. Groups of PV cells are electrical configured into modules

and arrays, which can be used to power electrical loads. With the appropriate power

conversion equipment, PV systems can produce AC power compatible with any

conventional appliances, and interconnected to the distribution line.

Figure 2.11 Operation principle of a PV cell

Electrical Load

PhotovoltaicCell

Sun

(+)

(-)

DC CurrentFlow

21

Distribution line interactive PV systems are designed to operate in parallel

with the distribution line [47]-[49]. Figure 2.12 shows the configuration of a

distribution line interactive PV inverter system that comprises of a PV array, a DC-

bus capacitor, a smoothing inductor and an inverter. The primary component in

distribution line interactive PV systems is the inverter. The inverter converts the DC

power produced by the PV array into AC power consistent with the voltage of the

distribution system. A bi-directional interface is made between the PV system AC

output circuits and the distribution system, typically at the point of common coupling

(PCC). This allows the AC power produced by the PV system to supply the loads

and distribution line.

Figure 2.12 Configuration of a distribution line interactive PV inverter system

Generally, the distribution line interactive PV system extracts power from the

PV array, providing current to the distribution line. When the distribution power

sources need to provide the peak power to the load, the energy provided by PV array

can alleviate the burden of distribution power sources. At night and during no

sunlight periods, the power required by the loads is received from the distribution

line.

PCC

AC Source ElectricalLoad

+

-

Inverter

PV Array

22

2.4.2 Photovoltaic Interactive Shunt Active Power Filter

Distribution line interactive PV inverter discussed in previous sub-section

merely provides real power from the PV array to the distribution line and fixed loads.

However during no sunlight period, the operation of distribution line interactive PV

inverter is halted. Distinctly, its coefficient of utilisation is low. Recently,

researchers have spent efforts in developing PV interactive shunt APF systems [23]-

[25], [50], [51]. The PV interactive shunt APF can inject PV power into distribution

line. In addition, it can support reactive power compensation and filter harmonic

currents caused by nonlinear load.

Figure 2.13 illustrates the configuration of a PV interactive shunt APF system

which is similar to the standard distribution line interactive PV inverter system. This

scheme employs only one inverter to have the reactive power compensation,

harmonic currents mitigation, and real power supply functions.

Figure 2.13 Configuration of a PV interactive shunt APF system

In the day-time with intensive sunlight, the PV interactive shunt APF system

brings all its functions into operation. At night and during no sunlight periods, the

power required by the loads is received from the distribution system while the

inverter system only provides reactive power compensation and filter harmonic

PCC

AC Source

ElectricalLoad

+

-

Shunt APF

PV Array

NonlinearLoad

23

currents. Thus, the utilisation level of the PV interactive shunt APF system is higher

than the distribution line interactive PV inverter system.

Although the research in combining APF and PV array is not new, it appears

that no attempt has been made to combine a hybrid APF with PV array.

2.5 Reference Signal Estimation Techniques

As shown in Figure 2.4, the reference signal to be processed by the controller

is the key component that ensures the correct operation of APF. The reference signal

estimation is initiated through the detection of essential voltage/current signals to

gather accurate system variables information. The voltage variables to be sensed are

AC source voltage, DC-bus voltage of the APF, and voltage across interfacing

transformer. Typical current variables are load current, AC source current,

compensation current and DC-link current of the APF. Based on these system

variables feedbacks, reference signals estimation in terms of voltage/current levels

are estimated in frequency-domain or time-domain. Numerous publications, for

example [10], [35], [52]-[55] report on the theories related to detection and

measurement of the various system variables for reference signals estimation.

Figure 2.14 illustrates the considered reference signal estimation techniques.

These techniques cannot be considered to belong to the control loop since they

perform an independent task by providing the controller with the required reference

for further processing. This section presents the considered reference signal

estimation techniques, providing for each of them a short description of their basic

features.

24

Figure 2.14 Subdivision of reference signal estimation techniques

2.5.1 Frequency Domain Approaches

Reference signal estimation in frequency-domain is suitable for both single

and three phase systems. It is mainly derived from the principle of Fourier analysis

as follows.

2.5.1.1 Fourier Transform Techniques

In principle, Fourier Transform (either conventional or Fast Fourier

Transform (FFT)) is applied to the captured voltage/current signal. The harmonic

components of the captured voltage/current signal are first separated by eliminating

the fundamental component. Inverse Fourier Transform is then applied to estimate

the compensation reference signal in time domain [9], [10], [35], [52]-[55].

The main drawback of this technique is the accompanying time delay in

system variables sampling and computation of Fourier coefficients. This makes it

Reference SignalEstimation Techniques

FrequencyDomain

TimeDomain

Fourier Transform

p-q Theorem

Extension p-q Theorem

Synchronous-Detection Theorem

Synchronous-Reference-FrameTheorem

Sine-Multiplication Theorem

25

impractical for real-time application with dynamically varying loads. Therefore, this

technique is only suitable for slowly varying load conditions.

In order to make computation much faster, some modifications were

proposed and practiced in [56]. In this modified Fourier-series scheme, only the

fundamental component of current is calculated and this is used to separate the total

harmonic signal from the sampled load-current waveform.

2.5.2 Time Domain Approaches

Time-domain approaches are based on instantaneous estimation of reference

signal in the form of either voltage or current signal from distorted and harmonic-

polluted voltage and current signals. These approaches are applicable for both

single-phase and three-phase systems except for the synchronous-detection theorem

[59], [61] and synchronous-reference-frame theorem [13], [15], [17], [18], [40], [43],

[44], [50] which can only be adopted for three-phase systems.

2.5.2.1 Instantaneous Reactive-Power Theorem

The instantaneous reactive-power (p-q) theorem is proposed by Akagi et al.

[57]. This theorem is based on 0αβ transformation which transforms three-phase

voltages and currents into the 0αβ stationary reference frame [14], [45], [58]. From

this transformed quantities, the instantaneous active and reactive power of the

nonlinear load is calculated, which consists of a DC component and an AC

component. The AC component is extracted using HPF and taking inverse

transformation to obtain the compensation reference signals in terms of either

currents or voltages. This theorem is suitable only for a three-phase system and its

operation takes place under the assumption that the three-phase system voltage

26

waveforms are symmetrical and purely sinusoidal. If this technique is applied to

contaminated supplies, the resulting performance is proven to be poor [59].

In order to make the p-q theorem applicable for single-phase system, some

modifications in the original p-q theorem were proposed and implemented by

Dobrucky et al. [27]. The basics of extension p-q theorem for a single-phase system

are as follows:

Assume that the source voltage ( sv ) and load current ( Li ) of a single-phase system

are defined as

)sin(2)( tVtv ss ω= (2.5)

)sin(2)( θ+ω= tIti LL (2.6)

After complementing by fictitious imaginary phase (shifted by 90˚), the

complemented source voltage ( 'sv ) and load current ( '

Li ) are defined as

)90sin(2)(' o−ω= tVtv ss (2.7)

)90sin(2)(' o−θ+ω= tIti LL (2.8)

the αβ orthogonal co-ordinate system is obtained, whereby

)(tvv s=α and )(' tvv s=β (2.9)

)(tii L=α and )(' tii L=β (2.10)

Thus, the instantaneous active power of the load can be derived as

ppivivp ~+=⋅+⋅= ββαα (2.11)

27

The instantaneous reactive power of the load can be derived as

qqivivq ~+=⋅−⋅= αββα (2.12)

From the obtained instantaneous active and reactive power, the AC

components ( p~ and q~ ) are extracted using a HPF. The extracted AC components

are then used for compensation reference signal estimation.

2.5.2.2 Extension Instantaneous Reactive-Power Theorem

The conventional p-q theorem is revised and extended by Komatsu and

Kawabata [26] to make it applicable for three-phase unsymmetrical and distorted

voltage system. It differs from the conventional p-q theorem presented in [57]. In

extension p-q theorem, the source voltages are shifted by 90° for instantaneous

reactive power calculation [24]. Instead of the AC components in conventional p-q

theorem, the DC components are extracted using low-pass filters (LPFs) and taking

inverse transformation to obtain the compensation reference signals in terms of either

currents or voltages. The main advantage of this technique is that it is simpler to find

three-phase instantaneous reactive power than the conventional p-q theorem [26].

This technique is also suitable for single-phase APF systems [25], [60]. In

order to illustrate the difference between the extension p-q theorem with its former,

the basics of extension p-q theorem for single-phase system are presented in this sub-

section. Assume that the source voltage ( sv ) and load current ( Li ) of a single-phase

system are defined in equation (2.5) and (2.6) respectively.

The instantaneous active power of the load can be derived as

pptitvp Ls~)()( +=⋅= (2.13)

28

The instantaneous reactive power of the load can be derived as

qqtitvq Ls~)()(' +=⋅= (2.14)

where )(' tvs denotes the source voltage shifted by o90 .

The DC components ( qp and ) are extracted from the derived instantaneous

active and reactive power using LPFs. The extracted DC components are then used

for compensation reference signal estimation. It is clearly seen that the resulting

equations for the instantaneous active and reactive power of the load based on

extension p-q theorem are simpler compared with the p-q theorem [27] presented in

sub-section 2.5.2.1.

In this particular work, the extension p-q theorem is adopted for

compensation current reference estimation. Although the current reference

estimation based on the extension p-q theorem is not new [25], [60], this approach

has not yet been applied to a single-phase hybrid APF system involving passive HPF,

shunt APF and PV array.

2.5.2.3 Synchronous-Detection Theorem

Synchronous-detection theorem [59], [61] is very similar to p-q theorem. This

technique is suitable only for three-phase system and its operation relies on the fact

that the three-phase currents are balanced. It is based on the idea that the APF forces

the source current to be sinusoidal and in phase with the source voltage despite the

load variations. The average power is calculated and divided equally between the

three-phases. The reference signal is then synchronised relative to the source voltage

for each phase. Although this technique is easy to implement, it suffers from the fact

that it depends to a great extent on the harmonics in the source voltage [10].

29

2.5.2.4 Synchronous-Reference-Frame Theorem

This theorem relies on the Park’s Transformations to transform the three

phase system voltage and current variables into a synchronous rotating frame [13],

[15], [17], [18], [40], [43], [44], [50]. The active and reactive components of the

three-phase system are represented by the direct and quadrature components

respectively. In this theorem, the fundamental components are transformed into DC

quantities which can be separated easily through filtering.

This theorem is applicable only to three-phase system. The system is very

stable since the controller deals mainly with DC quantities. The computation is

instantaneous but incurs time delays in filtering the DC quantities [54].

2.5.2.5 Sine-Multiplication Theorem

This theorem is based on the process of multiplying the nonlinear load

current signal by a sine wave of fundamental frequency and integrating the result to

calculate the real fundamental component of the nonlinear load current [11], [12],

[36]. It is applicable for both single and three phase systems. The difference

between the instantaneous nonlinear load current and this fundamental component is

the command current for the APF. Although this technique eliminates the time delay

due to low/high-pass filtering, its performance is still slow (for more than one

complete mains cycle), due to integration and sampling [54]. This technique is

similar to the Fourier Technique. It is, however, differently implemented.

30

2.6 Control Techniques for Active Power Filter

The aim of APF control is to generate appropriate gating signals for the

switching transistors based on the estimated compensation reference signals. The

performance of an APF is affected significantly by the selection of control

techniques [62]. Therefore, the choice and implementation of the control technique

is very important for the achievement of a satisfactory APF performance.

A variety of control techniques, such as linear control [9], [11]-[13], [18],

[23]-[25], [36], [37], [40], digital deadbeat control [14], [15], [63]-[65], hysteresis

control [17], [26], [27], [57], [58], [60], etc., have been implemented for the APF

applications. Several publications [10], [52], [54], [55], [62] comprehensively report

the theories related to APF control techniques. This section briefly describes the

considered control techniques and their basic features.

2.6.1 Linear Control Technique

Linear control of an APF is accomplished by using a negative-feedback

system as shown in Figure 2.15. In this control scheme, the compensation current

( fi ) or voltage ( fv ) signal is compared with its estimated reference signal ( reffi , or

reffv , ) through the compensated error amplifier to produce the control signal. The

resulting control signal is then compared with a sawtooth signal through a pulse

width modulation (PWM) controller to generate the appropriate gating signals for the

switching transistors [9], [11]-[13], [18], [23]-[25], [36], [37], [40]. The frequency

of the repetitive sawtooth signal establishes the switching frequency. This frequency

is kept constant in linear control technique. As shown in Figure 2.16, the gating

signal is set high when the control signal has a higher numerical value than the

sawtooth signal and via versa.

31

Figure 2.15 Block diagram of linear control technique

Figure 2.16 Gating signal generation by linear controller

Generally, the Nyquist stability criterion and the Bode plots are used to

determine the appropriate compensation in the feedback loop for the desired steady-

state and transient responses. With analogue PWM circuit, the response is fast and

its implementation is simple [54]. Nevertheless, due to inherent problem of analogue

circuitry, the linear control technique has an unsatisfactory harmonic compensation

performance. This is mainly due to the limitation of the achievable bandwidth of the

compensated error amplifier [55], [62].

controlsignal

PWMcontroller

Active PowerFilter

gatingsignal

if,ref or vf,ref

+_

Compensatederror amplifier

if or vf

sawtoothsignal

sawtooth signalcontrol signal

0 t

gating signal

Ts( switching frequency fs =

1Ts

)

sawtoothsignal

controlsignal<

sawtoothsignal

controlsignal>

32

2.6.2 Hysteresis Control Technique

The control of APF can also be realised by the hysteresis control technique

[17], [26], [27], [57], [58], [60]. It imposes a bang-bang type instantaneous control

that forces the APF compensation current ( fi ) or voltage ( fv ) signal to follow its

estimated reference signal ( reffi , or reffv , ) within a certain tolerance band. This

control scheme is shown in a block diagram form in Figure 2.17. In this control

scheme, a signal deviation ( H ) is designed and imposed on reffi , or reffv , to form

the upper and lower limits of a hysteresis band. The fi or fv is then measured and

compared with reffi , or reffv , ; the resulting error is subjected to a hysteresis

controller to determine the gating signals when exceeds the upper or lower limits set

by (estimated reference signal + 2H ) or (estimated reference signal - 2

H ). As long

as the error is within the hysteresis band, no switching action is taken. Switching

occurs whenever the error hits the hysteresis band. The APF is therefore switched in

such a way that the peak-to-peak compensation current/voltage signal is limited to a

specified band determined by H as illustrated by Figure 2.18.

Figure 2.17 Block diagram of hysteresis control technique

In this particular work, a hysteresis current controller with a fixed H is

implemented. To obtain a compensation current ( fi ) with switching ripples as small

as possible, the value of H can be reduced. However, doing so results in higher

switching frequency. Thus, increases losses on the switching transistors.

error

Hysteresis bandcomparator

Active PowerFilter

gatingsignal

if,ref or vf,ref + _

if or vf

∑ error2

H+

2H−

33

The advantages of using the hysteresis current controller are its excellent

dynamic performance and controllability of the peak-to-peak current ripple within a

specified hysteresis band [54], [55], [62]. Furthermore, the implementation of this

control scheme is simple; this is evident from the controller structure shown in

Figure 2.17. However, this control scheme exhibits several unsatisfactory features.

The main drawback is that it produces uneven switching frequency. Consequently,

difficulties arise in designing the passive HPF. Furthermore, there is possibly

generation of unwanted resonances on the power distribution system [54], [62].

Besides, the irregular switching also affects the APF efficiency and reliability [55].

Figure 2.18 Gating signal generation by hysteresis controller

2.7 Summary

This chapter covers the development of APF technologies. A brief discussion

on the harmonic distortion problems and their impacts on electric PQ are given. The

conventional mitigation methods using passive filters are presented first, followed by

the improved mitigation methods using APFs. The efforts in combining the PV

system with the shunt APF are discussed briefly. This chapter also reviews different

types of reference signal estimation techniques which is an integral part of the APF.

Finally, an overview of the control strategies for APF is presented.

t

reference signal

actual signal

gating signal

( uneven frequency fs )

H

if or vfif or vf

if,ref or vf,ref

34

This review reveals that there is a significant interest in hybrid APF for PQ

improvement and RE source for electric power generation. This could be attributed

to the availability of suitable power-switching devices, high performance PV array

and fast computing devices (microcontroller and DSP) at affordable prices. It is

obvious that more work still needs to be done in integrating the hybrid APF with PV

array to achieve a multifunctional active filtering system.

CHAPTER 3

A SINGLE-PHASE HYBRID ACTIVE POWER FILTER

3.1 Introduction

It has been shown that one of the electric power quality (PQ) issues that

receive much attention is the harmonic distortion of the source current. The hybrid

APF has been demonstrated to be an effective solution for harmonic mitigation. On

the other hand, renewable energy (RE) sources, in particular solar energy has become

feasible due to enormous research and development work being conducted over the

years.

Considering these facts, a new variation of a single-phase hybrid APF

topology, connected to a PV array is proposed. This topology is unique because it

effectively filters harmonic currents less than 1 kHz and of higher frequencies.

Furthermore, it simultaneously supplies the power from the PV array to the load.

This work also proposes the application of the extension p-q theorem to estimate the

compensation current reference for this topology. The extension p-q theorem

simplifies the equations for the current reference. This will lead to a more efficient

implementation using DSP digital controller.

The proposed topology is presented in the following sections. It will

primarily focus on the operation principle, system configuration, overall control

system and passive HPF design.

36

3.2 Operation Principle of the Proposed Hybrid APF

The operation principle of the proposed hybrid APF is illustrated in Figure

3.1. It generates compensation current ( fi ) equal to the reactive load current ( qLi , ),

harmonic load current ( hLi , ) and reactive HPF current ( qhpi , ). This compensation

current is injected into the point of common coupling (PCC) through an interfacing

inductor. The compensated source current ( si ) is desired to be sinusoidal and in

phase with the source voltage ( sv ) to yield a maximum power factor.

Figure 3.1 Operation principle of the proposed hybrid APF without PV power

In the proposed scheme, the low-order harmonics are compensated using the

shunt APF, while the high-order harmonics are filtered by a passive high-pass filter

(HPF). Since the aim in using the HPF is to improve the filtering performance of

high-order harmonics, the HPF’s resonant frequency can be tuned to frequency

where the filtering performance of the shunt APF is impaired, i.e. over 1 kHz. In this

way, the size of the HPF can be kept small. It is envisaged that this configuration is

effective to improve the filtering performance of high-order harmonics.

Shunt APF

Nonlinear load

is

if

240 Vrms50Hz

vu 2:1iL

DC source

ihpPassiveHPF

vs PCC

iL = iL,p + iL,q + iL,his = iL,p

if = iL,q + iL,h + ihp,qihp = ihp,q

37

The size of interfacing inductor is a compromise between current control

dynamic response and switching ripple. The current control dynamic response can

be improved by using a small interfacing inductor. However, this would raise the

switching ripple in the basic shunt APF. In the proposed hybrid APF, the resulting

switching ripple is filtered by the HPF.

In day-time where intensive sunlight is available, the proposed hybrid APF

extracts power from the DC source that represents the PV array, providing additional

PV current ( PVi ) to the load. When the distribution source need to provide the peak

power to the load, the energy provided by the PV array can alleviate the burden of

distribution source as illustrated by Figure 3.2. At night and during no sunlight

periods, the power required by the load is delivered by the distribution source.

Figure 3.2 Operation principle of the proposed hybrid APF with PV power

Shunt APF

Nonlinear load

is

if

240 Vrms50Hz

vu 2:1iL

DC source

ihpPassiveHPF

vs PCC

iL = iL,p + iL,q + iL,his = iL,p - iPV

if = iL,q + iL,h + ihp,q + iPVihp = ihp,q

+

38

3.3 The Proposed System Configuration

In this section, the system configuration of the proposed single-phase hybrid

APF topology is presented. The power circuit, interfacing inductor, and DC-bus

capacitor are discussed in detail.

3.3.1 Proposed Overall System

Figure 3.3 shows the system configuration of the proposed single-phase

hybrid APF topology, connected in parallel with the nonlinear load. It consists of a

passive HPF, a single-phase shunt APF constructed using a full-bridge voltage

source inverter (VSI) and a DC source that represents PV array. Subscript s, L, f, and

hp refer to source, load, shunt APF and passive HPF. The shunt APF and the DC

source are connected back-to-back with a DC-bus capacitor ( fC ). The VSI used in

this topology is operated in current controlled mode (CCM) to make the

compensation current ( fi ) control possible. This VSI uses DC-bus capacitor as the

supply and switches at high-frequency to generate a compensation current that

follows the estimated current reference. Thus, the voltage across the DC-bus

capacitor ( CfV ) must kept to a value that is higher than the amplitude of the source

voltage ( sV⋅> 2 ).

The proposed hybrid APF is connected with the distribution line at the PCC

through an interfacing inductor ( fL ). This interfacing inductor provides isolation

from the distribution line. A large interfacing inductor is preferable because it results

in small switching ripple. However, the large interfacing inductor limits the dynamic

response of the compensation current. Therefore, there is a compromise involved in

sizing the interfacing inductor.

39

Figure 3.3 System configuration of the proposed hybrid APF

A second-order series resonant filter is selected as the passive HPF in the

proposed hybrid APF topology. It consists of a capacitor ( hpC ), an inductor ( hpL )

and an inductor bypass resistor ( hpR ). It acts like a sink for high frequency harmonic

components. The harmonic filtering function of the proposed hybrid APF can thus

divided into two parts: the low-order harmonics are cancelled by the shunt APF,

while the higher frequencies harmonics are filtered by the HPF.

The power distribution system of interest is 240 Vrms, 50 Hz sinusoidal AC

voltage. An isolation transformer with turn ratio of 2:1 is used to scale down the

distribution voltage ( uv ). The leakage inductor of the isolation transformer is

considered as the source inductor ( sL ). A full-bridge diode rectifier with DC

smoothing capacitor ( dC ), resistive load ( LR ) and AC smoothing inductor ( smoothL )

is selected as the nonlinear load. This type of load can be found in most power

electronics applications, i.e. switch-mode power supply, uninterruptible power

supply (UPS), AC motor drive and DC servo drive. It is used to convert the input

+

_

Cf

Shunt APF

Nonlinear load

Lf

is

if

Distributionvoltage

240 Vrms50Hz

vuvs

Sourcevoltage

2:1Ls

iL

Lsmooth

Cd RL

PV array

DC source

VCf

ihp

Passive HPF

PCC

S3

S4

S1

S2

Rhp

Lhp

Chp

40

AC to DC in an uncontrolled manner. It is well known that this nonlinear load draws

highly distorted current from the distribution source, thus a major source of harmonic

distortion [4].

3.3.2 Power Circuit

The power circuit used in the proposed hybrid APF is a full-bridge VSI as

shown in Figure 3.4. The VSI consists of four transistors, each connected to an anti-

parallel diode. The transistors are the insulated gate bipolar transistors (IGBTs).

They are selected due to their superior performance characteristics, i.e. low forward

voltage drop, fast switching times and high power handling capability.

Figure 3.4 Power circuit of the proposed hybrid APF

Gate drivers are needed to convert the gating signals to gate voltage that is

suitable to the IGBTs. The logic inverters ensure that each IGBTs on the same leg

complements each other. However, the finite switching times imply that during

current commutation, the IGBTs in one leg (S1 & S2 or S3 & S4) may conduct at the

switching instants. This will cause short circuit problem of the DC-bus capacitor

( fC ). Additional control logic in the gate drivers is needed to ensure the complete

turn on and turn off processes of the IGBTs in one bridge leg. This is referred to as

the blanking time, since both IGBTs have temporarily logic low gating signals.

+

_

VCf

S3

S4

S1

S2

Driver

Driver

Gating signal

Driver

Driver

Gating signal

Cf

41

3.3.3 Interfacing Inductor

The desired compensation current waveform is obtained by controlling the

switching of the IGBTs in the VSI. The switching ripple ( swi ) of the compensation

current is determined by the available driving voltage across the interfacing inductor,

the size of the interfacing inductor and switching frequency. In the proposed scheme,

the driving voltage is the DC-bus voltage ( CfV ). As shown in Figure 3.5, the bipolar

DC-bus voltage across the interfacing inductor determines the peak-to-peak

switching ripple ( ppswI −∆ , ).

Figure 3.5 Switching ripple of the compensation current

From Figure 3.5, the minimum interfacing inductor ( min,fL ) can be calculated

based on [66] as

max,,min, )(2 swppsw

Cff fI

VL

⋅∆⋅=

−

(3.1)

where max,swf maximum frequency of switching ripple and ppswI −∆ , is the peak-to-

peak switching ripple of compensation current. The detailed derivation of (3.1) is

presented in Appendix A.

swf

Cfppsw fL

VI

2, =∆ −

CfV

CfV−

swi

0 t

swsw f

T 1=

Driving voltage Switching ripple

42

3.3.4 DC-Bus Capacitor

The DC-bus capacitor ( fC ) is used as a temporally energy storage element in

the proposed hybrid APF as shown in Figure 3.3. During steady state condition, the

reactive and harmonic load currents will charge and discharge the DC-bus capacitor

during the source voltage period. The total reactive and harmonic load currents to be

compensated is the principle factor that causes the DC-bus capacitor voltage

fluctuation. To get a good compensation performance, serious voltage fluctuations

must be avoided. This can be achieved by proper sizing of the DC-bus capacitor.

The size determination of the DC-bus capacitor is based on the energy-

balance principle presented in [12]. Using this concept, the following equations can

be derived:

2221)()(

21 2

,2 TIVVVC LsrefCfCff ⋅∆⋅⋅=−∆ (3.2)

where CfV∆ is the maximum or minimum DC-bus voltage, refCfV , is the DC-bus

voltage reference, sV is the rms value of the source voltage, LI∆ is the peak rms

value of the reactive and harmonic load currents and T is the period of source

voltage. The size of DC-bus capacitor is determined by

2,

2 )()(22

refCfCf

Lsf VV

TIVC

−∆

⋅∆⋅≥ (3.3)

43

3.4 The Control System

The overall control system of the proposed single-phase hybrid APF is

described in this section. The compensation current reference estimation, DC-bus

voltage control, digital based phase-lock loop (PLL), and digital low-pass filter (LPF)

are discussed in detail.

3.4.1 Overall Control System

Figure 3.6 shows the overall control system for the proposed hybrid APF.

Subscript s, L, f, and hp refer to source, load, shunt APF and passive HPF. The task

of the control system is to produce appropriate gating signals for the switching

transistors (IGBTs). The control system consists of an instantaneous active/reactive

power calculator, three LPFs, a compensation current estimator, a proportional-

integral (PI) controller, a PLL and a hysteresis current controller.

Three current sensors and two voltage sensors are required for system

variables detection. The load current ( Li ), HPF current ( hpi ) and compensation

current ( fi ) are detected using Hall-Effect current sensors, while the source voltage

( sv ) and DC-bus voltage ( CfV ) are detected using Hall-Effect voltage sensors. The

digital based PLL is responsible to generate the reference sinewave ( )sin( tω and

)90sin( o−ωt ) with unity amplitude and synchronous with the source voltage.

The instantaneous active/reactive power calculator receives the load current,

source voltage and passive HPF current signals in real time. The instantaneous

active load power ( Lp ), instantaneous reactive load power ( Lq ) and the

instantaneous reactive HPF power ( hpq ) are calculated based on the extension p-q

theorem. Their DC components are filtered with three digital second-order

Butterworth LPFs. These DC components are then fed to the compensation current

reference estimator to obtain the reactive load current ( qLi , ), harmonic load current

44

( hLi , ) and reactive HPF current ( qhpi , ). The summation of these three current signals

will form the first component of the current reference signal ( 1,reffi ).

Figure 3.6 Overall control system of the proposed hybrid APF

The DC-bus voltage controller maintains the average voltage across the DC-

bus capacitor ( CfV ) constant against variations in distribution source. Under a loss

free situation, the hybrid APF does not need to draw any active power from the

distribution source. However, there will be losses in the resistance of interfacing

inductor, switches, etc., when the hybrid APF is generating the compensation current.

Unless these losses are regulated, the DC-bus voltage will drop steadily. Hence the

control of DC-bus voltage involves drawing an in phase sinusoidal charging current

( CfI ) from the distribution source.

The DC voltage across the DC-bus capacitor is detected and compared with

its reference voltage ( refCfV , ). The compared result is processed by a PI controller to

obtain the desired amplitude of the DC-bus capacitor charging current ( CfI ). This

charging current is then subtracted from the PV current ( PVI ). The resulting current

Hysteresiscurrent

controllerGatingsignals

pL, qL & qhpcalculator

iL

ihp

vs

-90o

PLL

LPFCompensationcurrent

estimator

if

VCf

VCf,ref

PIcontroller

ICf

PPVVCf,ref

DC-bus Voltage Controller

+

_

_

+

DSP Based Implementation

IPV

if,refiL,qiL,h

ihp,q

qhp

qL

_pL_

_ qhp

qL

pL

_

_

_ qhp

qL

pL+

+

+

~

~

~

switch

LPF

LPF

∑ ∑

+++

+

+

if,ref 2

if,ref 1

S1S2S3S4

sin( t-90o)ω

sin( t)ω

45

is then multiplied with the reference sinewave ( )sin( tω ) to form the second

component of current reference signal ( 2,reffi ). However, when a PV array is

connected to the DC-bus capacitor, the DC-bus voltage controller can be removed.

In order to generate the compensation current that follows the current

reference signal, the fixed-band hysteresis current control method is adopted. The

estimated compensation current reference signal ( reffi , ) and the actual compensation

current signal ( fi ) are fed to a fixed-band hysteresis current controller to generate

appropriate gating signals for the switching transistors.

3.4.2 Compensation Current Reference Estimation

Compensation current reference estimation for single-phase shunt APF based

on extension p-q theorem has been presented in [25]. In this work, the application of

the theorem is further extended to a single-phase hybrid APF connected to a PV

array. In the proposed topology, the extension p-q theorem is adopted for the

estimation of active, reactive and harmonic components of load current, and the

reactive component of HPF current.

For a single-phase distribution power system with nonlinear load, the load

current can be represented as,

∑∞

=

θ+ω=1

, )sin(2)(n

nnLL tnIti (3.4)

where nθ is the phase angle of the n-th load current component. Under normal

circumstances, the source voltage can be assumed to be a sinusoidal, i.e.,

)sin(2)( φ+ω= tVtv ss (3.5)

where φ is the phase angle of the source voltage.

46

The HPF current is assumed to contain only the reactive component as

)90sin(2)( o+ω= tIti hphp (3.6)

Therefore, the instantaneous active load power can be derived as

)()()( titvtp LsL ⋅=

LL pp ~+= (3.7)

The instantaneous reactive load power can be derived as follows

)()()( ' titvtq LsL ⋅=

LL qq ~+= (3.8)

The instantaneous reactive HPF power can thus be derived as

)()()( ' titvtq hpshp ⋅=

hphp qq ~+= (3.9)

where Lp , Lq and hpq represent the DC components; Lp~ , Lq~ and hpq~ denote the

AC components, and )(' tvs denotes the source voltage delayed by o90 . The detailed

derivation of )(tpL , )(tqL and )(tqhp based on extension p-q theorem is presented in

Appendix B.

By obtaining the DC components in (3.7), (3.8), and (3.9), the active load

current ( pLi , ), reactive load current ( qLi , ), harmonic load current ( hLi , ) and reactive

HPF current ( qhpi , ) can be readily estimated as follows:

47

)sin(2)(, tVpti

s

LpL ω⋅= (3.10)

)90sin(2)(,o−ω⋅= t

Vqti

s

LqL (3.11)

)()()()( ,,, titititi qLpLLhL −−= (3.12)

and

)90sin(2)(,o−ω⋅= t

Vq

tis

hpqhp (3.13)

Finally, the compensation current reference can be estimated as

)sin()sin(,

,,,, tV

PtIiiii

refCf

PVCfqhphLqLreff ω⋅+ω⋅−++= (3.14)

where PVP is the active power of PV array, CfI is the amplitude value of DC-bus

capacitor charging current and refCfV , is the DC-bus voltage reference.

3.4.3 DC-Bus Voltage Control

Under a loss free situation, the hybrid APF need not provide any active power

to cancel the reactive and harmonic currents from the load, and the reactive current

from the HPF. These currents show up as reactive power. Thus, it is indeed possible

to make the DC-bus capacitor delivers the reactive power demanded by the proposed

hybrid APF. As the reactive power comes from the DC-bus capacitor and this

reactive energy transfers between the load and the DC-bus capacitor (charging and

discharging of the DC-bus capacitor), the average DC-bus voltage can be maintained

at a prescribed value.

48

However, due to switching loss, capacitor leakage current, etc., the

distribution source must provide not only the active power required by the load but

also the additional power required by the VSI to maintain the DC-bus voltage

constant. Unless these losses are regulated, the DC-bus voltage will drop steadily.

A PI controller used to control the DC-bus voltage is shown in Figure 3.7. Its

transfer function can be represented as

sKKsH I

p +=)( (3.15)

where pK is the proportional constant that determines the dynamic response of the

DC-bus voltage control, and IK is the integration constant that determines its

settling time.

Figure 3.7 PI controller for DC-bus voltage control

It can be noted that if pK and IK are large, the DC-bus voltage regulation is

dominant, and the steady-state DC-bus voltage error is low. On the hand, if pK and

IK are small, the real power unbalance give little effect to the transient performance.

Therefore, the proper selection of pK and IK is essentially important to satisfy

above mentioned two control performances [23].

VCf

VCf,ref

voltagetransducer Kp + KI / s ICf

+

_ ∑

DC-bus actualvoltage

DC-bus voltagereference

capacitorcharging current

PI controller

49

As described in [12], the pK can be calculated using the energy-balance

principle. After pK is calculated, the IK can be determined empirically. Appendix

C presents the pK calculation using the energy-balance principle for the proposed

hybrid APF.

3.4.4 Digital Phase-Lock Loop

In order to generate the reference sinewave ( )sin( tω and )90sin( o−ωt ) with

unity amplitude and synchronised with the source voltage ( sv ), a digital PLL [67] is

realised. Figure 3.8 show a functional block diagram of a typical digital PLL model

in discrete time domain (z-domain). From this diagram, the digital PLL can be easily

recognised as a feedback control system. This system consists of a phase detector, a

loop filter and a digitally-controlled oscillator (DCO).

Figure 3.8 A digital phase-lock loop model in z-domain

The phase detector detects the phase difference between the input signal

( )(zinθ ) and the feedback signal ( )(zfdθ ). The compared result is sent to a loop

filter. Typically, the loop filter is a low-pass type. The output of loop filter is feed to

a DCO to generate the )(zfdθ . In order to generate )sin( tω with unity amplitude,

the )(zfdθ can be divided with the amplitude of the )(zinθ using a divider as

+

_ ∑input phase

signal

)(zinθ

phasedetector

Loop FilterH1(z)

1−z DCOH2(z)

)(zfdθfeedback phase signal

Divider

-90o

Digital PLL

sin( t-90o)ω

sin( t)ω

50

illustrated by Figure 3.8. On the other hand, the )90sin( o−ωt can be obtained by

delaying )sin( tω by 90°.

Since the system is described in discrete time-domain, the transfer functions

of each component are written in z-transform format as the following. Transfer

function of the loop filter is,

11)(1

−−

=z

azzH (3.16)

while the transfer function of a digitally-controlled oscillator (DCO) is given by

1)(2

−=

zczzH (3.17)

where a and c are constants of )(1 zH and )(2 zH respectively. The 1−z is a delay

unit. Usually it is a register or register array.

With the block diagram and the transfer functions of components in it, a

linear time invariant (LTI) model can be developed to represent the digital PLL with

a closed-loop transfer function derived as,

)1()2()( 2 czacz

caczzH−+−+

−= (3.18)

Based on the closed-loop transfer function in (3.18), one can easily recognise

that it is a second-order system. In control system theory, the transfer function of the

second-order system can be written in a general format as,

))(()()(

01 zzzzzNzH−−

= (3.19)

where 0z and 1z are two poles of the system in z-domain.

51

Based on the transfer function in (3.19), a characteristic equation of a discrete

time system is defined as,

01012

01 )())(()( zzzzzzzzzzz ++−=−−=∆ (3.20)

Defining 1C and 0C to be coefficients of the characteristics equation in (3.20),

)( 011 zzC +−=

010 zzC = (3.21)

Then, the characteristic equation can be re-written in a simplified format as,

012)( CzCzz ++=∆ (3.22)

As soon as 1C and 0C of the system are given, the poles of a second-order system

can be determined. Those two parameters are usually used to specify performance

requirements of a system. A detailed derivation of 1C and 0C is presented in

Appendix D.

3.4.5 Digital Low-Pass Filter

The compensation current estimation involves the use of DC components of

the calculated instantaneous active and reactive power as illustrated by (3.10), (3.11)

and (3.13). Consequently, LPFs are sufficient to extract the corresponding DC

components as shown in Figure 3.9. Each LPF consists of a second-order

Butterworth filter, with cut-off frequency ( LPFf ) equals to 5 Hz.

52

Figure 3.9 Block diagram of the digital low-pass filter for DC components

extraction

The transfer function of the second-order Butterworth LPF in s-domain is given by

22 21)(

LPFLPFLPF ss

sGω+ζω+

= (3.23)

where LPFLPF fπ=ω 2 is defined as natural undamped frequency and ζ is defined as

the damping ratio. Note that the second-order Butterworth LPF is characterised by

ζ =0.707 [69].

Under the bilinear transformation [68], the analogue LPF in (3.23) can be

transformed into digital LPF as follows:

1

1

11

22 21)(

−

−

+

−=

ω+ζω+=

zzsLPFLPF

LPF sszG 2

21

1

21

1)1(

−−

−

+++

=zaza

zG

LPFLPF

LPF (3.24)

where the filter coefficients LPFG , 1LPFa and 2LPFa are easily found to be:

2

2

21 LPFLPF

LPFLPFG

ω+ζω+ω

=

2

2

1 21)1(2

LPFLPF

LPFLPFa

ω+ζω+−ω

=

2

2

2 2121

LPFLPF

LPFLPFLPFa

ω+ζω+ω+ζω−

= (3.25)

LPF

qhp

qL

_pL_

_ qhp

qL

pL

_

_

_ qhp

qL

pL+

+

+

~

~

~LPF

LPF

53

Note that the LPFω in (3.25) is differed from the LPFω in (3.23) due to the fact of

digital implementation consideration [68]. The LPFω in (3.25) is given by

⎟⎟⎠

⎞⎜⎜⎝

⎛ π=ω

s

LPFLPF f

ftan (3.26)

where sf is the sampling frequency of the digital LPF. Therefore, the digital

second-order Butterworth LPF design is accomplished by the determination of sf

and LPFf .

3.5 Passive High-Pass Filter Design

The second-order damped series resonant type HPF topology is employed in

the proposed hybrid APF as shown in Figure 3.3. It consists of a capacitor ( hpC ), an

inductor ( hpL ) and an inductor bypass resistor ( hpR ). This filter will shunt a large

percentage of high frequency harmonic components at or above the resonant

frequency.

A generalised transfer function approach to harmonic filter design has been

presented in [7]. This approach is based on the Laplace transform and superposition

techniques. In this work, the generalised transfer function approach is adopted for

the HPF design. The HPF impedance transfer function can be derived in normalised

form as,

⎥⎥⎦

⎤

⎢⎢⎣

⎡+⎟⎟

⎠

⎞⎜⎜⎝

⎛ω

+⎟⎟⎠

⎞⎜⎜⎝

⎛ω

⋅

⎟⎟⎠

⎞⎜⎜⎝

⎛+

ω

= 11

1

)(0

2

0

sQ

s

ss

AsZ

p

hp (3.27)

54

In (3.27),

hpCA 1=

hphpCL1

0 =ω

hp

hpp L

R=ω

hp

hphp L

CRQ = (3.28)

where A is the gain coefficient, 0ω is the series resonant frequency, pω is the pole

frequency and Q is the quality factor. The detail of )(sZ hp derivation is presented in

Appendix E.

As illustrated by Figure 3.10, different transfer function characteristics are

possible depending on the value selected for the hpR . The tuning of this HPF is

accomplished by the determination of 0ω . The hpR is chosen based on the desired

high-pass response and the series resonant attenuation. Quality factors of

0.5 ≤≤ Q 2.0 are typical [5]. Higher Q factors allow more series resonant

attenuation and less high-pass. In contrast, lower Q factors provide less series

attenuation and greater high-pass response. Hence, a trade off between the series

resonant and high-pass response exists.

Figure 3.11 presents an equivalent circuit of the proposed hybrid APF for

harmonics, where hpZ is the equivalent impedance of HPF and sZ is the equivalent

distribution source impedance assumed to be a simple inductor ( sL ). In Figure 3.11,

the shunt APF is assumed to act as an ideal current source which produces the

55

compensation current that follows the compensation current reference, while the

nonlinear load is considered as a harmonic currents source. Since we are only

interested in the system performance with the harmonic components, the source

voltage can be neglected. This is because the source voltage is assumed to contain

only the fundamental frequency component.

Figure 3.10 Graphical plot of HPF impedance transfer function ( )(sZ hp )

Figure 3.11 Simplified model of the proposed hybrid APF

After the filter network is configured, a current divider transfer function can

be formulated. Referring to Figure 3.11, the source current to the injected current

transfer function ( )(sH cds ) can be derived as,

hphpLC1

hphpCR1

hpLωhpCω1

dBhp jZ )( ω

hpR

is,hPCC

iL,hif,h

LhpRhp

ChpLs

ZhpZs

ih

ihp,h

56

)()(

)( ,

sisi

sHh

hscds =

)()()(

sZsZsZ

shp

hp

+=

( ) 1)(

111

23

0

220

+⎟⎟⎠

⎞⎜⎜⎝

⎛+⋅++⎟

⎟⎠

⎞⎜⎜⎝

⎛

+⎟⎟⎠

⎞⎜⎜⎝

⎛ω

+⎟⎟⎠

⎞⎜⎜⎝

⎛ω

=

sRL

sCLLsR

CLL

sQ

s

hp

hphphps

hp

hphps

(3.29)

Transfer function (3.29) is important because it can be used to assess the overall filter

performance. A detailed derivation of )(sH cds is presented in Appendix E.

A graphical plot of )(sH cds is shown in Figure 3.12, where it has one crest

( maxH ) due to the parallel resonance between hps LL + and hpC . In particular, this

parallel resonance is a problem, as it enlarges harmonics around the parallel resonant

frequency ⎟⎟

⎠

⎞

⎜⎜

⎝

⎛

+π=

hphpsr CLL

f)(2

1 . This crest can be minimised by selecting the

value of Q factor close to 0.7 [6].

Figure 3.12 Graphical plot of source current to injected current transfer function

( )(sH cds )

hphpCR1

hphp LC1

hpsCL21

ω

s

hp

LRω

-20 dB/dec

1

Hmax

dBcds jH )( ω

)(1

hpshp LLC +

57

3.6 Summary

This chapter explains in detail the proposed single-phase hybrid APF

connected to a PV array. The overall topology is first highlighted to give an

overview of this work. Then, the operation of each main block is described. Next,

the overall control system is discussed in detail. Finally, the passive HPF design is

outlined.

The following statements summarise the discussions of the proposed

topology:

A new variation of a single-phase hybrid APF topology, connected to a DC

source that represents PV array is presented. The proposed topology is

unique because it effectively filters harmonic currents less than 1 kHz and of

higher frequencies. Furthermore, it simultaneously supplies the power from

the PV array to the load.

In this work, the application of the extension p-q theorem is further extended

to a single-phase hybrid APF for compensation current reference estimation.

This chapter offers the theoretical analysis on the proposed topology.

Computer aided simulations and laboratory experiments must be carried out to

validate the workability of the system.

CHAPTER 4

SIMULATION OF THE PROPOSED HYBRID

ACTIVE POWER FILTER

4.1 Introduction

Due to the complexity of modern power electronics system, computer

simulation has become an indispensable tool to analyse parts of circuits that is too

difficult or complex for hand calculation. This chapter is dedicated to the

MATLAB/Simulink simulation verification of the proposed single-phase hybrid

active power filter (APF). MATLAB/Simulink is an advanced software package for

modelling, simulating and analysing dynamic system [70].

To begin with, MATLAB/Simulink simulation models of the overall system

are developed. For simplicity, the DC source is used to represent the photovoltaic

(PV) array. The simulation mainly focuses on time-domain response analysis. The

simulation models are discussed part by part, starting with the modelling of

distribution source, nonlinear load, shunt APF and passive high-pass filter (HPF).

The development of the overall control system simulation model is outlined. In

addition, a basic shunt APF simulation model is also developed. It is to become the

benchmark comparison for the proposed hybrid APF.

59

4.2 System Modelling via MATLAB/Simulink

The complete simulation model of the proposed scheme, constructed using

the MATLAB/Simulink environment is depicted in Figure 4.1. It consists of

distribution source, nonlinear load, shunt APF, passive HPF, overall control system

and DC source. The fixed-step solver with single-tasking mode is selected so as to

be compatible with the targeted DS1104 digital signal processor (DSP) controller

board from dSPACE. The latter also operates at fixed-size signal sample rate. The

simulation fixed-step size is chosen to be 0.2 µ s. Generally, smaller simulation step

size increases the accuracy of the results but it also increases the simulation time.

Figure 4.1 Complete simulation model of the proposed hybrid APF connected to

a DC source

4.2.1 Distribution Source

The power distribution source considered in the simulations is a 240 Vrms, 50

Hz sinusoidal single-phase AC voltage source. This corresponds to the domestic

utility voltage in Malaysia. Figure 4.2 shows the detail of the “Distribution Source”

block. The distribution voltage ( uv ) is generated by the “AC Voltage Source”

60

blockset from “SimPowerSystems\Electrical Source” library. The isolation

transformer with turn ratio of 2:1 is constructed using the “Linear Transformer”

blockset from “SimPowerSystems\Elements” library. Note that the secondary

leakage inductor of the isolation transformer is considered as the source inductor

( sL ). A source resistor ( sR ) is connected in series to limit the inrush current. The

sL and sR are constructed using “Series RLC Branch” blockset. Their selected

values for the simulation model are given by

76.0=sL mH

4=sR Ω (4.1)

The current and voltage signals are sensed using “Current Measurement” and

“Voltage Measurement” blocksets from “SimPowerSystems\Measurements” library

respectively.

Figure 4.2 Detail of “Distribution Source” block

4.2.2 Nonlinear Load

Figure 4.3 shows the detail of the “Nonlinear Load” block. It consists of a

single-phase full-bridge diode rectifier with DC smoothing capacitor ( dC ), resistive

load ( LR ) and AC smoothing inductor ( smoothL ). The passive components values

selected for the simulation model are given by

61

15.1=smoothL mH

1000=dC µF

250=LR Ω (4.2)

The diode rectifier is constructed using the “Universal Bridge” blockset. The diodes

are configured as the power electronics devices in the “Universal Bridge” blockset.

Figure 4.3 Detail of “Nonlinear Load” block

4.2.3 Shunt Active Power Filter

The detail of “Shunt APF” block is illustrated in Figure 4.4. The shunt APF

consists of an interfacing inductor ( fL ), a voltage source inverter (VSI) and a DC-

bus capacitor ( fC ). The VSI is constructed using the “Universal Bridge” blockset.

The IGBTs with anti-parallel diodes are configured as the power electronics devices

in the “Universal Bridge” blockset.

The design expression described in Chapter 3 (Section 3.3.3) is used to

calculate the value of fL . The rated DC-bus voltage reference ( CfV ) used in the

simulation is set to 250 V, which is approximately one and a half times higher than

the amplitude of source voltage ( sV⋅2 ). The maximum switching frequency of the

switching ripple ( max,swf ) and peak-to-peak switching ripple ( ppswI −∆ , ) of the

62

compensation current is selected to be 12.5 kHz and 1.0 A respectively. Using (3.1)

the minimum value of fL can be calculated as

max,,min, )(2 swppsw

Cff fI

VL

⋅∆⋅=

−

10k5.12)0.1(2

250=

⋅⋅= mH (4.3)

Therefore, fL is chosen as 10 mH.

Figure 4.4 Detail of “Shunt APF” block

The DC-bus capacitor design procedure is described in Chapter 3 (Section

3.3.4). The DC-bus capacitor design parameters are given by

120=sV Vrms

6=∆ LI A

2=T ms

270=∆ CfV or 230 VDC (4.4)

63

where sV is the rms value of the source voltage, LI∆ is the peak rms value of the

reactive and harmonic load currents and T is the period of source voltage and CfV∆

is the maximum or minimum DC-bus voltage. Substituting (4.4) into (3.3), the size

of DC-bus capacitor can be calculated as

2,

2 )()(22

refCfCf

Lsf VV

TIVC

−∆

⋅∆⋅≥

22 )250()270(2

02.061202

−

⋅⋅⋅≥

07.979≥ µF (4.5)

Therefore, the selected value for fC is 990 µF.

4.2.4 Passive High-Pass Filter

The detail of “Passive HPF” block is presented in Figure 4.5. The passive

HPF consists of a capacitor ( hpC ), an inductor ( hpL ) and an inductor bypass resistor

( hpR ). These passive components are constructed using the “Parallel RLC Branch”

blockset.

Figure 4.5 Detail of “Passive HPF” block

64

The design procedure of the passive HPF is described in Chapter 3 (Section

3.5). The passive HPF is tuned to the resonant frequency of 1.28 kHz

( 28.12

10 =

π=

hphpCLf kHz). This resonant frequency value is chosen as the

filtering performance of the shunt APF is impaired above this frequency. The

calculated values of the HPF are

76.1=hpL mH

8.8=hpC µF (4.6)

The hpR is chosen based on the desired high-pass response and the series

resonant attenuation. Quality factors of 0.5 ≤≤ Q 2.0 are typical. In this work, the Q

factor is selected as 0.707, considering the required high-pass response over a wide

frequency band. From (3.28), the hpR can be derived as

hp

hphp C

LQR = (4.7)

Substituting (4.6) into (4.7), the value of hpR can be calculated as

=hpR 6

3

108.81076.1707.0 −

−

××

998.9= Ω (4.8)

Therefore, hpR is chosen as 10 Ω.

From (3.27), the frequency response of the HPF impedance transfer function

is illustrated in Figure 4.6. Examination of the HPF frequency response reveals that

the HPF acts as very low impedance above the resonant frequency ( 0f ) for which it

65

is tuned. As such, it effectively shunts most harmonic quantities above the resonant

frequency.

Figure 4.6 Frequency response of the HPF impedance transfer function

After the filter system is configured, the transfer function of source current to

injected current in (3.29) is used to assess the overall system performance. The

frequency response of the function )(sH cds is illustrated in Figure 4.7. There is a

crest due to the parallel resonance between hps LL + and hpC . In particular, this

parallel resonance is a problem, as it enlarges harmonics around the parallel resonant

frequency (hphps

r CLLf

)(21+π

= = 1.07 kHz). This crest can be minimised by

selecting the value of Q around 0.7. For the frequency response shown in Figure 4.7,

the )(sH cds can be evaluated at low and high frequencies. For low frequencies, it

has a 0 dB gain from 0 Hz to rf . At rf , the gain is determined by the selection of

Q . For high frequencies, the roll-off of the high frequency components above rf is

-20 dB per decade.

M

agni

tude

(dB

)

Frequency (Hz)

f0

66

Figure 4.7 Frequency response of the source current to injected current transfer

function

4.2.5 Overall Control System

The “Overall Control System” block of the proposed scheme is presented in

Figure 4.8. The task of the control system is to produce appropriate gating signals

for the switching transistors (IGBTs). It consists of four blocks namely “Reference

Sinewave Generator”, “Compensation Current Reference Estimator”, “DC-Bus

Voltage Controller and PV Current Estimator” and “Fixed-Band Hysteresis Current

Controller”.

For the targeted DSP implementation, analogue-to-digital converters (ADCs)

are needed to convert the detected system variables in analogue form into digital

form. The ADCs can be represented by the “Zero-Order Hold” (ZOH) blocksets

from “Simulink\Discrete” library, as illustrated by Figure 4.8. The sampling time of

ZOH1, ZOH2, ZOH3 and ZOH4 are chosen as 1sT = 100 µ s, while the sampling

time of ZOH5 is chosen as 2sT = 10 µ s. 2sT is desired to be small to fulfil the fast

processing speed requirement of the hysteresis current controller.

Mag

nitu

de (d

B)

Frequency (Hz)

fr

67

Figure 4.8 Detail of “Overall Control System” block

4.2.5.1 Reference Sinewave Generator

Figure 4.9 shows the detail of the “Reference Sinewave Generator” block. It

is responsible to generate the reference sinewave ( )sin( tω and )90sin( o−ωt ) with

unity amplitude and synchronous with the source voltage. Before the input phase

signal is processed by the “Digital Phase-Lock Loop” block, a “Discrete 2nd-Order

Low-Pass Filter” blockset from “SimPowerSystems\Discrete Control Blocks” library

is adopted to eliminate the high frequency noise. The cut-off frequency of the low-

pass filter is selected to be 100 Hz. There is a need for compensation of the inherent

phase delay in the low-pass filter due to the low cut-off frequency. The detail of the

“Phase Delay Compensation” block is presented in Figure 4.10. It is constructed

using the “Unit Delay” blocksets from the “Simulink\Discrete” library.

The “Digital Phase-Lock Loop” block is constructed using the “Discrete

Transfer Fcn” blockset. In order to generate )sin( tω with unity amplitude, the

68

output of “Digital Phase-Lock Loop” block is divided with the amplitude of the input

phase signal ( sV⋅2 ). The )90sin( o−ωt can be obtained by simply delaying

)sin( tω with 90˚. The “-90˚ degree” block is similar to the “Phase Delay

Compensation” block presented in Figure 4.10.

Figure 4.9 Detail of “Reference Sinewave Generator” block

Figure 4.10 Detail of “Phase Delay Compensation” block

The coefficients calculation procedures for the digital phase-lock loop (PLL)

are outlined in Chapter 3 (Section 3.4.4) and Appendix D. For the simulation model,

the digital PLL design parameters are given by

707.0=ζ

2002 ⋅π=ωn rad/s

100=sT µ s (4.9)

69

where ζ is the damping ratio, nω is the undamped frequency and sT is the sampling

period of the discrete system. Substituting (4.9) into (D.11), the characteristic

equation coefficients can be calculated as

snTeC ζω−= 2

0

)100)(2002)(707.0(2 µ⋅π−= e

=0.837203188

and

)1cos(2 21 ζ−ω−= ζω−

snT TeC sn

)707.01)100)(2002cos((2 2)100)(2002)(707.0( −µ⋅π−= µ⋅π−e

= -1.822754279 (4.10)

From the characteristic equation of (3.18) and (3.22), the constant c and constant a

of digital PLL can be calculated as

01 Cc −= =0.162796812

and

cCa 12 +

= =1.08875425 (4.11)

70

4.2.5.2 Compensation Current Reference Estimator

Figure 4.11 depicts the detail of the “Compensation Current Reference

Estimator” block. The source voltage, load current and HPF current signals are sent

through “Discrete 2nd-Order LPF” blocksets for noise filtering. These low-pass

filters (LPFs) are inserted to simulate the actual implementation, where signal filters

are necessary for good quality signal processing. The cut-off frequency of these low-

pass filters is selected to be 2 kHz. The filtered signals are used to estimate the

compensation current reference as discussed in Chapter 3 (Section 3.4.2). In Figure

4.11, the “Digital 2nd-Order Butterworth LPF” blocks are constructed using

“Discrete Transfer Fcn” blocksets.

Figure 4.11 Detail of “Compensation Current Reference Estimator” block

The design procedure for digital Butterworth LPF is outlined in Chapter 3

(Section 3.4.5). For the simulation model, the following design parameters are

selected as,

707.0=ζ

5=LPFf Hz

71

10=sf kHz (4.12)

where ζ is the damping ratio, LPFf is the cut-off frequency and sf is the sampling

frequency of the digital Butterworth LPF. Substituting (4.12) into (3.26), the natural

undamped frequency of the digital Butterworth LPF can be calculated as

⎟⎟⎠

⎞⎜⎜⎝

⎛ π=ω

s

LPFLPF f

ftan

⎟⎠⎞

⎜⎝⎛ ⋅π

=k105tan =1.570797619 310−× rad/s (4.13)

Substituting (4.12) and (4.13) into (3.25), the coefficients of digital Butterworth LPF

can be calculated as

2

2

21 LPFLPF

LPFLPFG

ω+ζω+ω

=

=2.46193087 610−×

2

2

1 21)1(2

LPFLPF

LPFLPFa

ω+ζω+−ω

=

= -1.995557792

and

2

2

2 2121

LPFLPF

LPFLPFLPFa

ω+ζω+ω+ζω−

=

=0.99556764 (4.14)

72

4.2.5.3 DC-Bus Voltage Controller and PV Current Estimator

The detail of the “DC-bus Voltage Controller and PV Current Estimator”

block is presented in Figure 4.12. The DC-bus voltage is first sent through a

“Discrete 2nd-Order LPF” blockset for noise filtering. The filtered signal is then

passed to a proportional-integral (PI) controller for DC-bus capacitor charging

current estimation. The proportional constant ( pK ) and integration constant ( IK )

blocks are constructed using the “Gain” blocksets from the “Simulink\Math

Operations” library. The integrator is constructed using “Discrete-Time Integrator”

blockset. It must be noted that when a DC source is connected to the DC-bus

capacitor, the PI controller can be removed by turning off “Switch (S5)” blockset.

Figure 4.12 Detail of “DC-Bus Voltage Controller and PV Current Estimator”

block

The PV current is obtained by dividing the available active PV power with

the DC-bus voltage reference. The resulting DC-bus capacitor charging current is

then subtracted from the PV current and multiplied with the reference sinewave to

form the second component of compensation current reference signal.

The design procedure of the PI controller is presented in Chapter 3 (Section

3.4.3) and Appendix C. The design parameters of the PI controller are:

73

990=fC µF

250, =refCfV VDC

120=sV Vrms

2=T ms (4.15)

Substituting (4.15) into (C.9), pK can be calculated as

s

refCffp VT

VCK

2

2 ,=

)120(202.0

)250)(990(2⋅⋅

µ=

=0.145840773 (4.16)

After pK is calculated, IK can be determined empirically. The value of IK is

chosen as 0.029 for the simulation model.

4.2.5.4 Fixed-Band Hysteresis Current Controller

Figure 4.13 illustrates the detail of “Fixed-Band Hysteresis Current

Controller” block. This current control technique imposes a bang-bang type

instantaneous control that forces the compensation current to follow its estimated

reference. The actual compensation current is subtracted from its estimated

reference. The resulting error is sent through a hysteresis controller to determine the

appropriate gating signals. In the simulation model, the hysteresis band ( H ) is

74

chosen as 1.0 A. The hysteresis controller is constructed using “Relay” blockset

from “Simulink\Discontinuities” library.

Figure 4.13 Detail of “Fixed-Band Hysteresis Current Controller” block

4.3 Basic Shunt Active Power Filter

Figure 4.14 illustrates a basic shunt APF simulation model constructed under

MATLAB/Simulink environment. It is used as a benchmark to investigate the

improvement in harmonic mitigation by the proposed hybrid APF. It consists of

distribution source, nonlinear load, shunt APF, overall control system and DC source.

Figure 4.14 Complete simulation model of the basic shunt APF connected to a DC

source

75

This simulation model for the basic shunt APF is similar to the model of the

proposed topology presented in Figure 4.1, except for the removal of “Passive HPF”

block. Therefore, the descriptions given in Section 4.2 are applicable for the basic

shunt APF. The basic shunt APF is configured to generate compensation current

equals to the reactive and harmonic load current.

4.4 Summary

The complete MATLAB/Simulink simulation model of the proposed hybrid

APF is presented. The models are discussed part by part, starting with the modelling

of distribution source, nonlinear load, shunt APF, passive high-pass filter (HPF) until

the development of the overall control system. Furthermore, a basic shunt APF

simulation model is developed as a benchmark. The simulation results will be

analysed and compared with the experimental results in Chapter 6.

CHAPTER 5

HARDWARE IMPLEMENTATION OF THE PROPOSED HYBRID

ACTIVE POWER FILTER

5.1 Introduction

In this chapter, the hardware implementation of a 500 VA experimental

prototype of the proposed hybrid active power filter (APF) is presented. The system

parameters used in the hardware implementation are the same used in simulation.

The general experimental set-up is presented first, followed by the descriptions on

prototype construction. Each component used in the prototype is discussed in

considerable detail. A section that describes the analogue signals measurement is

also provided. Finally, the overall control system implementation using DS1104

digital signal processor (DSP) controller board from dSPACE is presented.

5.2 General Description of the Experimental Set-Up

An overall block diagram of the experimental set-up is shown in Figure 5.1.

Figure 5.2 shows the actual overall experimental set-up. The experimental prototype

is supplied from a 240 Vrms, 50 Hz distribution source via a variable transformer and

a 2:1 turns ratio isolation transformer. The use of variable transformer allows the

system to be operated at lower than the rated voltage level, which is very useful

77

during the development stage. An isolation transformer is used mainly to provide

safety when using measuring equipments such as an oscilloscope.

The nonlinear load is constructed using a single-phase full-bridge diode

rectifier with DC smoothing capacitor and AC smoothing inductor. The nonlinear

load is applied in order to generate the load current to be compensated by the hybrid

APF. The diode rectifier load is purely resistive, i.e. a lamp ballast. The leakage

inductor of the isolation transformer is considered as the source inductor. The inrush

source current is limited by an additional resistor in series with the source voltage.

Figure 5.1 Overall block diagram of the experimental set-up

+

_

Shunt APF

Nonlinear Load

is

if

Distribution Source

240 Vrms(50Hz)

vsiL

VCfihp

PassiveHPF

PCC

Gating signals

VCf

iL

ihp

vs

if

VoltageTransducer

DS1104

GateDriver

CurrentTransducer

CurrentTransducer

CurrentTransducer

VoltageTransducer

4

PCIPC

VoltageSourceInverter

DCSource

Full-BridgeDiode

Rectifier

ACMains

IsolationTransformer

VariableTransformer

Power Ground

Digital Ground

Overall ControlSystem

AnaloguePrefilter

78

Figure 5.2 Actual overall experimental set-up

The proposed hybrid APF is connected in parallel with the nonlinear load

being compensated. It consists of a passive high-pass filter (HPF), a shunt APF

constructed using a full-bridge voltage source inverter (VSI), an interfacing inductor,

a DC-bus capacitor and a DC source. Note that the DC-bus capacitor is supplied by

a DC source with the desired constant DC voltage level. Due to time constraint, the

DC-bus voltage controller is not implemented experimentally.

The heart of the overall control system is the dSPACE DS1104 DSP

controller board. It is programmed to realise the compensation current reference

estimation and control algorithm. It is also used to generate the required gating

signals to the VSI. The DS1104 is linked to a personal computer (PC) through a PCI

slot interface. Programming with C code is done using the dedicated ControlDesk

Source Code Editor and Microtec PowerPC C Compiler and Linker. The executable

object files and libraries are generated and loaded onto the on-board global memory

for real-time execution.

DC Source Oscilloscope

Experimental Prototype

Computer Isolation Transformer

Variable Transformer

Resistive Load

Rectifier Bridge

79

The Hall-Effect current and voltage transducers are employed for the

analogue signals measurement. The measured signals are sampled using the DS1104

on-board analogue-to-digital converters (ADCs) and passed on to the DSP for further

processing.

5.3 Experimental Prototype Construction

This section explains the experimental prototype construction in steps,

describing each component used. Figure 5.3 shows the actual experimental

prototype. The prototype consists of interfacing inductor, gate drivers, VSI with DC-

bus capacitor, rectifier load, DS1104 connector board, smoothing inductor, current

and voltage transducers and passive HPF. The experimental prototype parameters

are shown in Table 5.1. The values and parameters of prototype components are the

same as those designed and simulated in Chapter 4.

Figure 5.3 Actual experimental prototype. (1) interfacing inductor, (2) gate

drivers, (3) VSI with DC-bus capacitor, (4) rectifier load, (5) DS1104 connector

board, (6) smoothing inductor, (7) current and voltage transducers, (8) passive HPF

1

2 3

4

5

6

7

8

1

2 3

4

5

6

7

8

80

Table 5.1 : Experimental prototype parameters

Parameters Symbol Value

Source voltage vs 120 Vrms (50 Hz)

Source inductor Ls 0.76 mH

Inrush current limiting resistor Rs 4 Ω

Rectifier Load Nominal Complex Power Sn 500 VA

Rectifier DC smoothing capacitor Cd 1000 µF

Rectifier AC smoothing inductor Lsmooth 1.15 mH

Load resistor RL 250 Ω

Hysteresis tolerance band H 1 A

Interfacing inductor Lf 10 mH

DC-bus capacitor Cf 990 µF

DC-bus voltage VCf 250 VDC

HPF resonant frequency f0 1.28 kHz

HPF inductor Lhp 1.76 mH

HPF capacitor Chp 8.8 µF

HPF inductor bypass resistor Rhp 10 Ω

5.3.1 Nonlinear Load

The nonlinear load used in the experimental prototype is a single-phase full-

bridge diode rectifier. The diode module consists of four diodes in a package. This

diode module is of the type SKB60/08 manufactured by Semikron, which is a 60 A,

800 Vrms device. The DC smoothing capacitor ( dC ) consists of a 1000 µF, 385 VDC

electrolytic capacitor (PEH200XJ4100M) manufactured by Evox Rifa. This

capacitor is a high performance long life electrolytic capacitor, which has low

equivalent series resistance (ESR) and low equivalent series inductance (ESL).

The AC smoothing inductor ( smoothL ) is wound on a 3C90 ferrite core

manufactured by Ferroxcube. The 3C90 is selected because it has low power losses

and high saturation flux density, which are vital for energy storage purpose [71].

81

Furthermore, it is able to operate at frequency as high as 200 kHz. The selected core

geometry is the E-E core type ETD59, which is suitable for high power application

and simple coil winding. The specification for smoothL is given in Table 5.2. The

detailed design procedure for smoothL is presented in Appendix F.

Table 5.2 : AC smoothing inductor specification

Core

material

Core

type

Number

of turns

N

(turns)

Saturation flux

density

Bsat

(G at 100 ˚C)

Effective

length

le

(mm)

Effective

area

Ae

(mm2)

Inductance

L

(mH)

3C90 ETD59 74 3400 139 368 1.15

5.3.2 Shunt Active Power Filter

The shunt APF consists of a voltage source inverter (VSI), an interfacing

inductor and a DC-bus capacitor. This subsection describes briefly on the shunt APF

construction.

5.3.2.1 Voltage Source Inverter

The experimental single-phase full-bridge VSI is made up of four units of

insulated gate bipolar transistors (IGBTs) as shown in Figure 5.4. The selected

IGBTs are of the type APT25GP120BDF1 manufactured by Advanced Power

Technology. Each unit has an IGBT device rated 1200 V and 33 A at 110 ˚C case

temperature. This IGBT combines the superior characteristics of bipolar junction

transistor and power metal oxide-semiconductor field-effect transistor (MOSFET).

Unlike it predecessor, the newer generation of IGBT can be switched without the use

of snubber components. The possibility of snubberless operation results in a much

simple design. As a result, it provides a lower cost alternative to a MOSFET.

82

Furthermore, the continuity of current during blanking time period is maintained by

the build-in anti-parallel diodes.

Figure 5.4 Schematic of experimental single-phase full-bridge VSI

5.3.2.2 Interfacing Inductor

The interfacing inductor ( fL ) consists of four inductors connected in series,

2.5 mH each to give a total inductance of 10 mH. The reason for not using a single

unit of a 10 mH inductor is because there is no suitable bobbin and ferrite core

available that meet the targeted design specifications. Each unit of the 2.5 mH

inductors is wound on 3C90 ferrite core manufactured by Ferroxcube. Its

specification is given in Table 5.3. The detailed design procedure of the 2.5 mH

inductor is presented in Appendix F.

Table 5.3 : 2.5 mH inductor specification

Core

material

Core

type

Number

of turns

N

(turns)

Saturation flux

density

Bsat

(G at 100 ˚C)

Effective

length

le

(mm)

Effective

area

Ae

(mm2)

Inductance

L

(mH)

3C90 ETD59 160 3400 139 368 2.5

+

_

VCf

S3

S4

S1

S2 G2

E2

G4

E4

G1

E1

G3

E3~

~

83

5.3.2.3 DC-Bus Capacitor

The DC-bus capacitor ( fC ) is constructed by arranging an array of capacitors

across the DC-bus rail, as shown in Figure 5.5. It consists of three electrolytic

capacitors connected in parallel, 330 µF, 400 VDC each to give a total capacitance of

990 µF. The electrolytic capacitors are of the type 2222-059-56331 manufactured

by BC Components. It is a high performance long life electrolytic capacitor, which

has low ESR and high ripple current capability. A bleed resistor (RB) is connected

across the capacitors to ensure that the high voltage is discharged when the shunt

APF is turned off.

Figure 5.5 DC-bus capacitor

5.3.3 Gate Driver Circuit

An IGBT is basically a voltage controlled device and exhibits MOSFET-like

capacitive gate-to-emitter characteristics. Therefore, low firing signals are sufficient

to turn the IGBT on and off. Figure 5.6 illustrates the functional block diagram of

the gate driver circuit. The two gating signals for the VSI are generated by the

DS1104 and latched out via two bits of high-speed input/output (I/O) ports. The gate

driver circuits (GD1 and GD2) interface between the gating signals and the IGBTs.

These circuits isolate and amplify the gating signals in order to turn on/off the IGBTs.

In this work, hard switching approach is applied for the VSI, therefore a blanking

time is needed for protection against shoot-through in the VSI leg. A blanking time

Cf1

330uF

Cf2

330uF

Cf3

330uF

RB

22 k (5W)

DC-Bus

+

_

84

of s 5.2 µ is provided internally by the gate driver circuit. The gate driver circuit is

from the design in [73] and its schematic is presented in Appendix G.

Figure 5.6 Functional block diagram of gate drive circuit

5.3.4 Passive High-Pass Filter

The HPF capacitor ( hpC ), inductor ( hpL ) and inductor bypass resistor ( hpR )

are designed according to the specification used in the simulation. The hpC consists

of four metallised polypropylene film capacitor connected in parallel, 2.2 µF each to

give a total capacitance of 8.8 µF. The selected capacitors are of the type 2222-468-

16225 manufactured by BC Components. The metallised polypropylene film

capacitor provides a fairly high capacitance per unit volume and high pulse durability,

thus making it suitable for filtering application.

The hpL is wound on a 3C90 ferrite core manufactured by Ferroxcube. The

specification for hpL is given in Table 5.4. The detail design procedure for hpL is

presented in Appendix F. The hpR with resistance value of 10 Ω is connected in

parallel with hpL . This resistor is made up of an aluminium clad wire wound resistor,

type HSC200-10R manufactured by Tyco Electronics. This resistor is suitable for

applications where high wattage dissipation in a small space is required.

S3

S4

S1

S2

DC-Bus (positive rail)

GD1 GD2

Gate drivecircuit

DS1104

GD1

GD2Gatingsignals

I/O 1

I/O 2

85

Table 5.4 : HPF inductor specification

Core

material

Core

type

Number

of turns

N

(turns)

Saturation flux

density

Bsat

(G at 100 ˚C)

Effective

length

le

(mm)

Effective

area

Ae

(mm2)

Inductance

L

(mH)

3C90 ETD59 113 3400 139 368 1.76

5.4 Analogue Signals Measurement

For the control system, it is necessary to measure the following five analogue

signals:

(1) DC-bus voltage, CfV

(2) Source voltage, sv

(3) Compensation current, fi

(4) Load current, Li

(5) HPF current, hpi

The measured signals are sampled using the DS1104 on-board ADCs and passed on

to the DSP for further processing. This section describes on the analogue signals

measurement using hall-effect voltage/current transducers. Finally, an analogue

prefilter for analogue input signal band-limiting is also presented.

5.4.1 Hall-Effect Voltage Transducer

For voltage signal measurement, a simple resistive voltage divider could be

used to obtain a scaled-down value of the voltage signal. Although this method is

simple, there are two potential drawbacks. The measurement of high voltage causes

the wire-wound resistor to heat up, deviating its resistance from its nominal value.

Secondly, there is no electrical isolation between high voltage ground and the digital

86

circuitry. Therefore, occurrence of spikes, noise etc. from the power distribution

system will be directly transmitted to the sensitive low-power circuits.

A preferable alternative is to use a Hall-Effect voltage transducer. The

particular device selected for this purpose is LV25-P, manufactured by LEM. It is an

instantaneous current output type with isolation capability of about 2.5 kVrms at 50

Hz. In this work, two Hall-Effect voltage transducers are required for CfV and sv

measurements. Figure 5.7 shows the circuitry to obtain an output proportional to

CfV or sv . Note that the earth from the LV25-P is connected to the digital ground.

Figure 5.7 Voltage signal measurement using LV25-P Hall-Effect voltage

transducer

5.4.2 Hall-Effect Current Transducer

Three current transducers are needed for fi , Li and hpi measurements. The

Hall-Effect current transducer type LA25-NP, manufactured by LEM is selected as

the current transducer. LA25-NP is an instantaneous current output type with

isolation capability of about 2.5 kVrms at 50 Hz. It provides five selectable current

measurement ranges (5/6/8/12/25 A). In this work, the current measurement range of

8 A is selected. Figure 5.8 shows the circuitry to obtain an output proportional to

fi , Li or hpi . Note that the earth from the LA25-NP is connected to the digital

ground.

LV25-P

+HT

-HT M

+

-1

2 3

4

5

-15V +15V

Digital ground

Proportional outputR1 22k(5W)

RM 200(0.5W)VCf or vs

+

87

Figure 5.8 Current signal measurement using LA25-NP Hall-Effect current

transducer

5.4.3 Analogue Prefilter

In order to sample a signal at a desired rate and satisfy the conditions of the

sampling theorem, the signal must be prefiltered by a low-pass analogue filter,

known as an anti-aliasing prefilter [68]. The output of the analogue prefilter will

then be band-limited and sampled properly at the desired sampling rate. In this work,

the VCf, vs, iL and ihp are sampled at 10 kHz sampling rate (fs1 = 10 kHz), while if is

sampled at 100 kHz sampling rate (fs2 = 100 kHz). Figure 5.9 shows the circuitry of

the analogue prefilter. It should be emphasized that the cut-off frequency

(212

1CCR

fcπ

= ) of the analogue prefilter must be taken to be half of the sampling

rate ( 521

11 ≅= sc ff kHz and 5021

22 ≅= sc ff kHz). The specification of the

analogue prefilter is given in Table 5.5.

Table 5.5 : Analogue prefilter specification

Cut-off frequency, fc R

(kΩ)

R3

(kΩ)

C1

(pF)

C2

(pF)

fc1 = 5 kHz 22 47 1000 2000

fc2 = 50 kHz 22 47 100 220

LA25-NP

1-5

6-10 M

+

-1

2 3

4

5

-15V +15V

Digital ground

Proportional output

RM 200(0.5W)if , iL or ihp

in

out

88

Figure 5.9 Analogue prefilter circuit

5.5 Controller Hardware and Software Tools

All the control algorithms, gating signals generation and protection of the

experimental prototype are performed by a DSP controller board, the DS1104 from

dSPACE [74]-[78]. This section presents the controller hardware and the software

tools for the overall control system implementation.

5.5.1 DS1104 DSP Controller Board

The DS1104 DSP controller board is used to develop, debug and execute the

control program. It is a standard board that can be plugged into a PCI slot of a PC.

The DS1104 is specially designed for the development of high-speed multivariable

digital controllers in various application fields. It is a complete real-time control

system based on a 603 PowerPC floating-point processor manufactured by Motorola,

running at 250 Mhz. For advanced I/O purposes, the controller board includes a

slave DSP subsystem based on the TMS320F240 DSP microcontroller manufactured

by Texas Instruments.

Figure 5.10 shows a block diagram that describes the main features of the

controller board. The rich selection of on-board peripherals such as ADCs, digital-

Analogueinput signal +

_

TL051 Analogueoutput signal

C2

C1

R1 R2

R3R = R1 = R2

89

to-analogue converters (DACs), bits I/O, Incremental Encoder Interface, Serial

Interface, Serial Peripheral Interface , User Interrupts, Encoder Interrupts, Slave DSP

interrupt, Timers Units make the interface task with gate driver circuit easier and

more reliable.

Figure 5.10 Block diagram of the DS1104 DSP controller board

5.5.2 Software Tools

Development tools from dSPACE’s Software is used to develop the control

program. It is an integrated system which is optimised to work with the DS1104

hardware. The main programming tools are a dedicated Source Code Editor,

Microtec PowerPC C Compiler and Linker. Other support tools include ControlDesk,

PCPCI Bus

PCI Interface

Interrupt Controller

Timers

Memory Controller

PowerPC 603e

32 MBSDRAM

8 MB FlashMemory

ADC4 Ch. 16-Bit4 Ch. 12-Bit

DAC8 Ch. 16-Bit

IncrementalEncoder

2 Ch.

Digital I/O20 Bit

Serial InterfaceRS232/RS485/

RS422

Dual PortRAM

TMS320F240DSP

PWM1 x 3-Phase4 x 1-Phase

4 CaptureInputs

SerialPeripheralInterface

Digital I/O14-Bit

24 Bit I/O Bus

DS1104

Slave DSP I/O Features

Master PPC I/O Features

90

Platform Manager, Experiment Manager, Real-Time Library (RTLib) and a real-time

platform known as Real-Time Interface (RTI). The ControlDesk, dSPACE’s well-

establish experiment software, provides all the functions to control and monitor the

DS1104 hardware. Figure 5.11 illustrates the graphical user interface of

ControlDesk software. It offers a variety of virtual instruments to build and

configure virtual instrument panels via instrumentation and provides functions to

perform parameter studies.

Figure 5.11 Graphical user interface of ControlDesk software

Basically, there are two approaches to create real-time applications to be

implemented on the DS1104: (1) Using RTI and (2) Handcoding. The dSPACE’s

RTI in conjunction with the Real-Time Workshop (RTW) from the MathWorks can

convert the developed Simulink model into real-time C code, i.e. the C code is

generated and implemented automatically on DS1104. Therefore, the user only need

to add the required dSPACE blocks into the developed Simulink model. This makes

the implementation process fast and simple. Although RTI approach is simple, it has

one shortcoming, in the sense that the system initialisation and I/O features are not

accessible [77].

91

An algorithm can also be handcoded manually using C language [79], then

the code is downloaded into the global memory of DS1104. All the tools required to

generate the object files are provided by the dSPACE’s software. By using the

handcoding approach, the system initialisation and I/O features are now accessible.

In this work, the handcoding approach is adopted.

5.6 Control Software

The main purpose of the software control is to generate the appropriate gating

signals to drive the switching transistors according to the estimated current reference.

This section explains the control algorithms implementation on the DS1104.

5.6.1 Control Software Structure

Figure 5.12 shows the structure of the control software for DS1104. At the

highest level, the control software consists of initialisation routine and run routines.

Upon completion of the necessary initialisation, the background service is started.

The background service is simply an infinite loop. At all time, the control processing

is done via one service routine (isr_srt0()) and one interrupt service routine

(isr_srt1()). Two timers are used, Timer 0 and Timer 1, with execution times chosen

to be 10 µs and 100 µs respectively. The control algorithms implemented during

Timer 1 are the reference sinewave generation, compensation current reference and

PV current estimation and system protection. The fixed-band hysteresis current

control algorithm is implemented during Timer 0. The host service routine

(host_service()) which is executed at every period of Timer 1 is responsible for the

data capture. The complete C code listings and program documentation can be found

in Appendix H.

92

Figure 5.12 DS1104 control software structure

5.6.2 Initialisation Routine

A flowchart describing the initialisation routine is given in Figure 5.13. After

start-up, initialisation of variables and various peripherals take place. Peripheral

initialisation involves the configuration of timer units, capture units, I/O bits, ADCs

and DACs, whose functions are software programmable. Each of the timers is

programmed to operate in the continuous down count mode. Timer 0 provides the

timebase for the isr_srt0(), while the isr_srt1()’s timebase is provided by Timer 1.

Timer 1 is also used to provide a central processing unit (CPU) interrupt at the fixed

rate. Thereafter, the infinite loop background service routine is called, and the

normal operation of the control begins.

5.6.3 Service Routine 0

Figure 5.14 shows a flowchart describing the service routine 0 (isr_srt0()).

The program reads the compensation current signal ( fi ) through the ADC channel 8.

Start

Initialisation Routine:- DSP Setup- Variables Initialisation- Peripheral Initilisation- Set Interrupts- Start Timers (Timer 0, Timer 1)- Start Background Service

Run Routines:

Background Service

Timer 0, isr_srt0():- Fixed-Band Hysteresis Current Control

Timer 1, isr_srt1():- Reference Sinewave Generation- Compensation Current Reference and PV Current Estimation- System Protection

host_service():- Data Capture

93

The sampled value is then subtracted from the compensation current reference signal

( reffi , ). The resulting error ( hysteresisi ) is subjected to a comparator to determine the

gating signals (bit I/O 5 and I/O 17) when exceeds/equals the predefined upper or

lower limits (0.5 or -0.5). As long as hysteresisi is within the limits, no switching action

is taken.

5.6.4 Interrupt Service Routine 1

A flowchart describing the interrupt service routine 1 (isr_srt1()) is given in

Figure 5.15. The program reads the DC-bus voltage ( CfV ), source voltage ( sv ), HPF

current ( hpi ) and load current ( Li ) signals from the ADC channel 2, 5, 6 and 7

respectively. The reference sinewave generator subroutine (phase_lock_loop()) is

first executed to generate the reference sinewave with unity amplitude and

synchronous with the source voltage. Then, the compensation current reference and

PV current estimator subroutine (extension_pq_theorem() and

compensation_current_ref()) is executed to obtain the current reference signal ( reffi , ).

A system protection subroutine (system_fault_protection()) is included to protect the

system from task overrun condition. When task overrun occurred, the system is

halted by sending a “low” enable signal (bit I/O 11 = 0) to the gate driver circuits.

The host service subroutine (host_service()) execution supports data capturing

feature of the ControlDesk software. Once all the executions are completed, the

interrupt is enabled to allow servicing of Timer 1 interrupt.

94

Figure 5.13 Initialisation routine flowchart

Figure 5.14 Service routine 0 flowchart

START

Initialise variables,peripherals

DSP setup

Set interrupts

Start Timer 0 and Timer 1

Background loop

isr_srt0(),isr_srt1()

STARTisr_srt0()

Read ADC8 for if

END

Start ADC8 conversionfor if

Sampling ends?No

Yes

Calculates ihysteresis = if - if,ref

ihysteresis=>0.5

Set bit I/O5, I/O17= ‘1’

Set bit I/O5, I/O17= ‘0’

ihysteresis=<-0.5

Yes

No

Yes

No

Remain bit I/O5, I/O17

95

Figure 5.15 Interrupt service routine 1 flowchart

START

isr_srt1()

Read ADC2,5,6,7 forVCf ,vs ,ihp ,iL

END

Sampling ends?No

Yes

Execute Reference Sinewave Generatorphase_lock_loop()

Start ADC2,5,6,7 conversionfor VCf ,vs ,ihp ,iL

Execute Compensation Current Referenceand PV Current Estimatorextension_pq_theorem(),

compensating_current_ref()

Execute System Protectionsystem_fault_protection()

Execute Host Servicehost_service()

Enable interrupt

System fault?

No

Set Enable Signal,bit I/O 11 to ‘1’

Yes

Set Enable Signal,bit I/O 11 to ‘0’

96

5.7 Summary

A 500 VA experimental prototype for the proposed hybrid APF is developed.

It consists of distribution source, nonlinear load, passive HPF, shunt APF and

dSPACE’s DS1104 DSP controller board. The major components used in the

prototype construction are discussed in detail. An overview of the DS1104 hardware

is given, followed by detail implementation of the control software. The flexibility

of the DS1104 enables easy implementation of the proposed control algorithms,

gating signals generation and system protection. The experimental results will be

analysed and compared with simulation results in Chapter 6.

CHAPTER 6

RESULTS AND ANALYSIS

6.1 Introduction

In Chapter 4, the MATLAB/Simulink simulation of the proposed hybrid APF

is discussed. This is followed by the description of the prototype construction. In

this chapter, the experimental results will be presented and analysed with reference to

the simulation work.

First, the performance of the distribution system without compensation is

given. Then, the result of “ideal compensation” will be presented. Under the ideal

case, the compensation current reference is calculated using the DS1104. However,

the proposed hybrid APF is not connected to the distribution system. We assume it

is modelled as an ideal current source. The aim of this exercise is to ensure the idea

that we propose (i.e. compensation current reference estimation using extension p-q

theorem) is workable without considering the effect of noise and the speed limitation

of the DS1104. Using this approach, we are able to validate effectiveness of the

proposed compensation scheme without having to worry about the external

influences.

Later in this chapter, we will show that the effect of noise changes the result

considerably. The speed limitation of DS1104 limits the controller sampling time,

which in turn degrades the performance of the hysteresis current controller. The

performance of the distribution system under the compensation of a basic shunt APF

98

and the proposed hybrid APF will be described. The discrepancies between the

simulation and experimental results are highlighted. The capability of the proposed

hybrid APF in handling the PV energy is evaluated. Finally, analysis on the Total

Harmonic Distortion (THD) for the proposed hybrid APF in comparison to a basic

shunt APF is carried out.

6.2 Results – Without Compensation

A single-phase full-bridge diode rectifier load is applied to the distribution

system in order to obtain the distorted load current. Figure 6.1 shows the simulated

source voltage and load current waveforms without any type of compensation. As

can be seen, the resulting load current is highly distorted. It deviates significantly

from a sinusoidal waveform. This distorted load current leads to distortion in the

source voltage waveform. This can be clearly observed by the existence of “flat-top”

at the peak of the source voltage waveform. The distortion in the source voltage

waveform is due to the presence of source inductor ( sL ) and source resistor ( sR ).

Figure 6.1 Simulation results – without compensation: source voltage and load

current waveforms

168 20 24 36Time, t [ms]

4 40

0

-300

-6-4-2

246

-200-100

0100200300

Load

Cur

rent

, iL [

A]

Sour

ce V

olta

ge, v

s [V

]

12 3228

99

The experimental source voltage and load current waveforms with similar

operating condition are shown in Figure 6.2. Measurements are done using the

Tektronix TDS 3054A 500 MHz four channel digital oscilloscope. It can be seen

that the experimental results are in close agreement with the simulation results shown

in Figure 6.1.

Figure 6.2 Experimental results – without compensation: source voltage and load

current waveforms

6.3 Reference Sinewave Generation

Figure 6.3 shows the simulated source voltage and the phase-lock loop (PLL)

generated reference sinewave ( )sin( tω and )90sin( o−ωt ) waveforms. Recall that

the PLL is used to generate the reference sinewave with unity amplitude and

synchronised with the source voltage ( sv ). From Figure 6.3, the obtained )sin( tω is

a pure sinusoidal waveform although the source voltage waveform is distorted.

Furthermore, the )sin( tω is synchronised with sv . A 90˚ shifted reference sinewave

signal ( )90sin( o−ωt ) is obtained by delaying )sin( tω by 90˚.

168 20 24 32Time, t [ms]

0 40

0

-300

-6-4-2

246

-200-100

0100200300

Load

Cur

rent

, iL [

A]

Sour

ce V

olta

ge, v

s [V

]

12 28 364

100

The experimental PLL generated waveforms are shown in Figure 6.4. Since

the data for the PLL generated reference sinewave are stored in the DS1104, they are

captured from the on-board digital-to-analogue converters (DACs). As can be

observed, the experimental results are in accordance with the results obtained from

the simulation.

Figure 6.3 Simulation results – PLL generated reference sinewave: source

voltage and the generated reference sinewave waveforms

Figure 6.4 Experimental results – PLL generated reference sinewave: source

voltage and the generated reference sinewave waveforms

0.0

-300

-1.5-1.0-0.5

0.51.01.5

-200-100

0100200300

Ref

eren

ce si

new

ave

Sour

ce V

olta

ge, v

s [V

]

Time, t [ms]168 20 24 364 4012 3228

sin(ωt) sin(ωt-90˚)

Time, t [ms]

0.0

-300

-1.5-1.0-0.5

0.51.01.5

-200-100

0100200300

Ref

eren

ce si

new

ave

Sour

ce V

olta

ge, v

s [V

]

168 20 24 320 4012 28 364

sin(ωt) sin(ωt-90˚)

101

6.4 Compensation Current Reference Estimation

In this section, we shall present the result for estimation of compensation

current reference using the extension p-q theorem. Figure 6.5 shows the simulated

load current and HPF current waveforms. As can be seen, both the current

waveforms are distorted. They deviate significantly from a sinusoidal waveform.

For the HPF current, the distortion is caused by the inflow of harmonic currents,

which are produced by the distorted source voltage [16].

Figure 6.5 Simulation results: load current and HPF current waveforms

These results are verified by experiment shown in Figure 6.6. However,

current spikes are observed in the experimental HPF current but not in the simulated

HPF current. The occurrences of these current spikes are probably due to the effect

of parasitic elements in the HPF.

0

-1.5-1.0-0.5

0.51.01.5

HPF

Cur

rent

, ihp

[A]

0

-3-2-1

123

Load

Cur

rent

, iL [

A]

Time, t [ms]168 20 24 364 4012 3228

102

Figure 6.6 Experimental results: load current and HPF current waveforms

By using extension p-q theorem presented in Section 3.4.2, the compensation

current reference can be decomposed into active, reactive and harmonic current

components. Referring to Figure 6.5, the various instantaneous components of the

load current are shown in Figure 6.7. It can be seen that the active load current ( pLi , )

is in phase with the source voltage ( sv ), while the reactive load current ( qLi , ) lags

pLi , by 90˚. The harmonic load current ( hLi , ) is obtained by subtracting pLi , and qLi ,

from the load current ( Li ):

)( ,,, qLpLLhL iiii +−= (6.1)

In addition, this figure also shows the reactive HPF ( qhpi , ) current waveform. It is in

phase with the HPF current ( hpi ).

Time, t [ms]168 20 24 320 4012 28 364

0

-1.5-1.0-0.5

0.51.01.5

HPF

Cur

rent

, ihp

[A]

0

-3-2-1

123

Load

Cur

rent

, iL [

A]

103

Figure 6.7 Simulation results: estimated active load current, reactive load current,

harmonic load current and reactive HPF current waveforms

The experimental results of the various instantaneous components of the load

current and HPF current are shown in Figure 6.8. These results are captured from the

DS1104 on-board DACs. As can be seen, the experimental results match very well

with the simulation results.

0

-0.6-0.4-0.2

0.20.40.6

0

-3-2-1

123

Har

mon

ic L

oad

Cur

rent

,i L,

h [A

]

0

-60-40-20

204060

Rea

ctiv

e Lo

ad C

urre

nt,

i L,q [

mA

]0

-1.5-1.0-0.5

0.51.01.5

Act

ive

Load

Cur

rent

,i L,

p [A

]R

eact

ive

HPF

Cur

rent

,i hp

,q [A

]

Time, t [ms]168 20 24 364 4012 3228

104

Figure 6.8 Experimental results: estimated active load current, reactive load

current, harmonic load current and reactive HPF current waveforms

6.5 Results – Ideal Compensation

In the previous section, we have obtained all the components of the

compensation current reference ( reffi , ). This section illustrates the effectiveness of

the estimated compensation current reference for harmonic mitigation under ideal

Time, t [ms]168 20 24 320 4012 28 364

0

-0.6-0.4-0.2

0.20.40.6

0

-3-2-1

123

Har

mon

ic L

oad

Cur

rent

,i L,

h [A

]

0

-60-40-20

204060

Rea

ctiv

e Lo

ad C

urre

nt,

i L,q [

mA

]0

-1.5-1.0-0.5

0.51.01.5

Act

ive

Load

Cur

rent

,i L,

p [A

]R

eact

ive

HPF

Cur

rent

,i hp

,q [A

]

105

compensation condition. The general arrangement of the experimental prototype

with ideal compensation condition is shown in Figure 6.9. In the ideal case, the

proposed hybrid APF is assumed to be an ideal current source. This ideal current

source is assumed to inject a compensation current ( fi ) which is equal to the

estimated compensation current reference ( reffi , ). The aim of this exercise is to

verify the correctness of compensation current reference calculation. This ensures

that the proposed idea is workable with the absence of unwanted noise. Therefore,

this exercise can be considered as a “controlled environment” type of experiment.

Figure 6.9 Experimental prototype arrangement

Applying Kirchhoff’s Current Law (KCL) at the point of common coupling

(PCC), we get

fLs iii −= (6.2)

where si is the source current after compensation, Li is the load current and fi is the

compensation current. The ideal current source is controlled to inject a

compensation current ( fi ) such that it cancels out the reactive and harmonic parts of

load current. In other words, reffi , is equivalent to the summation of qLi , and hLi , :

h,Lq,Lref,f iii += (6.3)

Nonlinear Load

is if

Distribution Source

240 Vrms(50Hz)

vs

iL

ProposedHybrid APF

PCC

Full-BridgeDiode

Rectifier

ACMains

Power Ground

106

Simulation based on (6.2) is carried out to verify the effectiveness of the reffi ,

under ideal compensation condition. Figure 6.10 shows the simulation results of this

analysis. Note that the source current ( si ) waveform is obtained mathematically by

subtracting fi from Li using (6.2). The resulting si appears to be a pure sinusoidal

waveform. This implies that si is perfectly free of harmonic distortion. The

simulation suggests that the proposed compensation scheme work very well.

Figure 6.10 Simulation results – ideal compensation condition: load current,

compensation current and source current waveforms

The simulation is proven by experiments as shown in Figure 6.11. These

results are captured from the DS1104 on-board DACs. As can be seen, the

experimental results match very closely with the simulation results shown in Figure

6.10. It can therefore be concluded that the application of extension p-q theorem to

estimate the compensation current reference for the proposed hybrid APF work very

well.

0

-1.5-1.0-0.5

0.51.01.5

Sour

ce C

urre

nt,

i s [A

]

0

-3-2-1

123

Com

pens

atio

n C

urre

nt,

i f [A

]

0

-3-2-1

123

Load

Cur

rent

,i L [

A]

Time, t [ms]168 20 24 364 4012 3228

107

Figure 6.11 Experimental results – ideal compensation condition: load current,

compensation current and source current waveforms

6.6 Results – Basic Shunt Active Power Filter Compensation

In Section 6.5, we have restricted our discussions on the compensation under

ideal condition, where we represent the proposed hybrid APF by an ideal current

source. This is to ensure that the estimated compensation current reference is

correctly calculated. However, in practice, the ideal current source is implemented

using a VSI along with an interfacing inductor ( fL ) and a DC-bus capacitor ( fC ).

The simulation results of the basic shunt APF are shown in Figure 6.12.

When the shunt APF is applied, the injected compensation current ( fi ) forces the

source current ( si ) to become a near sinusoidal waveform. It can be seen that the

source current waveform is in phase with the source voltage ( sv ) waveform,

resulting in unity power factor. Note that the source voltage, load current and source

current contain appreciable amount of high frequency harmonics. This is due to the

Time, t [ms]

0

-1.5-1.0-0.5

0.51.01.5

Sour

ce C

urre

nt,

i s [A

]

0

-3-2-1

123

Com

pens

atio

n C

urre

nt,

i f [A

]

0

-3-2-1

123

Load

Cur

rent

,i L [

A]

168 20 24 320 4012 28 364

108

unavoidable high frequency switching ripple of the compensation current and the

presence of source inductor ( sL ). When the high frequency switching ripple is

injected into the point of common coupling (PCC), it corrupts the source voltage,

load current and source current waveforms.

Figure 6.12 Simulation results – basic shunt APF compensation: source voltage,

load current, compensation current and source current waveforms

0

-3-2-1

123

Sour

ce C

urre

nt,

i s [A

]C

ompe

nsat

ion

Cur

rent

,i f [

A]

0

-6-4-2

246

Load

Cur

rent

,i L [

A]

0

-6-4-2

246

Sour

ce V

olta

ge,

v s [V

]

0

-300-200-100

100200300

Time, t [ms]168 20 24 364 4012 3228

109

The experimental results of the basic shunt APF compensation are shown in

Figure 6.13. The trend of the waveforms is consistent with the simulation. However,

from the results, it is observed that the switching ripple of the compensation current

is about 1.5 Apeak-to-peak even though the hysteresis band ( H ) is set to be 1.0 A. The

deviation in the magnitude of switching ripple is most probably due to the effect of

noise in the compensation current reference.

Figure 6.13 Experimental results – compensation with basic shunt APF: source

voltage, load current, compensation current and source current waveforms

Time, t [ms]

0

-3-2-1

123

Sour

ce C

urre

nt,

i s [A

]C

ompe

nsat

ion

Cur

rent

,i f [

A]

0

-6-4-2

246

Load

Cur

rent

,i L [

A]

0

-6-4-2

246

Sour

ce V

olta

ge,

v s [V

]

0

-300-200-100

100200300

168 20 24 320 4012 28 364

110

The ideal simulation result in Figure 6.14 illustrates the relationship between

the compensation current reference and the hysteresis band ( H ). In this case, the

compensation current reference is free of noise. The hysteresis band ( A 0.1=H )

can be simply imposed on the compensation current to form the upper ( A 5.0, +reffi )

and lower ( A 5.0, −reffi ) limits. Switches transition occurs whenever the

compensation current hits the upper or lower limit. As a result, the switching ripple

of compensation current can be maintained to be 1.0 Apeak-to-peak as shown in Figure

6.12.

Figure 6.14 Simulation result – The relationship between the compensation

current reference and hysteresis band

In the experimental work, noticeable noise currents ( noisei ) can be observed in

the compensation current reference as shown in Figure 6.15. The origin of this noise

could not be exactly detected. However, it probably due to radiated noise from high

frequency switching of power switches and inductors. In this case, the hysteresis

band ( A 0.1=H ) is imposed on the compensation current reference together with

0

-3

-2

-1

1

2

3

Com

pens

atio

n C

urre

nt R

efer

ence

,i f,r

ef [A

]

if,ref + 0.5A

H = 1.0 A

if,ref - 0.5A

Time, t [ms]168 20 24 364 4012 3228

111

noise currents to form the upper ( A 5.0|| max,, ++ noisereff ii ) and lower

( A 5.0|| min,, −− noisereff ii ) limits. As a result, a hysteresis band which is bigger than

1.0 A is formed, as shown in Figure 6.15. Consequently, the switching ripple of

compensation current will exceed the predefined hysteresis band. This fact, in our

view, is the main reason why the experimental results differ substantially from the

simulation.

Figure 6.15 Experimental result – The relationship between the compensation

current reference and hysteresis band

6.7 Results – Proposed Hybrid Active Power Filter Compensation

Section 6.6 clearly demonstrates that the harmonic distortion in the source

current is reduced significantly using the basic shunt APF. However, an appreciable

amount of switching ripple still remains in the source voltage, load current and

Time, t [ms]

0

-3

-2

-1

1

2

3

Com

pens

atio

n C

urre

nt R

efer

ence

,i f,r

ef [A

]

168 20 24 320 4012 28 364

if,ref + |inoise, max| + 0.5A

> 1.0 A

if,ref - |inoise, min| - 0.5A

inoise, max

inoise, min

112

source current waveforms. To reduce the switching ripple, a passive HPF is placed

in parallel with the shunt APF at the PCC. The HPF provides a path for the

switching ripple to flow.

Figure 6.16 shows the simulation results with the proposed hybrid APF.

When the hybrid APF is applied, the injected compensation current ( fi ) forces the

source current ( si ) to become a near sinusoidal waveform and in phase with the

source voltage waveform, resulting in unity power factor.

Comparing to the simulation result without HPF shown in Figure 6.12, the

switching ripple in the source current is greatly reduced. It can be concluded that the

HPF provides a path for the high frequency switching ripple to flow. This is evident

by the fact of that switching noise presence in the HPF current waveform. Hence,

the filtering performance of high frequency harmonics is improved by the proposed

topology.

Distortion is observed at the peak of source current waveform. This

distortion occurs when the current reference has a sharp ramp (i.e. at the peak of the

load current waveform). The compensation current tends to have a delay when

tracking sharp ramp in the current reference. This problem is probably due to the

insufficient sampling in the digitally implemented hysteresis current controller. The

finite sampling time of 10 µs for the hysteresis current controller may not be

sufficient to correct samples of the fast changing compensation current. As a result,

the effectiveness of the proposed compensation scheme is degraded and the

distortion occurs.

The simulation results are verified by that of experiments as shown in Figure

6.17. From the results, it is observed that the switching ripple of the compensation

current differs from the predefined hysteresis band ( H ). Again, the difference in

switching ripple is most probably due to the effect of noise currents in the

compensation current reference as previously described. The conformity of the

experimental results to the simulation results can be considered good, except for the

deviation in the switching ripple amplitude.

113

Figure 6.16 Simulation results – proposed topology compensation: source voltage,

load current, HPF current, compensation current and source current waveforms

0

-3-2-1

123

Sour

ce C

urre

nt,

i s [A

]C

ompe

nsat

ion

Cur

rent

,i f [

A]

0

-6-4-2

246

HPF

Cur

rent

,i hp

[A]

0

-1.5-1.0-0.5

0.51.01.5

Sour

ce V

olta

ge,

v s [V

]

0

-300-200-100

100200300

Load

Cur

rent

,i L [

A]

0

-6-4-2

246

Time, t [ms]168 20 24 364 4012 3228

114

Figure 6.17 Experimental results – proposed topology compensation: source

voltage, load current, HPF current, compensation current and source current

waveforms

Time, t [ms]

0

-3-2-1

123

Sour

ce C

urre

nt,

i s [A

]C

ompe

nsat

ion

Cur

rent

,i f [

A]

0

-6-4-2

246

Sour

ce V

olta

ge,

v s [V

]

0

-300-200-100

100200300

HPF

Cur

rent

,i hp

[A]

0

-1.5-1.0-0.5

0.51.01.5

Load

Cur

rent

,i L [

A]

0

-6-4-2

246

168 20 24 320 4012 28 364

115

6.8 Photovoltaic Energy Handling Capability

The harmonic mitigation feature of the proposed topology has been clearly

demonstrated in Section 6.7. This section presents the second feature of the

proposed topology, i.e. the PV energy handling capability. The overall experimental

setup is the same as the one used in Section 6.7. Therefore, the results obtained in

Section 6.7 can be treated as the results for the proposed topology with zero PV

power generation.

Figure 6.18 shows the simulated load current, compensation current and

source current waveforms with 250 W PV power being “injected” into the proposed

hybrid APF system. Compared to Figure 6.16, the amount of source current drawn

from the distribution source is reduced by 1.0 A. This implies that 250 W of PV

power is provided by the PV array. The remaining component of the source current

corresponds to the effect of digitally implemented hysteresis current controller as

previously described.

Figure 6.18 Simulation results – proposed hybrid APF with 250 W PV power

generations: load current, compensation current and source current waveforms

0

-3-2-1

123

Sour

ce C

urre

nt,

i s [A

]

0

-6-4-2

246

Com

pens

atio

n C

urre

nt,

i f [A

]

0

-6-4-2

246

Load

Cur

rent

,i L [

A]

Time, t [ms]168 20 24 364 4012 3228

116

These results demonstrate the PV power handling capability of the proposed

hybrid APF. It is further confirmed by the experimental results shown in Figure 6.19.

Figure 6.19 Experimental results – proposed hybrid APF with 250 W PV power

generations: load current, compensation current and source current waveforms

6.9 Harmonic Distortion Analysis

The total harmonic distortion (THD) is the most common indicator to

determine the quality of AC waveforms. Using the Fast Fourier Transform (FFT),

the harmonic spectrum of the source current under different compensation conditions

are presented. Then, the THD calculation is carried out for both of the simulation

and experimental results.

The spectrum of the source current without compensation is shown in Figure

6.20. From the spectra plot, it can be seen that the source current contains large

amount of harmonic current components of frequencies below 2 kHz. Note that the

values of the fundamental current components are equal in both simulation and

Time, t [ms]

0

-3-2-1

123

Sour

ce C

urre

nt,

i s [A

]

0

-6-4-2

246

Com

pens

atio

n C

urre

nt,

i f [A

]

0

-6-4-2

246

Load

Cur

rent

,i L [

A]

168 20 24 320 4012 28 364

117

experimental results. However, the harmonic components (i.e. 150 Hz, 250 Hz, 350

Hz, …, 2 kHz) of the experimental source current spectrum have bigger amplitude

than those obtained in the simulation. This is probably caused by the deviation of

components’ parameters between the simulation model and the experimental

prototype. However as can be observed, the trend is consistent.

Figure 6.20 Spectrum of load current – without compensation: (a) simulation

result and (b) experimental result

Figure 6.21 shows the spectrum of the source current with ideal

compensation condition. The waveform can be referred to Section 6.5. In

comparison to Figure 6.20, the source current is almost free of harmonics. The

source current is effectively compensated under ideal compensation condition. This

indicates that our proposed compensation scheme works very well without the

influence of external disturbances, such as noise.

Frequency, f [kHz]

0.6

00.20.4

0.81.01.2

2 6 8 124 10

(a)

0

Sour

ce C

urre

nt,

i s [A

]

(b)Frequency, f [kHz]

0.6

00.20.4

0.81.01.2

5.002.50 6.25 7.50 11.251.25 12.503.75 10.008.750

Sour

ce C

urre

nt,

i s [A

]

118

Figure 6.21 Spectrum of source current – with ideal compensation condition:

(a) simulation result and (b) experimental result

The spectrum of the source current with basic shunt APF compensation is

shown in Figure 6.22. The basic shunt APF successfully filters the harmonic current

components caused by the nonlinear load. Although the low frequency harmonic

components (i.e. less than 2 kHz) are filtered significantly, appreciable amount of

switching frequency harmonics still remain in the source current spectrum.

Furthermore, the introduction of blanking time probably causes the occurrence of the

odd multiple low order current harmonics (i.e. 150 Hz, 250 Hz and 350 Hz) in the

source current spectrum [66].

From Figure 6.22(a), the simulated switching frequency harmonics are

located around 7 kHz. However, the switching frequency harmonics obtained from

experiment are located around 3.5 kHz as indicated in Figure 6.22(b). The difference

can be attributed to the increase in hysteresis band size, due to the effect of noise as

explained earlier. The widening of hysteresis band results in lower switching

frequency.

Frequency, f [kHz]

0.6

00.20.4

0.81.01.2

2 6 8 124 10

(a)

0

Sour

ce C

urre

nt,

i s [A

]

(b)Frequency, f [kHz]

0.6

00.20.4

0.81.01.2

5.002.50 6.25 7.50 11.251.25 12.503.75 10.008.750

Sour

ce C

urre

nt,

i s [A

]

119

Figure 6.22 Spectrum of source current – with basic shunt APF compensation:

(a) simulation result and (b) experimental result

Figure 6.23 shows the spectrum of the source current with the proposed

hybrid APF compensation. In comparison to Figure 6.22, the source current

spectrum is almost free of switching frequency harmonic components. This implies

that the proposed hybrid APF compensates the distorted source current and

eliminates the switching frequency harmonics.

From the results shown in Figure 6.23, the source current spectrum still

contains odd multiple low order current harmonics (i.e. 150 Hz, 250 Hz and 350 Hz).

Again, these low order harmonic components are probably due to the effect of the

introduced blanking time.

Frequency, f [kHz]

0.6

00.20.4

0.81.01.2

2 6 8 124 10

(a)

0

Sour

ce C

urre

nt,

i s [A

]

(b)Frequency, f [kHz]

0.6

00.20.4

0.81.01.2

5.002.50 6.25 7.50 11.251.25 12.503.75 10.008.750

Sour

ce C

urre

nt,

i s [A

]

120

Figure 6.23 Spectrum of source current – with proposed topology compensation:

(a) simulation result and (b) experimental result

The THD calculated up to 12.5 kHz (THD12.5 kHz) for the source current

shown in Figure 6.20 to Figure 6.23 are tabulated in Table 6.1. It can be observed

that the THD12.5 kHz obtained from the experiments is in good agreement with the

simulation results. The source current THD12.5 kHz is reduced from 130.2 % to

% 5.36 with basic shunt APF. With the proposed hybrid APF, the source current

THD12.5 kHz is further reduced to 19.6 %. Thus, the harmonic filtering performance

of the proposed topology is superior compared to the basic shunt APF.

Note that the source current THD12.5 kHz is only 1.9 % under ideal

compensation condition, compared to 36.5 % with basic shunt APF and 19.6 % with

proposed hybrid APF. It can be concluded that the proposed compensation scheme

works very well in a “controlled environment”. However, its performance degraded

with noise and limitation in the digital implementation of hysteresis current

controller. In view of this, the compliance of the results obtained to the

recommended harmonics limit imposed by IEEE Standard 519 [33] is not scrutinised

further in this work.

Frequency, f [kHz]

0.6

00.20.4

0.81.01.2

2 6 8 124 10

(a)

0

Sour

ce C

urre

nt,

i s [A

]

(b)Frequency, f [kHz]

0.6

00.20.4

0.81.01.2

5.002.50 6.25 7.50 11.251.25 12.503.75 10.008.750

Sour

ce C

urre

nt,

i s [A

]

121

Table 6.1 : Calculated THD for the source current

Type of Compensation (Simulation result)

THD12.5 kHz [%]

(Experimental result) THD12.5 kHz

[%] Without compensation 106.8 130.2

Ideal compensation 1.8 1.9 Basic shunt APF 40.3 36.5 Proposed scheme 19.5 19.6

6.10 Summary

This chapter presents the results obtained from the simulations and

experiments. Several tests were conducted; their aims being to illustrate the

effectiveness of the proposed hybrid APF in harmonic mitigation. In addition, the

PV energy handling is also demonstrated. The differences between the experimental

results and simulation results are analysed and discussed. Finally, a detailed THD

analysis on source current spectrums is carried out to validate the harmonic filtering

performance of the proposed hybrid APF in comparison to a basic shunt APF.

The experimental results differ somewhat from the simulation. However, the

trends for both are quite agreeable. The discrepancies are probably due to the

following three reasons:

(1) The deviation in switching ripple is due to the effect of noise in the

compensation current reference.

(2) The introduced blanking time causes the occurrence of the odd

multiple low order current harmonics in the source current spectrums.

(3) Limitation in the digital implementation of fixed-band hysteresis

current controller degrades the harmonic filtering performance. The

sampling time (10 µs) for the hysteresis current controller may not be

effective enough to track the fast changing compensation current.

CHAPTER 7

CONCLUSIONS AND RECOMMENDATIONS FOR FUTURE WORK

7.1 Conclusions

This thesis has presented the development of a new variation of a single-

phase hybrid APF topology, connected to a DC source that represents photovoltaic

(PV) array. Firstly, the previous research works and related literatures are reviewed

to give a better understanding of the related research area. This is followed by the

theoretical analysis and design of the proposed hybrid APF. Detailed description of

the proposed hybrid APF is provided to offer an overview of the operation principle

and its overall control system. Emphasis is given to the design of passive HPF and

compensation current reference estimation using extension p-q theorem.

Computer aided simulations are carried out using MATLAB/Simulink

simulation package. A 500 VA laboratory prototype is then constructed and tested to

realise the proposed hybrid APF. Results obtained from both the simulation and

experimental prototype are compared, analysed and verified with the theoretical

analysis. The harmonic filtering performance of the proposed hybrid APF is

validated by a detailed THD analysis. The analysed results conclude that the

proposed hybrid APF improves the harmonic filtering performance of the basic shunt

APF. Furthermore, it is capable in handling the PV energy.

123

This research work has led to two important contributions:

(1) A new variation of a single-phase hybrid APF topology for PV application is

proposed.

– It has been shown that the proposed topology effectively filters

harmonic currents less than 1 kHz and of higher frequencies.

Furthermore, the energy from the PV array is simultaneously supplied

to the load. This system configuration, to the best of the author’s

knowledge has not been proposed elsewhere.

(2) The application of extension p-q theorem is further extended to a single-phase

hybrid APF.

– Although the estimation of compensation current reference based on

extension p-q theorem is not new, this approach has not been

implemented to a single-phase hybrid APF system involving passive

HPF, shunt APF and a PV array. Using the extension p-q theorem,

the resulting equations for the current reference is simple. This will

lead to more efficient implementation in digital controller using DSP.

7.2 Recommendations for Future Work

Three recommendations for future work are described as follows:

(1) Replacement of current controller.

– It has been shown that the harmonic filtering performance of the

proposed hybrid APF is significantly affected by the selection of

current control approach. Although the hysteresis current control

approach is simplest to implement, it has been proven to be the major

cause in the degradation of the harmonic filtering performance.

124

Therefore, improvement in harmonic filtering performance can be

expected by incorporating a suitable current controller, for example:

proportional-integral (PI) controller, deadbeat controller and sliding

mode controller.

(2) Implementation of DC-bus voltage controller.

– Due to time constraint, the DC-bus voltage controller is not

implemented in this work. The proposed hybrid APF is supplied by a

DC source instead of the DC-bus capacitor. However, this approach

may not be valid if the amplitude of the source voltage is increased.

This implies that a DC source with higher output voltage level is

required, making the system unpractical. Therefore, the DC-bus

voltage controller is needed to avoid the use of additional DC source.

(3) Utilisation of maximum power point tracker.

– The energy from the sunlight can be converted to electric energy by

means of a PV array. A maximum power point tracker as reported in

[23] can be used to extract the maximum available PV energy from

the PV array. By the utilisation of maximum power point tracker, a

PV array can be used to replace the DC source in the proposed hybrid

APF.

REFERENCES

1. Akagi, H. New Trends in Active Filters for Power Conditioning. IEEE Trans.

on Industry Applications. 1996. 32(6): 1312-1322.

2. Kazibwe, W. E. and Sendaula, M. H. Electric Power Quality Control

Techniques. New York, USA: Van Nostrand Reinhold. 1993.

3. Ghosh, A. and Ledwich, G. Power Quality Enhancement Using Custom

Power Devices. Massachusetts, USA: Kluwer Academic Publishers. 2002.

4. Dugan, R. C., McGranaghan, M. F., Santoso, S., and Beaty, H. W. Electrical

Power Systems Quality. 2nd. ed. USA: McGraw-Hill. 2002.

5. Gonzalez, D. A. and McCall, J. C. Design of Filters to Reduce Harmonic

Distortion in Industrial Power Systems. IEEE Trans. on Industry Applications.

1987. IA-23: 504-512.

6. Ludbrook, A. Harmonic Filters for Notch Reduction. IEEE Trans. on

Industry Applications. 1988. 24: 947-954.

7. Phipps, J. K. A Transfer Function Approach to Harmonic Filter Design. IEEE

Industry Applications Magazine. 1997. 3(2): 68-82.

8. Das, J. C. Passive Filters – Potentialities and Limitations. IEEE Trans. on

Industry Applications. 2004. 40(1): 232-241.

126

9. Sutanto, D., Bou-rabee, M., Tam, K. S., and Chang, C. S. Harmonic Filters

for Industrial Power Systems. Proceedings of the IEE International

Conference on Advances in Power System Control, Operation and

Management (APSCOM). November 5-8, 1991. Hong Kong: IEE. 1991. 594-

598.

10. El-Habrouk, M., Darwish, M. K., and Mehta, P. Active Power Filters: A

Review. Proc. IEE Electric Power Applications. 2000. 147(5): 403-413.

11. Jou, H. L. and Wu, H. –Y. New Single-Phase Active Power Filter. Proc. IEE

Electric Power Applications. 1994. 141(3): 129-134.

12. Hsu, C. Y. and Wu, H. –Y. A New Single-Phase Active Power Filter with

Reduced Energy-Storage Capacity. Proc. IEE Electric Power Applications.

1996. 143(1): 25-30.

13. Jeong, S. G. and Woo, M. H. DSP-Based Active Power Filter with Predictive

Current Control. IEEE Trans. on Industrial Electronics. 1997. 44(3): 329-336.

14. Buso, S. Malesani, L., Mattavelli, P., and Veronese, R. Design and Fully

Digital Control of Parallel Active Power Filters for Thyristor Rectifiers to

Comply with IEC-1000-3-2 Standards. IEEE Trans. on Industry Applications.

1998. 34(3): 508-517.

15. Jintakosonwit, P., Fujita, H., and Akagi, H. Control and Performance of a

Fully-Digital-Controlled Shunt Active Filter for Installation on Power

Distribution System. IEEE Trans. on Power Electronics. 2002. 17(1): 132-

140.

16. Fukuda, S. and Endoh, T. Control Method for a Combined Active Filter

System Employing a Current Source Converter and a High Pass Filter. IEEE

Trans. on Industry Applications. 1995. 31(3): 590-597.

127

17. Khositkasame, S. and Sangwongwanich, S. Design of Harmonic Current

Detector and Stability Analysis of a Hybrid Parallel Active Filter.

Proceedings of the Power Conversion Conference (PCC). August 3-6, 1997.

Nagaoka, Japan: IEEE. 1997. 181-186.

18. Routimo, M., Salo, M., and Tuusa, H. A Novel Control Method for

Wideband Harmonic Compensation. Proceedings of the IEEE International

Conference on Power Electronics and Drive Systems (PEDS). November 17-

20, 2003. Singapore: IEEE. 2003. 799-804.

19. Hassmann, K. Electric Power Generation. Proc. IEEE. 1993. 81(3): 346-354.

20. Hammons, T. J. et al. Renewable Energy Alternatives for Developed

Countries. IEEE Trans. on Energy Conversion. 2000. 15(4): 481-493.

21. Bull, S. R. Renewable Energy Today and Tomorrow. Proc. IEEE. 2001.

89(8): 1216-1226.

22. Maricar, N. M. et al. Photovoltaic Solar Energy Technology Overview for

Malaysia Scenario. Proceedings of the IEEE National Conference on Power

and Energy Conference (PECon). December 15-16, 2003. Bangi, Malaysia:

IEEE. 2003. 300-305.

23. Kim, S., Yoo, G., and Song, J. A Bifunctional Utility Connected Photovoltaic

System with Power Factor Correction and U.P.S. Facility. Proceedings of the

IEEE Conference on Photovoltaic Specialist. May 13-17, 1996. Washington,

USA: IEEE. 1996. 1363-1368.

24. Komatsu, Y. Application of the Extension pq Theory to a Mains-Coupled

Photovoltaic System. Proceedings of the Power Conversion Conference

(PCC). April 2-5, 2002. Osaka, Japan: IEEE. 2002. 816-821.

128

25. Wu, T. –F., Shen, C. -L., Chang, C. H., and Chiu, J. –Y. 1/spl phi/ 3W Grid-

Connection PV Power Inverter with Partial Active Power Filter. IEEE Trans.

on Aerospace and Electronic Systems. 2003. 39(2): 635-646.

26. Komatsu, Y. and Kawabata, T. Characteristics of Three Phase Active Power

Filter using Extension pq Theory. Proceedings of the IEEE International

Symposium on Industrial Electronics (ISIE). July 7-11, 1997. Guimaraes,

Portugal: IEEE. 1997. 302-307.

27. Dobrucky, B., Kim, H., Racek, V., Roch, M., and Pokorny, M. Single-Phase

Power Active Filter and Compensator using Instantaneous Reactive Power

Method. Proceedings of the Power Conversion Conference (PCC). April 2-5,

2002. Osaka, Japan: IEEE. 2002. 167-171.

28. Grady, W. M. and Santoso, S. Understanding Power System Harmonics.

IEEE Power Engineering Review. 2001. 21(11): 8-11.

29. Stones, J. and Collinson, A. Power Quality. IEE Power Engineering Journal.

2001. 15(2): 58-64.

30. Smith, C. W., Jr. Power Systems and Harmonic Factors. IEEE Potentials.

2001. 20(5): 10-12.

31. Balda, J. C. et al. Effects of Harmonics on Equipment. IEEE Trans. on Power

Delivery. 1993. 8(2): 672-680.

32. Umeh, K. C., Mohamed, A., and Mohamed, R. Comparing the Harmonic

Characteristics of Typical Single-Phase Nonlinear Loads. Proceedings of the

IEEE National Conference on Power and Energy (PECon). December 15-16,

2003. Bangi, Malaysia: IEEE. 2003. 383-387.

33. Institute of Electrical and Electronics Engineers. Recommended Practices and

Requirements for Harmonic Control in Electrical Power Systems. USA, IEEE

Standard 519. 1993.

129

34. Czarnecki, L. S. An Overview of Methods of Harmonic Suppression in

Distribution Systems. Proceedings of the IEEE Power Engineering Society

Summer Meeting. July 16-20, 2000. Washington, USA: IEEE. 2000. 800-805.

35. Singh, B., Al-Haddad, K., and Chandra, A. A Review of Active Filters for

Power Quality Improvement. IEEE Trans. on Industrial Electronics. 1999.

46(5): 960-971.

36. Wu, J. –C. and Jou, H. –L. Simplified Control Method for the Single-Phase

Active Power Filter. Proc. IEE Electric Power Applications. 1996. 143(3):

219-224.

37. Perez, J., Cardenas, V., Pazos, F., and Ramirez, S. Voltage Harmonic

Cancellation in Single-Phase Systems using a Series Active Filter with Low-

Order Controller. Proceedings of the IEEE International Power Electronics

Congress (CIEP). Oct. 20-24, 2002. Guadalajara, Mexico: IEEE. 2002. 270-

274.

38. Bhavaraju, V. B. and Enjeti, P. A Fast Active Power Filter to Correct Line

Voltage Sags. IEEE Trans. on Industrial Electronics. 1994. 41(3): 333-338.

39. Blajszczak, G. Direct Method for Voltage Distortion Compensation in Power

Networks by Series Converter Filter. Proc. IEE Electric Power Applications.

1995. 142(5): 308-312.

40. Rigby, B. S. and Harley, R. G. The Design and Control of an Inverter-Based

Series Compensator for Dynamic Performance. Proceedings of the IEEE

Power Engineering Society Summer Meeting. July 18-22, 1999. Alberta,

Canada: IEEE. 1999. 1146-1151.

41. Li, R., Johns, A. T., Elkateb, M. M., and Robinson, F. V. P. Comparative

Study of Parallel Hybrid Filters in Resonance Damping. Proceedings of the

IEEE International Conference on Electric Power Engineering. Aug. 29-Sept.

2, 1999. Hungary: IEEE. 1999. 230.

130

42. Chen, L. and Jouanne, A. A Comparison and Assessment of Hybrid Filter

Topologies and Control Algorithms. Proceedings of the IEEE Power

Electronics Specialists Conference (PESC). June 17-21, 2001. Vancouver,

Canada: IEEE. 2001. 565-570.

43. Bhattacharya, S. and Divan, D. Design and Implementation of a Hybrid

Series Active Filter System. Proceedings of the IEEE Power Electronics

Specialists Conference (PESC). June 18-22, 1995. Georgia, USA: IEEE.

1995. 189-195.

44. Bhattacharya, S. and Divan, D. Synchronous Frame Based Controller

Implementation for a Hybrid Series Active Filter System. Proceedings of the

IEEE Industry Applications Conference. Oct. 8-12, 1995. Florida, USA:

IEEE. 1995. 2531-2540.

45. Peng, F. Z., Akagi, H., and Nabae, A. A New Approach to Harmonic

Compensation in Power Systems – a Combined System of Shunt Passive and

Series Active Filters. IEEE Trans. on Industry Applications. 1990. 26(6):

983-990.

46. Lai, J. –S. Power Electronics Applications in Renewable Energy Systems.

Proceedings of the IEEE Industrial Electronics Society Annual Conference.

November 2-6, 2003. Virginia, USA: IEEE. 2003. 3025-3026.

47. Martins, D. C., Demonti, R., and Barbi, I. Usage of the Solar Energy from the

Photovoltaic Panels for the Generation of Electrical Energy. Proceedings of

the IEEE International Telecommunications Energy Conference

(INTELEC’99). June 6-9, 1999. Copenhagen, Denmark: IEEE. 1999. 17-3.

48. Dehbone, H., Nayar, Chem, Borle, L., and Malengret, M. A Solar

Photovoltaic In-Line UPS System using Space Vector Modulation Technique.

Proceedings of the IEEE Power Engineering Society Summer Meeting. July

15-19, 2001. Vancouver, Canada: IEEE. 2001. 632-637.

131

49. Herrmann, U., Langer, H. G., and Broeck, H. Low Cost DC to AC Converter

for Photovoltaic Power Conversion in Residential Applications. Proceedings

of the IEEE Power Electronics Specialist Conference (PESC). June 20-24,

1993. Washington, USA: IEEE. 1993. 588-594.

50. Sung, N. G., Lee, J. D., Kim, B. T., Park, M., and Yu, I. K. Novel Concept of

a PV Power Generation System Adding the Function of Shunt Active Filter.

Proceedings of the IEEE Transmission and Distribution Conference. Oct. 6-

10, 2002. Yokohama, Japan: IEEE. 2002. 1658-1663.

51. Chiang, S. J., Chang, K. T., and Yen, C. Y. Residential Photovoltaic Energy

Storage System. IEEE Trans. on Industrial Electronics. 1998. 45(3): 385-394.

52. El-Habrouk, M., Darwish, M. K., and Mehta, P. A Survey of Active Filters

and Reactive Power Compensation Techniques. Proceedings of the IEE

International Conference on Power Electronics and Variable Speed Drives.

Sept. 18-19, 2000. London, UK: IEE. 2000. 7-12.

53. Grady, W. M., Samotyj, M. J., and Noyola, A. H. Survey of Active Power

Line Conditioning Methodologies. IEEE Trans. on Power Delivery. 1990.

5(3): 1536-1542.

54. Norman, M., Ahsanul, A., Senan, M., and Hashim, H. Review of Control

Strategies for Power Quality Conditioners. Proceedings of the IEEE National

Conference on Power and Energy Conference (PECon). Nov. 29-30, 2004.

Kuala Lumpur, Malaysia: IEEE. 2004. 109-115.

55. Chen, D. –H. and Xie, S. –J. Review of Control Strategies Applied to Active

Power Filters. Proceedings of the IEEE International Conference on Electric

Utility Deregulation, Restructuring and Power Technologies (DRPT). April

5-8, 2004. Hong Kong: IEEE. 2004. 666-670.

56. El-Habrouk, M., and Darwish, M. K. Design and Implementation of a

Modified Fourier Analysis Harmonic Current Computation Technique for

132

Power Active Filters using DSPs. Proc. IEE Electric Power Applications.

2001. 148(1): 21-28.

57. Akagi, H., Kanazawa, Y., and Nabae, A. Instantaneous Reactive Power

Compensators Comprising of Switching Devices without Energy Storage

Components. IEEE Trans. on Industry Applications. 1984. 20(3): 625-630.

58. Leow, P. L. and Naziha, A. A. SVM Based Hysteresis Current Controller for

a Three Phase Active Power Filter. Proceedings of the IEEE National

Conference on Power and Energy Conference (PECon). Nov. 29-30, 2004.

Kuala Lumpur, Malaysia: IEEE. 2004. 132-136.

59. Jou, H. –L. Performance Comparison of the Three-Phase Active-Power-Filter

Algorithms. Proc. IEE Generation, Transmission and Distribution. 1995.

142(6): 646-652.

60. Wu, T. –F., Shen, C. –L., Chiu, J. –Y., and Chen, C. –C. An APF with

MAPPT Scheme to Improve Power Quality. Proceedings of the IEEE

International Conference on Electrical and Electronic Technology. August

19-22, 2001. Singapore: IEEE. 2001. 620-626.

61. Chen, C. L., Chen, E. L., and Huang, C. L. An Active Filter for Unbalanced

Three-Phase System using Synchronous Detection Method. Proceedings of

the Power Electronics Specialist Conference (PESC). June 20-25, 1994.

Taipei, Taiwan: IEEE. 1994. 1451-1455.

62. Buso, S., Malesani, L., and Mattavelli, P. Comparison of Current Control

Techniques for Active Filter Applications. IEEE Trans. on Industrial

Electronics. 1998. 45(5): 722-729.

63. Malesani, L., Mattavelli, P., and Buso, S. Dead-Beat Current Control for

Active Filters. Proceedings of the Industrial Electronics Conference (IECON).

Aug. 31-Sept. 4, 1998. Aachen, Germany: IEEE. 1998. 1859-1864.

133

64. Nishida, K., Konishi, Y., and Nakaoka, M. Current Control Implementation

with Deadbeat Algorithm for Three-Phase Current-Source Active Power

Filter. Proc. IEE Electric Power Applications. 2002. 149(4): 275-282.

65. Nishida, K., Rukonuzzman, M., and Nakaoka, M. Advanced Current Control

Implementation with Robust Deadbeat Algorithm for Shunt Single-Phase

Voltage-Source Type Active Power Filter. Proc. IEE Electric Power

Applications. 2004. 151(3): 283-288.

66. Mohan, N., Undeland, T. and Robbins, W. Power Electronics – Converters,

Applications, and Design. 2nd. ed. Canada: John Wiley & Sons, Inc. 1995.

67. Texas Instruments Inc. Introduction to Phase-Locked Loop System Modeling.

Texas (USA): Application note. 2005.

68. Orfanidis, S. J. Introduction to Signal Processing. USA: Prentice-Hall, Inc.

1996.

69. Stout, D. F. Handbook of Operational Amplifier Circuit Design. USA:

McGraw-Hill, Inc. 1976.

70. The Math Works Inc. Simulink – Dynamic System Simulation for MATLAB.

2nd. ed. USA: The Math Works, Inc. 1997.

71. Ferroxcube Corporation. Soft Ferrites and Accessories. (Netherlands): Data

handbook. 2002.

72. Pressman, A. I. Switching and Linear Power Supply, Power Converter

Design. USA: Hayden Book Company, Inc. 1977.

73. Ramli, M. Z. Rekabentuk Penyongsang Frekuensi Tinggi Dwi-Arah untuk

Applikasi Tersambung ke Grid. M.E.E. Thesis. Universiti Teknologi

Malaysia; 2004

134

74. dSPACE GmbH. DS1104 Hardware Installation and Configuration.

Paderborn (Germany): User’s Guide. 2004.

75. dSPACE GmbH. dSPACE Software Installation and Management Guide.

Paderborn (Germany): User’s Guide. 2004.

76. dSPACE GmbH. DS1104 RTLib Reference. Paderborn (Germany): User’s

Guide. 2004.

77. dSPACE GmbH. RTI and RTI-MP Implementation Guide. Paderborn

(Germany): User’s Guide. 2004.

78. dSPACE GmbH. ControlDesk Experimental Guide. Paderborn (Germany):

User’s Guide. 2004.

79. Deitel, H. M. and Deitel, P. J. C: How To Program. 2nd. ed. USA: Prentice-

Hall International, Inc. 1999.

PUBLICATIONS

1. Tan, P. C. and Salam, Z. A New Single-Phase Two-Wire Hybrid Active

Power Filter Using Extension p-q Theorem for Photovoltaic Application.

Proceedings of the National Power and Energy Conference (PECon).

November 29-30, 2004. Malaysia, Kuala Lumpur: IEEE. 2004. 126-131.

2. Tan, P. C., Salam, Z. and Jusoh, A. A Single-Phase Hybrid Active Power

Filter Using Extension p-q Theorem for Photovoltaic Application.

Proceedings of the International Conference on Power Electronics and Drive

Systems (PEDS). November 28 – December 1, 2005. Malaysia, Kuala

Lumpur: IEEE. 2005. 1250-1255.

3. Tan, P. C., Jusoh, A. and Salam, Z. A Single-Phase Hybrid Active Power

Filter Connected to a Photovoltaic Array. Proceedings of the International

Conference on Power Electronics, Machines and Drives (PEMD). April 4-6,

2006. Ireland, Dublin: IEE. 2006. 85-89.

4. Tan, P. C., Jusoh, A. and Salam, Z. Some Design Considerations of a Single-

Phase Hybrid Active Power Filter. Proceedings of the 1st International

National Power and Energy Conference (PECon). November 28-29, 2006.

Malaysia, Putra Jaya: IEEE. 2006. in press.

APPENDIX A

DERIVATION OF MINIMUM INTERFACING INDUCTOR ( min,fL )

In practice, a controllable voltage source ( tv ) is applied to the interfacing

inductor ( fL ) terminal to establish the compensation current ( fi ) as illustrated by

Figure A.1.

Figure A.1 Equivalent circuit of shunt active power filter

Therefore, fi in the interfacing inductor is determined by tv , the source

voltage ( sv ), the interfacing inductor resistor ( fR ) and the interfacing inductor, as

given by

dtdi

LiRvv ffffst ++= (A.1)

vt

ifLf Rf

vs

137

The terminal voltage and the compensation current can be expressed in terms of their

DC and the switching ripple components as

)()( tvVtv swtt +=

)()( tiIti swff += (A.2)

where )(tvsw and )(tisw are the ripple components in tv and fi , respectively. From

(A.1) and (A.2)

dttdiLtiIRvtvV sw

fswffsswt)()]([)( +++=+ (A.3)

where

fft IRV = (A.4)

and

dttdiLtiRvtv sw

fswfssw)()()( ++= (A.5)

We know that the ripple current is high frequency component and primarily

determined by the interfacing inductor ( sL ). Therefore, sv and fR are assumed to

have negligible effects. From (A.5),

dttdiLtv sw

fsw)()( ≅ (A.6)

Figure A.2 shows the voltage ripple )(tvsw and the resulting ripple current )(tisw

using (A.6). Assumed that the voltage ripple )(tvsw is represented by the bipolar

DC-bus voltage ( CfV or CfV− ).

138

Figure A.2 Switching ripple of the compensation current

From these waveforms, the peak-to-peak switching ripple can be calculated

as

f

swsw

Ltv

dttdi )()(=

∫=∆ −2

0, )(1 swT

swf

ppsw dttvL

I

f

swCfppsw L

TVI

2, =∆ −

swf

Cfppsw fL

VI

2, =∆ − (A.7)

From (A.7), the minimum interfacing inductor ( min,fL ) can be derived as

max,,min, )(2 swppsw

Cff fI

VL

⋅∆⋅=

−

(A.8)

where max,swf maximum frequency of switching ripple and ppswI −∆ , is the peak-to-

peak switching ripple of compensation current.

swf

Cfppsw fL

VI

2, =∆ −

CfV

CfV−

swi

0 t

swsw f

T 1=

Driving voltage (vt) Switching ripple

APPENDIX B

DERIVATION OF )(tpL , )(tqL AND )(tqhp BASED ON

EXTENSION P-Q THEOREM

From (3.4), the load current is

∑∞

=

θ+ω=1

, )sin(2)(n

nnLL tnIti (B.1)

From (3.5), the source voltage is

)sin(2)( φ+ω= tVtv ss (B.2)

From (3.6), the HPF current is

)90sin(2)( °+ω= tIti hphp (B.3)

B1. Derivation of )(tpL

The instantaneous active load power can be derived as

)()()( titvtp LsL ⋅=

140

⎥⎦

⎤⎢⎣

⎡θ+ω+θ+ω⋅φ+ω= ∑

∞

=2,11, )sin(2)sin(2)sin(2

nnnLLs tnItItV

∑∞

=

θ+ωφ+ω+θ+ω⋅φ+ω=2

,11, )sin()sin(2)sin()sin(2n

nnLsLs tntIVtItV (B.4)

DC component AC component

Solve for the DC component of (B.4),

)sin()sin(2 11, θ+ωφ+ω ttIV Ls

)]sin()cos()cos()[sin()]sin()cos()cos()[sin(2 111, θω+θω⋅φω+φω= ttttIV Ls

)sin()cos()cos()sin()cos()cos()(sin2 112

1, θφωω+θφω= tttIV Ls

)sin()sin()(cos)cos()sin()cos()sin( 12

1 θφω+θφωω+ ttt

)sin()sin()(cos)cos()cos()(sin2 12

12

1, θφω+θφω= ttIV Ls

)]sin()cos()cos())[sin(cos()sin( 11 θφ+θφωω+ tt

)sin()sin()(cos)cos()cos()(sin2 12

12

1, θφω+θφω= ttIV Ls

)sin()cos()sin( 1θ+φωω+ tt

)sin()sin()(cos2)cos()cos()(sin2 12

12

1, θφω+θφω= ttIV Ls

)sin()cos()sin(2 1θ+φωω+ tt

)sin()cos()sin(2)](sin)()[sincos()cos( 122

11, θ+φωω+ω+ωθφ= ttttIV Ls

)](cos)()[cossin()sin( 221 tt ω+ωθφ+

141

)sin()cos()sin(2)](sin)(cos1)[cos()cos( 122

11, θ+φωω+ω+ω−θφ= ttttIV Ls

)](cos)(sin1)[sin()sin( 221 tt ω+ω−θφ+

))](sin)((cos1)[cos()cos( 2211, ttIV Ls ω−ω−θφ=

)sin()cos()sin(2 1θ+φωω+ tt ))](sin)((cos1)[sin()sin( 221 tt ω−ω+θφ+

)]sin()2sin()2cos(1)[cos()cos( 111, θ+φω+ω−θφ= ttIV Ls

)]2cos(1)[sin()sin( 1 tω+θφ+

)cos()cos()2cos()cos()cos( 111, θφω−θφ= tIV Ls

)]sin()cos()cos())[sin(2sin( 11 θφ+θφω+ t

)sin()sin()2cos()sin()sin( 11 θφω+θφ+ t

)cos()cos()2cos()sin()sin()cos()cos( 1111, θφω−θφ+θφ= tIV Ls

)sin()cos()2sin()cos()sin()2cos( 11 θφω+θφω+ tt

)sin()cos()2sin( 1θφω+ t

)cos()cos()2[cos()sin()sin()cos()cos( 1111, θφω−θφ+θφ= tIV Ls

)sin()cos()2sin()cos()sin()2cos( 11 θφω−θφω− tt

)]sin()cos()2sin( 1θφω− t

))sin()sin()cos())(cos(2[cos()cos( 1111, θφ−θφω−θ−φ= tIV Ls

))sin()cos()cos())(sin(2sin( 11 θφ+θφω− t

)]sin()2sin()cos()2[cos()cos( 1111, θ+φω−θ+φω−θ−φ= ttIV Ls

)2cos()cos( 111, θ+φ+ω−θ−φ= tIV Ls (B.5)

142

Therefore, the instantaneous active load power can be written as

)(tpL )2cos()cos( 11,11, θ+φ+ω−θ−φ= tIVIV LsLs

∑∞

=

θ+ωφ+ω+2

, )sin()sin(2n

nnLs tntIV

LL pp ~+= (B.6)

where

Lp )2cos()cos( 11,11, θ+φ+ω−θ−φ= tIVIV LsLs (B.7)

and

Lp~ ∑∞

=

θ+ωφ+ω=2

, )sin()sin(2n

nnLs tntIV (B.8)

Notation Lp represents the DC component and Lp~ denotes the AC component of

instantaneous active load power.

B2. Derivation of )(tqL

The instantaneous reactive load power can be obtained by multiplying the load

current with a 90°-shifted source voltage ( )(' tvs ) as follows:

)()()( ' titvtq LsL ⋅=

⎥⎦

⎤⎢⎣

⎡θ+ω+θ+ω⋅−φ+ω= ∑

∞

=2,11, )sin(2)sin(2)90sin(2

nnnLLs tnItItV o

143

⎥⎦

⎤⎢⎣

⎡θ+ω+θ+ω⋅φ+ω−= ∑

∞

=2,11, )sin(2)sin(2)cos(2

nnnLLs tnItItV

∑∞

=

θ+ωφ+ω+θ+ω⋅φ+ω−=2

,11, )sin()sin(2)sin()cos(2n

nnLsLs tntIVtItV (B.9)

DC component AC component

Solve for the DC component of (B.9),

)sin()cos(2 11, θ+ωφ+ω− ttIV Ls

)]sin()cos()cos()[sin()]sin()sin()cos()[cos(2 111, θω+θω⋅φω−φω−= ttttIV Ls

)sin()cos()(cos)cos()cos()cos()sin(2 12

11, θφω+θφωω−= tttIV Ls

)sin()sin()(sin)cos()sin()cos()sin( 12

1 θφω−θφωω− ttt

)sin()sin()(sin)cos()cos()(cos2 12

12

1, θφω−θφω−= ttIV Ls

)]sin()sin()cos())[cos(cos()sin( 11 θφ−θφωω+ tt

)sin()sin()(sin)cos()cos()(cos2 12

12

1, θφω−θφω−= ttIV Ls

)cos()cos()sin( 1θ+φωω+ tt

)cos()sin()(sin2)sin()cos()(cos2 12

12

1, θφω+θφω−= ttIV Ls

)cos()cos()sin(2 1θ+φωω− tt

)cos()cos()sin(2)](cos)()[cossin()cos( 122

11, θ+φωω−ω+ωθφ−= ttttIV Ls

)](sin)()[sincos()sin( 221 tt ω+ωθφ+

144

)](sin)(cos1)[sin()cos( 2211, ttIV Ls ω−ω+θφ−=

)](cos)(sin1)[cos()sin()cos()cos()sin(2 2211 tttt ω−ω+θφ+θ+φωω−

)]cos()cos()sin(2)]2cos(1)[sin()cos( 111, θ+φωω−ω+θφ−= tttIV Ls

)]2cos(1)[cos()sin( 1 tω−θφ+

)cos()sin()2cos()sin()cos()2cos()sin()cos( 1111, θφω−θφω−θφ−= ttIV Ls

)cos()sin()cos()cos()sin(2 11 θφ+θ+φωω− tt

)sin()cos()cos()sin( 111, θφ−θφ= Ls IV

)cos()2sin()]sin()cos()cos())[sin(2cos( 111 θ+φω−θφ+θφω− tt

)cos()2sin()sin()2cos()sin( 1111, θ+φω−θ−φω−θ−φ= ttIV Ls

)]sin()2cos()cos()2[sin()sin( 1111, θ−φω+θ+φω−θ−φ= ttIV Ls

)2sin()sin( 111, θ+φ+ω−θ−φ= tIV Ls (B.10)

Therefore, the instantaneous reactive load power can be written as

)(tqL )2sin()sin( 11,11, θ+φ+ω−θ−φ= tIVIV LsLs

∑∞

=

θ+ωφ+ω−2

, )sin()sin(2n

nnLs tntIV

LL qq ~+= (B.11)

where

Lq )2sin()sin( 11,11, θ+φ+ω−θ−φ= tIVIV LsLs (B.12)

145

and

Lq~ ∑∞

=

θ+ωφ+ω−=2

, )sin()sin(2n

nnLs tntIV (B.13)

Notation Lq represents the DC component and Lq~ denotes the AC component of

instantaneous reactive load power.

B3. Derivation of )(tqhp

The instantaneous reactive HPF power can be obtained by multiplying the HPF

current with a 90°-shifted source voltage ( )(' tvs ) as follows:

)()()( ' titvtq hpshp ⋅=

[ ])90sin(2)90sin(2 °+ω⋅−φ+ω= tItV hpso

[ ])90sin(2)cos(2 °+ω⋅φ+ω−= tItV hps

)90sin()cos(2 o+ω⋅φ+ω−= tItV hps (B.14)

DC component

It can be observed that the DC component of (B.14) is similar to the DC

component of (B.9). Therefore, the derivation of (B.10) is applicable for (B.14) by

simply replace the 1θ in (B.10) with 90°. Solve for the DC component of (B.14),

146

)90sin()cos(2 o+ωφ+ω− ttIV hps

)2sin()sin( 11 θ+φ+ω−θ−φ= tIV hps

)902sin()90sin( oo +φ+ω−−φ= tIV hps

)2cos()cos( φ+ω−φ−= tIV hps (B.15)

Therefore, the instantaneous reactive HPF power can be written as

)(tqhp )2cos()cos( φ+ω−φ−= tIV hps

hphp qq ~+= (B.16)

where

hpq )2cos()cos( φ+ω−φ−= tIV hps (B.17)

and

hpq~ = 0 (B.18)

Notation hpq represents the DC component and hpq~ denotes the AC component of

instantaneous reactive HPF power.

APPENDIX C

PROPORTIONAL CONSTANT (KP) CALCULATION USING

ENERGY-BALANCE PRINCIPLE

The proportional constant ( pK ) calculation using the energy-balance

principle is proposed by Hsu, C. Y. [12]. In this work, the energy-balance principle

is adopted for pK calculation. After pK is calculated, the integration constant ( IK )

can be determined using empirical method. The pK calculation based energy-

balance principle for the proposed hybrid APF is described as in the following.

If the reference voltage across the DC-bus capacitor is refCfV , , then the reference

energy in the capacitor will be

2,, 2

1refCffrefCf VCE = (C.1)

while the instantaneous energy in the capacitor is

)(21)( 2 tvCtE CffCf = (C.2)

Therefore, the energy loss of the capacitor in one cycle is

)()( , tEEtE CfrefCfCf −=∆

148

)(2

22, tvV

CCfrefCf

f −=

)()(2 ,, tvVtvV

CCfrefCfCfrefCf

f −+= (C.3)

Assume that the variation in DC-bus voltage within one cycle is moderate, the term

)( , tvV CfrefCf + can be approximated as

refCfCfrefCf VtvV ,, 2)( ≈+ (C.4)

)()( ,, tvVVCtE CfrefCfrefCffCf −=∆ (C.5)

Since this energy loss must be supplied by the distribution source, the peak value of

the DC-bus capacitor charging current ( CfI ) can be estimated as follows:

Cf

T

Cfs EdttItV ∆=ωω∫0

)sin()sin(2 (C.6)

Therefore

Cfs

Cf EVT

I ∆=22 (C.7)

Substituting (C.5) into (C.7) gives

)(22

,, tvVVCVT

I CfrefCfrefCffs

Cf −=

)(2

2,

, tvVVT

VCCfrefCf

s

refCff −=

149

)( , tvVK CfrefCfp −= (C.8)

where the proportional constant ( pK ) is given by

s

refCffp VT

VCK

2

2 ,= (C.9)

APPENDIX D

COEFFICIENTS ( 1C AND 0C ) DERIVATION FOR THE DIGITAL

PHASE-LOCK LOOP

From (3.16), the loop filter transfer function is

11)(1

−−

=z

azzH (D.1)

From (3.17), the DCO transfer function is

1)(2

−=

zczzH (D.2)

The derivation of digital PLL closed-loop transfer function is given by

1

1

)(2)(11)(2)(1)( −

−

⋅⋅+⋅⋅

=zzHzH

zzHzHzH

1

1

1111

111

−

−

−⋅

−−

+

⋅−

⋅−−

=z

zcz

zaz

zzcz

zaz

)()12( 2 caczzzcacz

−++−−

=

151

)1()2(2 czaczcacz

−+−+−

= (D.3)

Based on the closed-loop transfer function in (D.3), one can easily tell that is

a second-order system. In control system theory, the transfer function of the second-

order system can often be written in a general format as

))(()()(

01 zzzzzNzH−−

= (D.4)

where 0z and 1z are two poles of the system in z-domain.

Based on transfer function in (D.4), a characteristic equation of a discrete

time system is defined as

01012

01 )())(()( zzzzzzzzzzz ++−=−−=∆ (D.5)

Defining 1C and 0C to be coefficients of the characteristics equation in (D.5)

)( 011 zzC +−=

010 zzC = (D.6)

Then, the characteristic equation can be re-written in a simplified format as

012)( CzCzz ++=∆ (D.7)

Normally the output responses of a discrete-time control system are also

functions of continuous-time variable t. Therefore, the goal is to map the z-domain

second-order system model in (D.3) to meet the performance requirements specified

by damping ratio ( ζ ) and undamped frequency ( nω ) in corresponding s-domain

second-order model given by

152

22

2

2)(

nn

n

sssH

ω+ζω+ω

= (D.8)

By solving the roots of the characteristics equation in (D.8), two poles ( 0s and 1s ) of

the system can be derived as

ω+σ−=ζ−ω+ζω−= jjs nn2

0 1

ω−σ−=ζ−ω−ζω−= jjs nn2

1 1 (D.9)

where σ is defined as the damping factor and ω is defined as damped frequency.

By definition of discrete-time transformation [68], two poles of this system in

z-domain can be mapped from the poles in s-domain in the following way

)1(0

20 ζ−ω+ζω−== snsns TjTTs eez

)1(1

21 ζ−ω−ζω−== snsns TjTTs eez (D.10)

where sT is the sampling period of the discrete system. Substitutes 0z and 1z in

(D.10) into (D.6), coefficients 0C and 1C of the characteristic equation (D.7) can be

derived in a format that is described by parameter ζ and nω as

snTeC ζω−= 2

0

)1cos(2 21 ζ−ω−= ζω−

snT TeC sn (D.11)

Now, a characteristic equation coefficients ( 0C and 1C ) are derived by mapping the

poles in a continuous-time domain system.

APPENDIX E

)(sZhp AND )(sH cds DERIVATION FOR THE PASSIVE HIGH-PASS

FILTER

E.1 Derivation of HPF Impedance Transfer Function ( )(sZhp )

Figure E.1 shows the layout of the second-order damped series resonant type

high-pass filter (HPF). It consists of a capacitor ( hpC ), an inductor ( hpL ) and an

inductor bypass resistor ( hpR ).

Figure E.1 Layout of the second-order damped series resonant type HPF

Using a little algebra, the HPF impedance transfer function in (3.27) can be derived

as following:

)//(1)( hphphp

hp RsLsC

sZ +=

sLhpRhp

sChp

1

Zhp

154

⎟⎟⎠

⎞⎜⎜⎝

⎛

+

⋅+=

hphp

hphp

hp RsLRsL

sC1

hphp

hphp

hp RsLRsL

sC ++=

1

)()( 2

hphphp

hphphphphp

RsLsCRLCsRsL

+

++=

)1(

2

+

++=

hp

hphphp

hphphphphp

LR

sRsC

RsLRLCs

⎟⎟⎟⎟

⎠

⎞

⎜⎜⎜⎜

⎝

⎛

+

⎟⎟⎟⎟

⎠

⎞

⎜⎜⎜⎜

⎝

⎛

++⎟⎟⎟⎟

⎠

⎞

⎜⎜⎜⎜

⎝

⎛

=

1

11

2

hp

hphphp

hp

hp

hphp

hp

LR

sRsC

LR

s

LC

sR

⎥⎥⎥⎥⎥

⎦

⎤

⎢⎢⎢⎢⎢

⎣

⎡

+⎟⎟⎟⎟

⎠

⎞

⎜⎜⎜⎜

⎝

⎛

+⎟⎟⎟⎟

⎠

⎞

⎜⎜⎜⎜

⎝

⎛

⋅

⎟⎟⎟⎟

⎠

⎞

⎜⎜⎜⎜

⎝

⎛

+

= 11

11

1

12

hphphp

hphphphp

hp

hp

hp

LC

s

LC

RLC

s

LR

ss

C

⎥⎥⎦

⎤

⎢⎢⎣

⎡+⎟⎟

⎠

⎞⎜⎜⎝

⎛ω

+⎟⎟⎠

⎞⎜⎜⎝

⎛ω

⋅

⎟⎟⎠

⎞⎜⎜⎝

⎛+

ω

= 11

1 0

2

0

sQ

s

ss

A

p

(E.1)

155

where

hpCA 1=

hphpCL1

0 =ω

hp

hpp L

R=ω

hp

hphp L

CRQ = (E.2)

In (E.1), A is the gain coefficient, 0ω is the series resonant frequency, pω is the

pole frequency and Q is the quality factor.

E.2 Derivation of Source Current to Injected Current Transfer Function

( )(sH cds )

From (3.29), the source current to injected current transfer function is

)()(

)( ,

sisi

sHh

hscds =

)()()(

sZsZsZ

shp

hp

+= (E.3)

In (E.3), the HPF impedance transfer function ( )(sZ hp ) and source impedance

transfer function ( )(sZ s ) are given by

156

⎥⎥⎦

⎤

⎢⎢⎣

⎡+⎟⎟

⎠

⎞⎜⎜⎝

⎛ω

+⎟⎟⎠

⎞⎜⎜⎝

⎛ω

⋅

⎟⎟⎠

⎞⎜⎜⎝

⎛+

ω

= 11

1

)(0

2

0

sQ

s

ss

AsZ

p

hp

ss sLsZ =)( (E.4)

Substituting (E.4) into (E.3),

shphphphp

hphphphphp

hphphphp

hphphphphp

cds

sLRsCLCs

RsLRLCs

RsCLCsRsLRLCs

sH

+⎟⎟⎠

⎞⎜⎜⎝

⎛

+

++

⎟⎟⎠

⎞⎜⎜⎝

⎛

+

++

=

2

2

2

2

)(

⎟⎟⎠

⎞⎜⎜⎝

⎛

+

++++

⎟⎟⎠

⎞⎜⎜⎝

⎛

+

++

=

hphphphp

hphphphpshphphphphp

hphphphp

hphphphphp

RsCLCsRsCLCssLRsLRLCs

RsCLCsRsLRLCs

2

22

2

2

)()(

⎟⎟⎠

⎞⎜⎜⎝

⎛

+

++++

⎟⎟⎠

⎞⎜⎜⎝

⎛

+

++

=

hphphphp

hphpshphpshphphphphp

hphphphp

hphphphphp

RsCLCsRCLsLCLsRsLRLCs

RsCLCsRsLRLCs

2

232

2

2

)()(

))(23

2

hphphpshphphphps

hphphphphp

RsLLLRCsLCLsRsLRLCs

++++

++=

⎟⎟⎠

⎞⎜⎜⎝

⎛++++

++=

1)(23

2

hp

hphpshp

hp

hphpshp

hphphphphp

RL

sLLCsR

LCLsR

RsLRLCs

157

⎟⎟⎟⎟

⎠

⎞

⎜⎜⎜⎜

⎝

⎛

++⎟⎟⎟⎟

⎠

⎞

⎜⎜⎜⎜

⎝

⎛

+

+

+⎟⎟⎟⎟

⎠

⎞

⎜⎜⎜⎜

⎝

⎛

+⎟⎟⎟⎟

⎠

⎞

⎜⎜⎜⎜

⎝

⎛

=

1

)(1

11

11

2

3

2

hp

hp

hpshphp

hphps

hphphp

hphphphp

LR

s

LLC

sR

LCLs

LC

s

LC

RLC

s

⎟⎟

⎠

⎞

⎜⎜

⎝

⎛+

ω+⎟⎟

⎠

⎞⎜⎜⎝

⎛ω

+

+⎟⎟⎠

⎞⎜⎜⎝

⎛ω

+⎟⎟⎠

⎞⎜⎜⎝

⎛ω

=

1

11

2

1

3

0

2

0

php

hphps ssR

LCLs

sQ

s

(E.5)

In (E.5),

hphpCL1

0 =ω

)(1

1hpshp LLC +

=ω

hp

hpp L

R=ω

hp

hphp L

CRQ = (E.6)

where 0ω is the series resonant frequency, 1ω is the parallel resonant frequency, pω

is the pole frequency and Q is the quality factor.

APPENDIX F

AC SMOOTHING INDUCTOR (Lsmooth), INTERFACING INDUCTOR (Lf)

AND HPF INDUCTOR (Lhp) DESIGN

Inductor is an indispensable part of most power electronic converters.

However, they are not commercially available in a wide range of properties but are

usually designed and constructed for the particular application. In this situation, the

design procedures for the inductors [72] used in this work are presented as a general

design guideline. A more complete appreciation of their capabilities and limitations

can only be gained through experience and experimentation.

F.1 General Design Procedure for Inductor

Step 1 Assemble design variables

The design variables consist of the following parameters:

(1) Inductance value, L (H)

(2) Rated DC current, IDC (A)

(3) Rated rms current, Irms (A)

(4) Operating frequency, f (Hz)

These values are found via the design calculations for the specific power electronic

converter circuit in which the inductor is to be used.

159

Step 2 Specification of winding parameters

In this work, the conductor windings of inductor is made from copper

because of it high conductivity. Round wire or Litz wire can be chosen as the type of

winding conductor. Selection of the conductor type will depend on the operating

frequency and the important of eddy current loss in the winding. After the conductor

type is selected, the allowable current density can now be estimated (e.g. 300 circular

mils/A). The wire area is chosen on the basic of a safe current density. The total

circular mil area of the wire (A) is then calculated as

)300(rmsIA = circular mils (F.1)

From the wire table in Figure F.1, the wire having the closest circular mil area to the

calculated value will be selected. And from the wire table, the diameter of the

selected wire is D. The wire area per turn (At) can then be calculated by assuming

wire area per turn is 2D rather than 42Dπ .

Step 3 Choose core material, shape and size

The core material, shape and size are chosen next. The choice of material

will be influenced by the operating frequency. Variety of core material like magnetic

steels, powdered iron cores, amorphous metallic glasses and ferrite cores can be

considered. In this work, the ferrite material 3C90 manufactured by Ferroxcube is

chosen as the core material because it is able to operate at frequency as high as 200

kHz. The choice of core shape, that is E-core, U-core, toroid and so forth, will

depend on cost, availability, and ease of making the windings on the chosen core

shape. The selected core shape is the E-E core type which is suitable for high power

application and easy coil winding.

The core size is related to the product of the core winding area (Ac) and the

effective area (Ae) of its magnetic path. For any inductor, the voltage across it may

be defined either in terms of the rate of change of current in it or the rate of change of

flux in its core. Or

160

810)()( −φ== dtdNdtdiLE (F.2)

from which

88 10)(10)( −− =φ= didBNAdtdNL e (F.3)

where E is in volts, L is in henrys for N in turns, Ae in square centimetres, dB in gauss,

and di in amperes. Now, dB = Bmax for di = Imax. Then

max

8max 10)(

NBLIAe

+

= (F.4)

But the core winding area (Ae) must be chosen to accommodate the required number

of turns at the specified safe-current density and the fraction of the total core winding

area usable. Thus, assume only 75% of the core winding area Ac is usable and

assume N turns of wire, whose area per turns is At. Then

ct ANA 75.0=

or

75.0t

cNAA = (F.5)

with Ac and At in square centimetres. Multiplying (F.4) and (F.5)

)75.0(10)(

max

8max

NBNALI

AA tce

+

=

max

8max 10)(33.1

BALI t

+

= (F.6)

161

In (F.6), as soon as the wire area is specified (on the basic of safe operating

current density), all terms on the right-hand side are specified and the product AeAc is

fixed. A core with the required product is then selected from the vendor’s datasheet.

Once this core is selected, Ae is determined from the datasheet and from (F.4), N is

calculated, since all other parameters in it are already fixed.

Step 4 Specification of the air gap length

The design of a gapped core is to avoid core saturation under conditions of a

DC current. The DC current produces magnetic bias close to the top of the hysteresis

loop and prevents it from being able to sustain a voltage when the AC voltage is in

such a direction as to move it further up the loop toward saturation. This can be

clearly seen in Figure F.2. Before the air gap is introduced, a given DC current, IDC,

forces the operating point in H to

lNIH DCπ

=4.0 (F.7)

where H is in oersteds for N in turns, l (magnetic path length) in centimetres. If this

value of H set operating point at P1, then the quiescent operating point in B is B1.

Any AC voltage applied to the inductor can only produce a B in the positive half

cycle of twice (Bsaturation – B1) before the core saturates. If the voltage

Saturation is avoided by introducing an air gap in series in the magnetic path.

The effect of this is to flatten out the hysteresis loop as shown in Figure F.2. The

same DC current sets the operating point in B, further down from saturation to a

point like P2. Now, in the positive half cycle, the Bsaturation – B2 can be sustained

across the inductor before it saturates.

The fundamental relation in magnetic circuits is Ampere’s law:

NIdlH π=∫ 4.0 (F.8)

162

This states the line integration around a closed loop of length l of the dot product of

the field intensity H and element of length dl is equal to 0.4πNI, where NI is the

ampere turns enclosed by the loop. When an air gap is introduced in the length path,

the field intensity is constant and parallel across the air gap. Thus

NIlHlHdlH aaii π=+=∫ 4.0 (F.9)

where Hi is the core field intensity and Ha is the air gap field intensity. If the air gap

is narrow and there is no bulging of fringing of magnetic flux as it across the air gap,

then the flux density in the core, Bi, is equal to that in air, Ba. Then, Hi = Bi / µi

where µi is the average core permeability and Ha = Ba / µa = Bi, since Ba = Bi and

permeability of air, µa is unity. Then

NIlBlB aiiii π=+µ 4.0

or

aii

i

aiii ll

NIll

NIBµ+µπ

=+µπ

=4.04.0 (F.10)

(F.10) states that for a given NI product, the flux density in the core with an air gap

of length la is smaller than with no air gap in the ratio aii

i

lllµ+

.

In (F.10), the maximum flux density in core, Bi, will occur at maximum I in

the inductor. This maximum I is the maximum at the top of the current ramp. In

(F.9), Bi will be set to prevent the core from rising on the slow knee of its hysteresis

loop at maximum temperature. Thus, as soon as the number of turns N and core

length li are chosen, (F.10) permits selecting air gap length.

163

Figu

re F

.1

Mag

netic

wire

tabl

e (C

ourte

sy B

elde

n C

orp.

)

164

Figure F.2 Typical relationship between magnetic flux density and field strength

F.2 AC Smoothing Inductor (Lsmooth) Design

Step 1 Assemble design variables

The design variables consist of the following parameters:

Inductance value, L = 1.15 mH

Rated DC current, IDC = 0 A

Rated rms current, Irms = 5 A

Operating frequency, f = 100 kHz

Step 2 Specification of winding parameters

The round wire made from copper is chosen as the winding conductor. The

wire area is chosen on the basic of a safe current density. As a first guess, a current

density of 300 circular mils/A is chosen. The total circular mil area of the wire (A) is

then calculated as

)300(rmsIA =

B (Flux density)

H (Field strength)

B

Hysteresis loop ofgapless core

Flattened hysteresisloop of gapped core

P1

P2

B1

B2

Bsaturation

-BsaturationBias in oersteds

165

1500)300(5 == circular mils (F.11)

From the wire table in Figure F.1, the wire having the closest circular mil area to this

is No. 18 wire (1620 circular mils). And from the wire table, the diameter of this

wire is 0.043 in/0.11 cm. In this work, the copper wire with diameter (D) of 0.125

cm is selected due to the availability. Assuming wire area per turn is 2D rather than

42Dπ , the wire area per turn (At) can be calculated as

2DAt =

01563.0)125.0( 2 == cm2 (F.12)

Step 3 Choose core material, shape and size

The selected core material and shape are as following:

Core material : 3C90 (ferrite)

Core shape : E-E core

In (F.6), take 3000max =B G, which is safely below saturation for ferrite

material 3C90 ( 3400=saturationB G). The required ce AA product for the core is

)75.0(10)(33.1

max

8max

BALIAA t

ce

+

=

3000

10)01563.0)(520)(1015.1(33.1 83 +− ⋅+×=

633.5= cm4 (F.13)

Looking through a ferrite core vendor’s catalogue [71], a ferrite core Ferroxcube type

ETD59 is found to have the required ce AA product. Its eA is quoted as 3.68 cm2; its

166

cA is 3.66 cm2. This gives an ce AA product of 13.4688 cm4, which is big enough for

ease of making the windings.

The number of required turns is calculated from (F.4):

max

8max 10)(

BALIN

e

+

=

646.73)3000)(68.3(

)10)(07.7)(1015.1( 83

=×

=+−

74≅ turns (F.14)

The ETD59 bobbin has cA of 3.66 cm2. The area per turn of wire is then

0495.07466.3 = cm2, and its diameter is 222.00495.0 = cm. This calculated

value of diameter is bigger than the diameter of the selected copper wire ( 125.0=D

cm). The ETD59 bobbin can thus handle the required 74 turns of copper wire with

125.0=D cm at the specified current density of 300 circular mils/A.

Step 4 Specification of the air gap length

Now, the air gap length ( al ) must be specified from (F.10). In that equation,

iµ is the permeability of the core material. The chosen Ferroxcube 3C90 material

has a iµ of 2300 [71]. Then for a maxB of 3000 G, 707.0max =I A, and 74=N

turns, from (F.10),

i

iaii B

NIll µπ=µ+

4.0

)3000()2300)(07.7)(74(4.0 π

= 043.504= cm (F.15)

167

Since the ETD59 bobbin has a mean path length il of 13.9 cm, from (F.15),

043.504=µ+ aii ll

Thus,

2131.02300

9.13043.504=

−=al cm (F.16)

The ferrite core comes in two halves. Thus, if a spacer is located between the two

halves, the air gap is actually twice the spacer thickness. Since this spacer is in series

with four “legs” of the ferrite core, the spacer thickness must then be

05328.042131.0 = cm. This completes the design of the AC smoothing inductor.

F.3 Interfacing Inductor (Lf) Design

The interfacing inductor (Lf) consists of four inductors connected in series,

2.5 mH each, to give a total inductance of 10 mH. The reason for not using one 10

mH inductor as in the simulation is because there is no suitable bobbin and ferrite

core available that meet the targeted design specifications. This section will describe

the design of the 2.5 mH inductor.

The design variables consist of the following parameters:

Inductance value, L = 2.5 mH

Rated DC current, IDC = 0 A

Rated rms current, Irms = 5 A

Operating frequency, f = 100 kHz

The design parameters of the 2.5 mH inductor can be readily calculated following the

calculation example given by (F.11) – (F.16). Table F.1 shows the specification of

the 2.5 mH inductor.

168

Table F.1 : 2.5 mH inductor specification

Core

material

Core

type

Number

of turns

N

(turns)

Saturation flux

density

Bsat

(G at 100 ˚C)

Wire

type

Air gap

length

la

(cm)

Inductance

L

(mH)

3C90 ETD59 160 3400 No. 18 0.468 2.5

F.4 High-Pass Filter Inductor (Lhp) Design

The HPF inductor ( hpL ) consists of a 1.76 mH inductor. This section will

describe the design of Lhp.

The design variables consist of the following parameters:

Inductance value, L = 1.76 mH

Rated DC current, IDC = 0 A

Rated rms current, Irms = 5 A

Operating frequency, f = 100 kHz

The design parameters of hpL can be readily calculated following the calculation

example given by (F.11) – (F.16). Table F.2 shows the specification of hpL .

Table F.2 : hpL specification

Core

material

Core

type

Number

of turns

N

(turns)

Saturation flux

density

Bsat

(G at 100 ˚C)

Wire

type

Air gap

length

la

(cm)

Inductance

L

(mH)

3C90 ETD59 113 3400 No. 18 0.329 1.76

APPENDIX G

SCHEMATIC OF IGBT GATE DRIVER CIRCUIT

G.1 Opto-Coupler Circuit

Figure G.1 Schematic of opto-couple

G.2 Gate Logic and Blanking Time Circuit

Figure G.2 Schematic of gate logic and blanking time

R15

10RUpper Leg

R14270R

R13270R

VCC3

OUT1

C140.1uF

Lower leg

VCC

C150.1uF

OUT2

Jout

CON4

1234

U10

HCPL 3150

1234 5

678

N/CANODKOTODN/C VEE

VoVo

VCC

VEE2

VCC

U9

HCPL 3150

1234 5

678

N/CANODKOTODN/C VEE

VoVo

VCC

VEE3

R16

10R

VCC2

JP2

4 Header 1234

Upper Leg

R10

270R

R8

10k

D9

D1N4148

U7B

74ACT08

4

56

R9

20k

VCC

R7

10k

U7A

74ACT08

1

23

C10

0.01uF

U8A

74ACT14

1 2

input1

R12

270R

U8B

74ACT14

3 4

U8E

74ACT14

11 10

JP1

2 Header12

en1

R610K

C130.001uF

R510K

C11

0.01uFC12

0.001uF

VCC

Vin+12V

Lower leg

D10

D1N4148

R11

20k

170

G.3 Isolated Push-Pull DC-DC Power Supply Circuit

Figu

re G

.3

Isol

ated

pus

h-pu

ll D

C-D

C p

ower

supp

ly

APPENDIX H

PROGRAM LISTING FOR THE DS1104 DSP CONTROLLER BOARD

H.1 DS1104 Source Code Listing

/************************************************************************** TITLE : SINGLE-PHASE HYBRID ACTIVE POWER FILTER Writer : Tan Perng Cheng Power Electronics and Drives Group, Faculty of Electrical Engineering, Universiti Teknologi Malaysia, Malaysia. Date of Creation : 1st. August 2004 Last Update : 1st. November 2005 DESCRIPTION : This program generates the gating signals to the single-phase hybrid APF to compensate the reactive and harmonic currents generated by a nonlinear load. In addition, a DC source power handling function is added in this program to illustrate the DC source power handling capability of the proposed scheme. This program is dedicated to run on DS1104 DSP controller board. **************************************************************************/ /************************************************************************** Include Files - Brtenv.h is the header file for DS1104 **************************************************************************/ #include <Brtenv.h> /* DS1104 header file */ #include <stdlib.h> /* declares calloc */ #include <io1104.h> /* I/O header file */ #include <stdio.h> #include <math.h>

172

/************************************************************************** Timer 0 and Timer 1 Period Setting **************************************************************************/ #define ST0 10.0e-6 /* Timer 0 = 10e-6 s */ #define ST1 100.0e-6 /* Timer 1 = 100e-6 s */ /************************************************************************** Variables for ControlDesk's Instruments **************************************************************************/ Float64 exec_time0, exec_time1; /* Execution time */ Float64 pi = 3.14159265358979; /* Define value of pi */ int n1, n2; /* Counter */ UInt32 mask_set = 0; volatile int iselect = 0; Float64 iref_out; /* DAC output signal select */ /* System Fault Protection */ int enable1 = 1; /* Overrun & DSP error */ volatile int enable2 = 0; /* User control */ int enable3 = 0; /* Main fault detection */ int enable4 = 0; /* DC-bus capacitor voltage fault */ /* ADC Input Signals */ Float64 vsource_adc1; /* ADC Ch.5: source voltage */ Float64 iload_adc1; /* ADC Ch.7: load current */ Float64 ihpf_adc1; /* ADC Ch.6: HPF current */ Float64 vcap_adc; /* ADC Ch.2: DC-bus voltage */ Float64 icomp_adc; /* ADC Ch.8: Actual comp. current */ /* Conditioned ADC Input Signals */ Float64 vsource_adc; /* Conditioned ADC Ch.5 */ Float64 iload_adc; /* Conditioned ADC Ch.7 */ Float64 ihpf_adc; /* Conditioned ADC Ch.6 */ /* DC Source Current */ Float64 ipv_ref = 0.000; volatile Float64 ipv = 0.000; /* Hysteresis Current Controller */ Float64 i_hysteresis; /* Compensation Current References */ Float64 ip_load; Float64 iq_load; Float64 ihpw_load; Float64 iq_hpf; Float64 ic_load; Float64 is_compensated; Float64 ic_ref; Float64 ic_ref1; Float64 ic_ref2;

173

Float64 sine_ref_syn; Float64 sine_ref_90deg; /************************************************************************** Parameters of routine compensating_current_ref() **************************************************************************/ /*------------------------------------------------------------------------- Parameters for subroutine delay8() -------------------------------------------------------------------------*/ Float64 *w8; int D8 = 50; /*------------------------------------------------------------------------- Parameters of subroutine delay9() -------------------------------------------------------------------------*/ Float64 *w9; int D9 = 43; /*------------------------------------------------------------------------- Parameters of subroutine delay10() -------------------------------------------------------------------------*/ Float64 *w10; int D10 = 99; /************************************************************************** Parameters of routine extension_pq_theorem() **************************************************************************/ Float64 vsource_adc_90deg; Float64 Pload; Float64 Pload_dc; Float64 Qload; Float64 Qload_dc; Float64 Qhpf; Float64 Qhpf_dc; /*------------------------------------------------------------------------- Parameters of subroutine delay4() -------------------------------------------------------------------------*/ Float64 *w4; int D4 = 50; /*------------------------------------------------------------------------- Parameters of subroutine fir5() -------------------------------------------------------------------------*/ Float64 *a5, *b5, *w5; int M5,L5;

174

/*------------------------------------------------------------------------- Parameters of subroutine fir6() -------------------------------------------------------------------------*/ Float64 *a6, *b6, *w6; int M6,L6; /*------------------------------------------------------------------------- Parameters of subroutine fir7() -------------------------------------------------------------------------*/ Float64 *a7, *b7, *w7; int M7,L7; /*------------------------------------------------------------------------- Parameters of subroutine fir11() -------------------------------------------------------------------------*/ Float64 *a11, *b11, *w11; int M11,L11; /*------------------------------------------------------------------------- Parameters of subroutine fir12() -------------------------------------------------------------------------*/ Float64 *a12, *b12, *w12; int M12,L12; /*------------------------------------------------------------------------- Parameters of subroutine fir13() -------------------------------------------------------------------------*/ Float64 *a13, *b13, *w13; int M13,L13; /************************************************************************** Parameters of routine phase_lock_loop() **************************************************************************/ Float64 y1_a; Float64 y1_b; Float64 y1_c; Float64 y1_d; Float64 y1_e; Float64 vs_rms; Float64 vs_rms1; Float64 vpll; Float64 sine_ref; /*------------------------------------------------------------------------- Parameters of subroutine integ1() -------------------------------------------------------------------------*/ Float64 *w2, y1_c1, y1_c2;

175

/*------------------------------------------------------------------------- Parameters of subroutine fir1() -------------------------------------------------------------------------*/ Float64 *a1, *b1, *w1; int M1,L1; /*------------------------------------------------------------------------- Parameters of subroutine pll() -------------------------------------------------------------------------*/ Float64 *a3, *b3, *w3; int M3,L3; /************************************************************************** Subroutine listing for routine compensating_current_ref() **************************************************************************/ /*------------------------------------------------------------------------- Subroutine delay8() - 90 degree phase shifting -------------------------------------------------------------------------*/ Float64 delay8(x) Float64 x; int i; Float64 z8; z8 = w8[D8]; w8[0] = x; for (i = D8; i>=1; i--) w8[i] = w8[i-1]; return z8; /*------------------------------------------------------------------------- Subroutine delay9() - source voltage synchronisation -------------------------------------------------------------------------*/ Float64 delay9(x) Float64 x; int i; Float64 z9; z9 = w9[D9]; w9[0] = x;

176

for (i = D9; i>=1; i--) w9[i] = w9[i-1]; return z9; /*------------------------------------------------------------------------- Subroutine delay10() - phase delay compensation -------------------------------------------------------------------------*/ Float64 delay10(x) Float64 x; int i; Float64 z10; z10 = w10[D10]; w10[0] = x; for (i = D10; i>=1; i--) w10[i] = w10[i-1]; return z10; /************************************************************************** Subroutine listing for routine extension_pq_theorem() **************************************************************************/ /*------------------------------------------------------------------------- Subroutine delay4() - delay vsource_adc with 90 degree -------------------------------------------------------------------------*/ Float64 delay4(x) Float64 x; int i; Float64 z; z = w4[D4]; w4[0] = x; for (i = D4; i>=1; i--) w4[i] = w4[i-1];

177

return z; /*------------------------------------------------------------------------- Subroutine fir5() - 2nd-order LPF, fc = 5 Hz, G = 0.5 -------------------------------------------------------------------------*/ Float64 fir5(x) Float64 x; int i, K; Float64 y = 0; M5 = 2; /* M-th degree numerator */ L5 = 2; /* L-th degree numerator */ K = (L5 <= M5) ? M5 : L5; /* K = max(M,L) */ w5[0] = x; /* Current input sample */ a5[0] = 1.0; /* Filter coefficients */ a5[1] = -1.995551847; a5[2] = 0.995561717; b5[0] = 2.467776264e-6; b5[1] = 2 * 2.467776264e-6; b5[2] = 2.467776264e-6; for (i=1; i<=M5; i++) w5[0] -= a5[i] * w5[i]; /* Input adder */ for (i=0; i<=L5; i++) y += b5[i] * w5[i]; /* Output adder */ for (i=K; i>=1; i--) w5[i] = w5[i-1]; /* Reverse-order updating */ return y; /* current output sample */

178

/*------------------------------------------------------------------------- Subroutine fir6() - 2nd-order LPF, fc = 5 Hz, G = 0.5 -------------------------------------------------------------------------*/ Float64 fir6(x) Float64 x; int i, K; Float64 y = 0; M6 = 2; /* M-th degree numerator */ L6 = 2; /* L-th degree numerator */ K = (L6 <= M6) ? M6 : L6; /* K = max(M,L) */ w6[0] = x; /* Current input sample */ a6[0] = 1.0; /* Filter coefficients */ a6[1] = -1.995551847; a6[2] = 0.995561717; b6[0] = 2.467776264e-6; b6[1] = 2 * 2.467776264e-6; b6[2] = 2.467776264e-6; for (i=1; i<=M6; i++) w6[0] -= a6[i] * w6[i]; /* Input adder */ for (i=0; i<=L6; i++) y += b6[i] * w6[i]; /* Output adder */ for (i=K; i>=1; i--) w6[i] = w6[i-1]; /* Reverse-order updating */ return y; /* Current output sample */

179

/*------------------------------------------------------------------------- Subroutine fir7() - 2nd-order LPF, fc = 5 Hz, G = 0.5 -------------------------------------------------------------------------*/ Float64 fir7(x) Float64 x; int i, K; Float64 y = 0; M7 = 2; /* M-th degree numerator */ L7 = 2; /* L-th degree numerator */ K = (L7 <= M7) ? M7 : L7; /* K = max(M,L) */ w7[0] = x; /* Current input sample */ a7[0] = 1.0; /* Filter coefficients */ a7[1] = -1.995551847; a7[2] = 0.995561717; b7[0] = 2.467776264e-6; b7[1] = 2 * 2.467776264e-6; b7[2] = 2.467776264e-6; for (i=1; i<=M7; i++) w7[0] -= a7[i] * w7[i]; /* Input adder */ for (i=0; i<=L7; i++) y += b7[i] * w7[i]; /* Output adder */ for (i=K; i>=1; i--) w7[i] = w7[i-1]; /* Reverse-order updating */ return y; /* Current output sample */

180

/*------------------------------------------------------------------------- Subroutine fir11() - 2nd-order LPF, fc = 2 kHz, G = 0.5 -------------------------------------------------------------------------*/ Float64 fir11(x) Float64 x; int i, K; Float64 y = 0; M11 = 2; /* M-th degree numerator */ L11 = 2; /* L-th degree numerator */ K = (L11 <= M11) ? M11 : L11; /* K = max(M,L) */ w11[0] = x; /* Current input sample */ a11[0] = 1.0; /* Filter coefficients */ a11[1] = -0.368188532; a11[2] = 0.1956396086; b11[0] = 0.2068627691; b11[1] = 2 * 0.2068627691; b11[2] = 0.2068627691; for (i=1; i<=M11; i++) w11[0] -= a11[i] * w11[i]; /* Input adder */ for (i=0; i<=L11; i++) y += b11[i] * w11[i]; /* Output adder */ for (i=K; i>=1; i--) w11[i] = w11[i-1]; /* Reverse-order updating */ return y; /* Current output sample */

181

/*------------------------------------------------------------------------- Subroutine fir12() - 2nd-order LPF, fc = 2 kHz, G = 0.5 -------------------------------------------------------------------------*/ Float64 fir12(x) Float64 x; int i, K; Float64 y = 0; M12 = 2; /* M-th degree numerator */ L12 = 2; /* L-th degree numerator */ K = (L12 <= M12) ? M12 : L12; /* K = max(M,L) */ w12[0] = x; /* Current input sample */ a12[0] = 1.0; /* Filter coefficients */ a12[1] = -0.368188532; a12[2] = 0.1956396086; b12[0] = 0.2068627691; b12[1] = 2 * 0.2068627691; b12[2] = 0.2068627691; for (i=1; i<=M12; i++) w12[0] -= a12[i] * w12[i]; /* Input adder */ for (i=0; i<=L12; i++) y += b12[i] * w12[i]; /* Output adder */ for (i=K; i>=1; i--) w12[i] = w12[i-1]; /* Reverse-order updating */ return y; /* Current output sample */

182

/*------------------------------------------------------------------------- Subroutine fir13() - 2nd-order LPF, fc = 2 kHz, G = 0.5 -------------------------------------------------------------------------*/ Float64 fir13(x) Float64 x; int i, K; Float64 y = 0; M13 = 2; /* M-th degree numerator */ L13 = 2; /* L-th degree numerator */ K = (L13 <= M13) ? M13 : L13; /* K = max(M,L) */ w13[0] = x; /* Current input sample */ a13[0] = 1.0; /* Filter coefficients */ a13[1] = -0.368188532; a13[2] = 0.1956396086; b13[0] = 0.2068627691; b13[1] = 2 * 0.2068627691; b13[2] = 0.2068627691; for (i=1; i<=M13; i++) w13[0] -= a13[i] * w13[i]; /* Input adder */ for (i=0; i<=L13; i++) y += b13[i] * w13[i]; /* Output adder */ for (i=K; i>=1; i--) w13[i] = w13[i-1]; /* Reverse-order updating */ return y; /* Current output sample */ /************************************************************************** Subroutine listing for routine phase_lock_loop() **************************************************************************/ /*------------------------------------------------------------------------- Subroutine reset_integ1() - avoid saturation of integral, integ1() -------------------------------------------------------------------------*/

183

reset_integ1() n2++; if(n2 == 200) w2[0] = 0; /* Reset integ1() */ y1_c1 = y1_c; n2 = 0; else if(n2 == 100) y1_c2 = y1_c; /*------------------------------------------------------------------------- Subroutine integ1() - integrate with Euler -------------------------------------------------------------------------*/ Float64 integ1(x) Float64 x; w2[0] = w2[0] + x * ST1; /* Integrate with Euler */ return w2[0]; /*------------------------------------------------------------------------- Subroutine fir1() - 2nd-order LPF, fc = 100 Hz, G = 0.5 -------------------------------------------------------------------------*/ Float64 fir1(x) Float64 x; int i, K; Float64 y = 0; M1 = 2; /* M-th degree numerator */ L1 = 2; /* L-th degree numerator */ K = (L1 <= M1) ? M1 : L1; /* K = max(M,L) */ w1[0] = x; /* Current input sample */ a1[0] = 1.0; /* Filter coefficient */ a1[1] = -1.91109177; a1[2] = 0.914879321; b1[0] = 9.46887707e-4; /* Filter coefficient */ b1[1] = 2 * 9.46887707e-4; b1[2] = 9.46887707e-4;

184

for (i=1; i<=M1; i++) w1[0] -= a1[i] * w1[i]; /* Input adder */ for (i=0; i<=L1; i++) y += b1[i] * w1[i]; /* Output adder */ for (i=K; i>=1; i--) w1[i] = w1[i-1]; /* Reverse-order updating */ return y; /* Current output sample */ /*------------------------------------------------------------------------- Subroutine pll() - reference sinewave signal generation -------------------------------------------------------------------------*/ Float64 pll(x) Float64 x; int i, K; double y = 0; M3 = 2; /* M-th degree numerator */ L3 = 2; /* L-th degree numerator */ K = (L3 <= M3) ? M3 : L3; /* K = max(M,L) */ w3[0] = x; /* Current input sample */ a3[0] = 1.0; /* Filter coefficient */ a3[1] = -1.822754277; a3[2] = 0.837203188; b3[0] = 0.0; /* Filter coefficient */ b3[1] = 0.177245723; b3[2] = -0.162796812; for (i=1; i<=M3; i++) w3[0] -= a3[i] * w3[i]; /* Input adder */ for (i=0; i<=L3; i++)

185

y += b3[i] * w3[i]; /* Output adder */ for (i=K; i>=1; i--) w3[i] = w3[i-1]; /* reverse-order updating */ return y; /* Current output sample */ /************************************************************************** Routine phase_lock_loop() **************************************************************************/ phase_lock_loop() vsource_adc1 = 450.4896276 * ds1104_adc_read_ch(5); /* Read current ADC5 input of vsource */ y1_a = 1.414093802 * fir1(vsource_adc1); /* Using fir1() */ vpll = pll(y1_a); /* Using pll() */ y1_b = 50 * pow(y1_a, 2); y1_c = integ1(y1_b); /* Using integ1() */ reset_integ1(); /* Using reset_integ1() */ y1_d = y1_c1 - y1_c2; y1_e = fabs(y1_d); vs_rms1 = 1.414213562 * sqrt(y1_e); if (vs_rms1 <= 20) vs_rms = 20; /* Set initial source voltage level */ enable3 = 0; /* Mains fault protection */ else vs_rms = vs_rms1; enable3 = 1; /* Mains fault protection */ ds1104_adc_mux(2);

186

vcap_adc = 450.4896276 * ds1104_adc_read_ch(2); /* Read current ADC2 input of DC-bus voltage */ if (vcap_adc >= 200) /* DC-bus voltage must be bigger than 200V */ enable4 = 1; /* DC-bus voltage fault protection */ else enable4 = 0; /* DC-bus voltage fault protection */ sine_ref = 0.663349917 * vpll / vs_rms; /* Generates reference sinewave */ sine_ref_syn = -1 * delay9(sine_ref); /* Synchronise sine_ref with source voltage */ /************************************************************************** Routine extension_pq_theorem() **************************************************************************/ extension_pq_theorem() vsource_adc = fir11(vsource_adc1); iload_adc1 = 7.817275402 * ds1104_adc_read_ch(7); /* Read current ADC7 input of iload */ iload_adc = fir12(iload_adc1); ihpf_adc1 = 7.817275402 * ds1104_adc_read_ch(6); /* Read current ADC6 input of ihpf */ ihpf_adc = fir13(ihpf_adc1); vsource_adc_90deg = delay4(vsource_adc); /* 90-degree phase shift of vsource_adc */ Pload = vsource_adc * iload_adc; /* Instantaneous active load power*/ Qload = vsource_adc_90deg * iload_adc; /* Instantaneous reactive load power*/ Qhpf = vsource_adc_90deg * ihpf_adc; /* Instantaneous reactive HPF power*/

187

Pload_dc = fir5(Pload); /* Using fir5() */ Qload_dc = fir6(Qload); /* Using fir6() */ Qhpf_dc = fir7(Qhpf); /* Using fir7() */ /************************************************************************** Routine compensating_current_ref() **************************************************************************/ compensating_current_ref() sine_ref_90deg = delay8(sine_ref_syn); /* 90-degree phase shift of sine_ref */ ip_load = 1.414213562 * Pload_dc / vs_rms * sine_ref_syn; /* Active component of load current */ iq_load = 1.414213562 * Qload_dc / vs_rms * sine_ref_90deg; /* Reactive component of load current */ ihpw_load = iload_adc - iq_load - ip_load; /* Harmonic component of load current */ ic_load = iq_load + ihpw_load; /* Load's compensation current reference */ iq_hpf = 1.414213562 * Qhpf_dc / vs_rms * sine_ref_90deg; /* Reactive component of HPF current */ ipv_ref = ipv * sine_ref_syn; /* Active component of DC source current */ ic_ref2 = ic_load + iq_hpf + ipv_ref; /* Compensation current + DC source current */ ic_ref1 = -1 * delay10(ic_ref2); /* Phase delay compensation */ if(ic_ref1 >= 7.0) ic_ref = 7.0; /* Over current protection, upper limit = 7.0 A */ else if(ic_ref1 <= -7.0) ic_ref = -7.0; /* Over current protection, lower limit = -7.0 A */ else ic_ref = ic_ref1;

188

is_compensated = iload_adc + ihpf_adc - ic_ref; /* Calculated compensated source current (ideal case) */ if (iselect == 0) iref_out = sine_ref_syn; else if (iselect == 1) iref_out = ip_load; else if (iselect == 2) iref_out = iq_load; else if (iselect == 3) iref_out = ihpw_load; else if (iselect == 4) iref_out = iq_hpf; else if (iselect == 5) iref_out = ic_load; else if (iselect == 6) iref_out = ic_ref; ds1104_dac_write(5, iref_out / 10); /* DAC5 output signal selection */ ds1104_dac_strobe(); /* Activate the previously written DAC values synchronously */ /************************************************************************** Routine system_fault_protection() **************************************************************************/ system_fault_protection() if (enable1 == 1 && enable2 == 1 && enable3 == 1 && enable4 == 1) ds1104_bit_io_set(DS1104_DIO11); /* Sets I/O port 11 to '1' */ else ds1104_bit_io_clear(DS1104_DIO11); /* Sets I/O port 11 to '0' */

189

/************************************************************************** Routine error_hook_function() - is activated when an error message is generated **************************************************************************/ int error_hook_function(msg_submodule_type sm, msg_no_type no) enable1 = 0; /* Enable signal 1 is 0 when error occurs */ return(1); /* Display the error message */ /************************************************************************** Interrupt service routine 0, isr_srt0() - Hysteresis current controller **************************************************************************/ isr_srt0() RTLIB_TIC_START(); /* Start execution time 0 measurement */ ds1104_adc_start(DS1104_ADC5); /* Start 12-bit's ADC */ icomp_adc = 7.817275402 * ds1104_adc_read_ch(8); /* Read current ADC8 input of icomp */ i_hysteresis = icomp_adc - ic_ref; if (i_hysteresis >= 0.5) mask_set = 0x00000; ds1104_bit_io_clear(0x20020); /* Sets I/O 5 and I/O 17 to '0' */ else if (i_hysteresis <= -0.5) mask_set = 0x20020; ds1104_bit_io_set(0x20020); /* Sets I/O 5 and I/O 17 to '1' */ else ds1104_bit_io_set(mask_set); /* Remain I/O 5 and I/O 17 */ exec_time0 = RTLIB_TIC_READ(); /* Read the execution time 0 */

190

/************************************************************************** Interrupt service routine 1, isr_srt1() - Reference sinewave generation - Compensation Current Reference and DC source Current estimation **************************************************************************/ isr_srt1() ts_timestamp_type ts; /* Time stamping function */ ds1104_begin_isr_timer1(); /* Overload check */ RTLIB_TIC_START(); /* Start execution time 1 measurement */ ds1104_adc_start(DS1104_ADC1|DS1104_ADC2|DS1104_ADC3|DS1104_ADC4); /* Start Mux ADC & 12-bit's ADC simultaneously */ phase_lock_loop(); /* Using phase_lock_loop() */ extension_pq_theorem(); /* Using extension_pq_theorem() */ compensating_current_ref(); /* Using compensating_current_ref() */ system_fault_protection(); /* Using system_fault_protection() */ ts_timestamp_read(&ts); /* Read time stamp */ host_service(1, &ts); /* Data acquisition service using time stamping */ exec_time1 = RTLIB_TIC_READ(); /* Read the execution time 1 */ ds1104_end_isr_timer1(); /* Overload check */ /************************************************************************** Main Program **************************************************************************/ void main() /* Variables Initialisation */ n1 = 0; n2 = 0; Pload = 1; Qload = 1; Qhpf = 1; /* Initialise arrays of fir1() */ a1 = (Float64 *)calloc(3, sizeof(Float64));

191

b1 = (Float64 *)calloc(3, sizeof(Float64)); w1 = (Float64 *)calloc(3, sizeof(Float64)); /* Initialise arrays of integ1() */ w2 = (Float64 *)calloc(1, sizeof(Float64)); /* Initialise arrays of pll() */ a3 = (Float64 *)calloc(3, sizeof(Float64)); b3 = (Float64 *)calloc(3, sizeof(Float64)); w3 = (Float64 *)calloc(3, sizeof(Float64)); /* Initialise arrays of delay4() */ w4 = (Float64 *)calloc(51, sizeof(Float64)); /* Initialise arrays of fir5() */ a5 = (Float64 *)calloc(3, sizeof(Float64)); b5 = (Float64 *)calloc(3, sizeof(Float64)); w5 = (Float64 *)calloc(3, sizeof(Float64)); /* Initialise arrays of fir6() */ a6 = (Float64 *)calloc(3, sizeof(Float64)); b6 = (Float64 *)calloc(3, sizeof(Float64)); w6 = (Float64 *)calloc(3, sizeof(Float64)); /* Initialise arrays of fir7() */ a7 = (Float64 *)calloc(3, sizeof(Float64)); b7 = (Float64 *)calloc(3, sizeof(Float64)); w7 = (Float64 *)calloc(3, sizeof(Float64)); /* Initialise arrays of delay8() */ w8 = (Float64 *)calloc(51, sizeof(Float64)); /* Initialise arrays of delay9() */ w9 = (Float64 *)calloc(44, sizeof(Float64)); /* Initialise arrays of delay10() */ w10 = (Float64 *)calloc(100, sizeof(Float64)); /* Initialise arrays of fir11() */ a11 = (Float64 *)calloc(3, sizeof(Float64)); b11 = (Float64 *)calloc(3, sizeof(Float64)); w11 = (Float64 *)calloc(3, sizeof(Float64)); /* Initialise arrays of fir12() */ a12 = (Float64 *)calloc(3, sizeof(Float64)); b12 = (Float64 *)calloc(3, sizeof(Float64)); w12 = (Float64 *)calloc(3, sizeof(Float64)); /* Initialise arrays of fir13() */ a13 = (Float64 *)calloc(3, sizeof(Float64)); b13 = (Float64 *)calloc(3, sizeof(Float64));

192

w13 = (Float64 *)calloc(3, sizeof(Float64)); /* DS1104 and RTLib1104 initialization */ init(); /* Announce the hook function to the message module */ msg_error_hook_set(error_hook_function); /* Sets bits I/O 5, I/O 11 and I/O 17 to output */ ds1104_bit_io_init(DS1104_DIO5_OUT|DS1104_DIO11_OUT|DS1104_DIO17_OUT); /* Sets the bits I/O 5, I/O 11 and I/O 17 to '0' */ ds1104_bit_io_clear(DS1104_DIO5|DS1104_DIO11|DS1104_DIO17); /* Initialize DAC in latched mode */ ds1104_dac_init(DS1104_DACMODE_LATCHED); /* Start timer0 with service routine isr_srt0() */ ds1104_start_isr_timer0(ST0, isr_srt0); /* Start timer1 with interrupt service routine isr_srt1() */ ds1104_start_isr_timer1(ST1, isr_srt1); /* Message generation */ msg_info_set(MSG_SM_USER, 0, "System Started."); /* Background service */ while(1) RTLIB_BACKGROUND_SERVICE();

H.2 Variable Description File (TRC File) for ControlDesk’s Instrument

_floating_point_type(64,IEEE) _integer_type(32) -- signals available for ControlDesk -- -- signal name type address group "Model Root in ""DS1104.c"""

193

group "Execution Time 0" exec_time0 type: flt (64,IEEE) alias: "Execution Time 0" flags: READONLY endgroup group "Execution Time 1" exec_time1 type: flt (64,IEEE) alias: "Execution Time 1" flags: READONLY endgroup group "Signals of Phase-Lock Loop" vsource_adc flt vs_rms flt sine_ref flt y1_a flt endgroup group "Signals of Extension P-Q Theorem" iload_adc flt ihpf_adc flt Pload flt Pload_dc flt Qload flt Qload_dc flt Qhpf flt Qhpf_dc flt endgroup group "Signals of Compensation Current Reference" sine_ref_syn flt sine_ref_90deg flt ip_load flt iq_load flt

194

ihpw_load flt iq_hpf flt ic_load flt ic_ref flt is_compensated flt endgroup group "Signals of Hysteresis Current Controller" icomp_adc flt i_hysteresis flt enable1 int enable2 int enable3 int enable4 int endgroup group "Signals of DC-Bus Voltage Regulation" vcap_adc flt endgroup group "Signals of DC Source Current" ipv flt ipv_ref flt endgroup group "Current Signal at DACH5" iselect int endgroup endgroup

196

Abstract--This paper presents a new single-phase two-wire

hybrid active power filter configuration that interconnects a passive high-pass filter in parallel with an active power filter and a photovoltaic system. The proposed configuration can improves the filtering performance of the conventional active power filter, as well as simultaneously supply the power from the photovoltaic arrays to the load and utility. Furthermore, the derivation of compensation current reference is simplified with the utilization of extension p-q theorem. This paper will describe the proposed hybrid active power filter with photovoltaic system. It will primarily focus on the power circuit, control system and the compensation current reference derivation. The proposed system effectively filters harmonics under 1 kHz but also higher frequency to achieve wideband harmonics compensation. The THD of source current is reduced from 76.83 % to 3.21 %. The simulation results that verify the theoretical predictions of the proposed configuration will be presented.

Index Terms--Extension p-q theorem, hybrid active power filter, photovoltaic, power electronics, wideband harmonic compensation.

I. INTRODUCTION HE pass several decades have seen a rapid increase of power electronics-based loads connected to the utility

system. However, the proliferation of these non-linear loads has raised concern with regard to the resulting harmonic distortion levels of the supply current on the power system. Passive filter is the traditional method of harmonic filtering. It is well known that the application of passive filters creates new system resonances that are dependent on the specific system conditions [1]. Although this solution is simple, it has brings rise to several shortcomings. Furthermore, since the harmonics that to be eliminated is of low order, large filter components are required.

Active power filters (APFs) were developed to mitigate problem of passive filters. The advantages of APFs are widely recognized and are discussed extensively in [2]-[5]. However, the major part of the controller developed in the conventional

This project was supported by the Intensification of Research in Priority Areas (IRPA) grant from the Ministry of Science, Technology and the Environment, Malaysia (MOSTE).

The authors are with the Department of Energy Conversion, Faculty of Electrical Engineering, Universiti Teknologi Malaysia, 81310 UTM Skudai, Johor Bahru, Malaysia.

(email: perngcheng@ieee.org, zainals@fke.utm.my)

APF consists of analog circuits. As a result, the conventional APF is subjected to fine adjustment and signal drift inherent in analog circuit [2], [3]. A digital controller using a digital signal processor (DSP) or a microprocessor is preferable to an analog controller in terms of flexible implementation of the APF [4], [5]. The drawbacks of digital implementation are that the high order harmonics are not filtered effectively and the switching ripples remain in the source current. This is due to the time and phase delay in the digital controller and measurement of signals sampling. Hybrid APFs were developed, where a passive filter is connected parallel to a conventional APF [6], [7]. The hybrid APF configuration is effective in improving the damping performance of high-order harmonics.

Recently, there is an increasing concern about the environment pollution. The need to generate pollution-free energy has trigger intensive considerable effort toward alternative source of energy. Solar energy, in particular, is a promising option. Some researcher had spent their effort in developing the combined system of an APF and a photovoltaic (PV) system [8], [9]. However, the existing hybrid APF configurations are not yet utilized for the PV application.

The p-q theorem was adopted for current reference derivation in the hybrid APF system [10]. Definition and study of the extension p-q theorem has been proposed [11], [12]. This fresh definition is simpler and clearer for the current commands derivation compared with the p-q theorem presented in [13]. However, the extension p-q theorem is not yet being applied in the hybrid APF system.

In this paper, we proposed a new single-phase two-wire hybrid APF configuration that interconnects a hybrid APF with a photovoltaic system. The extension p-q theorem is utilized to create the compensation current reference derivation. Furthermore, the derivation of compensation current reference is simplified with the utilization of extension p-q theorem. The proposed configuration can improves the filtering performance of the conventional APF, as well as simultaneously supply the power from the PV arrays to the load and utility.

This paper will describe the proposed hybrid APF with PV system. It will primarily focus on the power circuit, control system and compensation current reference derivation. Finally, the simulation results that verify the theoretical

A New Single-Phase Two-Wire Hybrid Active Power Filter Using Extension p-q

Theorem for Photovoltaic Application P. C. Tan, Student Member, IEEE, and Z. Salam, Member, IEEE

T

197predictions of the proposed configuration will be presented.

II. PROPOSED SYSTEM CONFIGURATION AND PRINCIPLE OF OPERATION

Fig. 1 presents the power circuit of the proposed hybrid APF with PV system in parallel with a nonlinear load that is supplied by source voltage from the point of common coupling (PCC). The proposed hybrid APV consists of a passive high-pass filter (HPF), a shunt APF constructed by a single-phase full-bridge voltage source inverter (VSI) connected to a DC-bus capacitor; and PV arrays in parallel with the DC-bus capacitor. In the proposed scheme, the low-order harmonics are compensated using the shunt APF, while the high-order harmonics are filtered with the passive HPF. This configuration is effective to improve the filtering performance of the high-order harmonics.

The VSI is operating in the current-controlled mode (CCM) with the utilization of fixed-band hysteresis current controller. Furthermore, the proposed hybrid APF with PV system is connected with the utility line at the PCC through a series inductor allowing the reactive power control. Subscripts u, s, PCC, L, f, and hp refer to utility, source, PCC, load, APF, and HPF variables respectively.

Fig. 1. Configuration of the proposed hybrid APF with PV system.

Fig. 2 shows the block diagram of the proposed control

system for the hybrid APF. The source current is desired to be sinusoidal to yield a maximum power factor. In this work, the extension p-q theorem is introduced to derive the compensation current reference.

Fig. 2. Overall system configuration and control block diagram.

In order to generate the compensation current that follows the current reference, the fixed-band hysteresis current control method is adopted. The proposed scheme is controlled to inject the reactive and harmonic current of the nonlinear load and the reactive current of the HPF. Furthermore, a current must be drawn form the utility source to maintain the voltage across the DC-bus capacitor to a preset value that is higher than the amplitude of the source voltage. A proportional-integral (PI) controller is implemented for the DC-bus capacitor voltage control. Under the normal operation, the PV system will provide active power to the load and the utility. Under poor PV power generation condition, the utility source supplies the active power to the load directly.

A. Derivation of Compensation Current Reference Compensation current reference derivation for the single-

phase two-wire APF based on extension p-q theorem has been presented in [8]. In this work, the application of the theorem is further extended for current reference derivation in a single-phase two-wire hybrid APF with PV system. For the proposed scheme, the extension p-q theorem is adopted for the derivation of harmonics, active and reactive components of nonlinear load current and the reactive component of passive HPF current.

For a single-phase two-wire system with nonlinear load, the load current can be represented as

( ) ( )∑∞

=

θ+ω=1

, sin2n

nnLL tnIti (1)

Under normal circumstances, the voltage at PCC can be assumed to be a sinusoidal, i.e.,

( ) ( )φ+ω= tVtv PCCPCC sin2 (2) The HPF current can be represented as

( ) ( )o90sin2 , +ω= tIti nhphp (3)

Therefore, the instantaneous active power of nonlinear load can be calculated as

( ) ( ) ( )titvtp LPCCL ⋅= ( ) ( )11,11, 2coscos θ+φ+ω−θ−φ= tIVIV LPCCLPCC

( ) ( )∑∞

=

φ+ωθ+ω+2

, sinsin2n

nnLPCC ttnIV

LL pp ~+= (4) The instantaneous reactive power of nonlinear load can be written as follows:

( ) ( ) ( )titvtq LPCCL ⋅= ' ( ) ( )11,11, 2sinsin θ+φ+ω−θ−φ= tIVIV LPCCLPCC

( ) ( )∑∞

=

φ+ωθ+ω−2

, sinsin2n

nnLPCC ttnIV

LL qq ~+= (5) The instantaneous reactive power of HPF can be calculated as

198

( ) ( ) ( )titvtq hpPCChp ⋅= '

( ) ( )oo 902sin90sin 1,1, +φ+ω−−φ= tIVIV hpPCChpPCC

hphp qq ~+= (6)

where Lp , Lq and hpp represent the constant part, Lp~ , Lq~

and hpp~ denote the variant component, and ( )tvPCC' denotes

the PCC voltage shifted by o90 . By obtaining the constant part in (4), (5) and (6), the

harmonics ( pLi , ), active ( qLi , ) and reactive ( hLi , )

components of nonlinear load current and the reactive ( qhpi , )

component of the passive HPF current can be readily calculated as follows:

( ) ( )tuV

ptiPCC

LpL 2, = (7)

( ) ( )o902, −= tuV

qtiPCC

LqL (8)

( ) ( ) ( ) ( )titititi qLpLLhL ,,, −−= (9)

and

( ) ( )o902, −= tuVq

tiPCC

hpqhp (10)

where ( )tu is a unit vector in phase with the PCC voltage. Finally, the compensation current reference can be

expressed as

( ) ( )tuV

PtuIiiiirefCf

PVCfqhphLqLf ⋅+⋅−++=

,,,,

* (11)

where PVP is the active power of PV arrays, CfI is the DC-

bus capacitor charging current, and refCfV , is DC-bus capacitor voltage reference.

B. Fixed-Band Hysteresis Current Controller In order to generate the compensation current that follows

the compensation current reference, the fixed-band hysteresis current control method is adopted. Fig. 3 is the simplified equivalent circuit of the main power circuit, where 1S and 2S are two switches, and sV is the source voltage. For a case of

sinusoidal reference current *fi as shown in Fig. 4, the actual

compensation current fi , is compared with the fixed

hysteresis band around the reference current, 1S and 2S should be controlled by the following rules,

(1) When the compensation current sample fi tries to go

beyond the upper hysteresis band, 1S is turned off and 2S is turned on. Assuming PCCCf VV > , then fi

decreases linearly. (2) When the compensation current sample fi tries to go

beyond the upper hysteresis band, 1S is turned on and 2S is turned off, then fi increases linearly.

By this way, fi is driven to follow the current reference *fi

within a fixed hysteresis band. The switching frequency depends on how fast the current changes from the upper limit to the lower limit and vice versa. Therefore, the switching frequency does not remain constant but varies with respect to the current waveform.

Fig. 3. Simplified equivalent circuit of main power circuit.

Fig. 4. Principle of the fixed-band hysteresis current control.

C. Design of Passive High-Pass Filter The passive HPF consists of a capacitor hpC , an inductor

hpL and a resistor hpR . Fig. 5 presents an equivalent circuit

of HPF for harmonics, where hpZ is the equivalent impedance

of HPF and sZ is the equivalent source impedance. In Fig. 5, the nonlinear load is considered as a harmonics current source. Since we are only interested in the system performance with the harmonic components, we can neglect the source voltage. This is because the source voltage is assumed to contain only the fundamental frequency current component.

199Fig. 5. Equivalent circuit of HPF for harmonics.

A transfer function approach to passive HPF design has been presented in [14]. The filter impedance transfer function

( )sH hp can be expressed as

( )⎥⎥

⎦

⎤

⎢⎢

⎣

⎡+⎟⎟

⎠

⎞⎜⎜⎝

⎛ω

+⎟⎟⎠

⎞⎜⎜⎝

⎛ω

⋅

⎟⎟⎠

⎞⎜⎜⎝

⎛+

ω

= 11

1

2

oo

p

hps

Qs

ss

AsH (12)

In (12),

CA 1

= , hphp

o CL1

=ω , hp

hpp L

R=ω ,

hp

hphp L

CRQ =

where A is gain coefficient, oω is series resonant frequency,

pω is pole frequency, and Q is HPF quality factor.

For the simulation purpose, the leakage impedance of the transformer is regarded as the source impedance, sL = 0.573mH (2.5 percent, 2 kVA base). The passive HPF is tuned

to the resonant frequency of 1 kHz ( of =hphpCLπ2

1 =1

kHz). This resonant frequency value is chosen as the filtering performance of the APF is impaired above this frequency. The design parameters of the HPF are

hpL = 1.15 mH

hpC = 22 µ F

hpR = 5 Ω

The quality factors of 0.5 ≤≤ Q 2.0 are typical. Higher Q factors allow more series resonant attenuation and less high-pass. By contrast, lower Q factors provide less series resonant attenuation and greater high-pass response. Hence, the proper selection of Q is essentially required to satisfy the series resonant and high-pass response performances. In this work, the Q factor was selected as 0.69, considering the required high-pass response over a wide frequency band.

The transfer function ( )sHcs from the source current hsi ,

to the nonlinear load current hLi , can be expressed as

( ) ( )( )

( )( ) ( )sZsZ

sZsisi

sHhps

hp

hL

hscs +

==,

, (13)

Depending on the value selected for the resistor hpR , many

different transfer function characteristics are possible. The resistor hpR is chosen based on the desired high-pass

response and the series resonant attenuation. A bode magnitude plot of ( )sHcs is shown in Fig. 6 where it has one crest due to the parallel resonance between hps LL + and hpC

at 817.5 Hz ( 5.817=rf Hz). In particular, the parallel resonance is a problem, as it enlarge harmonics around 817.5 Hz. This crest can be minimized by selecting the value of Q

factor close to 0.7. In Fig. 6, the filtering performance of high-order harmonics above 1 kHz is improved with HPF.

Fig. 6. Bode magnitude diagram of the transfer function ( )sHcs from the source current to the nonlinear load current.

III. SIMULATION RESULTS The proposed hybrid APF was simulated using MATLAB

Simulink program. The system parameters are shown in Table I. In the simulation, a diode rectifier with a DC-link capacitor

dC and a smoothing inductor smoothL was used as a harmonic producing nonlinear load. The simulated source voltage and current waveforms without compensation for load resistance

LR of 125 Ω are shown in Fig. 7.

TABLE I MATLAB SIMULINK SIMULATION PARAMETERS

Utility Voltage Vu = 240 Vrms (50 Hz) Source Inductance Ls = 0.573 mH Rectifier DC-link Capacitor Cd = 1000 µF Rectifier Smoothing Inductor Lsmooth = 5 mH Rectifier Load Nominal Power Pn = 1 kVA Maximum Switching Frequency fsw,max = 20 kHz Hysteresis Current Control Band H = 0.4 Apeak-to-peak

Sampling Time Ts = 50 µs APF Inductor Lf = 12.5 mH APF DC-bus Capacitor Cf = 1000 µF DC-bus Capacitor Voltage Reference VCf,ref = 200 Vdc

HPF Inductor Lhp = 1.15 mH HPF Capacitor Chp = 22 µF HPF Resistor Rhp = 5 Ω Fig. 8 presents simulation results with shunt APF. As can

be seen, the source voltage and current consists a large amount of high-order harmonics. The simulation results with proposed scheme are shown in Fig. 9. Now, the high-order harmonics are filtered from the source voltage and current. Table II presents the harmonics content of the source current without compensation, with shunt APF and with the proposed scheme respectively. It can be observed that the total harmonic distortion (THD20 kHz) of source current is reduced from 76.83 % to 4.39 % with shunt APF. With proposed scheme, THD20 kHz of source current is further reduced from 76.83 % to 3.21 %. The proposed system effectively filters harmonics under 1 kHz but also higher frequency to achieve wideband harmonics compensation.

200

(a)

(b)

Fig. 7. Simulated results without harmonic compensation, (a) source voltage and (b) source current waveforms.

(a)

(b)

Fig. 8. Simulated results with shunt APF. (a) source voltage and (b) source current waveforms.

Fig. 10 shows the proposed system performance when the load resistance changes stepwise from 250 Ω to 125 Ω at time t = 0.6 s. The simulation results show that the proposed system is able to keep the source current sinusoidal under this transient condition.

During normal operation, as 300 W of PV arrays power is processed by the hybrid APF at time t = 0.6 s, the corresponding simulated source voltage and current waveforms are presented in Fig. 11. The simulation results show that the source current remains sinusoidal waveform and

the PV arrays power is successfully provided to the load and utility.

(a)

(b)

Fig. 9. Simulated results with proposed scheme. (a) source voltage and (b) source current waveforms.

(a)

(b)

Fig. 10. Simulated results with the proposed scheme in a case of step load change. (a) source voltage and (b) source current.

201TABLE II

HARMONIC CURRENT COMPONENTS

Load Basic APF Proposed Scheme n iL(n) / iL(1)

[%] is(n) / is(1)

[%] is(n) / is(1)

[%] 5 39.95 1.60 1.63 7 13.40 1.55 0.07

11 6.31 1.26 0.61 13 3.51 0.91 0.69 17 2.21 0.55 0.79 19 1.88 0.48 0.68 23 1.19 0.22 0.43 25 1.14 0.14 0.32 29 0.82 0.22 0.06 31 0.70 0.26 0.03 35 0.57 0.11 0.15 37 0.47 0.02 0.15

THD2 kHz 76.83 3.58 3.19 THD20 kHz 4.39 3.21

(a)

(b)

Fig. 11. Simulated results for the proposed scheme with 300 W active power generation from PV arrays. (a) source voltage and (b) source current.

IV. CONCLUSION A new single-phase two-wire hybrid APF configuration

that interconnects the hybrid APF with the PV system is presented. The proposed scheme combines the APF with the passive filter to improve the filtering performance of high-order harmonics. Furthermore, the proposed scheme can deal with PV power. The derivation of compensation current reference is simpler and clearer with the utilization of extension p-q theorem. The simulation results show the effectiveness of the proposed scheme for wideband harmonics compensation and PV power handling capability.

V. REFERENCES [1] D. Sutanto, M. Bou-rabee, K. S. Tam, and C. S. Chang, "Harmonic

filters for industrial power systems," in Proc. IEE International Conf. on

Advances in Power System Control, Operation and Management, vol. 2, pp. 594-598, Nov. 1991.

[2] H. L. Jou, J. C. Wu, and H. Y. Chu, "New single-phase active power filter," in Proc. IEE Electronic Power Application, vol. 141, no. 3, pp. 129-134, May 1994.

[3] C. Y. Hsu, and H. –Y. Wu, "A new single-phase active power with reduced energy storage capacitor," in Proc. IEE Electronic Power Applications, vol. 143, no. 1, pp. 23-28, Jan. 1996.

[4] S. G. Jeong and M. H. Woo, "DSP-based active power filter with predictive current control," IEEE Trans. Ind. Electron., vol. 44, pp. 329-336, June 1997.

[5] S. Buso, L. Malesani, P. Mattavelli, and R. Veronese, "Design and fully digital control of parallel active power filters for thyristor rectifiers to comply with IEC-1000-3-2 standards," IEEE Trans. Ind. Applicat., vol. 34, pp. 508-517, May/June 1998.

[6] M. Routimo, M. Salo, and H. Tuusa, "A novel control method for wideband harmonic compensation," in Proc. IEEE PEDS’03 Conf., vol. 1, Nov. 2003, pp. 799-804.

[7] S. Fukuda and T. Endoh, "Control method for a combined active power filter system employing a current source converter and a high pass filter," IEEE Trans. Ind. Applicat., vol. 31, no. 3, pp. 590-597, May-June 1995.

[8] T. –F. Wu, C. –L. Shen, C. H. Chang, and J. –Y. Chiu, "A 1 φ 3W grid-connection PV power inverter with partial active power filter," in Proc. IEEE PESC’02, vol. 3, June 2002, pp. 1512-1517.

[9] S. Kim, G. Yoo, and J. Song, "A bifunctional utility connected photovoltaic system with power factor correction and U.P.S. facilify," in Proc. of Photovoltaic Specialist Conf., May 1996, pp. 1363-1368.

[10] C. Lijun and A. V. Jouanne, "A comparison and assessment of hybrid filter topologies and control algorithms," in Proc. IEEE PESC’01, vol. 2, June 2001, pp. 565-570.

[11] Y. Komatsu and T. Kawabata, "Characteristics of three phase active power filter using extension pq theory," in Proc. of the IEEE Ind. Electron. Conf., vol. 2, July 1997, pp. 302-307.

[12] Y. Komatsu and T. Kawabata, "A control method of active power filter in unsymmetrical voltage system," in Proc. IEEE PEDS’97 Conf., vol. 2, May 1997, pp. 839-843.

[13] H. Akagi, Y. Kanazawa, and A. Nabae, "Instantaneous reactive power compensators comprising switching devices without energy storage components," IEEE Trans. Ind. Applicat., vol. IA-20, no. 3, pp. 625-630, May/June 1984.

[14] J. K. Phipps, "A Transfer function approach to harmonic filter design," IEEE Ind. Applicat. Mag., vol. 3, pp. 68-82, Mar./Apr. 1997.

Perng-Cheng Tan was born in Johor, Malaysia in 1980. He received the B.Sc. degree in electrical engineering from Universiti Technologi Malaysia (UTM), Johor, Malaysia, in 2003. He is currently pursuing the M.E.E. degree at the Department of Energy Conversion, Faculty of Electrical Engineering, UTM, Malaysia.

His research interests are the areas of active power filters, power electronics, and renewable energy.

Zainal Salam was born in Seremban, Malaysia in 1963. He received his secondary education from Victoria Institution, Kuala Lumpur. He obtained his B.Sc., M.E.E. and Ph.D. from the University of California, UTM and University of Birmingham, UK, in 1985, 1989 and 1997, respectively.

He has been a lecturer at UTM for 18 years and is currently the Head Department of Energy Conversion Department. He has been working in several researches and consulting works with SIRIM

and GBT on battery powered converters. His research interests include all areas of power electronics. Currently, he

is involved in several IRPA projects in the area of renewable energy, power electronics and machine control. His hobby is traveling.

203

A Single-Phase Hybrid Active Power Filter using Extension p-q Theorem for Photovoltaic Application

P. C. Tan, Student Member, IEEE, and Z. Salam, Member, IEEE and A. Jusoh Power Electronics and Drives Group, Department of Energy Conversion, Faculty of Electrical Engineering,

Universiti Teknologi Malaysia, 81310 UTM Skudai, Johor Bahru, Malaysia.

perngcheng@ieee.org, zainals@fke.utm.my, awang@fke.utm.my

Abstract—This paper presents a single-phase two-wire hybrid active power filter that is used in conjunction with photovoltaic system. The uniqueness of proposed scheme is the fact that it improves the filtering performance of the conventional active power filter, as well as simultaneously supplies the power from the photovoltaic array to the load and distribution system. The current commands derivation is based on the extension instantaneous-reactive power theorem. The proposed scheme is described in detail. It will primarily focus on the power circuit, the compensation current reference derivation, and the passive high-pass filter design. Experimental results obtained from a laboratory system that verifies the viability and effectiveness of the proposed scheme are presented.

Keywords-extension p-q theorem; hybrid active power filter; photovoltaic; power electronics

I. INTRODUCTION Due to the proliferation of nonlinear and switching loads

from power electronics converters, there is an increasing concern to control and reduce the harmonics current in distribution power lines [1]. These types of loads draw nonsinusoidal currents from the mains, causing power quality (PQ) problems.

The passive filtering is the simplest solution to mitigate the harmonics problem. Although simple, the passive filter is large, heavy and bulky [2], [3]. The passive filter is known to cause resonance, thus affecting the stability of the power systems. As the regulatory requirements become more stringent, the passive filter might not meet future revisions of a particular Standard.

Remarkable progress in power electronics had spurred interest in active power filter (APF) for harmonics mitigation. The basic principle of APF is to utilize power electronics technologies to produce harmonics current components that cancel the harmonics current components from the nonlinear loads. Previously, majority of the controllers developed for APF are based on analog circuits [4], [5]. As a result, the APF is inherently subjected to signal drift. Digital controller using digital signal processor (DSP) or microprocessor is preferable, primarily due to its flexibility and immunity to noise [6], [7]. However it is known that using digital methods, the high order harmonics are not filtered effectively and the switching ripples remain in the source current. This is due to the time and phase delay in digital controller.

The idea of hybrid APF has been proposed by several researchers [8]-[10]. In this scheme, a passive filter is used in addition to a conventional APF. The main purpose of the passive filter is to improve the damping performance of high-order harmonics.

Recently, there is an increasing concern about the environment pollution. The need to generate pollution-free energy has triggers considerable effort toward renewable source of energy [11]. Solar energy, in particular, is a promising option. Efforts have been made to combine the APF with photovoltaic (PV) system [12]-[14]. However, it appears that no attempt has been made to combine a hybrid APF with PV system.

In this paper, a new variation of a hybrid APF is developed. We propose a hybrid APF topology for a single-phase two-wire system, connected to a PV array. The proposed topology is unique because it effectively filters harmonics current less than 1 kHz and of higher frequency. Furthermore, it simultaneously supplies the power from the PV array to the load and the distribution. The main contribution of this work is the application of the extension instantaneous-reactive power (p-q) theorem to derive the compensation current reference for this topology. Although the derivation of current reference based on extension p-q theorem is not new [13]-[15], this approach has not yet being applied to a single-phase two-wire hybrid APF system involving passive high-pass filter (HPF), APF and PV array. Using the extension p-q theorem, the resulting equations for the reference current of single-phase two-wire system is simpler compared with the p-q theorem presented in [16].

This paper will describe the proposed hybrid APF with PV system. It will primarily focus on the power circuit, the compensation current reference derivation, and the passive HPF design. Finally, the experimental results that verify the theoretical predictions of the proposed configuration will be presented.

II. PRINCIPLE OF OPERATION Fig. 1 presents the proposed hybrid APF with PV system

block diagram, connected in parallel with a nonlinear load. It consists of a passive HPF, a single-phase APF constructed using a full-bridge voltage source inverter (VSI) and PV array.

This project was supported by the Intensification of Research in Priority Areas (IRPA) grant from the Ministry of Science, Technology and Innovation (MOSTI), Malaysia.

204The VSI and the PV array are connected in parallel with the DC-bus capacitor. In the proposed scheme, the low-order harmonics are compensated using the shunt APF, while the high-order harmonics are filtered by the passive HPF. It is envisaged that this configuration is effective to improve the filtering performance of high-order harmonics, thus achieving wideband harmonic compensation.

The VSI is operated in the current-controlled mode (CCM). Furthermore, the proposed hybrid APF with PV system is connected with the distribution line at the point of common coupling (PCC) through a filter inductor, allowing the reactive power control. Fig. 2 shows the control system for the proposed hybrid APF with PV system. The compensated source current is desired to be sinusoidal to yield a maximum power factor (PF). The extension p-q theorem is introduced to derive the compensation current reference.

Figure 1. Configuration of the proposed hybrid APF with PV system.

Figure 2. Overall system configuration and control block diagram.

In order to generate the compensation current that follows the current reference, the fixed-band hysteresis current control method is adopted. The aim is to inject the reactive and harmonics currents of the nonlinear load and the reactive current of the passive HPF. Furthermore, a current must be drawn from the distribution source to maintain the voltage across the DC-bus capacitor to a value that is higher than the amplitude of the source voltage. A proportional-integral (PI) controller is implemented for the DC-bus capacitor voltage control. Under the normal operation, the PV array will provide active power to the load and the distribution. However, under no PV power generation condition, the distribution source supplies the active power to the load directly.

A. Derivation of Compensation Current Reference Compensation current reference derivation for the single-

phase two-wire APF based on extension p-q theorem has been presented in [14]. In this work, the application of the theorem is further extended to a single-phase two-wire hybrid APF with PV system. The compensation current reference derivation for the proposed scheme is presented in [17]. The extension p-q theorem is adopted for the derivation of active, reactive and harmonics components of nonlinear load current and the reactive component of passive HPF current.

For a single-phase two-wire system with nonlinear load, the load current can be represented as

( ) ( )∑ θ+ω=∞

=1, sin2

nnnLL tnIti . (1)

Under normal circumstances, the voltage at PCC can be assumed to be a sinusoidal, i.e.,

( ) ( )φ+ω= tVtv PCCPCC sin2 . (2)

The HPF current can be represented as

( ) ( )o90sin2 , +ω= tIti nhphp . (3)

Therefore, the instantaneous active power of nonlinear load can be calculated as

( ) ( ) ( )titvtp LPCCL ⋅=

LL pp ~+= . (4)

The instantaneous reactive power of nonlinear load can be written as follows

( ) ( ) ( )titvtq LPCCL ⋅= '

LL qq ~+= . (5)

Figure 2

Figure 1

205The instantaneous reactive power of HPF can be calculated as

( ) ( ) ( )titvtq hpPCChp ⋅= '

hphp qq ~+= , (6)

where Lp , Lq and hpp represent the constant part, Lp~ , Lq~

and hpp~ denote the variant component, and ( )tvPCC' denotes

the PCC voltage shifted by o90 .

By obtaining the constant part in (4), (5) and (6), the active ( pLi , ), reactive ( qLi , ) and harmonics ( hLi , ) components of

nonlinear load current and the reactive ( qhpi , ) component of the passive HPF current can be readily calculated as follows:

( ) ( )tuV

pti

PCC

LpL 2, = , (7)

( ) ( )o902, −= tuV

qtiPCC

LqL , (8)

( ) ( ) ( ) ( )titititi qLpLLhL ,,, −−= , (9)

and

( ) ( )o902, −= tuV

qti

PCC

hpqhp , (10)

where ( )tu is a unit vector in phase with the PCC voltage.

Finally, the compensation current reference can be expressed as

( ) ( )tuV

PtuIiiii

refCf

PVCfqhphLqLf ⋅+⋅−++=

,,,,

* , (11)

where PVP is the active power of PV array, CfI is the DC-bus capacitor charging current, and refCfV , is DC-bus capacitor voltage reference.

B. Design of Passive High-Pass Filter The second-order damped series resonant type HPF

topology is adopted in the proposed hybrid APF with PV system. The HPF consists of a capacitor hpC , inductor hpL

and an inductor bypass resistor hpR . Fig. 3 presents an equivalent circuit of the proposed hybrid APF system for harmonics, where hpZ is the equivalent impedance of HPF

and sZ is the equivalent source impedance assumed to be a simple inductor. In Fig. 3, the shunt APF is assumed to act as an ideal current source which produces the compensation current that follows the current reference, while the nonlinear load is considered as a harmonics current source.

Since we are only interested in the system performance with the harmonics components, we can neglect the source voltage. This is because the source voltage is assumed to contain only the fundamental frequency component.

A generalized transfer function approach to harmonic filter design has been presented in [18]. This method is based on the Laplace transform and superposition. In this work, the transfer function approach to harmonic filter design is adopted for the passive HPF design. The HPF impedance transfer function

( )sH hp can be derived in normalized form as

( ) ( )⎥⎥

⎦

⎤

⎢⎢

⎣

⎡+⎟⎟

⎠

⎞⎜⎜⎝

⎛ω

+⎟⎟⎠

⎞⎜⎜⎝

⎛ω

⋅

⎟⎟⎠

⎞⎜⎜⎝

⎛+

ω

== 11

1

2

oo

p

hphps

Qs

ss

AsZsH . (12)

In (12),

hpCA 1= ,

hphpo

CL1

=ω , hp

hpp L

R=ω ,

hp

hphp L

CRQ = ,

where A is the gain coefficient, oω is the series resonant frequency, pω is the pole frequency, and Q is the quality factor.

The passive HPF is tuned to the resonant frequency of 1.28

kHz (hphp

oCL

fπ

=2

1 = 1.28 kHz). This resonant frequency

value is chosen as the filtering performance of the APF is impaired above this frequency.

Depending on the value selected for the inductor bypass resistor hpR , many different transfer function characteristics

are possible. The inductor bypass resistor hpR is chosen based on the desired high-pass response and the series resonant attenuation. The quality factors of 0.5 ≤≤ Q 2.0 are typical.

Figure 3. Simplified model of the hybrid filter.

Figure 3

206Higher Q factors allow more series resonant attenuation and less high-pass. By contrast, lower Q factors provide less series resonant attenuation and greater high-pass response. Hence, the proper selection of Q is essentially required to satisfy the series resonant and high-pass response performances. In this work, the Q factor was selected as 0.69, considering the required high-pass response over a wide frequency band.

After the hybrid APF with PV system is configured and ( )sZ hp is known, the distribution system current to injected

current transfer function ( )sH cds can be derived for the hybrid APF with PV system connected to the PCC as

( ) ( )( )

( )( ) ( )sZsZ

sZsisi

sHshp

hp

h

hscds +

== , . (13)

Transfer function (13) is important because it can be used to assess the overall system performance.

A bode magnitude plot of ( )sH cds is shown in Fig. 4 where it has one crest due to the parallel resonance between

hps LL + and hpC . In particular, the parallel resonance is a problem, as it enlarges harmonics around the parallel resonant

frequency (hphps

rCLL

f)(2

1+π

= = 1.07 kHz). This crest

can be minimized by selecting the value of Q factor close to 0.7. For the plot shown in Fig. 4, the distribution system current to injected current transfer function ( )sH cds can be evaluated at low and high frequencies. For low frequencies, it has a 0 dB gain from 0 Hz to the parallel resonant frequency

rf . At rf the gain is determined by the selection of Q . For high frequencies, the roll-off of the high frequency components above the parallel resonant frequency rf is -20 dB per decade. Hence, the harmonics filtering is divided between the two filters: the low-order harmonics are compensated using the shunt APF, while the high-order harmonics are filtered by the passive HPF.

Figure 4. Bode magnitude diagram of the transfer function ( )sHcds for the proposed hybrid APF system.

III. EXPERIMENTAL RESULTS The proposed hybrid APF system was tested in the

laboratory with a low-power experimental prototype. The system parameters are shown in Table I. For the experimental system, the leakage impedance of the transformer is assumed to be the source impedance, sL = 0.76 mH. The passive HPF is tuned to the resonant frequency of 1.28 kHz. The design parameters of the HPF are: hpL = 1.76 mH, hpC = 8.8 µ F

and hpR = 10 Ω . A diode rectifier with a DC-link capacitor

dC and a smoothing inductor smoothL was used as the load. The control system was implemented using a dSPACE DS1104 DSP board.

The source current waveform and its harmonics spectra without compensation are shown in Fig. 5. As can be seen, the source current is highly distorted. Fig. 6 presents the source current waveform with basic shunt APF. From the spectra, it can be observed that for the basic APF the source current contains appreciable amount of high-order harmonics. The harmonics are effectively filtered by the proposed scheme, as depicted by Fig. 7. The total harmonic distortion calculated up to 10 kHz (THD10 kHz) is reduced from 130 % to 36 % using the basic shunt APF. With the proposed scheme, the THD10 kHz is further reduced to 19 %.

Fig. 8 shows the performance of the proposed hybrid APF with a PV array during normal operation. Fig. 8(a) shows the load current and compensated source current waveforms with no active power generation from PV array. The active power is provided by the distribution line directly. Fig. 8(b) shows the load current and compensated source current waveforms with 350 W active power generation from PV array. The experimental results obtained show that the generated PV power is provided to the load and distribution through the proposed hybrid APF system.

TABLE I. EXPERIMENTAL SYSTEM PARAMETERS

Distribution Voltage Vu = 240 Vrms (50 Hz) Source Inductance Ls = 0.76 mH Rectifier DC-link Capacitor Cd = 1000 µF Rectifier Smoothing Inductor Lsmooth = 1.15 mH Maximum Switching Frequency fsw,max = 10 kHz Hysteresis Current Control Band H = 1.0 Apeak-to-peak

APF Inductor Lf = 10.0 mH APF DC-bus Capacitor Cf = 1000 µF DC-bus Capacitor Voltage Reference VCf,ref = 250 Vdc

HPF Inductor Lhp = 1.76 mH HPF Capacitor Chp = 8.8 µF HPF Resistor Rhp = 10 Ω Load Resistor RL = 250 Ω

Figure 4

207

Load Resistance, LR = 250 Ω

(a) Scales: source current 2A/div, time 4ms/div.

(a)

Load Resistance, LR = 250 Ω

(a) Scales: source current 2A/div, time 4ms/div.

(b)

Load Resistance, LR = 250 Ω

(a) Scales: source current 2A/div, time 4ms/div.

(a)

Load Resistance, LR = 250 Ω

(a) Scales: load current 4A/div, source current 4A/div, time 4ms/div.

(b)

Load Resistance, LR = 250 Ω

(b) Scales: spectra 100mA/div, frequency 1.25kHz/div.

(b)

Load Resistance, LR = 250 Ω

(b) Scales: spectra 200mA/div, frequency 1.25kHz/div.

(b)

Load Resistance, LR = 250 Ω

(b) Scales: spectra 200mA/div, frequency 1.25kHz/div.

(b)

Load Resistance, LR = 250 Ω

(b) Scales: load current 4A/div, source current 4A/div, time 4ms/div.

(b)

Figure 8(b)

Figure 7(b)

Figure 6(b)

Figure 5(b)

Figure 8(a)

Figure 7(a)

Figure 6(a)

Figure 5(a)

Figure 5. Experimental results without compensation, (a) source current waveform and (b) source current spectra.

Figure 6. Experimental results with basic shunt APF, (a) source current waveform and (b) source current spectra.

Figure 7. Experimental results with proposed scheme, (a) source current waveform and (b) source current spectra.

Figure 8. Experimental results with proposed APF with PV system, (a) load and source current waveforms with no PV power generation and (b) load and source current waveforms with 350 W PV power generation.

Fundamental

is Fundamental

is Fundamental

iL

is

iL

is

is

208IV. CONCLUSION

A single-phase two-wire hybrid APF that interconnects to the PV system is presented. The proposed scheme combines the APF with a passive filter to improve the filtering performance of high-order harmonics. The derivation of compensation current reference is simpler with the utilization of extension p-q theorem. The experimental results show the effectiveness of the proposed scheme for wideband harmonics compensation and PV power handling capability.

REFERENCES [1] H. Akagi, “New trends in active filters for power conditioning,” IEEE

Trans. on Industry Applications, vol. 32, no. 6, pp. 1312-1322, Nov.-Dec. 1996.

[2] D. Sutanto, M. Bou-rabee, K. S. Tam, and C. S. Chang, “Harmonic filters for industrial power systems,” in Proc. IEE International Conference on Advances in Power System Control, Operation and Management, APSCOM, 1991, Hong Kong, vol. 2, pp. 594-598.

[3] J. C. Das, “Passive filters – potentialities and limitations,” IEEE Trans. on Industry Applications, vol. 40, no.1, pp. 232-241, Jan.-Feb. 2004.

[4] H. L. Jou, J. C. Wu, and H. Y. Chu, “New single-phase active power filter,” in Proc. IEE Electric Power Applications, vol. 141, no. 3, pp. 129-134, May 1994.

[5] C. Y. Hsu, and H. –Y. Wu, “A new single-phase active power filter with reduced energy-storage capacity,” in Proc. IEE Electric Power Applications, vol. 143, no. 1, pp. 25-30, Jan. 1996.

[6] S. G. Jeong and M. H. Woo, “DSP-based active power filter with predictive current control,” IEEE Trans. on Industrial Electronics, vol. 44, no. 3, pp. 329-336, June 1997.

[7] S. Buso, L. Malesani, P. Mattavelli, and R. Veronese, “Design and fully digital control of parallel active power filters for thyristor rectifiers to comply with IEC-1000-3-2 standards,” IEEE Trans. on Industry Applications, vol. 34, no. 3, pp. 508-517, May-June 1998.

[8] S. Fukuda and T. Endoh, “Control method for a combined active filter system employing a current source converter and a high pass filter,”

IEEE Trans. on Industry Applications, vol. 31, no. 3, pp. 590-597, May-June 1995.

[9] S. Khositkasame and S. Sangwongwanich, “Design of harmonic current detector and stability analysis of a hybrid parallel active filter,” in Proc. Power Conversion Conference, PCC, 1997, Nagaoka, Japan, vol. 1, pp. 181-186.

[10] M. Routimo, M. Salo, and H. Tuusa, “A novel control method for wideband harmonic compensation,” in Proc. IEEE International Conference on Power Electronics and Drive Systems, PEDS, 2003, Singapore, vol. 1, pp. 799-804.

[11] S. R. Bull, “Renewable energy today and tomorrow,” in Proc. of the IEEE, vol. 89, no. 8, pp. 1216-1226, Aug. 2001.

[12] S. Kim, G. Yoo, and J. Song, “A bifunctional utility connected photovoltaic system with power factor correction and U.P.S. facility,” in Proc. IEEE Photovoltaic Specialist Conference, 1996, Washington, USA, pp. 1363-1368.

[13] Y. Komatsu, “Application of the extension pq theory to a mains-coupled photovoltaic system,” in Proc. Power Conversion Conference, PCC, 2002, Osaka, Japan, vol. 2, pp. 816-821.

[14] T. –F. Wu, C. –L. Shen, C. H. Chang, and J. –Y. Chiu, “1/spl phi/ 3W grid-connection PV power inverter with partial active power filter,” IEEE Trans. on Aerospace and Electronic Systems, vol. 39, no. 2, pp. 635-646, April 2003.

[15] Y. Komatsu and T. Kawabata, “Characteristics of three phase active power filter using extension pq theory,” in Proc. IEEE International Symposium on Industrial Electronics, ISIE, 1997, Guimaraes, Portugal, vol. 2, pp. 302-307.

[16] B. Dobrucky, H. Kim, V. Racek, M. Roch, and M. Pokorny, “Single-phase power active filter and compensator using instantaneous reactive power method,” in Proc. Power Conversion Conference, PCC, 2002, Osaka, Japan, vol. 1, pp. 167-171.

[17] P. C. Tan and Z. Salam, “A new single-phase two-wire hybrid active power filter using extension p-q theorem for photovoltaic application,” in Proc. National Power and Energy Conference, PECon, 2004, Malaysia, pp. 126-131.

[18] J. K. Phipps, “A transfer function approach to harmonic filter design,” IEEE Industry Applications Magazine, vol. 3, no. 2, pp. 68-82, Mar.-Apr. 1997.

APPENDIX K

CONFERENCE PAPER PRESENTED AT PEMD 2006

210

A Single-Phase Hybrid Active Power Filter Connected to a Photovoltaic Array

P.C. Tan, A. Jusoh, Z. Salam*

*Power Electronics and Drives Group, Department of Energy Conversion, Faculty of Electrical Engineering,

Universiti Teknologi Malaysia, 81310 UTM Skudai, Johor Bahru, Malaysia.

philip.pctan@gmail.com, awang@fke.utm.my, zainals@fke.utm.my

Keywords: extension p-q theorem; hybrid active power filter; passive high-pass filter; photovoltaic; power electronics.

Abstract

Due to the proliferation of nonlinear and switching loads from power electronics converters, there is an increasing concern to control and reduce the harmonic currents in distribution power lines. These types of loads draw nonsinusoidal currents from the mains, causing harmonic distortion. One of the methods to reduce the problem is by using the power electronics approach. This paper presents a single-phase hybrid active power filter connected to a photovoltaic array. The uniqueness of the proposed scheme is the fact that it improves the filtering performance of the conventional shunt active power filter, as well as simultaneously supplies the power from the photovoltaic array to the load. The compensation current reference estimation is based on the extension instantaneous reactive-power theorem. Experimental results obtained from a laboratory system that verifies the viability and effectiveness of the proposed scheme are presented.

1 Introduction

Remarkable progress in power electronics had spurred interest in active power filter (APF) for harmonic distortion mitigation [1,3,5,7,8,9]. Digital controller using digital signal processor (DSP) or microprocessor is preferable for APF application, primarily due to its flexibility and immunity to noise signals [1,3,8]. However, it is known that for digital methods, the high order harmonics are not filtered effectively. This is due to the hardware limitation of sampling rate in real-time application. Moreover, the utilisation of fast switching transistors in APF application causes switching frequency noise appears in the compensated source current [4]. This switching frequency noise required additional filtering to prevent interference with other sensitive equipment. The idea of hybrid APF has been proposed by several researchers [6,11,14]. In this scheme, a low cost passive high-pass filter (HPF) is used in addition to the conventional APF. The harmonic filtering task is divided between the two filters. The APF cancels the lower order harmonics, while the HPF

filters the remaining harmonics. The main purpose of this scheme is to improve the damping performance of high-order harmonics and provide a cost-effective harmonic mitigation approach [14]. Recently, there is an increasing concern about the environment. The need to generate pollution-free energy has triggers considerable effort toward renewable energy [2]. Renewable energy such as sunlight, wind, flowing water and biomass offer the promise of clean and abundant energy. Solar energy, in particular, is especially an attractive option because it does not generate any greenhouse gases and it is inexhaustible. Efforts have been made to combine the APF with photovoltaic (PV) array [10,12,16]. However, it appears that no attempt has been made to combine a hybrid APF with PV array. In this paper, a new variation of a hybrid APF is developed. We propose a hybrid APF topology for a single-phase system, connected to a PV array. The proposed topology is unique because it effectively filters harmonic currents less than 1 kHz and of higher frequency. Furthermore, it simultaneously supplies the power from the PV array to the load and the distribution source. The main contribution of this work is the application of the extension instantaneous reactive-power (p-q) theorem to estimate the compensation current reference for this topology. Although the compensation current reference estimation based on extension p-q theorem is not new [12,13,16], this approach has not yet being applied to a single-phase hybrid APF system involving passive HPF, shunt APF and PV array.

2 Proposed system configuration

Figure 1 shows the configuration of the proposed single-phase hybrid APF topology, connected in parallel with the nonlinear load being compensated. It consists of a passive HPF, a single-phase shunt APF constructed using a full-bridge voltage source inverter (VSI) and a PV array. Subscript s, L, f and hp refer to source, load, shunt APF and passive HPF. The shunt APF and the PV array are connected back-to-back with a DC-bus capacitor (Cf). The proposed hybrid APF is connected with the distribution line at the point of common coupling (PCC) through an interfacing inductor (Lf).

211

Figure 1: Configuration of the proposed hybrid APF

connected to a PV array. A second-order series resonant filter is selected as the passive HPF in the proposed hybrid APF topology. It consists of a capacitor (Chp), an inductor (Lhp) and an inductor bypass resistor (Rhp). It acts like a sink for high-frequency harmonic components. The power distribution system of interest is in the form of a 240 Vrms, 50 Hz sinusoidal AC voltage (vu) provided by the distribution source. An isolation transformer with turn ratio of 2:1 is used to scale down the distribution voltage. The leakage inductor of the isolation transformer is considered as the source inductor (Ls).

3 Operation principle

As illustrated by Figure 2, the operation principle of the proposed hybrid APF is that it generates compensation current (if) equal and opposite in polarity to the reactive load current (iL,q), harmonic load current (iL,h) and reactive HPF current (ihp,q). This compensation current is injected into the PCC through an interfacing inductor. The compensated source current (is) is desired to be sinusoidal and in phase with the source voltage (vs) to yield a maximum power factor.

Figure 2: Operation principle of the proposed hybrid APF. In the proposed scheme, the low-order harmonics are compensated using the shunt APF, while the high-order harmonics and switching ripple (isw) are filtered by a passive

HPF. Since the aim in using the HPF is to improve the filtering performance of high-order harmonics, the HPF can be tuned to frequency where the filtering performance of the shunt APF is impaired, i.e. close to 1 kHz. It is envisaged that this configuration is effective to improve the filtering performance of high-order harmonics. The passive HPF design for the proposed scheme is presented in [15]. In the day-time with intensive sunlight, the proposed hybrid APF extracts power from the PV array, providing additional PV current (iPV) to the load and distribution source. When the distribution source need to provide the peak power to the load, the energy provided by PV array can alleviate the burden of distribution source as illustrated in Figure 2. At night and during no sunlight periods, the power required by the load is delivered by the distribution source directly.

4 The overall control system

Figure 3 shows the overall control system for the proposed scheme. The task of the control system is to produce appropriate gating signals for the switching transistors. It can be found that the control system consists of an instantaneous active/reactive power calculator (pL, qL & qhp calculator), three low-pass filter (LPF), a compensation current estimator, a propotional-integral (PI) controller, a phase-lock loop (PLL) and a fixed-band hysteresis current controller.

Figure 3: Overall control system of the proposed hybrid APF. The instantaneous active/reactive power calculator receives the load current (iL), source voltage (vs) and HPF current (ihp) signals in real time. The instantaneous active load power (pL), instantaneous reactive load power (qL) and the instantaneous reactive HPF power (qhp) are calculated based on the extension p-q theorem. Their DC components are filtered with three second-order Butterworth low-pass filters (LPFs). These DC components are then fed to the compensation current estimator to obtain the reactive load current (iL,q), harmonic load current (iL,h) and reactive HPF current (ihp,q). The summation of these three current signals will form the first component of the current reference signal (if,ref 1).

+

_

Cf

Shunt APF

Nonlinear load

Lf

is

if

Distributionvoltage

240 Vrms50Hz

vu vs

Sourcevoltage

2:1 Ls

iL

Lsmooth

Cd RL

PV array

VCf

ihp

PassiveHPF

PCC

S3

S4

S1

S2

Rhp

LhpChp

Hysteresiscurrent

controllerGatingsignals

pL, qL & qhpcalculator

iLihpvs

-90o

PLL

LPFCompensationcurrent

estimator

if

VCf

VCf,ref

PI controllerICf

PPVVCf,ref

DC-bus VoltageController

+

_

_+

DSP Based Implementation

IPV

if,refiL,q

iL,hihp,q

∑ ∑

+++

+

+

if,ref 2

if,ref 1

S1S2S3S4

LPFLPF

cos( t)

sin( t)ω

ω

_pLpL+ ~

qL_

qL+ ~

qhp_

qhp+ ~ qhp

qL

_pL__

Shunt APF

Nonlinear loadis

if

240 Vrms50Hz

vu 2:1iL

PV Array

ihpPassiveHPF

vs PCC

iL = iL,p + iL,q + iL,his = iL,p + ihp,p - iPV

if = iL,q + iL,h + ihp,q + isw + iPVihp = ihp,p + ihp,q + isw

+

212

The DC-bus voltage controller maintains the average voltage across the DC-bus capacitor (VCf) constant against variations in distribution source. The DC voltage across the DC-bus capacitor is detected and compared with its reference voltage (VCf,ref). The compared result is processed by a PI controller to obtain the desired amplitude of the DC-bus capacitor charging current (ICf). This charging current is then subtracted from the PV current (IPV). The resulting current is then multiplied with the reference sinewave (sin(ωt)) to form second component of current reference signal (if,ref 2). In order to generate the compensation current (if) that follows the current reference signal (if,ref), the fixed-band hysteresis current control method is adopted.

4.1 Compensation current reference estimation

Compensation current reference estimation for the single-phase APF based on extension p-q theorem has been presented in [16]. In this work, the application of the theorem is further extended to a single-phase hybrid APF connected to a PV array. For a single-phase system with nonlinear load, the load current can be represented as

∑∞

=

θ+ω=1

, )sin(2)(n

nnLL tnIti . (1)

Under normal circumstances, the source voltage can be assumed to be a sinusoidal, i.e.,

)sin(2)( φ+ω= tVtv ss . (2) The HPF current can be represented as

)90sin(2)( °+ω= tIti hphp . (3) Therefore, the instantaneous active load power can be calculated as

)()()( titvtp LsL ⋅= LL pp ~+= . (4)

The instantaneous reactive load power can be written as

)()()( ' titvtq LsL ⋅= LL qq ~+= . (5)

The instantaneous reactive HPF power can be calculated as

)()()( ' titvtq hpshp ⋅= hphp qq ~+= . (6)

where Lp , Lq and hpp represent the constant part, Lp~ , Lq~

and hpp~ denote the variant component, and )(' tvs denotes the source voltage shifted by 90˚.

By obtaining the constant part in Equation (4), (5) and (6), the active (iL,p), reactive (iL,q) and harmonics (iL,h) components of load current and the reactive (ihp,q) component of the passive HPF current can be readily calculated as follows:

)(2)(, tuVpti

s

LpL = , (7)

)90(2)(,o−= tu

Vqti

s

LqL , (8)

)()()()( ,,, titititi qLpLLhL −−= , (9)

and

)90(2)(,o−= tu

Vq

tis

hpqhp , (10)

where u(t) is a unit vector in phase with the source voltage. Finally, the compensation current reference can be expressed as

)()(,

,,,, tuV

PtuIiiiirefCf

PVCfqhphLqLreff ⋅+⋅−++= ,(11)

where PPV is the active power of PV array, ICf is the DC-bus capacitor charging current, and VCf,ref is DC-bus capacitor voltage reference.

5 Experimental results

The proposed hybrid APF connected to a PV array was tested in the laboratory with a low-power experimental prototype as shown in Figure 4. The VSI was built using 1200 V, 25 A IGBTs. The control system was implemented using a dSPACE DS1104 DSP board. For the experimental system, the leakage impedance of the transformer is assumed to be the source impedance (Ls = 0.76 mH). The passive HPF is tuned to the resonant frequency of 1.28 kHz. The design parameters of the HPF are: Lhp = 1.76 mH, Chp = 8.8 µF and Rhp = 10 Ω. A full-bridge diode rectifier with DC smoothing capacitor (Cd), resistive load (RL) and AC smoothing inductor (Lsmooth) was used as the nonlinear load. Other prototype parameters are shown in Table 1.

Distribution Voltage Vu = 240 Vrms (50 Hz)

Rectifier DC-link Capacitor Cd = 1000 µF

Rectifier Smoothing Inductor Lsmooth = 1.15 mH

Maximum Switching Frequency fsw,max = 10 kHz

Hysteresis Current Control Band H = 1.0 Apeak-to-peak

APF Inductor Lf = 10.0 mH

APF DC-bus Capacitor Cf = 990 µF

DC-bus Capacitor Voltage Reference VCf,ref = 250 Vdc

Load Resistor RL = 250 Ω

Table 1: Experimental prototype parameters.

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Figure 4: Prototype. (1) interfacing inductor, (2) drivers, (3)

IGBT bridge with DC-bus capacitor, (4) rectifier load, (5) DSP connector board, (6) smoothing inductor, (7) current and voltage transducers, (8) passive high-pass filter.

The source current waveform and its harmonics spectra without compensation are shown in Figure 5. As can be seen, the source current is highly distorted. Figure 6 presents the source current waveform with basic shunt APF. From the spectra, it can be observed that for the basic APF the source current contains appreciable amount of high-order harmonics. The harmonics are effectively filtered by the proposed scheme, as depicted by Figure 7. The total harmonic distortion calculated up to 10 kHz (THD10 kHz) is reduced from 130 % to 36 % using the basic shunt APF. With the proposed scheme, the THD10 kHz is further reduced to 19 %.

(a) Scales: source current 2 A/div, time 4 ms/div

(b) Scales: spectra 200 mA/div, frequency 1.25 kHz/div

Figure 5: Experimental results without compensation,

(a)source current waveform and (b)source current spectra.

(a) Scales: source current 1 A/div, time 4 ms/div

(b) Scales: spectra 200 mA/div, frequency 1.25 kHz/div

Figure 6: Experimental results with basic APF, (a)source

current waveform and (b)source current spectra.

(a) Scales: source current 1 A/div, time 4 ms/div

(b) Scales: spectra 200 mA/div, frequency 1.25 kHz/div

Figure 7: Experimental results with proposed scheme,

(a)source current waveform and (b)source current spectra. Figure 8 illustrates the PV power handling capability of the proposed hybrid APF. Figure 8(a) shows the load current and compensated source current waveforms with no active power generation from PV array. The active power is provided by the distribution source directly. Figure 8(b) shows the load current and compensated source current waveforms with 250W active power generation from PV array. The experimental results obtained show that the generated PV power is provided to the load through the proposed hybrid APF system to alleviate the burden of distribution source.

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(a) Scales: load current 2 A/div, source current 2 A/div, time 4 ms/div

(b) Scales: load current 2 A/div, source current 2 A/div, time 4 ms/div

Figure 8: Experimental results with proposed scheme, (a)load

and source current with no PV power and (b)load and source current with 250W PV power.

6 Conclusion

A single-phase hybrid APF connected to a PV array is presented. The proposed scheme combines the APF with a passive filter to improve the filtering performance of high-order harmonics. The compensation current reference estimation is simpler with the utilisation of extension p-q theorem. The experimental results show the effectiveness of the proposed scheme for wideband harmonics compensation and PV power handling capability.

Acknowledgements

This project was supported by the Intensification of Research in Priority Areas (IRPA) grant from the Ministry of Science, Technology and Innovation (MOSTI), Malaysia.

References

[1] H. Akagi. “New trends in active filters for power conditioning”, IEEE Trans. on Industry Applications, vol. 32, pp. 1312-1322, (1996).

[2] S. R. Bull. “Renewable energy today and tomorrow”, in Proc. of the IEEE, vol. 89, pp. 1216-1226, (2001).

[3] S. Buso, L. Malesani, P. Mattavelli, R. Veronese. “Design and fully digital control of parallel active power filters for thyristor rectifiers to comply with IEC-1000-3-2 standards”, IEEE Trans. on Industry Applications, vol. 34, pp. 508-517, (1998).

[4] L. S. Czarnecki. “An overview of methods of harmonic suppression in distribution systems”, in Proc. of the IEEE Power Engineering Society Summer Meeting, vol. 2, pp. 800-805, (2000).

[5] B. Dobrucky, H. Kim, V. Racek, M. Roch, M. Pokorny. “Single-phase power active filter and compensator using instantaneous reactive power method”, in Proc. Power Conversion Conference, vol. 1, pp. 167-171, (2002).

[6] S. Fukuda, T. Endoh. “Control method for a combined active filter system employing a current source converter and a high pass filter”, IEEE Trans. on Industry Applications, vol. 31, pp. 590-597, (1995).

[7] C. Y. Hsu, H. –Y. Wu. “A new single-phase active power filter with reduced energy-storage capacity”, in Proc. IEE Electric Power Applications, vol. 143, pp. 25-30, (1996).

[8] S. G. Jeong, M. H. Woo. “DSP-based active power filter with predictive current control”, IEEE Trans. on Industrial Electronics, vol. 44, pp. 329-336, (1997).

[9] H. L. Jou, J. C. Wu, H. Y. Chu. “New single-phase active power filter”, in Proc. IEE Electric Power Applications, vol. 141, pp. 129-134, (1994).

[10] S. Kim, G. Yoo, J. Song. “A bifunctional utility connected photovoltaic system with power factor correction and U.P.S. facility”, in Proc. IEEE Photovoltaic Specialist Conference, pp. 1363-1368, (1996).

[11] S. Khositkasame, S. Sangwongwanich. “Design of harmonic current detector and stability analysis of a hybrid parallel active filter”, in Proc. Power Conversion Conference, vol. 1, pp. 181-186, (1997).

[12] Y. Komatsu. “Application of the extension pq theory to a mains-coupled photovoltaic system”, in Proc. Power Conversion Conference, vol. 2, pp. 816-821, (2002).

[13] Y. Komatsu, T. Kawabata. “Characteristics of three phase active power filter using extension pq theory”, in Proc. IEEE International Symposium on Industrial Electronics, vol. 2, pp. 302-307, (1997).

[14] M. Routimo, M. Salo, T. Tuusa. “A novel control method for wideband harmonic compensation”, in Proc. IEEE International Conference on Power Electronics and Drive Systems, vol. 1, pp. 799-804, (2003).

[15] P. C. Tan, Z. Salam, A. Jusoh. “A single-phase hybrid active power filter using extension p-q theorem for photovoltaic application”, in Proc. IEEE International Conference on Power Electronics and Drive Systems, vol. 1, pp. 1250-1255, (2005).

[16] T. –F. Wu, C. –L. Shen, C. H. Chang, J. –Y. Chiu. “1/spl phi/ 3W grid-connection PV power inverter with partial active power filter”, IEEE Trans. on Aerospace and Electronic Systems, vol. 39, pp. 635-646, (2003).

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