a self-sustaining integrated cmos regulator for solar and hf rfid energy harvesting systems

2168-6777 (c) 2013 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. Seehttp://www.ieee.org/publications_standards/publications/rights/index.html for more information.

This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI10.1109/JESTPE.2014.2314479, IEEE Journal of Emerging and Selected Topics in Power Electronics

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Abstract—This paper presents a self-sustaining integrated

regulator for ultra-low power two-input energy harvesting systems. The energy sources include photovoltaic panels and high frequency radio-frequency identification (HF RFID) tags. An input-powered charge pump utilizing dynamic charge transfer switch (DCTS) with tunable voltages at the bottom of the pumping capacitors is proposed. No external pulse signal is required. An output-powered digitally controller DC-DC switching converter with a low-complexity oversampling ADC is also proposed to analyze the error signal between the DC-DC switching converter output and the reference voltage. In order to avoid limit-cycle oscillation, a digital Sigma-Delta modulator is adopted to increase the equivalent resolution of the digital pulse-width modulator (DPWM). The system is completely implemented and fully-integrated in a standard 0.18µm CMOS process with a die area of 2.1mm2. The system output voltage is successfully regulated at 1V and the measured maximum end-to-end conversion efficiency is about 57% when the loading current is 65μA.

Index Terms—Energy harvesting, charge pumps, DC-DC power converters, analog-digital conversion, regulators.

I. INTRODUCTION

NNERGY harvesting is an emerging topic in the field of the power electronics. It provides efficient ways to extract

energy from the environment. In 2011, 1.6 million energy harvesters will be used in wireless sensors, resulting in $13.75 million being spent on those harvesters [1]. Microsystems, such as wireless transceiver sensors [2], biomedical implants [3]-[4], or tire-pressure monitoring systems [5] can offer real-time nonintrusive signal processing capabilities while operating in hard-to-reach environments where recharging and replacing batteries are prohibitive. Therefore, self-powered energy harvesting systems become viable alternatives, which can eliminate the need for batteries or greatly extend battery lifetime [6], so as to perfectly suits with perpetual devices for long-term monitoring and measuring.

Renewable energy sources include thermal gradients from thermoelectric modules [7]-[8], wind energy [9]-[10], vibration

Manuscript received on Auguster 31, 2013. This work was supported in part

under Grant 102-2220-E-194-004- by the National Science Council, Taiwan. Tsung-Heng Tsai, Bo-Yu Shiu and Bo-Han Song are with National Chung

Cheng University, Min-Hsiung, Chiayi 62102, Taiwan (e-mail: [email protected]).

from piezoelectric generators [11], photovoltaic panels [12], and radio frequency (RF) energy [13]. Especially, solar energy can provide 0.1mW/cm2 in indirect sunlight and around 100mW/cm2 in direct sunlight in the daily environment, and the output voltages are usually weak, about 450mV~550mV from a single-cell photovoltaic panel. Also, passive high frequency radio-frequency identification (HF RFID) system transmits power through loop antenna with proper impedance matching; the received power by the tag is about 1mW when the distance between tag and reader is within 50cm [14].

The proposed system, illustrated in Fig. 1, is comprised of two energy sources. One is near DC input (solar) and the other is AC input (HF RFID). Through the power management unit, a stable output power with high conversion efficiency can be provided to the loading circuits, including the memory, a digital processor, demodulation, modulation, and sensors.

Since energy harvesting modules are mostly set in the outdoor, variations of the temperature, humidity and atmospheric pressure are a lot more serious. Digital controllers have several advantages over the analog, such as lower sensitivity to the environment, availability of powerful EDA tools, simple process migration. It is a trend to replace analog controllers in the DC-DC converters with digital ones [15]. Yet, digital controllers have to confront the limitations like data processing speed, quantization errors and limit-cycle oscillations [16]. Thus, this system is implemented with digital controller to sustain the relentless disturbance results from low supply voltages in outdoor. In addition, all circuits are designed in ultra-low power consumption.

In this paper, we present a self-sustaining integrated CMOS regulator for solar and HF RFID energy harvesting systems. In the front-end circuitry, a self-sustaining charge pump utilizing dynamic charge transfer switch (DCTS) with tunable voltages at the bottom of the pumping capacitors is proposed, which can effectively eliminate undesirable body effects and reverse charge sharing. Also, a low-complexity oversampling analog-to-digital converter (ADC) is proposed to quantize the error signal for the sigma-delta digital pulse-width modulation (DPWM) of the DC-DC switching converter.

A Self-Sustaining Integrated CMOS Regulator for Solar and HF RFID Energy Harvesting

Systems

Tsung-Heng Tsai, Member, IEEE, Bo-Yu Shiu, Student Member, IEEE, and Bo-Han Song

E



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This paper is organized as follows. Section II establishes the design criteria and optimization. Section III describes the implementation of the system. Section IV and V shows the measured experimental results of this system and provides summary, respectively.

II. DESIGN CRITERIA AND OPTIMIZATION

Dickson charge pump [17], the floating-well technique [18], the static charge transfer switch [19], and the dynamic charge transfer switch [20] are popular techniques for designing charge pumps. Dickson charge pump used diode-connected MOSFETs as charge transfer devices to pump charges in one direction, which typically has an increasing threshold voltage, Vth, due to the body effect. When more pumping stages are used, the increasing Vth will result in the degradation of the output voltage. Thus, the output voltage cannot be maintained as a near linear function of the number of charge pump stages, and the pumping efficiency will be highly degraded as the number of charge pump stages increases. Because of the reason, the structure cannot operate with a low supply voltage.

For the floating-well technique, the operation is similar to the Dickson charge pump, and the major difference is that the bulks of charge transfer device are floating in triple-well process. For the reason that, the floating-well technique can be applied to eliminate the body effect issue on the diode-connected P-MOSFETs. However, the floating-well technique may generate substrate current in floating-well devices to influence other circuits in the same chip and the voltage pumping gain per stage is possibly affected.

The charge pump utilizing static charge transfer switch is accompanied by an auxiliary pass transistor to direct charge flow and offers better voltage pumping gain and generates higher output voltage. This structure is suitable for low-voltage operation. However, it suffers from reverse charge sharing phenomenon during the designated period. Dynamic charge transfer switches (DCTS) are utilized to effectively eliminate

undesirable body effects and reverse charge sharing [20]. However, when applying DCTS technique in energy harvesting systems with low input voltages, it is challenging to generate the clock signals for the charge transfer switches. Furthermore, unstable energy sources usually result in large varying range at the output, which may introduce extra design challenges in the following DC-DC converter. In this work, a self-sustaining charge pump utilizing dynamic charge transfer switch (DCTS) with tunable voltages at the bottom of the pumping capacitors is proposed to provide a stable voltage from the HF RFID energy harvesting. We analyze the design requirements, such as the number of pump stages, capacitor sizes and the pumping frequency, so that an efficient, integrated, and low-power charge pump can be achieved. For the sake of simplicity, it will be considered without process variations to discuss the design criteria in this section.

A. Optimization Number of Pump Stages

For a defined loading capacitance, we want to design the charge pump that maximizes the driving capability. We model the basic output voltage of Dickson charge pump and derive equations for the best number of pumping stages. The output voltage of an N-stage charge pump with ideal diode or switch is equal to [21]

fC

NIVNV out

inout )1( (1)

where N is the number of stages, f is the switching frequency and C is the pumping capacitor in each stage and Vin is the input voltage from HF RFID reader. For energy harvesting concept, we have to minimize the power consumption. The hardware cost is assumed to be proportional to the square number of stages. Hence, the power-cost function for the number of stages can be shown below

Fig. 1. Simplified block diagram for two-input energy harvesting system.



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outoutin

outout VVVNN

fC

N

IV])1[(32 (2)

Assuming the average harvester voltage from HF RFID

reader and the output capacitance voltage is known, and in order to find the maximum value, we take the derivative of (4) with respect to the number of pump stages and set the result to zero. Thus, the optimal number of stages can be obtained:

in

outinop V

VVN

2

)(3 (3)

The peak input voltage is 0.16V, and Vout is 0.5V in this

design. The calculated output power per hardware cost versus pumping stage number is maximized when the number of pumping stages is 3. Note that when the output voltage is kept close to the defined voltage, 0.5V, maximum power extraction can be assured since the number of pumping stages is fixed in this design. Then, we proposed tunable voltages at the bottom of the pumping capacitors without any external pulse signal, so that a stable 0.5V can be achieved.

B. Capacitor Size and Clock Frequency

Given an optimal fixed number of stages, achieving higher output drive current can be achieved by increasing the size of the pumping capacitors C and clock frequency fclock. However, pumping capacitors are limited for an on-chip design and clock frequency is limited due to the switching losses that occur in the self-sustaining control circuits. Large charge transfer switch MOSFETs and pumping capacitors directly increase the output power, but the overall power consumption increases as well. Furthermore, increasing the size of pumping capacitors also increases the wire routing length of the clock signals and other internal connections in chip implementation, which will also increase the resistance and the parasitic capacitance. In the front-end circuit, an on-chip ring-oscillator provides a fixed frequency, 500kHz, and then this clock is sent to numbers of frequency multiplier, frequency divider or delay cells to further generate a variety of required clocks in this design. Since MOSFETs are employed to transfer charge, the parasitic capacitance in the internal nodes of the individual charge pump

stage is a major concern. Note that the harvested HF RFID energy is typically small (less than 1mW). A large capacitor to store charge during the transferring is not necessary. Thus, considering junction capacitance and diffusion capacitance in the layout of MOSFETs, a pumping capacitor of 10nF is selected for implementation of the charge pump in this design.

III. IMPLEMENTATION OF THE SYSTEM

A power management circuit generally includes a regulator, which converts the variable low voltage from solar and HF RFID to a stable output voltage for the loads.

The power management system, illustrated in Fig. 2, includes the front-end circuitry and a DC-DC switching converter with digital controller. We utilize single-cell photovoltaic panel to generate input voltages ranging from 0.45V to 0.55V. On the other hand, by an activated reader, the energized inductive coil produces an AC voltage at 13.56MHz ranging from 30mV to 160mV, which will be fed into the impedance matching circuit for achieving optimum power delivery performance. The front-end circuitry makes the decision on selecting the solar or HF RFID energy. When the sunlight is sufficient, solar path is designed to have higher priority to deliver energy to the DC-DC switching converter over the HF RFID path. For the HF RFID path, in order to improve the conversion efficiency, the output voltage is optimized by the proposed self-sustaining charge pump with a tunable voltage at the output of each charge pump capacitor. Since the induced AC voltage on the HF RFID antenna is typically small, avoiding additional power loss is the major design challenge. In this work, the antenna voltage is sampled and held constant for a period of time. While holding, the sinusoidal signal from HF RFID antenna can be converted into a constant voltage. This voltage is compared with the previously held value. Then, an analog multiplexer is utilized to select the big one, which will then be kept as the input of the self-sustaining charge pump block. Higher input voltage means larger power for energy harvesting.

Moreover, the output voltage of the front-end circuitry is regulated at a stable voltage (i.e. 0.5V). Then, it will be further boosted to 1V by the DC-DC switching converter. The detail operation of the individual circuit is as follows.

Fig. 2. Overview of the power management system, including a self-sustaining charge pump, startup, and a digitally controlled DC-DC switching converter.



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The architecture of the DC-DC switching converter is shown in Fig. 3. The converter output voltage Vo is divided by two series resistors Rf1 and Rf2, and the ADC quantizes the difference between bVo and Vramp. The error codes e[n] will be the input of the digital compensator to calculate a corresponding duty ratio and compensate the poles and zeros of the overall system to stabilize the system [22] [23]. To avoid the limit-cycle oscillation, the resolution of the DPWM must be greater than that of the ADC. Hence the digital sigma-delta modulator has been adopted in this design to increase the equivalent DPWM resolution [24]. In addition, to prevent that both power transistors are turned on at the same time, certain dead time must be guaranteed. The PWM signal generated by the sigma-delta DPWM will enter the dead-time control circuit. Appropriate dead-time for driving N-type power MOS transistor and P-type power MOS transistor will be produced consequently. Two drivers are also implemented on the chip with the power MOS transistors.

A. High frequency RFID

HF RFID energy, a frequency in the range of 13.56MHz, is received by the antenna of the reader. The harvesting HF RFID system in passive tag, working in the near field, has a typical working distance range from several centimeters to about one meter. From [14], the antenna can receive more than 1mW when the distance is within 50 centimeters.

In this work, we harvest sufficient power at the passive tag to

front-end circuitry. This energy harvesting system is tested with commercially available photovoltaic panel and HF RFID tags. Fig. 4 shows the developed demonstration of the two-input energy harvesting system. The HF reader with built-in antenna

delivers power to passive tags at intervals of a fixed period of time, and then the received information is delivered to a computer and displayed on the screen.

The HF reader can emit 1W (maximum power allowed by national regulations) and the reading distance is within 20 centimeter. Fig. 5 shows the experimental results, where the X-axis represents the distance difference between the centers of two antennas, and the Y-axis represents the ratio of the receiver power ratio. The case that two antennas separated by 10 centimeters is used as a reference.

B. High frequency RFID

The optimization criterion for the antenna is to deliver maximum power to the chip input. For maximum chip input power, it is necessary to match the antenna coil to the output impedance of the HF RFID circuit at operation frequency. As a result, the lack of reflections within a receiver system improves signal to noise and therefore performance of reader as possible. While many novel matching circuit designs have been explored over the past decade, it can be used to match the load to the HF source, such as an L, T or π-matching network.

We use L-matching network due to its simplicity and ease of

tuning. In Fig. 6, equivalent circuit consists of the inductor, Ls, a serial resistor Rs which represents the wire resistance, and then a capacitor Cs which results from the geometry of the copper track on the substrate. Moreover, an inductor XL and a capacitor XC are defined Q-factor, and then they transform the complex impedance of the antenna coil to the desired impedance of 50Ω in the matching circuit. A resistor RL is the input loading of chip.

The value of Q-factor can be calculated with

Fig. 3. The architecture of the DC-DC switching converter.

Fig. 4. Demonstration of the energy harvesting system.

Fig. 5. Measurement result by using HF RFID module.

Fig. 6. L-matching network.



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1C

L

X

X

Z

ZQ (4)

where

LXZ and CXZ are the impedance of a inductor and a

capacitor, respectively. So the required inductor and capacitor in the L-matching network can be calculated as below

C

L

X

X

Z

QC

QZL

, (5)

The described matching method in now used to match the

measured antenna coil to the front-end circuitry of HF RFID and to determine the needed values of the inductor and capacitor in the L-matching network

C. Dynamic Charge Transfer Switch

As described in section II, traditional charge pump always suffer from increasing drain-source drop across every charge transfer MOS switch. The drop is affected by the threshold voltage which gradually rises and results in decreased drain-source currents. Therefore, a self-sustaining charge pump utilizing dynamic charge transfer switch (DCTS) with tunable voltages at the bottom of the pumping capacitors is proposed. Fig. 7 shows the complete circuit of the three-stage charge pumps using the proposed dynamic charge transfer switches.

MD1–MD4 are diodes being reverse biased for setting up the

initial voltage at each pumping node. They are not involved in the pumping operation. The proposed charge pump utilized dynamic charge transfer switch assigns the gate control input of each transfer switch to the higher voltage level provided by the higher voltage from the next pump stage. The low voltage level

is provided by ground. MS1-MS3 are the dynamic charge transfer switches (DCTS).

We use DCTS to direct the flow of charges in the pumping operations, the MOSFET switches with proper ON/OFF cycles in the designed period. When Clk rises from low to high and Clkb drops from high to low, the voltage at N1 is boosted by ΔV while N2 is down by ΔV, where ΔV is the voltage fluctuation of each pumping node. Here, 2ΔV is higher than the threshold voltage of MS2, and the charge flows to node2. MS2 and MD2 are turned on, shown in Fig. 8(a). When Clk becomes low and Clkb becomes high, the gate voltage of MS2 drops to GND. Thus, no current can flow through MS2. Thus, reverse charge sharing phenomenon is eliminated because MS1-3 are turned off completely by either Clk or Clkb, shown in Fig. 8(b). The peak voltage of Clk and Clkb at the output of each pumping capacitor is tunable through a self-sustaining scheme. More detail of the self-sustaining controller will be presented in the following section. Thanks to the tuning scheme, Clk and Clkb can be directly connected to the gate and drain terminals of the switches (MH1-MH3 and ML1-ML3) and provide tunable voltages to produce a constant output voltage. We also prevent the output voltage in this process from over breakdown voltage of the capacitors at the same time. The optimal stage number is three for our system specifications. The three-stage charge pump can deliver 0.5V from HF RFID energy, and the transferred charge is stored in the output capacitor.

D. Self-Sustaining Controller

The complete self-sustaining controller circuit consists of four different blocks as shown in Fig. 9. In our implementation, the number of pumping stages is fixed at 3 while the peak voltage of Clk and Clkb at the output of each pumping capacitor is tunable. This allows measurements with a large variation in the wide conversion factor. The detail operation is as follows.

First, HF RFID energy from the antenna is rectified with the sample-and-hold circuits, and then pumped up after 3 charge pump stages to generate Vocp. A pulse amplitude modulation (PAM) circuit included buffers is utilized to generate non-overlapping two clocks, Clk and Clkb, with adjustable peak voltage Va. Therefore, Vocp is regulated at a stable voltage, 0.5V. Then, Vocp will be further boosted to 1V by the DC-DC switching converter. Vocp is compared with a reference voltage, and then the output digital codes are counted by a 4-bit counter. The dynamic digital current controller (DDCC) detects the digital codes to adjust output voltage Va generated by the output current flowing into a resistor, correspondingly. Then Va

determines the peak values for two clock pulses, Clk and Clkb,

Fig. 7. The proposed three-stage charge pump using dynamic charge transferswitch.

Fig. 8. The operation of DCTS (a)MS2 is on (b)MS2 is off.

Fig. 9. The block diagram of the self-sustaining controller.



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which are having the same peak voltage and complement phase to each other.

In order to get the appropriate value of Va, we monitor Vocp at any time. Fig. 10 shows the schematic of the 4-bit dynamical digital current controller and pulse amplitude modulation. Four digital bits B[3-0] control the total current through the transistors. Mc0 to Mc3, which are sized in a binary-weighted fashion, generate the binary-weighted currents, and Va is proportional to the mirrored current Ia.

E. Oversampling ADC

In our system, ADC is the most critical block in the proposed digital controller. It is used to provide the interface between the digital compensation network and analog power MOSFETs train. In the prior art, the delay-lines ADC [24] and the ring-oscillator ADC [25] are popular techniques for digitally controlled switching converters. Both techniques require delay cells to construct the circuits. If the number of delay cells is huge, there will be matching problems, such as the connection within delay cells, or the gradient effect caused by the placing of delay cells. Furthermore, various numbers of cells in the ring oscillator and bias currents are used to adjust the quantization resolution. The oscillation frequency of the ring-oscillator ADC is based on the bias current. When the operation frequency becomes higher, the power consumption of the chip increases.

In a digital controller, the purpose of ADC is to analyze the difference between the converter output voltage and the reference voltage. The error codes will be generated only once in a switching period, then the compensator will calculate the proper pulse width for the next switching cycle. Since a comparator can easily operate at a clock rate much faster than the system switching frequency without spending a lot of power, the oversampling concept is introduced for detecting the difference. This paper proposes an oversampling ADC utilizing a comparator as the main circuit block. Compared with ring-oscillator ADC or delay-line ADC, the complexity and power consumption of the proposed oversampling ADC are much lower and the overall resolution is not compromised. Fig. 11 illustrates the schematic of the oversampling ADC with the ramp generator. The schematic of the comparator is shown in Fig. 12, which is implemented based on the sense-amplifier

architecture.

The ramp generator consists of a current source Ibias, a reference voltage Vref1, a capacitor Cramp, and two switches controlled by non-overlapping clock phases Φ1 and Φ2. Initially, Φ1 is ON and Φ2 is OFF. The capacitor Cramp is charged by Vref1. Then, when Φ1 is switched to OFF and Φ2 is ON, the current source Ibias starts to charge Cramp and Vramp rises from Vref1. The current source Ibias is tunable from outside of the chip to make the average of Vramp equal to the ideal bVo. To minimize the power consumption, Ibias is chosen to be 1μA. In this work, bVo is 0.25V, Vref1 is 0.2V and Vramp rises from 0.2V to 0.3V periodically. The output of the comparator will be pre-discharged to low before each comparison. The comparator outputs will be further encoded to produce e[n].

The error codes e[3-0] will be generated only once in a switching cycle. Then, the compensator will calculate the proper pulse width for the next switching cycle. Oversampling concept is introduced for detecting the difference. Here, a comparator is utilized as a one-bit oversampling ADC and will execute 32 comparisons in one switching period (oversampling rate is 32). The subjects of the comparison are the divided

Fig. 10. The two block of the self-sustaining controller, dynamic digitalcurrent controller and pulse amplitude modulation.

Fig. 11. The schematic of the oversampling ADC with the ramp generator.

Fig. 12. The schematic of the comparator, implemented based on thesense-amplifier architecture.

Fig. 13. Simulation results of the comparator. (a) bVo= 270 mV and there are22 ‘1’ in Out[n] (b) bVo = 230 mV and there are 8 ‘1’ in Out[n].



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DC-DC switching converter output voltage bVo, and a ramp signal, Vramp, generated in accordance with the reference voltage. In Fig. 13, it can be observed that when bVo gradually decreases, the number of ‘1’s in one switching period decreases. For example, when bVo = 270 mV and there are 22 ‘1’s in Out[n] in the period of 1μs. And, the number of ‘1’s becomes 8 when bVo = 230mV. By counting the number of ‘1’s, e[3-0] can be further processed through an encoder.

F. Startup Circuit

In the initial state of energy harvesting, solar energy is stored in storage elements such as a battery or super-capacitors. Thus, startup is usually required to initialize the controller [26]. Because the voltage obtained through the antenna of the energy harvesting system for wireless transmission application is typically unstable and with low voltage, we select to use solar energy to generate initializing voltages for proper functions of the digital controller. In this paper, the startup circuit consists of an integrated energy scavenging photodiode, a storage capacitance, a ring oscillator, and buffers to drive the signal into the gate of two power MOS transistors. At the beginning, the single photodiode produces about 0.5V in near 3.5kW/m2 light intensity [27], and the threshold voltage of the ring oscillator and other digital logic circuit in this design is around 250mV. Power MOS transistors will start switching according to the fixed duty ratio generated by the eleven-stage ring oscillator, and further boost the output voltage of the converter. Finally, the eleven-stage ring oscillator continues to work and the output signal is increasing and sent to the self-sustaining controller. When the voltage is high enough, the DPWM of the digital controller functions properly, and then replaces the ring oscillator and provides the required duty ratio after startup.

IV. CHIP LAYOUT AND MEASUREMENT RESULTS

The complete two-input digitally controlled energy harvesting system with self-sustaining charge pump is implemented in a TSMC 0.18μm CMOS 1P6M process technology. Fig. 14 shows the chip microphotograph of the front-end circuitry and DC-DC boost switching converter. The overall chip area is 1.538 x 1.368 mm2, including forty-eight pads. We also use commercially available components, including the inductor and the output capacitance in DC-DC boost switching converter. The value of the inductance and the parasitic component are 4.7μH and 5mΩ ± 10% and the value of the capacitance is 10μF and 100mΩ ± 20%, respectively.

Through a loop antenna, the gain of the RFID reader is 8dBi in energy harvesting measurement for good linearity. Fig. 15 shows the measured waveforms that illustrate the switching energy sources between solar panels and HF RFID tags in the steady state. The output of two harvester sources is continuously connected at the input of the chip. To verify the switching scheme between two energy sources, a signal generator provides a sinusoid with amplitude ranges of 300mV-700mV and frequency of 100Hz to model the illumination variations of PV panels. As Vsolar does not change rapidly, we use 100Hz signal to test the upper bound of the illumination variations. Measurement results show that the

front-end circuitry can successfully detect the input status. When the voltage from the solar path is below 550mV, HF RFID path is selected automatically, and then the output voltage of self-sustaining charge pump is sent to DC-DC switching converter. The measured output ripple is approximate 27mV.

Fig.16 shows regulated output signal Vo of the energy harvesting system and PWM control waveform Vduty in the start-up process. The measurement setup is as shown in Fig. 2.

Fig. 14. Chip micrograph.

Fig. 15. The measured waveforms of the automatic switching energy sourcesbetween solar panels and HF RFID tags in the steady state.

Fig. 16. The overview measured waveforms of the voltages during startupfrom solar panels. Time scale is 40ms/div.



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In the beginning, the solar panel produces about 0.5V in near 3.5kW/m2 light intensity and the solar voltage, Vsolar, is directly sent to charge the 10μF input capacitor. It can be observed that the startup circuit pulls up the output voltage from 0V in this period of time. When the output voltage is sufficient for driving the dead-time control circuit and the driver of the power transistor, the power transistor will be switched according to the fixed duty ratio generated by the eleven-stage ring oscillator with the compensation enabled. Until the output voltage reaches 0.8V to supply the system functions, the oversampling ADC analyzes the difference between the converter output voltage and the reference voltage, and then digital controller successfully works and provides duty cycle at 1MHz switching frequency.

Fig. 17 demonstrates the measured steady state operation of the energy harvesting system in the light load. It is shown that the digital controller provides regulated output voltage without limit cycle oscillations and noise from instruments even though the resolution of the core DPWM is only 4 bits. It can be seen that digital sigma-delta modulator increase the equivalent resolution of the DPWM. Once oversampling ADC detects output voltage slightly change, approximate 12mV, the modulator changes duty ratio ton.

Fig. 18 shows the measured end-to-end conversion efficiency curves of two-input energy harvesting system as load current changes. The end-to-end conversion efficiency is defined as the ratio of the power obtained at the load to the maximum power available from harvest sources. A maximum conversion efficiency of 57% is achieved when the loading current is 65μA. Because the harvested energy from HF RFID has been limited by the antenna gain, we do not plan to support heavy load while connecting to the HF RFID input. Under the measurement environment, the maximum load current that HF RFID can supply is about 65μA. In low-power applications, the continuous conduction mode operation has the negative-flowing inductor current problem which is the major losses during the switch of two power transistors. We utilize power MOS buffer to reduce the rising/falling time of the PWM signal, and minimize the switching losses. For ultra-low-power applications, the power of state-of-the-art work required for the operation is in the order of 100–500μW [28] and the power consumption of control circuit should be only a fraction of that. Reported power consumption of the management/control circuits is in the range of 70μW [7] to tens of microwatts [20]. In this work, the power consumption of the front-end circuitry is merely 60μW, and no external battery or clock pulses are required. This work provides a regulated output voltage of 1 V with the maximum output power of 170µW and the maximum efficiency of 57%.

Table I compares the performance of the proposed regulated energy harvesting system with the state-of-the-art circuits. The energy sources in these works are divergent, but all target to harvest from unstable energy with good conversion efficiency. In this work, the circuit uses a fraction of the harvested energy on the load to supply itself. Low-power and mixed-signal techniques are exploited to maximize the usage of the harvested energy.

V. CONCLUSION

A solar and HF RFID energy harvesting system with a self-sustaining digital controller is presented in this paper. The charge pump utilizes dynamic charge transfer switch to push the charges only in one direction. Reverse charge sharing phenomenon and threshold voltage limitation are eliminated. A fixed number of pumping stages and tunable voltages are utilized to allow a wide range of conversion ratios and achieve good pumping performance. An oversampling ADC is also

Fig. 17. The measured waveforms of output voltage at 1V and PWM signal indetail. Time scale is 1μs/div.

Fig. 18. Efficiency result (η=Pout/Pin).

TABLE I COMPARISON TABLE

Ref. [28] [29] [30] This work

Technology 0.35μm 0.5μm 0.18μm 0.18μm

Min. Input Voltage

25mV 600mV 1.25V 30mV

Output Voltage

1.8V 3V 1V 1V

Peak Efficiency

(end-to-end)58% 60% 51% 57%

Energy Source

Thermo. Magnetic Vibration

RF Solar or RF

Load Current

(µA) 30-277 300-15000 10-100 35-170



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proposed in this work. Compared with conventional ring-oscillator ADCs or delay-line ADCs, the oversampling ADC has lower complexity and the overall resolution is not compromised. This system successfully starts-up under low input voltages and provides a 1.0V output voltage for the loading. From measurement results, the digital controller is verified to be capable of stabilizing the output voltage without limit-cycle oscillation. Maximum conversion efficiency of about 57% is achieved when the load current is about 65µA in chip measurement.

ACKNOWLEDGMENT

The authors would like to acknowledge fabrication support provided by National Chip Implementation Center (CIC), Taiwan.

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Tsung-Heng Tsai(S'99, M'05) received the B.S. degree in control engineering from National Chiao Tung University, Hsinchu, Taiwan, in 1994, the M.S. degree in electrical engineering from the University of Southern California, Los Angeles, in 1998, and the Ph.D. degree in electrical and computer engineering from the University of California, Davis, in 2005.

Since 2005, he has been with the faculty of the Department of Electrical Engineering, National Chung Cheng University, Chia-Yi, Taiwan, where he is currently an Associate Professor. His main research interests are in CMOS mixed-signal integrated-circuit designs for energy harvesting systems and biomedical sensor systems.



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Dr. Tsai was the recipient of the Outstanding Teaching Award from National Chung Cheng University in 2011. He serves as IEEE Solid-State Circuit Society Tainan Chapter vice chairman starting from 2013. Dr. Tsai has served on the Technical Program Committees of the IEEE Asian Solid-State Circuits Conference.

Bo-Yu Shiu was born in Taichung, Taiwan, R.O.C., in 1985. He received the B.S. degree in Electrical Engineering from Tamkang University, New Taipei City, Taiwan, in 2007. He is currently pursuing the Ph.D. degree from the Institute of Electrical Engineering, National Chung Cheng University, Chai-Yi, Taiwan. His

main research interests are in mixed-signal integrated-circuit designs, and analog to digital data conversion.

Bo-Han Song was born in Kaohsiung, Taiwan, R.O.C., in 1988. He received the M.S. degree in Electrical Engineering from National Chung Cheng University, Chai-Yi, Taiwan, in 2013. In 2013, he joined Faraday Technology Corporation, Taiwan. His research interests include the low-power energy harvesting systems,

switching converters and mixed-signal integrated-circuit designs.

a self-sustaining integrated cmos regulator for solar and hf rfid energy harvesting systems

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