a novel 2stage

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A NOVEL TWO-STAGE INVERTER FOR LARGE ON GRID PHOTOVOLTAIC SYSTEM Ripan Kumar Dhar 1 , Md Jakaria Rahimi 2 Department of Electrical & Electronics Engineering, Ahsanullah University of Science & Technology 141-142 Love Road, Tejgaon I/A, Dhaka – 1215, Bangladesh 1 [email protected] 2 [email protected] 1

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Page 1: A Novel 2stage

A NOVEL TWO-STAGE INVERTER FOR LARGE ON GRID PHOTOVOLTAIC SYSTEM

Ripan Kumar Dhar1, Md Jakaria Rahimi2

Department of Electrical & Electronics Engineering, Ahsanullah University of Science & Technology141-142 Love Road, Tejgaon I/A, Dhaka – 1215, Bangladesh

[email protected]@gmail.com

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Abstract - For inverter-based PV systems in grid-connected applications as distributed generators (DG), variable sources often cause wide changes in the inverter input voltage above and below the output ac voltage, thus demanding a buck-boost operation of inverters. Many traditional full-bridge buck inverters, two-stage inverters, single-stage buck-boost inverters either have complex structure or have limited range of input dc voltage. This paper focuses on the analysis of the working principles, computer simulation of the operation, and design consideration of the inverter for grid-connected applications.

Keywords: Boost Inverter, Photo voltaic system, Modulation Index, Duty Cycle, Curve fitting.

I. INTRODUCTION

For inverter-based PV systems in grid-connected applications as distributed generators (DG), resources often cause wide variations in the input voltage to inverters above and below the output ac voltage. This is particularly true for PV and wind systems. This then demands the buck-boost (i.e., step-down and step-up) operation of inverters. A general structure ofthe grid-connected PV systems is shown in Figure 1.

Fig 1: PV systemTraditional full-bridge buck inverters as shown in Figure:2 do not have the flexibility of handling a wide range of input dc voltage, and require heavy line frequency step-up transformers [Xue et al., June 2004]. Although this topology currently has the largest market share of the commercial PV system market due mainly to its simplicity and electrical isolation, it is gradually replaced by advanced topologies using “more silicon and less iron”. This leads to the pursuance of compact designs with wide input voltage ranges and improved efficiency [1-3].

Fig 2. Buck inverter with a low frequency transformer.

Two-stage inverters normally accomplish dc voltage boost in the first stage, and achieve buck dc-ac conversion in the second stage, with a typical high- frequency transformer to accomplish the voltage boost as shown in Figure 3 [Xue, et al., June 2004]. Although they can accommodate a wide range of input voltage, the complicated structure makes them costly, particularly for small PV systems.

Figure 3: Buck inverter with a low frequency transformer

A single-stage inverter is an inverter with only one stage of conversion for both stepping-up and stepping-down the dc voltage from PV sources and modulating the sinusoidal output current or voltage Single-stage buck-boost inverters, as presented in Figure 4, have a simple circuit topology and low component count, leading to low cost and high efficiency. Previously Available single-stage buck boost inverter either need more than 4 power switching devices or have a limited range of input dc voltage. Most of them have two symmetrical dc-dc converters operating in the opposite phase angle in order to generate a sinusoidal current waveform feeding to a single-phase grid.

II. THEORY OF SINUSOIDALPULSE WIDTH MODULATIO(SPWM)

Instead of maintaining the width of all pulses the same as in the case of multiple-pulse modulation, the width of each pulse is varied in proportion to the amplitude of a sine wave evaluated at the center of the same pulse [7]. The DF and LOH are reduced significantly. The gating signals as shown in Figure 2.13 are generated by comparing a sinusoidal reference signal with a triangular carrier wave of frequency ; and its peak amplitude

controls the modulation index M, and the in turn the . controls the modulation index M, and the in turn the rms ouput voltage . Comparing the bidirectional carrier signal with two sinusoidal reference signals and

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- shown in Figuire 16 produces a gating signals

and , respectively as shown in Figure 2.13

Figure 2.13- SPWM signal

The output voltage is = ( ). However, and

can not be released at the same time. The number of

pulses per half cycle depends on the carrier frequency. Within the constraint that two transistors of the same

arm ( and ) cannot conduct at the same time, the

instantaneous output voltage is shown in figure 16. The same gating signals can be generated by using unidirectional triangular carrier wave as shown in Figure 2.13. It is easier to implement this method and is preferable. The algorithm for generating the gating signals is similar to that for the uniform PWM. Except

the reference signal is a sine wave = sin ωt, instead

of a dc signal. The output voltage is = ( ) .

The rms output voltage can be varied by varying the modulation index M. It can be observed that the area of each pulse corresponds approximately to the area under the sine wave between the adjacent midpoints of off

periods on the gating signals. If is the width of the

mth pulse, now to find the rms output voltage---

= ( …………..(2.23)

= sin [sin n ( ) - sin n (π + + )]

For n= 1,3,5……(2.24)

A computer program is developed to determine the width of pulses and to evaluate the harmonic profile of sinusoidal modulation. The harmonic profile is shown in Figure 2.13 for five pulses per half cycle. The DF is significantly reduced compared with that of multiple pulse modulations. This type of modulation eliminates all harmonics less than or equal to 2p-1. For p=5, the LOH is ninth.

The mth time and angle of intersection can be

determined from

= = + m ……………………..(2.25)

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Where can be solved from

1 - = M sin [ ω( + )] for m = 1,3…., …….(2.26 )

= M sin [ ω( + )] for m = 2,4,…., ……..(2.27 )

Where = (p + 1).The width of the mth pulse (or

pulse angle ) can be found from

= = - ……….. (2.28 )

III. CIRCUIT SIMULATIONS AND RESULTS

In our work we tried to focus on the behavior of the SPWM modulator on the when the modulation index and the duty cycle are varied.

In this simulation the circuit parameters are chosen as L=10mh, C=400uf, R=100 ohm. The diodes are MUR850f and the switches are IRGBC40u. The input voltages are chosen to be 12V, 24V, 48V and 100V.In each setting the modulation index is varied from 0.1 to 1.5.

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Table for output voltage and current varying source voltage and modulation index:

SourceVoltage ( ) Modulation Index Output Voltage(

)

Output Current(

)

Total Harmonic

Distortion

12 V

1 827.17 mV 4.17 mA 2.70

7 33.25 mV 165.57 mA 3.29

10 39.94 mV 199.62 mA 1.10

15 40.71 mV 204.17 mA 1.67

24 V

1 5.25 V 26.19 mA 2.51

7 71.63 V 359.52 mA 3.39

10 82.54 V 413.22 mA 1.18

15 84.06 V 420.34 mA 1.74

48 V

1 16.25 V 81.45 mA 1.27

7 148.88 V 744.03 mA 3.42

10 167.96 V 839.78 mA 1.22

15 170.71 V 854.05 mA 1.77

100 V

1 39.28 V 197.60 mA 9.02

7 316.10 V 1.58 A 3.43

10 352.37 V 1.76 A 1.23

15 358.50 V 1.79 A 1.79

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Variation in output voltage, output current and THD with the variation of Duty Cycle:

When capacitor is 800u and inductor is 16mh and load 20r

Input voltage Duty cycle Out put voltage

( )

Output current

( )

THD

12v .125 msec 90.217 v 4.5109 A 2.0039 %

.135 msec 97.650 v 4.8049 A 2.0002 %

.145 msec 105.468 v 5.2734 A 1.9810 %

.165 msec 119.074 v 5.9775 A 1.9949 %

.185 msec 133.226 v 6.7034 A 1.9887 %

.2 msec 144.536 v 7.2414 A 1.9827 %

.215 msec 155.631 v 7.7583 A 1.9768 %

.225 msec 162.659 v 8.1390 A 1.9669 %

.245 msec 176.113 v 8.8542 A 1.9720 %

.265 msec 179.449 v 8.9639 A 1.9676 %

.3 msec 179.200 v 9.0100 A 1.9676 %

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Variation in output voltage, output current and THD with the variation of Duty Cycle:

When capacitor is 500u and inductor is 16mh and load 20r

Input voltage Duty cycle Out put voltage

( )

Output current

( )

THD

%

12v .125 msec 137.705 6.8927 4.2902

.135 msec 149.153 7.3964 4.2717

.145 msec 159.755 7.9327 4.2454

.165 msec 183.051 9.111 4.2633

.185 msec 203.894 11.299 4.2578

.2 msec 221.496 11.073 4.2523

.215 msec 237.288 11.887 4.2435

.225 msec 246.908 12.429 4.2466

.245 msec 274.041 13.559 4.2470

.265 msec 282.096 13.672 4.2329

.3 msec 281.812 13.672 4.2329

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Variation in output voltage, output current and THD with the variation of Capacitors value:

Capacitor value Inductor value Output voltage

(volt)

Output current

(Ampere)

THD

%

100 u 16mH 415.254 20.113 60.37 Huge distortion

200 u 406.780 20.329 21.789 “

300 u 375.706 18.814 9.8105

400 u 322.034 16.064 6.1030

500u 273.446 13.559 4.2392

600u 235.028 11.638 3.1463

700u 203.649 10.197 2.4374

800u 181.447 8.9845 1.9641

900u 159.322 7.9540 1.632

1000u 143.463 7.1832 1.3898

1100u 131.073 6.5537 1.2121

1200u 119.993 6.0039 1.0599

1500u 94.757 4.7458 0.8657

2000u 72.316 3.6158 0.8091

3000u 50 2.4954 0.9223

4000u 36.441 1.8220 0.9900

6000u 24.625 1.2305 1.123

9000u 17 863.211 mA 1.21

1m 143.081 7.17 1.3898

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2m 71 3.44 0.809

4m 37 1.8171 0.990

8m 18.699 934.763 mA 1.19

12m 14 704.791 mA 1.3

Variation in output voltage, output current and THD with the variation of Inductors value:

Capacitor value Inductor value Output voltage Output current THD

500 u 5 mH 354.802 17.947 33.125

10 411.079 20.840 9.2687

15 291.525 14.626 4.7159

20 216.949 10.841 2.9239

25 171.751 8.5990 2.0287

35 119.744 6.0452 1.2643

60 68.927 3.5547 1.6319

80 52.632 2.5945 2.8683 Stability comes lately

100 43.108 2.1695 6.8291 “

200 Huge Distortion “

300 “ “ “

550 u 17 mH 237.288 11.977 3.2748

IV. CONCLUSION

In our work, our findings are that the output is greatly affected by the modulation index and Duty cycle.. In our next work we intend to develop a robust close-loop control scheme for a boost inverter.

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References:

[1] Ram´on O. C´aceres and Ivo Barbi, “A Boost DC–AC Converter: Analysis, Design, and Experimentation,” IEEE Transactions on Power Electronics, vol. 14, no. 1, pp. 134-141, January 1999.[2] Vatche Vorperian, “Simplified Analysis of PWM Converters Using Model of PWM Switch Part I: Continuous Conduction Mode,” IEEE Transactions on Aerospace and Electronic Systems, vol. 24, no. 3, pp. 490-496, May 1990.[3] Khai D. T. Ngo, “Alternate Forms of the PWM Switch Models,” IEEE Transactions on Aerospace and Electronic Systems, vol. 35, no. 4, pp. 1283-1292, October 1999.[4] Ram´on O. C´aceres, Ivo Barbi,” A Boost DC–AC Converter: Analysis, Design, and Experimentation”, IEEE transactions on power electronics, vol. 14, pp. 134-141, January 1999.[5] R. C´ aceres and I. Barbi, “A boost dc–ac converter: Operation, analysis, control and experimentation”, inProc. Int. Conf. Industrial Electronics, Control and Instrumentation (IECON’95), pp. 546–551, Nov. 1995.

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