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JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, VOL.16, NO.6, DECEMBER, 2016 ISSN(Print) 1598-1657 https://doi.org/10.5573/JSTS.2016.16.6.793 ISSN(Online) 2233-4866 Manuscript received Mar. 18, 2016; accepted Aug. 28, 2016 School of electrical and computer engineering, Ulsan National Institute of Science and Technology, Ulsan, Korea E-mail : [email protected] A Multi-purpose Fingerprint Readout Circuit Embedding Physiological Signal Detection Won-Jin Eom, Sung-Woo Kim, Kyeonghwan Park, Franklin Bien, and Jae Joon Kim Abstract—A multi-purpose sensor interface that provides dual-mode operation of fingerprint sensing and physiological signal detection is presented. The dual-mode sensing capability is achieved by utilizing inter-pixel shielding patterns as capacitive amplifier’s input electrodes. A prototype readout circuit including a fingerprint panel for feasibility verification was fabricated in a 0.18 mm CMOS process. A single-channel readout circuit was implemented and multiplexed to scan two- dimensional fingerprint pixels, where adaptive calibration capability against pixel-capacitance variations was also implemented. Feasibility of the proposed multi-purpose interface was experimentally verified keeping low-power consumption less than 1.9 mW under a 3.3 V supply. Index Terms—Multi-sensor interface, fingerprint sensor, physiological sensor, readout integrated circuit, dual-mode operation I. INTRODUCTION Fingerprint sensors have recently been embedded in mobile devices as an identification technology, and emerging mobile-payment services will likely increase the number of devices that adopt fingerprint sensors for security and convenience [1, 2]. This trend will further consolidate miniaturization and low-power requirements in mobile applications. Commonly used fingerprint technologies include optical sensors, capacitive sensors, pressure sensors, and ultra-sound sensors. Among these technologies, commercially available in mobile phones are only capacitive fingerprint technologies because optical sensors are relatively big in size and other sensor technologies are not matured [3, 4]. When a higher level of security is required, the fingerprint sensor can be combined with physiological sensing technologies such as body impedance sensing [5] to provide a fraud detection function. This paper presents a low-power fingerprint interface that embeds a different type of physiological sensor, which proposes a new pixel structure to utilize inter-pixel AC grounds as bio-potential sensing electrodes. This also features real-time automatic calibration and parasitic cancellation for capacitive fingerprint pixels maintaining overall low-power performance. Section II shows the architecture of proposed readout circuit and simulation result. In Section III, fabrication and measurement result is shown. Section IV gives the conclusion. II. MULTI-PURPOSE INTERFACE DESIGN A multi-purpose fingerprint interface using only the standard CMOS process is proposed as shown in Fig. 1(a), where top-metal electrodes and fingerprint patterns through a passivation layer constitute capacitive pixels. Pixel capacitances vary with fingerprint patterns of ridges and valleys. To achieve fine resolution for the pattern, top-metal electrodes should be located closely together, which causes considerable parasitic capacitance between them and degrades sensitivity. To minimize this parasitic capacitance effect, ground-shielding electrodes were carefully inserted between adjacent fingerprint

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Page 1: A Multi-purpose Fingerprint Readout Circuit Embedding ... · A Multi-purpose Fingerprint Readout Circuit Embedding Physiological Signal Detection Won-Jin Eom, Sung-Woo Kim, Kyeonghwan

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, VOL.16, NO.6, DECEMBER, 2016 ISSN(Print) 1598-1657 https://doi.org/10.5573/JSTS.2016.16.6.793 ISSN(Online) 2233-4866

Manuscript received Mar. 18, 2016; accepted Aug. 28, 2016 School of electrical and computer engineering, Ulsan National Institute of Science and Technology, Ulsan, Korea E-mail : [email protected]

A Multi-purpose Fingerprint Readout Circuit Embedding Physiological Signal Detection

Won-Jin Eom, Sung-Woo Kim, Kyeonghwan Park, Franklin Bien, and Jae Joon Kim

Abstract—A multi-purpose sensor interface that provides dual-mode operation of fingerprint sensing and physiological signal detection is presented. The dual-mode sensing capability is achieved by utilizing inter-pixel shielding patterns as capacitive amplifier’s input electrodes. A prototype readout circuit including a fingerprint panel for feasibility verification was fabricated in a 0.18 mm CMOS process. A single-channel readout circuit was implemented and multiplexed to scan two-dimensional fingerprint pixels, where adaptive calibration capability against pixel-capacitance variations was also implemented. Feasibility of the proposed multi-purpose interface was experimentally verified keeping low-power consumption less than 1.9 mW under a 3.3 V supply. Index Terms—Multi-sensor interface, fingerprint sensor, physiological sensor, readout integrated circuit, dual-mode operation

I. INTRODUCTION

Fingerprint sensors have recently been embedded in mobile devices as an identification technology, and emerging mobile-payment services will likely increase the number of devices that adopt fingerprint sensors for security and convenience [1, 2]. This trend will further consolidate miniaturization and low-power requirements in mobile applications. Commonly used fingerprint

technologies include optical sensors, capacitive sensors, pressure sensors, and ultra-sound sensors. Among these technologies, commercially available in mobile phones are only capacitive fingerprint technologies because optical sensors are relatively big in size and other sensor technologies are not matured [3, 4]. When a higher level of security is required, the fingerprint sensor can be combined with physiological sensing technologies such as body impedance sensing [5] to provide a fraud detection function.

This paper presents a low-power fingerprint interface that embeds a different type of physiological sensor, which proposes a new pixel structure to utilize inter-pixel AC grounds as bio-potential sensing electrodes. This also features real-time automatic calibration and parasitic cancellation for capacitive fingerprint pixels maintaining overall low-power performance. Section II shows the architecture of proposed readout circuit and simulation result. In Section III, fabrication and measurement result is shown. Section IV gives the conclusion.

II. MULTI-PURPOSE INTERFACE DESIGN

A multi-purpose fingerprint interface using only the standard CMOS process is proposed as shown in Fig. 1(a), where top-metal electrodes and fingerprint patterns through a passivation layer constitute capacitive pixels. Pixel capacitances vary with fingerprint patterns of ridges and valleys. To achieve fine resolution for the pattern, top-metal electrodes should be located closely together, which causes considerable parasitic capacitance between them and degrades sensitivity. To minimize this parasitic capacitance effect, ground-shielding electrodes were carefully inserted between adjacent fingerprint

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electrodes. For multi-purpose applications, these shielding electrodes which are not necessary in the physiological sensing mode were proposed to act also as bio-potential electrodes to detect electro-physiological signals from a finger. This function was implemented with a mode switch (M) by connecting shielding electrodes to a capacitive amplifier’s input inside a multi-sensor detection circuit instead of an AC ground (VCM). The shielding patterns exist at most areas of fingerprint pixels, and they can provide sufficient capacitive coupling paths to receive electro-physiological signals through a finger. In this manner, the proposed interface was designed to have dual-mode operation of fingerprint sensing and physiological-signal sensing. Details on a multi-sensor readout circuit for the dual-mode operation

are described in Fig. 1(b). The dual- mode operation is provided by a channel-selection multiplexer and a dual-mode readout circuit so that charging-speed comparison is performed for estimating fingerprint pixel capacitances and capacitive amplification is for detecting physiological signals.

In the fingerprint sensing mode, fingerprint detection is performed by monitoring the distribution of spatial capacitances between top-metal electrodes and fingerprint surfaces with the passivation layer acting as an intermediate dielectric layer as shown in Fig. 1(a). Sequential comparison of effective capacitances with reference channel capacitance (CREF) through their charging-speed detection circuit in Fig. 2(a) provides fingerprint-pattern recognition of ridges and valleys, and also another comparison between adjacent channels of CHi and CHi+1 gives additional depth information on whether it is located at up-hill or down-hill in the fingerprint. Conventional fingerprint readout circuits have been implemented to be in the form of a one- or two-dimensional array, where fast parallel readout operation is performed at cost of large power consumption and chip area. For supporting the multi-purpose operation, the proposed structure utilized only single detection circuit with successive switching and comparison, minimizing overall circuit complexity and efficiency and also removing the necessity of additional analog-to-digital conversion. It begins to scan adjacent channels from left to right in the first row, and then repeats the horizontal scanning for next remaining rows similarly. It also features automatic calibration function for programmable current sources in Fig. 2(a) that finds out proper k-bit current control signal depending on pixel-capacitance variations. This adaptive current adjustment was implemented by utilizing successive approximate register method as in [6]. That is, a reference capacitor of CREF is programmed to a preset value, and its charging current source (IR) is adjusted by comparing their charging speed iteratively until mismatch between the fingerprint channel (CHi) and the reference channel (CHREF) is reduced within k-bit resolution. The whole fingerprint signal path was designed to be fully differential so that most common-mode environment noises can be removed. The output signal comes out in the form of serial digital codes that every channel’s comparison result in the first row is

(a)

(b)

Fig. 1. Proposed structure of multi-purpose fingerprint sensor interface (a) vertical view of physical sensor composition, (b)simplified schematic of multi-sensor detection circuit.

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given sequentially from CH1 to CHn and other remaining channels in next rows follows.

Fig. 2(b) describes the simplified shape of fingerprint sample used for SPICE simulations in the fingerprint mode, which is part of overall fingerprint pattern. In this sample pattern, the gap between adjacent valleys was assumed to be 150~200 µm, considering minimum pitch of conventional fingerprint patterns [7]. Fig. 2(c) represents corresponding simulation results. As seen in Fig. 2(b) and (c), the results represent boundary information between ridge and valley well, and the resolution is limited by the pixel size. Based on the results, a 3D image of the fingerprint to include the depth information was reconstructed as shown in Fig. 2(d). Unlike conventional touch sensors, fingerprint sensors need to recognize only two-dimensional pattern such that the comparator can replace multi-bit analog-to-digital

(a)

(b)

(c)

(d)

Fig. 2. Description of fingerprint sensing mode (a) fingerprint readout circuit, (b) pixel-level shape of fingerprint pattern for SPICE simulation, (c) simulated waveforms, (d) reconstructed 3D fingerprint image.

(a)

(b)

Fig. 3. Description of physiological signal sensing mode (a) readout circuit, (b) simulation result in frequency domain.

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converters. In case of the physiological sensing mode, every inter-

pixel shielding electrode is tied together as shown in Fig. 3(a) so that the capacitive amplifier’s gain and its detected physiological signal strength could be maximized. Since finger contact may work as a noise-coupling path, a low-pass filter and a notch filter followed. The low-pass filter was designed to have corner frequency around 100 Hz, and supply noises at 60 Hz was suppressed by the notch filter [8]. Fig. 3(b) shows corresponding AC simulation result, where the gain is controllable from 56 dB to 72 dB and the notch characteristic can be seen around 60 Hz.

III. FABRICATION & MEASUREMENT RESULTS

A prototype chip of the proposed multi-purpose fingerprint readout circuit was fabricated in a 0.18 μm

CMOS process. Fig. 4(a) shows its microphotograph with chip area of 1.5 mm ´ 1.3mm. For feasibility verification and convenient measurement of the proposed interface architecture, a miniaturized fingerprint panel with 10-by-10 electrode array was integrated together, where a unit pixel was designed to have a size of 30 mm ´ 30 mm and spacing of 20 mm, which is expected to provide 508 dpi resolution [9]. The minimum discriminable capacitive difference between pixel channels is 0.2 fF, which was estimated by post simulations of the readout circuit including parasitic effects from the layout and a pixel model from the HFSS simulation. This detection capability would be sufficient considering that the capacitive difference in [10] was around 60 fF. However, the panel size is too small to measure human fingerprints directly, and thus alternative functional verification was performed utilizing a probe station whose measurement microphotograph is shown in Fig. 4(b). However, this prototype’s pixel pattern can provide only five channels if intermediate shielding electrodes are excluded. Therefore, in order to increase effective number of channels, shielding electrodes was utilized to act as channel electrodes selectively depending on sequential detection cycles shown in Fig. 5. Fig. 6 shows measured waveforms for dual-mode operation of the proposed multi-purpose interface. With a 3.3 V supply, current consumptions are 573 μA in fingerprint sensing mode and 125 μA in physiological signal detection mode. In the fingerprint mode, automatic sequential detection is performed on eight channels in the

(a)

(b)

Fig. 4. Prototype fabrication and feasibility measurement (a) chip microphotography, (b) probe-station measurement environment.

Fig. 5. Modified electrode-control scheme to extend pixel resolution for fingerprint detection.

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first row, and then the same procedure iterates nine times for the remaining rows. Its measured waveforms and corresponding fingerprint pattern are shown in Fig. 6(a). For complying with variations of unit capacitance and parasitic capacitances in the fingerprint panel, programmable current sources in Fig. 2(a) were adjusted during the initial calibration period. For the physiological mode, a 10 Hz sinusoidal signal of 10 mV amplitude was

inserted through the probe station, and capacitive-amplified waveform of 92 mV amplitude was measured as shown in Fig. 6(b). This physiological interface can be utilized to detect various healthcare signals such as bio-potential, heart rate, etc.

IV. CONCLUSION

A reconfigurable fingerprint sensor interface was proposed to embed physiological-signal detection capability, and dual-mode operation of fingerprint and physiological-signal detections was implemented by utilizing multi-purpose inter-pixel shielding patterns. A prototype chip has been fabricated in a conventional CMOS process, and its dual-mode function was experimentally verified maintaining low-power consumption less than 1.9 mW under a 3.3 V supply. Comparison with recent works in Table 1 shows that the multi-purpose sensing function was achieved with low power and small area. This work can be applied to heterogeneous mobile services and systems that combine identification and healthcare technologies.

ACKNOWLEDGMENTS

This work was supported in part by the Center for Flexible OLED Displays funded by Samsung Display Co., Ltd. and in part by Technology Innovation Program (10064058: Development of patch-type 7 modal multi-sensor devices and platform technology for wearable healthcare applications) funded by the Ministry of Trade, industry & Energy, Republic of Korea.

REFERENCES

[1] L. Qiu, “Fingerprint sensor technology,” in Proc. 2014 IEEE 9th Conf. Ind. Electron. Appl. (ICIEA),

(a)

(b)

Fig. 6. Measurement functional waveforms for dual-mode operation (a) Measurement and pattern mapping in fingerprint sensing mode, (b) measured waveform in physiological signal sensing mode.

Table 1. Performance summary and comparison

Specification This work [10] [11] [12] Technology 180 nm 500 nm NA 350nm

Sensing Functions Finger-pint, Bio-potentioal Finger-print only Finger-print, Touch Finger-print only Power consumption 1.89 mW 25 mW 1 mW NA

Fingerprint resolution 508 dpi 508 dpi 423 dpi 309 dpi Clock rate 4 MHz NA 333 kHz 244.7 kHz

Readout circuit size(mm2) 1.95 64.64 NA 5.18

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Hangzhou, 2014, pp. 1433–1436, Jun., 2014. [2] S. Shigematsu, and H. Morimura, “A high-speed

pixel-parallel fingerprint identifier for fingerprint identification system on a single chip,” in Proc. 1999 IEEE 12th Conf. ASIC/SOC, pp.310–314, Sep., 1999.

[3] M. Gao, et al.: “Fingerprint sensors in mobile devices,” in Proc. 2014 IEEE 9th Conf. Ind. Electron. Appl. (ICIEA), Hangzhou, 2014, pp. 1437–1440, Jun., 2014.

[4] H. Morimura, S. Shigematsu, and K. Machida, “A Novel Sensor Cell Architecture and Sensing Circuit Scheme for Capacitive Fingerprint Sensors,” IEEE J. Solid-State Circuits, 35, (11), pp.724–731, May, 2000.

[5] T. Shimamura, H. Morimura, N. Shimoyama, T. Sakata, S. Shigematsu, K. Machida, and M. Nakanishi, “Impedance-sensing circuit techniques for integration of a fraud detection function into a capacitive fingerprint sensor,” IEEE Sensors J., 12, (5), pp. 1393–1401, May, 2012.

[6] S.-W. Kim, et al.: ‘Dual-mode wide-range linear CMOS interface circuit for resistive sensors,’ Electron. Lett., 50, (22), pp. 1575–1577, Oct., 2014

[7] R.T. Moore, “Analysis of Ridge-To-Ridge Distance on Fingerprints,” Journal of Forensic Identification, Vol.39, No.4, pp. 231–238, Jul.-Aug., 1989

[8] K. Kwon, et al, “A fully-differential correlated double sampling readout circuit for mutual-capacitance touch screens,” Journal of Semiconductor Technology and Science, 15, (3), pp.349–355, June, 2015.

[9] O. Vermesan, et al, “A 500-dpi AC Capacitive Hybrid Flip-Chip CMOS ASIC/Sensor Module for Fingerprint, Navigation, and Pointer Detection With On-Chip Data Processing,” IEEE J. Solid-State Circuits, 38, (12), pp.2288–2296, Dec., 2003.

[10] T. Shimamura, et al, “Capacitive-Sensing Circuit Technique for Image Quality Improvement on Fingerprint Sensor LSIs.” IEEE J. Solid-State Circuits, 45, (5), pp.1080–1087, May, 2010.

[11] P. Koundinya, et al, “Multi Resolution Touch Panel with Built-in Fingerprint Sensing Support,” 2014 Design, Automation & Test in Europe Conference & Exhibition, pp. 1-6, Mar, 2014.

[12] J. Liu, et al, “A CMOS Micromachined Capacitive Sensor Array for Fingerprint Detection,” IEEE

Sensors J., 12, (5), pp. 1004–1010, May, 2012.

Won-jin Eom was born in Seongnam, Korea, in 1991. He received the B.S degree in the Department of Electrical and Ulsan National Institute of Science and Technology (UNIST), Korea, in 2014. He is currently pursuing the

combined M.S. and Ph.D degree in the Department of Electrical and Computer Engineering from Ulsan National Institute of Science and Technology (UNIST), Korea. His research interests include sensor readout IC, data converters, and power converters.

Sung Woo Kim was born in Jinhae, Korea, in 1987. He has received his B.S degree in 2012 from Department of Electronic Engineering, Dankook University, Juk-jeon, Korea. He is currently pursuing the Ph.D. degree in the Department of Electrical and

Computer Engineering from Ulsan National Institute of Science and Technology (UNIST), Korea. His research interests include CMOS readout circuits for bio/environmental sensors and data conversion.

Kyeonghwan Park was born in Yangsan, Korea, in 1991. He received the B.S. degree in the Department of Electrical and Computer Engineering from Ulsan National Institute of Science and Technology (UNIST), Korea, in 2013.

He is currently pursuing the Ph.D. degree in the Department of Electrical and Computer Engineering from Ulsan National Institute of Science and Technology (UNIST), Korea. His research interests include data converters, especially Successive Approximation Register Analog-to-Digital Converter.

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Franklin Bien received the B.S. degree in electronics engineering from Yonsei University, Seoul, Republic of Korea in 1977, the M.S degree in electrical and computer engineering from Georgia Institute of Technology, Atlanta, GA, USA in

2000, and the Ph.D degree in electrical and computer engineering from Georgia Institute of Technology, Atlanta, GA, USA in 2006. He is currently an Associate Professor in the School of Electrical and Computer Engineering at Ulsan National Institute of Science and Technology (UNIST), Ulsan, Republic of Korea. Prior to joining UNIST in 2009, Dr. Bien was with Staccato Communications in San Diego, CA as a Senior IC Design Engineer working on analog/mixed-signal IC and RF front-end circuits for Ultra-Wideband (UWB) products such as Wireless-USB in 65-nm CMOS technologies. Prior to working at Staccato, he was with Agilent Technologies and Quellan Inc., developing transceiver ICs for enterprise segments that improve the speed and reach of communication channels in consumer, broadcast, enterprise and computing markets. His current research interests include circuits for wireless power transfer technologies, analog/RF IC design for consumer electronics, vehicular electronics, and biomedical applications.

Jae Joon Kim received the B.S. degree in electronic engineering from Hanyang University, Seoul, Korea, in 1996 and the M.S. and Ph.D. degrees in electrical engineering from the Korea Advanced Institute of Science and Technology, Daejeon, Korea, in

1998 and 2003, respectively. From 2000 to 2001, he was with Berkana Wireless Inc., San Jose, CA (now merged into Qualcomm Inc.), where he was involved in designing wireless transceivers. From 2003 to 2005, he was with Hynix Semiconductor, Seoul, working on wireless transceivers and smart-card controllers. From 2005 to 2011, he was a Deputy Director with the Korean government, Ministry of Information and Communi- cations and also Ministry of Trade, Industry & Energy. From 2009 to 2011, he was also with Georgia Institute of Technology, Atlanta, GA as a research engineer II. Since 2011, he has been an Associated Professor with Ulsan National Institute of Science and Technology, Ulsan, Korea. His research interests include integrated circuits for various sensor systems, wireless transceivers, consumer electronics, biomedical appliances, and automotive electronics.