a hybrid hardware architecture for high-speed ip lookups and fast route updates

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Author :Layong Luo, Gaogang Xie, Yingke Xie, Laurent Mathy Publisher: IEEE/ACM TRANSACTIONS ON NETWORKING A HYBRID HARDWARE ARCHITECTURE FOR HIGH-SPEED IP LOOKUPS AND FAST ROUTE UPDATES

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A Hybrid Hardware Architecture for High-Speed IP Lookups and Fast Route Updates. Author : Layong Luo , Gaogang Xie , Yingke Xie , Laurent Mathy Publisher: IEEE/ACM TRANSACTIONS ON NETWORKING. Finding solutions that achieve both fast lookup and low update overhead. - PowerPoint PPT Presentation

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Page 1: A Hybrid Hardware Architecture for High-Speed IP Lookups and Fast Route Updates

Author :Layong Luo, Gaogang Xie, Yingke Xie, Laurent Mathy

Publisher: IEEE/ACM TRANSACTIONS ON NETWORKING

A HYBRID HARDWARE ARCHITECTURE FOR HIGH-SPEED IP

LOOKUPS AND FAST ROUTE UPDATES

Page 2: A Hybrid Hardware Architecture for High-Speed IP Lookups and Fast Route Updates

• Finding solutions that achieve both fast lookup and low update overhead

Page 3: A Hybrid Hardware Architecture for High-Speed IP Lookups and Fast Route Updates
Page 4: A Hybrid Hardware Architecture for High-Speed IP Lookups and Fast Route Updates
Page 5: A Hybrid Hardware Architecture for High-Speed IP Lookups and Fast Route Updates
Page 6: A Hybrid Hardware Architecture for High-Speed IP Lookups and Fast Route Updates
Page 7: A Hybrid Hardware Architecture for High-Speed IP Lookups and Fast Route Updates
Page 8: A Hybrid Hardware Architecture for High-Speed IP Lookups and Fast Route Updates

• Each node contains five fields,

• left child pointer (lchild),

• right child pointer(rchild),

• next-hop pointer (nhop),

• memory type (mtype),

• memory address (maddr).

Page 9: A Hybrid Hardware Architecture for High-Speed IP Lookups and Fast Route Updates
Page 10: A Hybrid Hardware Architecture for High-Speed IP Lookups and Fast Route Updates
Page 11: A Hybrid Hardware Architecture for High-Speed IP Lookups and Fast Route Updates
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