a designer guide to instrumentation amplifiers 2nd edition

7/31/2019 A Designer Guide to Instrumentation Amplifiers 2nd Edition

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A Designer’s Guide to

Instrumentation Amplifiers2

ND Edition


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All rights reserved. This publication, or parts thereof, may not bereproduced in any form without permission of the copyright owner.

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Specications and prices are subject to change without notice.

©2004 Analog Devices, Inc. Printed in U.S.A.

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TABLE OF CONTENTS

CHAPTER I—IN-AMP BASICS ...................................................................................................1-INTRODUCTION ...........................................................................................................................1IN-AMPS vs. OP AMPS: WHAT ARE THE DIFFERENCES? ........................................................... 1

Signal Amplication and Common-Mode Rejection ........................................................................1

Common-Mode Rejection: Op Amp vs. In-Amp ..............................................................................1DIFFERENCE AMPLIFIERS ............................................................................................................1WHERE ARE IN-AMPS AND DIFFERENCE AMPS USED? ..........................................................1-

Data Acquisition ............................................................................................................................1Medical Instrumentation ................................................................................................................1Monitor and Control Electronics ....................................................................................................1Software Programmable Applications ..............................................................................................1Audio Applications .........................................................................................................................1High Speed Signal Conditioning .....................................................................................................1Video Applications .........................................................................................................................1Power Control Applications ............................................................................................................1

IN-AMPS: AN EXTERNAL VIEW ...................................................................................................1

WHAT OTHER PROPERTIES DEFINE A HIGH QUALITY IN-AMP? .......................................... 1High AC (and DC) Common-Mode Rejection ................................................................................1Low Offset Voltage and Offset Voltage Drift ..................................................................................... 1A Matched, High Input Impedance .................................................................................................1Low Input Bias and Offset Current Errors .......................................................................................1Low Noise .....................................................................................................................................1Low Nonlinearity ...........................................................................................................................1Simple Gain Selection ....................................................................................................................1Adequate Bandwidth ......................................................................................................................1Differential to Single-Ended Conversion .........................................................................................1Rail-to-Rail Input and Output Swing .............................................................................................. 1Power vs. Bandwidth, Slew Rate, and Noise ....................................................................................1

CHAPTER II—INSIDE AN INSTRUMENTATION AMPLIFIER ...............................................2-A Simple Op Amp Subtractor Provides an In-Amp Function ........................................................... 2Improving the Simple Subtractor with Input Buffering .................................................................... 2The 3-Op Amp In-Amp ..................................................................................................................23-Op Amp In-Amp Design Considerations ......................................................................................2The Basic 2-Op Amp Instrumentation Amplier ..............................................................................22-Op Amp In-Amps—Common-Mode Design Considerations for Single-Supply Operation .................... 2Auto-Zeroing Instrumentation Ampliers ........................................................................................2

CHAPTER III—MONOLITHIC INSTRUMENTATION AMPLIFIERS .....................................3Advantages Over Op Amp In-Amps ................................................................................................ 3Which to Use—an In-Amp or a Diff Amp? ...................................................................................... 3

MONOLITHIC IN-AMP DESIGN—THE INSIDE STORY ............................................................3High Performance In-Amps ............................................................................................................3Fixed Gain In-Amps ...................................................................................................................... 3Low Cost In-Amps ........................................................................................................................ 3Monolithic In-Amps Optimized for Single-Supply Operation ...........................................................3Low Power, Single-Supply In-Amps .............................................................................................. 3-


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CHAPTER IV—MONOLITHIC DIFFERENCE AMPLIFIERS ..................................................4-1Difference (Subtractor) Amplier Products .....................................................................................4-1High Frequency Differential Receiver/Ampliers .............................................................................4-6

CHAPTER V—APPLYING IN-AMPS EFFECTIVELY ................................................................5-1Dual-Supply Operation ..................................................................................................................5-1Single-Supply Operation ................................................................................................................5-1

Power Supply Bypassing, Decoupling, and Stability Issues ...............................................................5-1The Importance of an Input Ground Return ...................................................................................5-1AC Input Coupling ........................................................................................................................5-2RC Component Matching ..............................................................................................................5-2

CABLE TERMINATION ................................................................................................................. 5-3INPUT PROTECTION BASICS FOR ADI IN-AMPS ..................................................................... 5-3

Input Protection from ESD and DC Overload .................................................................................5-3Adding External Protection Diodes .................................................................................................5-5ESD and Transient Overload Protection ..........................................................................................5-5

DESIGN ISSUES AFFECTING DC ACCURACY .......................................................................... 5-6Designing for the Lowest Possible Offset Voltage Drift ..................................................................... 5-6Designing for the Lowest Possible Gain Drift ..................................................................................5-6

Practical Solutions .........................................................................................................................5-7Option 1: Use a Better Quality Gain Resistor ..................................................................................5-7Option 2: Use a Fixed-Gain In-Amp ...............................................................................................5-7

RTI AND RTO ERRORS ................................................................................................................. 5-7Offset Error ...................................................................................................................................5-8Noise Errors ..................................................................................................................................5-8

REDUCING RFI RECTIFICATION ERRORS IN IN-AMP CIRCUITS ..........................................5-8Designing Practical RFI Filters .......................................................................................................5-8Selecting RFI Input Filter Component Values Using a Cookbook Approach ................................... 5-10Specic Design Examples ............................................................................................................. 5-10An RFI Circuit for AD620 Series In-Amps ....................................................................................5-10An RFI Circuit for Micropower In-Amps ....................................................................................... 5-11

An RFI Filter for the AD623 In-Amp ............................................................................................ 5-12AD8225 RFI Filter Circuit ........................................................................................................... 5-12Common-Mode Filters Using X2Y Capacitors .............................................................................. 5-13Using Common-Mode RF Chokes for In-Amp RFI Filters ............................................................ 5-14

RFI TESTING ............................................................................................................................... 5-15USING LOW-PASS FILTERING TO IMPROVE SIGNAL-TO-NOISE RATIO ............................. 5-15EXTERNAL CMR AND SETTLING TIME ADJUSTMENTS ...................................................... 5-17

CHAPTER VI—IN-AMP AND DIFF AMP APPLICATIONS CIRCUITS ..................................6-1Composite In-Amp Circuit Has Excellent High Frequency CMR .................................................... 6-1

STRAIN GAGE MEASUREMENT USING AN AC EXCITATION ................................................ 6-2APPLICATIONS OF THE AD628 PRECISION GAIN BLOCK ...................................................... 6-3

Why Use a Gain Block IC? .............................................................................................................. 6-3Standard Differential Input ADC Buffer Circuit with Single-Pole LP Filter ...................................... 6-4Changing the Output Scale Factor ..................................................................................................6-4Using an External Resistor to Operate the AD628 at Gains Below 0.1 ..............................................6-4Differential Input Circuit with Two-Pole Low-Pass Filtering ............................................................ 6-5Using the AD628 to Create Precision Gain Blocks .......................................................................... 6-6Operating the AD628 as a +10 or –10 Precision Gain Block ............................................................6-6Operating the AD628 at a Precision Gain of +11 .............................................................................6-7Operating the AD628 at a Precision Gain of +1 ...............................................................................6-8Increased BW Gain Block of –9.91 Using Feedforward ....................................................................6-8


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BIBLIOGRAPHY/FURTHER READING

Brokaw, Paul. “An IC Amplier Users’ Guide to Decoupling, Grounding, and Making Things Go Right fora Change.” Application Note AN-202. Analog Devices, Inc., 1990.

Jung, Walter. IC Op Amp Cookbook. 3rd ed. Prentice-Hall PTR, 1986, 1997, ISBN: 0-13-889601-1. This canalso be purchased on the Web at http://dogbert.abebooks.com.

Jung, Walter.Op Amp Applications Book. Analog Devices Amplier Seminar. Code: OP-AMP-APPLIC-BOOK.

Call: (800) 262-5643 (US and Canadian customers only).

Kester, Walt. Practical Design Techniques for Sensor Signal Conditioning . Analog Devices, Inc., 1999, Section 10.

ISBN-0-916550-20-6. Available for download on the ADI website at www.analog.com.

Nash, Eamon. “Errors and Error Budget Analysis in Instrumentation Amplier Applications.” ApplicationNote AN-539. Analog Devices, Inc.

Nash, Eamon. “A Practical Review of Common-Mode and Instrumentation Ampliers.” Sensors Magazine, July 1998.

Sheingold, Dan, ed. Transducer Interface Handbook. Analog Devices, Inc. 1980, pp. 28-30.

Wurcer, Scott and Jung, Walter. “Instrumentation Ampliers Solve Unusual Design Problems.” ApplicationNote AN-245. Applications Reference Manual . Analog Devices, Inc.

ACKNOWLEDGMENTS

We gratefully acknowledge the support and assistance of the following: Moshe Gerstenhaber, Scott Wurcer,Stephen Lee, Alasdair Alexander, Chau Tran, Chuck Whiting, Eamon Nash, Walt Kester, Alain Guery,Nicola O’Byrne, James Staley, Bill Riedel, Scott Pavlik, Matt Gaug, David Kruh, Cheryl O’Connor, andLynne Hulme of Analog Devices. Also to David Anthony of X2Y Technology and Steven Weir of Weir DesignEngineering, for the detailed applications information on applying X2Y products for RFI suppression.

And nally, a special thank you to Analog Devices’ Communications Services team, including John Galgay,Alex Wong, Deb Schopperle, and Paul Wasserboehr.

All brand or product names mentioned are trademarks or registered trademarks of their respective owners.

Purchase of licensed I2C components of Analog Devices or one of its sublicensed Associated Companies conveys a license for the purchaser under the PhilipsI2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specication as dened by Philips.


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INTRODUCTION

Instrumentation ampliers (in-amps) are sometimesmisunderstood. Not all ampliers used in instrumenta-tion applications are instrumentation ampliers, and byno means are all in-amps used only in instrumentationapplications. In-amps are used in many applications,from motor control to data acquisition to automotive.The intent of this guide is to explain the fundamentalsof what an instrumentation amplier is, how it operates,and how and where to use it. In addition, several dif-ferent categories of instrumentation amplifiers areaddressed in this guide.

IN-AMPS vs. OP AMPS: WHAT ARE THEDIFFERENCES?

An instrumentation amplier is a closed-loop gainblock that has a differential input and an output thatis single-ended with respect to a reference terminal.Most commonly, the impedances of the two inputterminals are balanced and have high values, typically109 , or greater. The input bias currents should alsobe low, typically 1 nA to 50 nA. As with op amps, outputimpedance is very low, nominally only a few milliohms,at low frequencies.

Unlike an op amp, for which closed-loop gain is de-termined by external resistors connected between itsinverting input and its output, an in-amp employs aninternal feedback resistor network that is isolated from itssignal input terminals.With the input signal applied acrossthe two differential inputs, gain is either preset internallyor is user set (via pins) by an internal or external gainresistor, which is also isolated from the signal inputs.

Figure 1-1 shows a bridge preamp circuit, a typical in-ampapplication.When sensing a signal, the bridge resistor valueschange, unbalancing the bridge and causing a change in

differential voltage across the bridge. The signal outputof the bridge is this differential voltage, which connectsdirectly to the in-amp’s inputs. In addition, a constant dcvoltage is also present on both lines. This dc voltage willnormally be equal or common mode on both input lines. Inits primary function, the in-amp will normally reject thecommon-mode dc voltage, or any other voltage commonto both lines, while amplifying thedifferential signal voltage,the difference in voltage between the two lines.

Chapter I

IN-AMP BASICS

Figure 1-1. AD8221 Bridge Circuit

In contrast, if a standard op amp amplier circuit weused in this application, it would simply amplify both thsignal voltage and any dc, noise, or other common-modvoltages. As a result, the signal would remain burieunder the dc offset and noise. Because of this, even thbest op amps are far less effective in extracting wesignals. Figure 1-2 contrasts the differences between oamp and in-amp input characteristics.

Signal Amplication and Common-Mode RejectioAn instrumentation amplier is a device that amplithe difference between two input signal voltages whirejecting any signals that are common to both inputs. Thin-amp, therefore, provides the very important functioof extracting small signals from transducers and othsignal sources.

Common-mode rejection (CMR), the property canceling out any signals that are common (the sampotential on both inputs), while amplifying any signathat are differential (a potential difference between th

inputs), is the most important function an instrumenttion amplier provides. Both dc and ac common-modrejection are important in-amp specications. Any errodue to dc common-mode voltage (i.e., dc voltage preseat both inputs) will be reduced 80 dB to 120 dB by anmodern in-amp of decent quality.

However, inadequate ac CMR causes a large, timvarying error that often changes greatly with frequencand therefore, is difcult to remove at the IA’s outpuFortunately, most modern monolithic IC in-amps providexcellent ac and dc common-mode rejection.



Common-mode gain (ACM), the ratio of change inoutput voltage to change in common-mode input volt-age, is related to common-mode rejection. It is the netgain (or attenuation) from input to output for voltagescommon to both inputs. For example, an in-amp witha common-mode gain of 1/1,000 and a 10 V common-mode voltage at its inputs will exhibit a 10 mV outputchange. The differential or normal mode gain (AD) isthe gain between input and output for voltages applieddifferentially (or across) the two inputs. The common-mode rejection ratio (CMRR) is simply the ratio of the differential gain, AD, to the common-mode gain.Note that in an ideal in-amp, CMRR will increase inproportion to gain.

Common-mode rejection is usually specied for fullrange common-mode voltage (CMV) change at a givenfrequency and a specied imbalance of source impedance(e.g., 1 k source imbalance, at 60 Hz).

Figure 1-2. Op Amp vs. In-Amp Input Characteristics

Mathematically, common-mode rejection can be rep-resented as

CMRR AV

V D

CM

OUT

=

where

AD is the differential gain of the amplier.

V CM is the common-mode voltage present at theamplier inputs.

V OUT is the output voltage present when a common-modeinput signal is applied to the amplier.

The term CMR is a logarithmic expression of the com-mon-mode rejection ratio (CMRR). That is, CMR =20 Log10 CMRR.

To be effective, an in-amp needs to be able to amplifymicrovolt-level signals while rejecting common-modevoltage at its inputs. It is particularly important for thein-amp to be able to reject common-mode signals over thebandwidth of interest. This requires that instrumenta-tion ampliers have very high common-mode rejectionover the main frequency of interest and its harmonics.



For techniques on reducing errors due to out-of-bandsignals that may appear as a dc output offset, please referto the RFI section of this guide.

At unity gain, typical dc values of CMR are 70 dB to morethan 100 dB, with CMR usually improving at higher gains.While it is true that operational ampliers connected as

subtractors also provide common-mode rejection, theuser must provide closely matched external resistors(to provide adequate CMRR). On the other hand,monolithic in-amps, with their pretrimmed resistornetworks, are far easier to apply.

Common-Mode Rejection: Op Amp vs. In-Amp

Op amps, in-amps, and difference amps all providecommon-mode rejection. However, in-amps and diff amps are designed to reject common-mode signals so thatthey do not appear at the amplier’s output. In contrast,an op amp operated in the typical inverting or noninvert-

ing amplier conguration will process common-modesignals, passing them through to the output, but will notnormally reject them.

Figure 1-3a shows an op amp connected to an inpsource that is riding on a common-mode voltage. Becauof feedback applied externally between the output anthe summing junction, the voltage on the “–” input forced to be the same as that on the “+” input voltagTherefore, the op amp ideally will have zero volts acro

its input terminals. As a result, the voltage at the op amoutput must equal VCM, for zero volts differential inpu

Even though the op amp has common-mode rejection, thcommon-mode voltage is transferred to the output alonwith the signal. In practice, the signal is amplied bthe op amp’s closed-loop gain while the common-modvoltage receives only unity gain. This difference in gadoes provide some reduction in common-mode voltaas a percentage of signal voltage. However, the commomode voltage still appears at the output and its presenreduces the amplier’s available output swing. For manreasons, any common-mode signal (dc or ac) appearin

at the op amp’s output is highly undesirable.

VOUT

V– = VCM

V+ = VCM

VCM

R2

R1

ZERO VVIN

VCM

VOUT = (VIN GAIN) VCMGAIN = R2/R1CM GAIN = 1

Figure 1-3a. In a typical inverting or noninverting amplier circuit using an op amp,

both the signal voltage and the common-mode voltage appear at the amplier output.



Figure 1-3b shows a 3-op amp in-amp operating underthe same conditions. Note that, just like the op ampcircuit, the input buffer ampliers of the in-amp pass thecommon-mode signal through at unity gain. In contrast,the signal is amplied by both buffers. The output signalsfrom the two buffers connect to the subtractor section of the IA. Here the differential signal is amplied (typicallyat low gain or unity) while the common-mode voltage isattenuated (typically by 10,000:1 or more). Contrastingthe two circuits, both provide signal amplication (andbuffering), but because of its subtractor section, the in-amp rejects the common-mode voltage.

Figure 1-3c is an in-amp bridge circuit. The in-ampeffectively rejects the dc common-mode voltageappearing at the two bridge outputs, while amplifyingthe very weak bridge signal voltage. In addition, manymodern in-amps provide a common-mode rejectionapproaching 80 dB, which allows powering the bridgefrom an inexpensive, nonregulated dc power supply. Incontrast, a self constructed in-amp, using op amps and0.1% resistors, typically only achieves 48 dB CMR, thusrequiring a regulated dc supply for bridge power.

VOUT

VCM = 0

SUBTRACTOR

VOUT = VIN (GAIN)

VCM

VCM

VCM

VCM

VIN TIMESGAIN

RG

BUFFER

BUFFER3-OP AMPIN-AMP

VIN

VCM

Figure 1-3b. As with the op amp circuit above, the input buffers of an in-amp circuit

amplify the signal voltage while the common-mode voltage receives unity gain. How-

ever, the common-mode voltage is then rejected by the in-amp’s subtractor section.

VOUT

VCM

VCM

VIN

BRIDGESENSOR

VSUPPLY

INTERNAL OR EXTERNALGAIN RESISTOR

IN-AMP

Figure 1-3c. An in-amp used in a bridge circuit. Here the dc common-mode

voltage can easily be a large percentage of the supply voltage.



Figure 1-3d shows a difference (subtractor) amplierbeing used to monitor the voltage of an individual cellwhich is part of a battery bank. Here the common-modedc voltage can easily be much higher than the amplier’ssupply voltage. Some monolithic difference ampliers,such as the AD629, can operate with common-modevoltages as high as 270 V.

DIFFERENCE AMPLIFIERS

Figure 1-4 is a block diagram of a difference amplier.This type of IC is a special purpose in-amp that normallyconsists of a subtractor amplier followed by an outputbuffer, which may also be a gain stage. The four resistorsused in the subtractor are normally internal to the IC,and therefore, are closely matched for high CMR.

Many difference ampliers are designed to be used applications where the common-mode and signal voltagmay easily exceed the supply voltage. These diff amptypically use very high value input resistors to attenuaboth signal and common-mode input voltages.

WHERE ARE IN-AMPS AND DIFFERENCE

AMPS USED?

Data Acquisition

In-amps nd their primary use amplifying signals frolow level output transducers in noisy environments. Thamplication of pressure or temperature transducsignals is a common in-amp application. Common bridapplications include strain and weight measurement usinload cells and temperature measurement using resistitemperature detectors, or RTDs.

VOUT

380k

380k

380k

380k

VCM

VCM

DIFFERENCE AMPLIFIER

VIN

Figure 1-3d. A difference amp is especially useful in applications such as battery

cell measurement where the dc (or ac) common-mode voltage may be greater

than the supply voltage.

Figure 1-4. A Difference Amplier IC



Medical Instrumentation

In-amps are widely used in medical equipment such asEKG and EEG monitors, blood pressure monitors, anddebrillators.

Monitor and Control Electronics

Diff amps may be used to monitor voltage or current in

a system and then trigger alarm systems when nominaloperating levels are exceeded. Because of their ability toreject high common-mode voltages, diff amps are oftenused in these applications.

Software Programmable Applications

An in-amp may be used with a software programmableresistor chip to allow software control of hardwaresystems.

Audio Applications

Because of their high common-mode rejection,instrumentation ampliers are sometimes used for audio

applications (as microphone preamps, for example), toextract a weak signal from a noisy environment, and tominimize offsets and noise due to ground loops. Referto Table 6-4, (page 6-24) Specialty Products Availablefrom Analog Devices.

High Speed Signal Conditioning

Because the speed and accuracy of modern video dataacquisition systems have improved, there is now agrowing need for high bandwidth instrumentation ampli-ers, particularly in the eld of CCD imaging equipmentwhere offset correction and input buffering are required.Double-correlated sampling techniques are often used

in this area for offset correction of the CCD image. Twosample-and-hold ampliers monitor the pixel and referencelevels, and a dc-corrected output is provided by feedingtheir signals into an instrumentation amplier.

Video Applications

High speed in-amps may be used in many video and cableRF systems to amplify or process high frequency signals.

Power Control Applications

In-amps can also be used for motor monitoring (tomonitor and control motor speed, torque, etc.) by mea-suring the voltages, currents, and phase relationships

of a 3-phase ac-phase motor. Diff amps are used inapplications where the input signal exceeds thesupply voltages.

IN-AMPS: AN EXTERNAL VIEW

Figure 1-5 provides a functional block diagram of aninstrumentation amplier.

Figure 1-5. Differential vs. Common-Mode Input Signals



Since an ideal instrumentation amplier detects only thedifference in voltage between its inputs, any common-mode signals (equal potentials for both inputs), such asnoise or voltage drops in ground lines, are rejected at theinput stage without being amplied.

Either internal or external resistors may be used to set

the gain. Internal resistors are the most accurate andprovide the lowest gain drift over temperature.

One common approach is to use a single external resistor,working with two internal resistors, to set the gain. Theuser can calculate the required value of resistance for agiven gain, using the gain equation listed in the in-amp’sspec sheet. This permits gain to be set anywhere within avery large range. However, the external resistor can seldombe exactly the correct value for the desired gain, and itwill always be at a slightly different temperature than theIC’s internal resistors. These practical limitations alwayscontribute additional gain error and gain drift.

Sometimes two external resistors are employed. In general,a 2-resistor solution will have lower drift than a singleresistor as the ratio of the two resistors sets the gain, andthese resistors can be within a single IC array for closematching and very similar temperature coefcient (TC).Conversely, a single external resistor will always be a TCmismatch for an on-chip resistor.

The output of an instrumentation amplier often hasits own reference terminal, which, among other uses,allows the in-amp to drive a load that may be at a

distant location.Figure 1-5 shows the input and output commons beingreturned to the same potential, in this case to powersupply ground. This star ground connection is a very ef-fective means of minimizing ground loops in the circuit;however, some residual common-mode ground currentswill still remain. These currents owing through R CM will develop a common-mode voltage error, VCM. Thein-amp, by virtue of its high common-mode rejection,will amplify the differential signal while rejecting VCM and any common-mode noise.

Of course, power must be supplied to the in-amp. Awith op amps, the power would normally be provideby a dual-supply voltage that operates the in-amp ova specied range. Alternatively, an in-amp specied fsingle-supply (rail-to-rail) operation may be used.

An instrumentation amplier may be assembled using on

or more operational ampliers, or it may be of monolithconstruction. Both technologies have their advantagand limitations.

In general, discrete (op amp) in-amps offer design eibility at low cost and can sometimes provide performanunattainable with monolithic designs, such as very higbandwidth. In contrast, monolithic designs providcomplete in-amp functionality and are fully specieand usually factory trimmed, often to higher dc precisiothan discrete designs. Monolithic in-amps are also mucsmaller, lower in cost, and easier to apply.

WHAT OTHER PROPERTIES DEFINE A HIGH

QUALITY IN-AMP?

Possessing a high common-mode rejection ratio, ainstrumentation amplier requires the propertidescribed below.

High AC (and DC) Common-Mode Rejection

At a minimum, an in-amp’s CMR should be high ovthe range of input frequencies that need to be rejecteThis includes high CMR at power line frequencies anat the second harmonic of the power line frequency.

Low Offset Voltage and Offset Voltage DriftAs with an operational amplier, an in-amp must havlow offset voltage. Since an instrumentation ampliconsists of two independent sections, an input stage anan output amplier, total output offset will equal the suof the gain times the input offset plus the offset of thoutput amplier (within the in-amp). Typical values finput and output offset drift are 1 V/C and 10 V/respectively. Although the initial offset voltage may bnulled with external trimming, offset voltage drift cannbe adjusted out. As with initial offset, offset drift has twcomponents, with the input and output section of thin-amp each contributing its portion of error to the totaAs gain is increased, the offset drift of the input stagbecomes the dominant source of offset error.



A Matched, High Input Impedance

The impedances of the inverting and noninverting inputterminals of an in-amp must be high and closely matchedto one another. High input impedance is necessary toavoid loading down the input signal source, which couldalso lower the input signal voltage.

Values of input impedance from 109

to 1012

aretypical. Difference ampliers, such as the AD629, havelower input impedances but can be very effective in highcommon-mode voltage applications.

Low Input Bias and Offset Current Errors

Again, as with an op amp, an instrumentation ampli-er has bias currents that ow into, or out of, its inputterminals; bipolar in-amps have base currents and FETampliers have gate leakage currents. This bias currentowing through an imbalance in the signal sourceresistance will create an offset error. Note that if the

input source resistance becomes innite, as with ac(capacitive) input coupling without a resistive return topower supply ground, the input common-mode voltagewill climb until the amplier saturates. A high valueresistor connected between each input and ground isnormally used to prevent this problem. Typically, theinput bias current multiplied by the resistor’s value inohms should be less than 10 mV (see Chapter V). Inputoffset current errors are dened as the mismatch betweenthe bias currents owing into the two inputs. Typicalvalues of input bias current for a bipolar in-amp rangefrom 1 nA to 50 nA; for a FET input device, values of

1 pA to 50 pA are typical at room temperature.

Low Noise

Because it must be able to handle very low level inputvoltages, an in-amp must not add its own noise to that of the signal. A minimum input noise level of 10 nV/÷ Hz @1 kHz and (Gain > 100) referred to input (RTI) is desir-able. Micropower in-amps are optimized for the lowestpossible input stage current and, therefore, typically have

higher noise levels than their higher current cousins.

Low Nonlinearity

Input offset and scale factor errors can be corrected byexternal trimming, but nonlinearity is an inherent perfor-mance limitation of the device and cannot be removed byexternal adjustment. Low nonlinearity must be designedin by the manufacturer. Nonlinearity is normally speciedas a percentage of full scale, whereas the manufacturermeasures the in-amp’s error at the plus and minus full-scale voltage and at zero. A nonlinearity error of 0.01%is typical for a high quality in-amp; some devices have

levels as low as 0.0001%.

Simple Gain Selection

Gain selection should be easy. The use of a single externalgain resistor is common, but an external resistor willaffect the circuit’s accuracy and gain drift with tempera-ture. In-amps, such as the AD621, provide a choice of internally preset gains that are pin selectable, with verylow gain TC.

Adequate Bandwidth

An instrumentation amplier must provide bandwidthsufcient for the particular application. Since typical unitygain small-signal bandwidths fall between 500 kHz and4 MHz, performance at low gains is easily achieved, but athigher gains bandwidth becomes much more of an issue.Micropower in-amps typically have lower bandwidth thancomparable standard in-amps, as micropower input stagesare operated at much lower current levels.



Differential to Single-Ended Conversion

Differential to single-ended conversion is, of course, anintegral part of an in-amp’s function: a differential inputvoltage is amplied and a buffered, single-ended outputvoltage is provided. There are many in-amp applicationswhich require amplifying a differential voltage that isriding on top of a much larger common-mode voltage.

This common-mode voltage may be noise, or ADC offset,or both. The use of an op amp rather than an in-ampwould simply amplify both the common mode and thesignal by equal amounts. The great benet provided byan in-amp is that it selectively amplies the (differential)signal while rejecting the common-mode signal.

Rail-to-Rail Input and Output Swing

Modern in-amps often need to operate on single-supplyvoltages of 5 V or less. In many of these applications, arail-to-rail input ADC is often used. So called rail-to-railoperation means that an amplier’s maximum input or

output swing is essentially equal to the power suppvoltage. In fact, the input swing can sometimes exceethe supply voltage slightly, while the output swing is oftewithin 100 mV of the supply voltage or ground. Carefattention to the data sheet specications is advised.

Power vs. Bandwidth, Slew Rate, and Noise

As a general rule, the higher the operating current the in-amp’s input section, the greater the bandwidand slew rate and the lower the noise. But higher operatincurrent means higher power dissipation and heat. Batteroperated equipment needs to use low power deviceand densely packed printed circuit boards must bable to dissipate the collective heat of all their acticomponents. Device heating also increases offset drand other temperature-related errors. IC designers oten must trade off some specications to keep powdissipation and drift to acceptable levels.



Chapter II

INSIDE AN INSTRUMENTATION AMPLIFIER

A Simple Op Amp Subtractor Provides an

In-Amp FunctionThe simplest (but still very useful) method of implement-ing a differential gain block is shown in Figure 2-1.

Figure 2-1. A 1-Op Amp In-Amp Difference

Amplier Circuit Functional Block Diagram

If R1 = R3 and R2 = R4, then

V V V R2 R1OUT IN2 IN1= −( )( )

Although this circuit provides an in-amp function, am-plifying differential signals while rejecting those that arecommon mode, it also has some limitations. First, the

impedances of the inverting and noninverting inputs arerelatively low and unequal. In this example, the input im-pedance to VIN1 equals 100 k, while the impedance of VIN2 is twice that, at 200 k. Therefore, when voltage isapplied to one input while grounding the other, differentcurrents will ow depending on which input receivesthe applied voltage. (This unbalance in the sources’resistances will degrade the circuit’s CMRR.)

Furthermore, this circuit requires a very close ratio match

between resistor pairs R1/R2 and R3/R4; otherwise, thegain from each input would be different—directly affect-ing common-mode rejection. For example, at a gain of 1, with all resistors of equal value, a 0.1% mismatch injust one of the resistors will degrade the CMR to a levelof 66 dB (1 part in 2,000). Similarly, a source resistanceimbalance of 100 will degrade CMR by 6 dB.

In spite of these problems, this type of bare bones in-ampcircuit, often called a difference amplier or subtractor,is useful as a building block within higher performancein-amps. It is also very practical as a standalone func-

tional circuit in video and other high speed uses, or inlow frequency, high common-mode voltage (CMV)applications, where the input resistors divide down theinput voltage as well as provide input protection for theamplier. Some monolithic difference ampliers suchas Analog Devices’ AD629 employ a variation of thesimple subtractor in their design. This allows the IC tohandle common-mode input voltages higher than itsown supply voltage. For example, when powered froma 15 V supply, the AD629 can amplify signals withcommon-mode voltages as high as270 V.

Improving the Simple Subtractor withInput Buffering

An obvious way to signicantly improve performance isto add high input impedance buffer ampliers ahead of the simple subtractor circuit, as shown in the 3-op ampinstrumentation amplier circuit of Figure 2-2.

Figure 2-2. A Subtractor Circuit with Input Buffering



This circuit provides matched, high impedance inputsso that the impedances of the input sources will have aminimal effect on the circuit’s common-mode rejection.The use of a dual op amp for the 2-input buffer ampli-ers is preferred because they will better track each otherover temperature and save board space. Although theresistance values are different, this circuit has the sametransfer function as the circuit of Figure 2-3.

Figure 2-3 shows further improvement: now the inputbuffers are operating with gain, which provides a circuitwith more exibility. If the value of R5 = R8 and R6 =R7 and, as before, R1 = R3 and R2 = R4, then

V OUT = (V IN2 – V IN1) (1 + R5/R6 ) (R2/R1)

While the circuit of Figure 2-3 does increase the gain (of A1 and A2) equally for differential signals, it also increasesthe gain for common-mode signals.

The 3-Op Amp In-Amp

The circuit of Figure 2-4 provides further renemeand has become the most popular conguration finstrumentation amplier design. The classic 3-op amin-amp circuit is a clever modication of the bufferesubtractor circuit of Figure 2-3. As with the previoucircuit, op amps A1 and A2 of Figure 2-4 buffer th

input voltage. However, in this conguration, a singgain resistor, R G, is connected between the summinjunctions of the two input buffers, replacing R6 and RThe full differential input voltage will now appear acroR G (because the voltage at the summing junction of eacamplier is equal to the voltage applied to its positiinput). Since the amplied input voltage (at the outpuof A1 and A2) appears differentially across the thrresistors R5, R G, and R6, the differential gain may bvaried by just changing R G.

Figure 2-3. A Buffered Subtractor Circuit with Buffer Ampliers Operating with Gain

Figure 2-4. The Classic 3-Op Amp In-Amp Circuit



There is another advantage of this connection: once thesubtractor circuit has been set up with its ratio-matchedresistors, no further resistor matching is required whenchanging gains. If the value of R5 = R6, R1 = R3, andR2 = R4, then

V OUT = (V IN2 – V IN1) (1 + 2R5/RG )(R2/R1)

Since the voltage across R G equals VIN, the currentthrough R G will equal (VIN/R G). Ampliers A1 and A2,therefore, will operate with gain and amplify the inputsignal. Note, however, that if a common-mode voltageis applied to the amplier inputs, the voltages on eachside of R G will be equal and no current will ow throughthis resistor. Since no current ows through R G (nor,therefore, through R5 and R6), ampliers A1 and A2will operate as unity gain followers. Therefore, common-mode signals will be passed through the input buffers atunity gain, but differential voltages will be amplied by

the factor (1 + (2 R F/R G)).In theory, this means that the user may take as muchgain in the front end as desired (as determined by R G)without increasing the common-mode gain and error.That is, the differential signal will be increased bygain, but the common-mode error will not, so the ratio(Gain (VDIFF)/(VERROR CM)) will increase. Thus, CMRR will theoretically increase in direct proportion to gain—avery useful property.

Finally, because of the symmetry of this conguration,common-mode errors in the input ampliers, if they track,

tend to be canceled out by the output stage subtractor.This includes such errors as common-mode rejectionvs. frequency. These features explain the popularity of this conguration.

3-Op Amp In-Amp Design Considerations

Two alternatives are available for constructing 3-op ampinstrumentation ampliers: using FET or bipolar inputoperational ampliers. FET input op amps have very lowbias currents and are generally well suited for use withvery high (>106 ) source impedances. FET ampliersusually have lower CMR, higher offset voltage, and higher

offset drift than bipolar ampliers. They also may providea higher slew rate for a given amount of power.

The sense and reference terminals (Figure 2-4) permitthe user to change A3’s feedback and ground connec-tions. The sense pin may be externally driven for servoapplications and others for which the gain of A3 needsto be varied. Likewise, the reference terminal allows anexternal offset voltage to be applied to A3. For normaloperation, the sense and output terminals are tiedtogether, as are reference and ground.

Ampliers with bipolar input stages tend to achieve bothhigher CMR and lower input offset voltage drift than FETinput ampliers. Super beta bipolar input stages combinemany of the benets of FET and bipolar processes, witheven lower IB drift than FET devices.

A common (but frequently overlooked) pitfall for theunwary designer using a 3-op amp in-amp design is thereduction of common-mode voltage range that occurswhen the in-amp is operating at high gain. Figure 2-5is a schematic of a 3-op amp in-amp operating at a gainof 1,000.

In this example the input ampliers, A1 and A2, areoperating at a gain of 1,000, while the output amplieris providing unity gain. This means that the voltage atthe output of each input amplier will equal one-half

Figure 2-5. A 3-Op Amp In-Amp Showing Reduced CMV Range



the peak-to-peak input voltage 1,000, plus anycommon-mode voltage that is present on the inputs(the common-mode voltage will pass through at unitygain regardless of the differential gain). Therefore, if a 10 mV differential signal is applied to the amplierinputs, amplier A1’s output will equal +5 V, plus thecommon-mode voltage, and A2’s output will be –5 V,plus the common-mode voltage. If the ampliers areoperating from 15 V supplies, they will usually have7 V or so of headroom left, thus permitting an 8 Vcommon-mode voltage—but not the full 12 V of CMVwhich, typically, would be available at unity gain (for a10 mV input). Higher gains or lower supply voltages willfurther reduce the common-mode voltage range.

The Basic 2-Op Amp Instrumentation Amplier

Figure 2-6 is a schematic of a typical 2-op amp in-ampcircuit. It has the obvious advantage of requiring only two,rather than three, operational ampliers and providing

savings in cost and power consumption. However, thenonsymmetrical topology of the 2-op amp in-amp circuitcan lead to several disadvantages, most notably lower acCMRR, compared to the 3-op amp design, limiting thecircuit’s usefulness.

The transfer function of this circuit is

V OUT = (V IN2 – V IN1) (1 + R4/R3)

for R1 = R4 and R2 = R3

Input resistance is high and balanced, thus permitting thesignal source to have an unbalanced output impedance.

The circuit’s input bias currents are set by the inputcurrent requirements of the noninverting input of thetwo op amps, which typically are very low.

Disadvantages of this circuit include the inability to opeate at unity gain, a decreased common-mode voltage ranas circuit gain is lowered, and poor ac common-modrejection. The poor CMR is due to the unequal phashift occurring in the two inputs, VIN1 and VIN2. That the signal must travel through amplier A1 before it subtracted from VIN2 by amplier A2. Thus, the voltaat the output of A1 is slightly delayed or phase-shiftewith respect to VIN1.

Minimum circuit gains of 5 are commonly used withe 2-op amp in-amp circuit because this permits an aequate dc common-mode input range, as well as sufciebandwidth for most applications. The use of rail-to-ra(single-supply) ampliers will provide a common-modvoltage range that extends down to –VS (or ground single-supply operation), plus true rail-to-rail output voage range (i.e., an output swing from +VS to –VS).

Table 2-1 shows amplier gain vs. circuit gain for thcircuit of Figure 2-6 and gives practical 1% resistor valufor several common circuit gains.

Table 2-1. Operating Gains of Ampliers A1

and A2 and Practical 1% Resistor Values for the

Circuit of Figure 2-6

Circuit Gain Gain

Gain of A1 of A2 R2, R3 R1, R4

1.10 11.00 1.10 499 k 49.9 k1.33 4.01 1.33 150 k 49.9 k1.50 3.00 1.50 100 k 49.9 k

2.00 2.00 2.00 49.9 k 49.9 k10.1 1.11 10.10 5.49 k 49.9 k101.0 1.01 101.0 499 49.9 k1001 1.001 1001 49.9 49.9 k

Figure 2-6. A 2-Op Amp In-Amp Circuit



2-Op Amp In-Amps—Common-Mode Design

Considerations for Single-Supply Operation

When the 2-op amp in-amp circuit of Figure 2-7 isexamined from the reference input, it is apparent that itis simply a cascade of two inverters.

Assuming that the voltage at both of the signal inputs,

VIN1 and VIN2, is 0, the output of A1 will equalV O1 = –V REF (R2/R1)

A positive voltage applied to VREF will tend to drive theoutput voltage of A1 negative, which is clearly not possibleif the amplier is operating from a single power supplyvoltage (+VS and 0 V).

The gain from the output of amplier A1 to the circuit’soutput, VOUT, at A2, is equal to

V OUT = –V O1 (R4/R3)

The gain from VREF to VOUT is the product of these two

gains and equalsV OUT = (–V REF (R2/R3))(–R4/R3)

In this case, R1 = R4 and R2 = R3. Therefore, thereference gain is +1, as expected. Note that this is theresult of two inversions, in contrast to the noninvertingsignal path of the reference input in a typical 3-op ampin-amp circuit.

Just as with the 3-op amp in-amp, the common-modevoltage range of the 2-op amp in-amp can be limitedby single-supply operation and by the choice of

reference voltage.

Figure 2-8 is a schematic of a 2-op amp in-amp operatingfrom a single 5 V power supply. The reference input istied to VS/2 which, in this case, is 2.5 V. The outputvoltage should ideally be 2.5 V for a differential inputvoltage of 0 V and for any common-mode voltage withinthe power supply voltage range (0 V to 5 V).

As the common-mode voltage is increased from 2.5 Vtoward 5 V, the output voltage of A1 (VO1) will equal

V O1 = V CM + ((V CM – V REF ) (R2/R1))

In this case, VREF = 2.5 V and R2/R1 = 1/4. The outputvoltage of A1 will reach 5 V when VCM = 4.5 V. Furtherincreases in common-mode voltage obviously cannot berejected. In practice, the input voltage range limitationsof ampliers A1 and A2 may limit the in-amp’s common-mode voltage range to less than 4.5 V.

Similarly, as the common-mode voltage is reduced from2.5 V toward 0 V, the output voltage of A1 will hit zerofor a VCM of 0.5 V. Clearly, the output of A1 cannot gomore negative than the negative supply line (assumingno charge pump), which, for a single-supply connection,equals 0 V. This negative or zero-in common-moderange limitation can be overcome by proper design of thein-amp’s internal level shifting, as in the AD627 mono-lithic 2-op amp instrumentation amplier. However,even with good design, some positive common-modevoltage range will be traded off to achieve operation atzero common-mode voltage.

Figure 2-7. The 2-Op Amp In-Amp Architecture

Figure 2-8. Output Swing Limitations of 2-Op Amp In-Amp Using a 2.5 V Reference



Another, and perhaps more serious, limitation of thestandard 2-amplier instrumentation amplier circuitcompared to 3-amplier designs, is the intrinsic difcultyof achieving high ac common-mode rejection. Thislimitation stems from the inherent imbalance in thecommon-mode signal path of the 2-amplier circuit.

Assume that a sinusoidal common-mode voltage, VCM,at a frequency FCM, is applied (common mode) to inputsVIN1 and VIN2 (Figure 2-8). Ideally, the amplitude of theresulting ac output voltage (the common-mode error)should be 0 V, independent of frequency, FCM, at least overthe range of normal ac power line (mains) frequencies:50 Hz to 400 Hz. Power lines tend to be the source of much common-mode interference.

If the ac common-mode error is zero, amplier A2and gain network R3, R4 must see zero instantaneousdifference between the common-mode voltage, applied

directly to VIN2, and the version of the common-modevoltage that is amplied by A1 and its associated gainnetwork R1, R2. Any dc common-mode error (assumingnegligible error from the amplier’s own CMRR) canbe nulled by trimming the ratios of R1, R2, R3, and R4to achieve the balance

R1 ∫ R4 and R2 ∫ R3

However, any phase shift (delay) introduced by amplierA1 will cause the phase of VO1 to slightly lag behindthe phase of the directly applied common-modevoltage of VIN2. This difference in phase will result in

an instantaneous (vector) difference in VO1 and VIN2,even if the amplitudes of both voltages are at theirideal levels. This will cause a frequency dependentcommon-mode error voltage at the circuit’s output,VOUT. Further, this ac common-mode error will increaselinearly with common-mode frequency, because the phaseshift through A1 (assuming a single-pole roll-off) willincrease directly with frequency. In fact, for frequenciesless than 1/10th the closed-loop bandwidth (f T1) of A1,the common-mode error (referred to the input of thein-amp) can be approximated by

% % %CM Error V G

V

f

f

E

CM

CM

TI

= ( ) = ( )100 100

where V E is the common-mode error voltage at VOUT,and G is the differential gain—in this case 5.

Figure 2-9. CMR vs. Frequency of AD627

In-Amp Circuit

For example, if A1 has a closed-loop bandwidth 100 kHz (a typical value for a micropower op ampwhen operating at the gain set by R1 and R2, and thcommon-mode frequency is 100 Hz, then

% % . %CM Error = ( ) =100

100100 0 1

Hz

kHz

A common-mode error of 0.1% is equivalent to 60 dof common-mode rejection. So, in this example, eventhis circuit were trimmed to achieve 100 dB CMR at d

this would be valid only for frequencies less than 1 Hz. 100 Hz, the CMR could never be better than 60 dB.

The AD627 monolithic in-amp embodies an advanceversion of the 2-op amp instrumentation amplificircuit that overcomes these ac common-mode rejectiolimitations. As illustrated in Figure 2-9, the AD62maintains over 80 dB of CMR out to 8 kHz (gain 1,000), even though the bandwidth of ampliers Aand A2 is only 150 kHz.

The four resistors used in the subtractor are normalinternal to the IC and are usually of very high resistancHigh common-mode voltage difference amps (diff amptypically use input resistors selected to provide voltagattenuation. Therefore, both the differential signvoltage and the common-mode voltage are attenuatethe common mode is rejected, and then the signvoltage is amplified.

Auto-Zeroing Instrumentation Ampliers

Auto-zeroing is a dynamic offset and drift cancellatiotechnique that reduces input referred voltage offset the V level, and voltage offset drift to the nV/C lev



A further advantage of dynamic offset cancellation isthe reduction of low frequency noise, in particular the1/f component.

The AD8230 is an instrumentation amplier whichutilizes an auto-zeroing topology and combines it withhigh common-mode signal rejection. The internal signalpath consists of an active differential sample-and-holdstage (preamp), followed by a differential amplier(gain amp). Both ampliers implement auto-zeroing tominimize offset and drift. A fully differential topologyincreases the immunity of the signals to parasitic noiseand temperature effects. Amplier gain is set by twoexternal resistors for convenient TC matching. TheAD8230 can accept input common-mode voltageswithin and including the supply voltages (5 V).

The signal sampling rate is controlled by an on-chip,10 kHz oscillator and logic to derive the required nonover-lapping clock phases. For simplication of the functional

description, two sequential clock phases, A and B, willbe used to distinguish the order of internal operation asdepicted in Figures 2-10 and 2-11, respectively.

During Phase A, the sampling capacitors are connectedto the input signals at the common-mode potential. Theinput signal’s difference voltage, VDIFF, is stored acrossthe sampling capacitors, CSAMPLE. The common-modepotential of the input affects CSAMPLE insofar as thesampling capacitors are at a different common-modepotential than the preamp. During this period, the gain

amp is disconnected from the preamp so its output re-mains at the level set by the previously sampled inputsignal, held on CHOLD in Figure 2-10.

In Phase B, upon sampling the analog input signals, theinput common-mode component is removed. The com-mon-mode output of the preamp is held at the referencepotential, VREF. When the bottom plates of the samplingcapacitors connect to the output of the preamp, the inputsignal common-mode voltage is pulled to the amplier’scommon-mode voltage,VREF. In this manner, the samplingcapacitors are brought to the same common-mode volt-

age as the preamp. The remaining differential signal ispresented to the gain amp, refreshing the hold capacitors’signal potentials as shown in Figure 2-11.

CHOLD

CHOLD

+ –

– +CSAMPLE

VOUT

VREF

V+IN

VDIFF+VCM

V –IN

RFRG

PREAMP GAIN AMP

Figure 2-10. The AD8230 in Phase A sampling phase. The differential component of the input signal is

stored on sampling capacitors, C SAMPLE . The gain amp conditions the signal stored on the hold capaci-

tors, C HOLD . Gain is set with the R G and R F resistors.

CHOLD

CHOLD

+ –

– +CSAMPLE

VOUT

VREF

V+IN

VDIFF+VCM

V –IN

RFRG

PREAMP GAIN AMP

Figure 2-11. In Phase B, the differential signal is transferred to the hold capacitors, refreshing the value

stored on C HOLD . The gain amp continues to condition the signal stored on the hold capacitors, C HOLD .



CHOLD

CHOLD

+ –

– +

CSAMPLE VOUT

VREF

A

A

A

A

B

B

B

B

A

V+IN

VDIFF+VCM

V –IN

RFRG

PREAMP GAIN AMP

A

CP_HOLD

B

B

Figure 2-12. Detailed schematic of the preamp during Phase A. The differential signal is

stored on the sampling capacitors. Concurrently, the preamp nulls its own offset and

stores the correction voltage on its hold capacitors, C P_HOLD .

CHOLD

CHOLD

VNULL

–

– +

+

VREF

PREAMP

MAIN

AMP

NULLING AMP

GAIN AMP

s

f

VOUT

Sn

f n

CN_HOLD

CM_HOLD

RFRG

B

B

A A

AB

B

B

Figure 2-13. Detailed schematic of the gain amp during Phase A. The main amp conditions

the signal held on the hold capacitors, C HOLD . The nulling amplier forces the inputs of the

main amp to be equal by injecting a correction voltage into the V NULL port, removing the

offset of the main amp. The correction voltage is stored on C M_HOLD .

Figures 2-12 through 2-15 show the internal workingsof the AD8230 in depth. As noted, both the preampand gain amp auto-zero. The preamp auto-zeroes duringphase A, shown in Figure 2-12, while the sampling capsare connected to the signal source. By connecting thepreamp differential inputs together, the resulting outputreferred offset is connected to an auxiliary input port to the

preamp. Negative feedback operation forces a cancelingpotential at the auxiliary port, which is subsequentlyheld on a storage capacitor, CP_HOLD.

While in Phase A, the gain amp shown in Figure 2-reads the previously sampled signal held on the holdincapacitors, CHOLD. The gain amp implements feedforwaoffset compensation to allow for transparent nulling the main amp and a continuous output signal. A differentsignal regimen is maintained throughout the main amp anfeedforward nulling amp by utilizing a double differentinput topology. The nulling amp compares the input the two differential signals. As a result, the offset erris fed into the null port of the main amp, VNULL , an



CHOLD

CHOLD

VNULL

–

– +

+

VREF

PREAMP

MAINAMP

NULLING AMP

GAIN AMP

s

f

VOUT

Sn

f n

CN_HOLD

CM_HOLD

RFRG

B

B

A A

AB

B

B

Figure 2-15. Detailed schematic of the gain amp during Phase B. The nulling amplier nulls

its own offset by injecting a correction voltage into its own auxiliary port and storing it on

C N_HOLD . The main amplier continues to condition the differential signal held on C HOLD , yet

maintains minimal offset because its offset was corrected in the previous phase.



MONOLITHIC IN-AMP DESIGN—THE

INSIDE STORY

High Performance In-Amps

Analog Devices introduced the first high performancemonolithic instrumentation amplifier, the AD520,in 1971.

In 2003, the AD8221 was introduced. This in-amp isin a tiny MSOP package and offers increased CMR athigher bandwidths than other competing in-amps. It

also has many key performance improvements over theindustry-standard AD620 series in-amps.

The AD8221 is a monolithic instrumentation amplierbased on the classic 3-op amp topology (Figure 3 -1).Input transistors Q1 and Q2 are biased at a constantcurrent so that any differential input signal will forcethe output voltages of A1 and A2 to be equal. A signalapplied to the input creates a current through R G, R1,and R2 such that the outputs of A1 and A2 deliver thecorrect voltage. Topologically, Q1, A1, R1, and Q2, A2,R2 can be viewed as precision current feedback ampli-

ers. The amplied differential and common-modesignals are applied to a difference amplier, A3, whichrejects the common-mode voltage, but processes thedifferential voltage. The difference amplier has a lowoutput offset voltage as well as low output offset volt-age drift. Laser-tr immed resistors allow for a highlyaccurate in-amp with gain error typically less than20 ppm and CMRR that exceeds 90 dB (G = 1).

Using superbeta input transistors and an IB compensa-tion scheme, the AD8221 offers extremely high input

impedance, low IB, low IOS, low IB drift, low input bias curent noise, and extremely low voltage noise of 8 nV/÷ Hz

The transfer function of the AD8221 is

G R

RG

G

G

= +

=−

49 41

49 4

1

.

.

k

k

Ω

Ω

Care was taken to ensure that a user could easily anaccurately set the gain using a single external standavalue resistor.

Since the input ampliers employ a current feedbacarchitecture, the AD8221’s gain bandwidth produincreases with gain, resulting in a system that does nsuffer from the expected bandwidth loss of voltage feeback architectures at higher gains.

In order to maintain precision even at low input levespecial care was taken with the AD8221’s design anlayout, resulting in an in-amp whose performance sati

es even the most demanding applications (see Figur3-3 and 3-4).

A unique pinout enables the AD8221 to meet aunparalleled CMRR specication of 80 dB at 10 kH(G = 1) and 110 dB at 1 kHz (G = 1000). The balancepinout, shown in Figure 3-2, reduces the parasitics thhad in the past adversely affected CMRR performancIn addition, the new pinout simplies board layobecause associated traces are grouped. For examplthe gain setting resistor pins are adjacent to the inpuand the reference pin is next to the output.

Figure 3-1. AD8221 Simplied Schematic



Figure 3-2. AD8221 Pinout

Figure 3-3. CMR vs. Frequency of the AD8221

Figure 3-4. AD8221 Closed-Loop Gain vs.

Frequency

For many years, the AD620 has been the industry-standard, high performance, low cost in-amp. TheAD620 is a complete monolithic instrumentationamplier offered in both 8-lead DIP and SOIC packages.The user can program any desired gain from 1 to1,000 using a single external resistor. By design, therequired resistor values for gains of 10 and 100 arestandard 1% metal film resistor values.

The AD620 (see Figure 3-5) is a second-generationversion of the classic AD524 in-amp and embodies amodication of the classic 3-op amp circuit. Laser trimming

of on-chip thin lm resistors, R1 and R2, allows theuser to accurately set the gain to 100 within 0.3%max error, using only one external resistor. Monolithicconstruction and laser wafer trimming allow the tightmatching and tracking of circuit components.

Figure 3-5. A Simplied Schematic of the AD620



A preamp section comprised of Q1 and Q2 providesadditional gain up front. Feedback through the Q1-A1-R1 loop and the Q2-A2-R2 loop maintains a constantcollector current through the input devices Q1 and Q2,thereby impressing the input voltage across the externalgain setting resistor, R G. This creates a differentialgain from the inputs to the A1/A2 outputs given byG = (R1 + R2)/R G + 1. The unity gain subtractor, A3,removes any common-mode signal, yielding a single-ended output referred to the REF pin potential.

The value of R G also determines the transconductanceof the preamp stage. As R G is reduced for larger gains,the transconductance increases asymptotically to thatof the input transistors. This has three important advan-tages. First, the open-loop gain is boosted for increasingprogrammed gain, thus reducing gain related errors.Second, the gain bandwidth product (determined byC1, C2, and the preamp transconductance) increases

with programmed gain, thus optimizing the amplier’sfrequency response. Figure 3-6 shows the AD620’sclosed-loop gain vs. frequency.


Frequency

The AD620 also has superior CMR over a wide frequency

range, as shown in Figure 3-7.

Figure 3-7. AD620 CMR vs. Frequency

Figures 3-8 and 3-9 show the AD620’s gain nonlineari

and small signal pulse response.

Figure 3-8. AD620 Gain Nonlinearity

(G = 100, R L = 10 k , Vertical Scale: 100 V =

10 ppm, Horizontal Scale 2 V/div)

Figure 3-9. Small Signal Pulse Response of

the AD620 (G = 10, R L= 2 k , C L = 100 pF)



Figures 3-11 and 3-12 show the AD621’s CMR vs.frequency and closed-loop gain vs. frequency.



Frequency

Figures 3-13 and 3-14 show the AD621’s gain nonlineaity and small signal pulse response.


(G = 10, R L = 10 k , Vertical Scale: 100 V/div= 100 ppm/div, Horizontal Scale 2 V/div)

Figure 3-14. Small Signal Pulse Response of

the AD621 (G = 10, R L = 2 k , C L = 100 pF)



Fixed Gain In-Amps

The AD8225 is a precision, gain-of-5, monolithicin-amp. Figure 3-15 shows that it is a 3-op amp in-strumentation amplier. The unity gain input buffersconsist of superbeta NPN transistors Q1 and Q2 andop amps A1 and A2. These transistors are compensatedso that their input bias currents are extremely low,typically 100 pA or less. As a result, current noise isalso low, only 50 fA/÷ Hz . The input buffers drive again- of-5 difference amplier. Because the 3 k and15 k resistors are ratio matched, gain stability is better

than 5 ppm/ C over the rated temperature range.The AD8225 has a wide gain bandwidth product,resulting from its being compensated for a fixed gainof 5, as opposed to the usual unity gain compensationof variable gain in-amps. High frequency perfor-mance is also enhanced by the innovative pinout of the AD8225. Since Pins 1 and 8 are uncommitted,Pin 1 may be connected to Pin 4. Since Pin 4 is alsoac common, the stray capacitance at Pins 2 and 3is balanced.

Figure 3-16 shows the AD8225’s CMR vs. frequencywhile Figure 3-17 shows its gain nonlinearity.



Q1

A1

C2

–VS

+VS

+VS

–IN400 400

UNITYGAIN

BUFFERSR2

Q2

A2

C1

+IN

R1

–VS

+VS

–VS

+VS

–VS

+VS

A3 VOUT

VREF

VB

3k

3k

15k

15kGAIN-OF-5

DIFFERENCE AMPLIFIER




Low Cost In-Amps

The AD622 is a low cost version of the AD620 (seeFigure 3-5). The AD622 uses streamlined productionmethods to provide most of the performance of theAD620 at lower cost.

Figures 3-18, 3-19, and 3-20 show the AD622’s CMR

vs. frequency and gain nonlinearity and closed-loopgain vs. frequency.


((RTI) 0 to 1 k Source Imbalance)


(G = 1, R L = 10 k , Vertical Scale: 20 V = 2 ppm)

Figure 3-20. AD622 Closed-Loop

Gain vs. Frequency

Monolithic In-Amps Optimized for

Single-Supply OperationSingle-supply in-amps have special design problems thneed to be addressed. The input stage must be able amplify signals that are at ground potential (or very cloto ground), and the output stage needs to be able to swinto within a few millivolts of ground or the supprail. Low power supply current is also importanAnd, when operating from low power supply voltagethe in-amp needs to have an adequate gain bandwidproduct, low offset voltage drift, and good CMR vs. gaand frequency.

The AD623 is an instrumentation amplier baseon the 3-op amp in-amp circuit, modied to ensuoperation on either single- or dual-power supplies, evat common-mode voltages at, or even below, the negatisupply rail (or below ground in single-supply operationOther features include rail-to-rail output voltage swinlow supply current, microsmall outline packaging, loinput and output voltage offset, microvolt/dc offset levdrift, high common-mode rejection, and only one externresistor to set the gain.



As shown in Figure 3-21, the input signal is applied toPNP transistors acting as voltage buffers and dc levelshifters. A resistor trimmed to within 0.1% of 50 k in each ampliers (A1 and A2) feedback path ensuresaccurate gain programmability.

The differential output is

V R

V O

G

C = +

1100k Ω

where RG is in k.

The differential voltage is then converted to a single-endedvoltage using the output difference amplier, which alsorejects any common-mode signal at the output of theinput ampliers.

Since all the ampliers can swing to either supply rail,as well as have their common-mode range extended to

below the negative supply rail, the range over which theAD623 can operate is further enhanced.

Note that the base currents of Q1 and Q2 ow directlyout

of the input terminals, unlike dual-supply input-current compensated in-amps such as the AD620. Sincethe inputs (i.e., the bases of Q1 and Q2) can operate atground (i.e., 0 V or, more correctly, at 200 mV belowground), it is not possible to provide input current com-pensation for the AD623. However, the input bias currentof the AD623 is still very small: only 25 nA max.

The output voltage at Pin 6 is measured with respectto the reference potential at Pin 5. The impedance of thereference pin is 100 k. Internal ESD clamping diodesallow the input, reference, output, and gain terminals of the AD623 to safely withstand overvoltages of 0.3 V aboveor below the supplies. This is true for all gains, and withpower on or off. This last case is particularly importantsince the signal source and the in-amp may be poweredseparately. If the overvoltage is expected to exceed thisvalue, the current through these diodes should be limitedto 10 mA, using external current limiting resistors (seeInput Protection section). The value of these resistors is

dened by the in-amp’s noise level, the supply voltage,and the required overvoltage protection needed.

The bandwidth of the AD623 is reduced as the gainis increased since A1 and A2 are voltage feedback opamps. However, even at higher gains the AD623 stillhas enough bandwidth for many applications.


The AD623’s gain is resistor programmed by R G or more precisely by whatever impedance appearsbetween Pins 1 and 8. Figure 3-22 shows the gain vs.frequency of the AD623. The AD623 is laser-trimmedto achieve accurate gains using 0.1% to 1% toleranceresistors.

Figure 3-22. AD623 Closed-Loop Gain

vs. Frequency



Table 3-2. Required Value of Gain Resistor

Desired 1% Std. Calculated Gain

Gain Value of R G, Using 1% Resistors

2 100 k 25 24.9 k 5.0210 11 k 10.09

20 5.23 k 20.1233 3.09 k 33.3640 2.55 k 40.2150 2.05 k 49.7865 1.58 k 64.29100 1.02 k 99.04200 499 201.4500 200 5011000 100 1001

Table 3-2 shows required values of R G for various gains.Note that for G = 1, the R G terminals are unconnected(RG = ). For any arbitrary gain, R G can be calculated

using the formula

RG = 100 k/ (G – 1)

Figure 3-23 shows the AD623’s CMR vs. frequency.Note that the CMR increases with gain up to a gain of 100 and that CMR also remains high over frequency, upto 200 Hz. This ensures the attenuation of power linecommon-mode signals (and their harmonics).

Figure 3-23. AD623 CMR vs. Frequency (V S = 5 V)

Figure 3-24 shows the gain nonlinearity of the AD62


(G = –10, 50 ppm/div)

Figure 3-25 shows the small signal pulse response

the AD623.

Figure 3-25. AD623 Small Signal Pulse Respons

(G = 10, R L = 10 k , C L = 100 pF)



Low Power, Single-Supply In-Amps

The AD627 is a single-supply, micropower instrumenta-tion amplier that can be congured for gains between 5and 1,000 using just a single external resistor. It providesa rail-to-rail output voltage swing using a single 3 V to30 V power supply. With a quiescent supply current of only 60 A (typical), its total power consumption is less

than 180 W, operating from a 3 V supply.

Figure 3-26 is a simplied schematic of the AD627. TheAD627 is a true instrumentation amplier built usingtwo feedback loops. Its general properties are similar tothose of the classic 2-op amp instrumentation amplierconguration, and can be regarded as such, but internallythe details are somewhat different. The AD627 uses amodied current feedback scheme which, coupled withinterstage feedforward frequency compensation, resultsin a much better CMRR (common-mode rejection ratio)at frequencies above dc (notably the line frequency of

50 Hz to 60 Hz) than might otherwise be expected of alow power instrumentation amplier.

As shown in Figure 3-26, A1 completes a feedback loopwhich, in conjunction with V1 and R5, forces a constantcollector current in Q1. Assume for the moment thatthe gain-setting resistor (R G) is not present. ResistorsR2 and R1 complete the loop and force the output of A1 to be equal to the voltage on the inverting terminalwith a gain of (almost exactly) 1.25. A nearly identicalfeedback loop completed by A2 forces a current in Q2,which is substantially identical to that in Q1, and A2 alsoprovides the output voltage. When both loops are bal-anced, the gain from the noninverting terminal to VOUT is equal to 5, whereas the gain from the output of A1 toVOUT is equal to –4. The inverting terminal gain of A1,(1.25) times the gain of A2, (–4) makes the gain fromthe inverting and noninverting terminals equal.

The differential mode gain is equal to 1 + R4/R3, nomi-nally 5, and is factory trimmed to 0.01% nal accuracy(AD627B typ). Adding an external gain setting resis-

tor (R G) increases the gain by an amount equal to(R4 + R1)/R G. The gain of the AD627 is given by thefollowing equation:

G RG

= +

5200k Ω




Laser trims are performed on resistors R1 through R4to ensure that their values are as close as possible tothe absolute values in the gain equation. This ensureslow gain error and high common-mode rejection at allpractical gains.

Figure 3-27 shows the AD627’s CMR vs. frequency.


Figures 3-28 and 3-29 show the AD627’s gain vs.frequency and gain nonlinearity.

Figure 3-28. AD627 Closed-Loop Gain

vs. Frequency


(V S = 2.5 V, G = 5, 4 ppm/Vert Division)

The AD627 also has excellent dynamic response,

shown in Figure 3-30.

Figure 3-30. Small Signal Pulse Response of the

AD627 (V S = 5 V, G = +10, R L = 20 k , C L = 50 pF,

20 s/Horizontal Division, 20 mV/Vertical Division



Chapter IV

MONOLITHIC DIFFERENCE AMPLIFIERS

Difference (Subtractor) Amplier Products

Monolithic difference ampliers are a special category of in-amps that are usually designed to be used in applica-tions in which large dc or ac common-mode voltages arepresent. This includes automotive applications, such ascurrent sensing, battery cell voltage monitors, and motorcontrol. For this reason, difference ampliers usuallyinclude very large value, on-chip resistor networks.

+

A2

–

+

A1

–

G = 2G = 10

AD8202

RF

RF

100k

COMM

+IN

–IN

A2

RG

RCRB

RA

RA

RB

RC

RG

5

4

A1

3

+VS

6

8

1

2

Figure 4-1. AD8202 Connection Diagram

Table 4-1. Latest Generation of Analog Devices’ Difference Amps Summarized1

Power –3 dB CMR Input VOS RTISupply BW G = 10 Offset Drift Noise2

Current (kHz) (typ) (dB) Voltage (V/C) (nV/÷ Hz)Product Features (typ) (G = 10) (min) (max) (max) (G = 10)

AD8202 S.S. G = 20 250 A 50 803, 4, 12 1 mV5 10 300 (typ)3

AD8205 S.S. G = 50 1 mA 506 804, 6, 12 2 mV5 15 (typ) 500 (typ)6

AD8130 270 MHz Receiver 12 mA 270 MHz 837, 8 1.8 mV 3.5 mV 12.5 (typ)7, 9

AD628 High CMV 1.6 mA 60010 7510 1.5 mV 4 300 (typ)10

AD629 High CMV 0.9 mA 500 777 1 mV 6 550 (typ)7

AD626 High CMV 1.5 mA 100 5511 500 V 1 250 (typ)AMP03 High BW G = 1 3.5 mA 3 MHz 857 400 V NS 750 (typ)7

NOTESNS = not specied, NA = not applicable, S.S. = single supply.1Refer to ADI website at www.analog.com for latest products and specications.2At 1 kHz. RTI noise = ÷(eni)2 + (eno/G)2.3Operating at a gain of 20.4For 10 kHz, <2 k source imbalance.5Referred to input: RFI.6Operating at a gain of 50.7Operating at a gain of 1.8At frequency = 4 MHz.9At frequency 10 kHz.10Operating at a gain of 0.1.11For 1 kHz,10 kHz.12DC to 10 kHz.

The use of large value precision resistors, which are

sometimes several hundred thousand ohms, offers ex-cellent input protection at the expense of a higher overallnoise level. Table 4-1 provides a performance summaryof Analog Devices’ difference amplier products.

The AD8202 consists of a preamp and buffer arrangedas shown in Figure 4-1.



As shown in Figure 4-2, the preamp incorporates a dy-namic bridge (subtractor) circuit. Identical networks(within the shaded areas) consisting of R A, R B, R C,and R G attenuate input signals applied to Pins 1 and8. Note that when equal amplitude signals are assertedat inputs 1 and 8, and the output of A1 is equal tothe common potential (i.e., zero), the two attenuatorsform a balanced-bridge network. When the bridge isbalanced, the differential input voltage at A1, and thusits output, will be zero.

Any common-mode voltage applied to both inputs willkeep the bridge balanced and the A1 output at zero.Because the resistor networks are carefully matched, thecommon-mode signal rejection approaches this idealstate. However, if the signals applied to the inputs differ,the result is a difference at the input to A1. A1 respondsby adjusting its output to drive R B, by way of R G, toadjust the voltage at its inverting input until it matches

the voltage at its noninverting input.

By attenuating voltages at Pins 1 and 8, the amplierinputs are held within the power supply range, even if Pins 1 and 8 input levels exceed the supply, or fall belowcommon (ground.) The input network also attenuatesnormal (differential) mode voltages. R C and R G form anattenuator that scales A1 feedback, forcing large outputsignals to balance relatively small differential inputs. Theresistor ratios establish the preamp gain at 10.

Because the dif ferential input signal is attenuated and

then amplified to yield an overall gain of 10, theamplif ier A1 operates at a higher noise gain, multiplyingdeciencies such as input offset voltage and noise withrespect to Pins 1 and 8.

To minimize these errors while extending the commonmode range, a dedicated feedback loop is employed reduce the range of common-mode voltage applied A1 for a given overall range at the inputs. By offsettinthe range of voltage applied to the compensator, thinput common-mode range is also offset to includvoltages more negative than the power supply. Amper A3 detects the common-mode signal applied to Aand adjusts the voltage on the matched R CM resistoto reduce the common-mode voltage range at the Ainputs. By adjusting the common voltage of these resitors, the common-mode input range is extended whthe normal mode signal attenuation is reduced, leadinto better performance referred to input.

The output of the dynamic bridge taken from A1 connected to Pin 3 by way of a 100 k series resistoprovided for low-pass ltering and gain adjustmenThe resistors in the input networks of the preamp an

the buffer feedback resistors are ratio-trimmed fhigh accuracy.

The output of the preamp drives a gain-of-2 buffamplier A2, implemented with carefully matchefeedback resistors R F.

The two-stage system architecture of the AD820(Figure 4 -2) enables the user to incorporate a low-palter prior to the output buffer. By separating the gainto two stages, a full- scale, rail-to-rail signal from thpreamp can be ltered at Pin 3, and a half-scale sign

resulting from ltering can be restored to full scale bthe output buffer amp. The source resistance seen bthe inverting input of A2 is approximately 100 kto minimize the effects of A2’s input bias currenHowever, this cur rent is quite small and errors resuling from applications that mismatch the resistanare correspondingly small.

100k

A1

A3

RCM RCM

(TRIMMED)

RA

–IN

RGRC

RB

RA

RC

RB

RG

+IN

COM

A2

RF

RF

AD8202

3 4

5

2

8 1




The AD8205 is a single-supply difference amplier thatuses a unique architecture to accurately amplify smalldifferential current shunt voltages in the presence of rapidly changing common-mode voltages. It is offeredin both packaged and die form.

In typical applications, the AD8205 is used to measure

current by amplifying the voltage across a current shuntplaced across the inputs.

The gain of the AD8205 is 50 V/V, with an accuracy of 1.2%. This accuracy is guaranteed over the operatingtemperature range of –40C to +125C. The die tem-perature range is –40C to +150C with a guaranteedgain accuracy of 1.3%.

The input offset is less than 2 mV referred to the input at25C, and 4.5 mV maximum referred to the input overthe full operating temperature range for the packagedpart. The die input offset is less than 6 mV referred to

the input over the die operating temperature range.The AD8205 operates with a single supply from 4.5 V to10 V (absolute maximum = 12.5 V). The supply currentis less than 2 mA.

High accuracy trimming of the internal resistors allowsthe AD8205 to have a common-mode rejection ratiobetter than 78 dB from dc to 20 kHz. The common-moderejection ratio over the operating temperature is 76 dBfor both the die and packaged part.

The output offset can be adjusted from 0.05 V to 4.8 V

(V+ = 5 V) for unipolar and bipolar operation.The AD8205 consists of two ampliers (A1 and A2),a resistor network, small voltage reference, and a biascircuit (not shown). See Figure 4-3.

AD8205

+IN –IN

250mV

GND

A1

A2

RA RA

RB RB RF RF RD RD

RE RF

RC RC

VOUT

RREF

RREF

VREF1

VREF2

Figure 4-3. Simplied Schematic

The set of input attenuators preceding A1 consist of R A,R B, and R C, which reduce the common-mode voltage tomatch the input voltage range of A1. The two attenuatorsform a balanced-bridge network. When the bridge is bal-anced, the differential voltage created by a common-modevoltage is 0 V at the inputs of A1. The input attenuationratio is 1/16.7. The combined series resistance of R A, R B,and R C is approximately 200 k 20%.

By attenuating the voltages at Pin 1 and Pin 8, the A1amplier inputs are held within the power supply range,even if Pin 1 and Pin 8 exceed the supply or fall belowcommon (ground). A reference voltage of 250 mVbiases the attenuator above ground. This allowsthe amplifier to operate in the presence of negativecommon-mode voltages.

The input network also attenuates normal (differential)mode voltages. A1 amplies the attenuated signal by 26.

The input and output of this amplier are differential tomaximize the ac common-mode rejection.

A2 converts the differential voltage from A1 into a single-ended signal and provides further amplication. The gainof this second stage is 32.15.

The reference inputs, VREF1 and VREF2, are tied throughresistors to the positive input of A2, which allows theoutput offset to be adjusted anywhere in the outputoperating range. The gain is 1 V/V from the referencepins to the output when the reference pins are usedin parallel. The gain is 0.5 V/V when they are used to

divide the supply.The ratios of Resistors R A, R B, R C, R D, and R F aretrimmed to a high level of precision to allow thecommon-mode rejection ratio to exceed 80 dB. Thisis accomplished by laser trimming the resistor ratiomatching to better than 0.01%.

The total gain of 50 is made up of the input attenuationof 1/16.7 multiplied by the rst stage gain of 26 and thesecond stage gain of 32.15.

The output stage is Class A with a PNP pull-up transistor

and a 300

A current sink pull-down.



The AMP03 is a monolithic, unity gain, 3 MHz di f-ferential amplifier. Incorporating a matched thin- filmresistor network, the AMP03 features stable opera-tion over temperature without requiring expensiveexternal matched components. The AMP03 is a basicanalog building block for differential amplifier andinstrumentation applications (Figure 4-4).

–VEE4

REFERENCE1

OUTPUT6

–VCC7

SENSE5

+IN 3

–IN 2

25k25k

25k25k

AMP03

Figure 4-4. AMP03 Functional Block Diagram

The differential amplier topology of the AMP03 servesboth to amplify the difference between two signals andto provide extremely high rejection of the common-modeinput voltage. With a typical common-mode rejection of 100 dB, the AMP03 solves common problems encounteredin instrumentation design. It is ideal for performing eitherthe addition or subtraction of two input signals withoutusing expensive externally matched precision resistors.Because of its high CMR over frequency, the AMP03 is

an ideal general-purpose amplier for data acquisitionsystems that must operate in a noisy environment. Figures4-5 and 4-6 show the AMP03’s CMR and closed-loopgain vs. frequency.

120

110

100

90

80

70

60

50

40

30

10

1 10 100 1k 10k 10k 1M

20

0

FREQUENCY (Hz)

C O M M O N - M O

D E R E J E C T I O N ( d B )

TA = 25C

VS = 15V

Figure 4-5. AMP03 CMR vs. Frequency

50

100 1k 10k 10k 10M1M –30

–20

–10

0

10

20

30

40

FREQUENCY (Hz)

C L O S E D - L O

O P G A I N ( d B )

TA = 25CVS = 15V

Figure 4-6. AMP03 Closed-Loop Gain

vs. Frequency

Figure 4-7 shows the small signal pulse response the AMP03.

100

90

0

50mV 1s

TA = 25CVS = 15V

Figure 4-7. AMP03 Small Signal Pulse Response

The AD626 is a single- or dual-supply differentiamplier consisting of a precision balanced attenuatoa very low drift preamplifier (A1), and an outpubuffer amplif ier (A2). It has been designed so thsmall differential signals can be accurately amplieand ltered in the presence of large common-modvoltages (much greater than the supply voltage) withothe use of any other active components.



Figure 4-8 shows the main elements of the AD626. Thesignal inputs at Pins 1 and 8 are rst applied to dualresistive attenuators, R1 through R4, whose purpose isto reduce the peak common-mode voltage at the inputto the preamplier—a feedback stage based on the verylow drift op amp A1. This allows the differential inputvoltage to be accurately amplied in the presence of large common-mode voltages—six times greater thanthat which can be tolerated by the actual input to A1. Asa result, the input common-mode range extends to sixtimes the quantity (VS – 1 V). The overall common-modeerror is minimized by precise laser-trimming of R3 andR4, thus giving the AD626 a common-mode rejectionratio of at least 10,000:1 (80 dB). The output of A1 isconnected to the input of A2 via 100 k (R12) resistorto facilitate the low-pass ltering of the signal of interest.The AD626 is easily congured for gains of 10 or 100. For

a gain of 10, Pin 7 is simply left unconnected; similarly,for a gain of 100, Pin 7 is grounded. Gains between 10and 100 are easily set by connecting a resistor betweenPin 7 and analog GND. Because the on-chip resistorshave an absolute tolerance of 20% (although they areratio matched to within 0.1%), at least a 20% adjustmentrange must be provided. The nominal value for this gainsetting resistor is equal to

RGAIN

=−

−50 000

10555

, ΩΩ

100

90

0%

10

500mV 20s

Figure 4-9. The Large Signal Pulse

Response of the AD626. G = 10

Figure 4-9 shows the large signal pulse response of the AD626.

The AD629 is a unity gain difference amplier designedfor applications that require the measurement of signalswith common-mode input voltages of up to 270 V.The AD629 keeps error to a minimum by providingexcellent CMR in the presence of high common-modeinput voltages. Finally, it can operate from a wide powersupply range of 2.5 V to 18 V.

AD626C15pF

+IN

–IN

R1200k

R2200k

R341k

C25pF

R441k

R54.2k

R1110k

R6500

R7500

R810k

R1010k

R14555

GND GAIN = 100

R1310k

R1510k

R1795k

R910k

R12100k

FILTER

OUT

+VS

A1A2

–VS




The AD629 can replace costly isolation amplifiersin applications that do not require galvanic isola-tion. Figure 4-10 is the connection diagram of theAD629. Figure 4-11 shows the AD629’s CMR vs.frequency.

Figure 4-10. AD629 Connection Diagram

100

95

90

85

80

75

70

65

60

55

20 100 1k 10k 20k50

FREQUENCY (Hz)

C M R ( d B )

Figure 4-11. Common-Mode Rejection

vs. Frequency

High Frequency Differential Receiver/Ampliers

Although not normally associated with difference ampli-ers, the AD8130 series of very high speed differential

receiver/ampliers represent a new class of productsthat provide effective common-mode rejection at VHFfrequencies. The AD8130 has a –3 dB bandwidth of 270 MHz, an 80 dB CMRR at 2 MHz, and a 70 dBCMRR at 10 MHz.

VOUT

+VS PD

–VS

3

7

2

1

8

VIN

4

5

REF

FB

6

Figure 4-12. AD8130 Block Diagram

Figure 4-12 is a block diagram of the AD8130. Its desiguses an architecture called active feedback which diffefrom that of conventional op amps. The most obvioudifferentiating feature is the presence of two separapairs of differential inputs compared to a convention

op amp’s single pair. Typically for the active feedbaarchitecture, one of these input pairs is driven by differential input signal, while the other is used for thfeedback. This active stage in the feedback path is whethe term active feedback is derived. The active feedbaarchitecture offers several advantages over a conventionop amp in several types of applications. Among these aexcellent common-mode rejection, wide input commomode range, and a pair of inputs that are high impedanand totally balanced in a typical application.

10k 100100k 1M 10M –120

–110

–100

–90

–80

–70

–60

–50

–40

–30

FREQUENCY (Hz)

C O M M O N - M O D E R E J E C T I O N ( d B )

VS = 2.5V

VS = 5V, 12V

Figure 4-13. AD8130 Common-Mode

Rejection vs. Frequency



In addition, while an external feedback networkestablishes the gain response as in a conventionalop amp, i ts separate path makes it totally independent of the signal input. This eliminates any interaction betweenthe feedback and input circuits, which traditionally causesproblems with CMRR in conventional differential-inputop amp circuits.

1 40010 100 –7

–6

–5

–4

–3

–2

–1

0

1

2

3

FREQUENCY (MHz)

G A I N ( d B )

VS = 2.5V

VS = 5V

VS = 12V

Figure 4-14. AD8130 Frequency Response

vs. Supply Voltage

Figure 4-13 shows the CMR vs. frequency of the AD8130.Figure 4 -14 shows its frequency response vs. sup-ply voltage.

For details concerning the entire line of monolithic in-amps produced by Analog Devices, refer to Appendix B.

Figure 4-15 shows the AD8130’s CMR vs. fre-quency.

100

95

90

80

70

60

50

40

1k 10k 100k 1M 10M30

FREQUENCY (Hz)

C M R ( d B )

VS = 15V

VS = 5V




Dual-Supply Operation

The conventional way to power an in-amp has beenfrom a split or dual polarity power supply. This hasthe obvious advantage of allowing both a positive anda negative input and output swing.

Single-Supply Operation

Single-supply operation has become an increasingly desir-able characteristic of a modern in-amp. Many present daydata acquisition systems are powered from a single lowvoltage supply. For these systems, there are two vitallyimportant characteristics. First, the in-amp’s input rangeshould extend between the positive supply and the nega-

tive supply (or ground). Second, the amplier’s outputshould be rail-to-rail as well, providing an output swing towithin 100 mV or less of either supply rail or ground. Incontrast, a standard dual-supply in-amp can only swingto within a volt or two of either supply or ground. Whenoperated from a 5 V single supply, these in-amps haveonly a volt or two of output voltage swing, while a truerail-to-rail amplier can provide a peak-to-peak outputnearly as great as the supply voltage. Another importantpoint is that a single-supply, or rail-to-rail in-amp, willstill operate well (or even better) from a dual supply, and

it will often operate at lower power than a conventionaldual-supply device.

Power Supply Bypassing, Decoupling, and

Stability Issues

Power supply decoupling is an important detail that isoften overlooked by designers. Normally, bypass capaci-tors (values of 0.1F are typical) are connected betweenthe power supply pins of each IC and ground. Althoughusually adequate, this practice can be ineffective or evencreate worse transients than no bypassing at all. It is im-portant to consider where the circuit’s currents originate,where they will return, and by what path. Once that hasbeen established, bypass these currents around groundand other signal paths.

In general, like op amps, most monolithic in-amps havetheir integrators referenced to one or both power supplylines and should be decoupled with respect to the outputreference terminal. This means that for each chip a bypasscapacitor should be connected between each power supplypin and the point on the board where the in-amp’s referenceterminal is connected, as shown in Figure 5-1.

Figure 5-1. Recommended Method for

Power Supply Bypassing

For a much more comprehensive discussion of these isues, refer to application noteAN-202 “An IC AmpliUsers’ Guide to Decoupling, Grounding, and MakinThings Go Right for a Change,” by Paul Brokaw, on thADI website at www.analog.com.

THE IMPORTANCE OF AN INPUT

GROUND RETURN

One of the most common applications problems tharises when using in-amp circuits is failure to provida dc return path for the in-amp’s input bias currentThis usually happens when the in-amp’s inputs acapacitively coupled. Figure 5-2 shows just such aarrangement. Here, the input bias currents quickcharge up capacitors C1 and C2 until the in-ampoutput “rails,” either to the supply or ground.

Figure 5-2. An AC-Coupled In-Amp Circuit

Without an Input Ground Return

Chapter V

APPLYING IN-AMPS EFFECTIVELY



The solution is to add a high value resistance (R1, R2)between each input and ground, as shown in Figure 5-3.

The input bias currents can now ow freely to groundand do not build up a large input offset as before. Inthe vacuum tube circuits of years past, a similar effectoccurred, requiring a grid leak resistance between the

grid (input) and ground to drain off the accumulatedcharge (the electrons on the grid).

AC Input Coupling

Referring again to Figure 5-3, practical values for R1and R2 are typically 1 M or less. The choice of resistorvalue is a trade-off between offset errors and capacitancevalue. The larger the input resistor, the greater the inputoffset voltage due to input offset currents. Offset voltagedrift will also increase.

With lower resistor values, higher value input capacitorsmust be used for C1 and C2 to provide the same –3 dB

corner frequency F –3 dB = (1/ (2R1C 1)) where R1 = R2 and C 1 = C 2

Figure 5-3. A High Value Resistor between Each Input and Ground Provides an Effective

DC Return Path

Unless there is a large dc voltage present on theinput side of the ac coupling capacitor, nonpolarizedcapacitors should be used. Therefore, in the interest of keeping component size as small as possible, C1 andC2 should be 0.1 F or less. Generally, the smallerthe capacitor value the better, because it will cost lessand be smaller in size. The voltage rating of the inputcoupling capacitor needs to be high enough to avoidbreakdown from any high voltage input transients thatmight occur.

RC Component Matching

Since

(I B1 R1) – (I B2 R2) = V OS

any mismatch between R1 and R2 will cause an inputoffset imbalance (IB1 –IB2) which will create an inputoffset voltage error.

A good guideline is to keep IB R < 10 mV.

The input bias currents of Analog Devices in-ampsvary widely, depending on input architecture. However,the vast majority have maximum input bias currentsbetween 1.5 nA and 10 nA. Table 5-1 gives typical R and C cookbook values for ac coupling using 1% metallm resistors and two values of input bias current.

Figure 5-4 shows the recommended dc return for atransformer-coupled input.

Figure 5-4. Recommended DC Return Path for a Transformer-Coupled Input



CABLE TERMINATION

When in-amps are used at frequencies above a few hun-

dred kilohertz, properly terminated 50 or 75 coaxialcable should be used for input and output connections.Normally, cable termination is simply a 50 or 75 resistor connected between the cable center conductorand its shield at the end of the coaxial cable. Note thata buffer amplier may be required to drive these loadsto useful levels.

INPUT PROTECTION BASICS

FOR ADI IN-AMPS

Input Protection from ESD and DC Overload

As interface ampliers for data acquisition systems,

instrumentation ampliers are often subjected to inputoverloads, i.e., voltage levels in excess of their full scalefor the selected gain range or even in excess of the supplyvoltage. These overloads fall into two general classes:steady state and transient (ESD, etc.), which occur foronly a fraction of a second. With 3-op amp in-ampdesigns, when operating at low gains (10 or less), thegain resistor acts as a current-limiting element in serieswith their resistor inputs. At high gains, the lower valueof R G may not adequately protect the inputs fromexcessive currents.

Standard practice is to place current-limiting resistorsin each input, but adding this protection also increasesthe circuit’s noise level. A reasonable balance needs tobe found between the protection provided and theincreased resistor (Johnson) noise introduced. Cir-cuits using in-amps with a relatively high noise levelcan tolerate more series protection without seriouslyincreasing their total circuit noise.

Of course, the less added noise the better, but a googuideline is that circuits needing this extra protectio

can easily tolerate resistor values that generate 30% the total circuit noise. For example, a circuit using ain-amp with a rated noise level of 20 nV/÷ Hz can toleraan additional 6 nV/÷ Hz of Johnson noise.

Use the following cookbook method to translate thnumber into a practical resistance value. The Johnsonoise of a 1 k resistor is approximately 4 nV/÷ Hz . Thvalue varies as the square root of the resistance. So,20 k resistor would have ÷ 20 times as much noise the 1 k resistor, which is 17.88 nV/÷ Hz (4.4721 tim4 nV/÷ Hz ). Because both inputs need to be protecte

two resistors are needed and their combined noise wadd as the square root of the number of resistors (throot sum of squares value). In this case, the total addenoise from the two 20 k resistors will be 25.3 nV/÷ H(17.88 times 1.414).

Figure 5-5 provides details on the input architectuof the AD8221 in-amp. As shown, it has intern400 resistors that are in series with each inptransistor junction.

–IN

RG

+IQ1 Q2

+VS +VS

400 400

–VS –VS

+VS +VS

6mA MAX INPUT CURRENT

Figure 5-5. AD8221 In-Amp Input Circuit

Table 5-1. Recommended Component Values

for AC Coupling In-Amp Inputs

Input Bias VOS VOS Error

RC Coupling Components Current at Each for 2%

–3 dB BW C1, C2 R1, R2 (IB) Input R1, R2 Mismatch

2 Hz 0.1 F 1 M 2 nA 2 mV 40 V

2 Hz 0.1 F 1 M 10 nA 10 mV 200 V30 Hz 0.047 F 115 k 2 nA 230 V 5 V30 Hz 0.1 F 53.6 k 10 nA 536 V 11 V100 Hz 0.01 F 162 k 2 nA 324 V 7 V100 Hz 0.01 F 162 k 10 nA 1.6 mV 32 V500 Hz 0.002 F 162 k 2 nA 324 V 7 V



Table 5-2 provides recommended series protection resis-tor values for a 10% or 40% increase in circuit noise.

Table 5-2. Recommended Series

Protection Resistor Values

RecommendedMax External Protection

In-Amp Input Resistors AddingNoise Overload Additional Noise*

Device (eNI) Current of 10% of 40%

AD8221 8 nV/÷ Hz 6 (mA) 340 2.43 kAD8225 8 nV/÷ Hz 6 (mA) 340 2.43 kAD620 9 nV/÷ Hz 6 (mA) 348 2.49 kAD621 9 nV/÷ Hz 6 (mA) 348 2.49 kAD622 9 nV/÷ Hz 6 (mA) 348 2.49 kAD623 35 nV/÷ Hz 10 (mA) 8.08 k 40.2 kAD627 38 nV/÷ Hz 20 (mA) 8.87 k 43.2 k

*This noise level is for two resistors, one in series witheach resistor.

Adding External Protection Diodes

Device input protection may be increased with theaddition of external clamping diodes as shown inFigure 5-9. As high current diodes are used, inputprotection is increased, which allows the use of muchlower resistance input protection resistors which, in turn,reduce the circuit’s noise.

Unfortunately, most ordinary diodes (Schottky, silicon,etc.) have high leakage currents that will cause large offseterrors at the in-amp’s output; this leakage increasesexponentially with temperature. This tends to rule outthe use of external diodes in applications where thein-amp is used with high impedance sources.

Specialty diodes with much lower leakage are available,but these are often difcult to nd and are expensive.For the vast majority of applications, limiting resistorsalone provide adequate protection for ESD and longerduration input transients.

Figure 5-9. Using External Components

to Increase Input Protection

Despite their limitations, external diodes are ofterequired in some special applications, such as electrshock debrillators, which utilize short duration, higvoltage pulses. The combination of external diodes anvery large input resistors (as high as 100 k) may bneeded to adequately protect the in-amp.

It is a good idea to check the diodes’ specicationto ensure that their conduction begins well befothe in-amp’s internal protection diodes start drawincurrent. Although they provide excellent input protetion, standard Schottky diodes can have leakage up several mA. However, as in the example of Figure 5-fast Schottky barrier rectiers, such as the internationrectier type SD101 series, can be used; these devichave 200 nA max leakage currents and 400 mW typicpower dissipation.

ESD and Transient Overload Protection

Protecting in-amp inputs from high voltage transienand ESD events is very important for a circuit’s lonterm reliability. Power dissipation is often a critical factas input resistors, whether internal or external, mube able to handle most of the power of the input pulwithout failing.

ESD events, while they may be very high voltage, ausually of very short duration and are normally one-timevents. Since the circuit has plenty of time to cool dowbefore the next event occurs, modest input protectionsufcient to protect the device from damage.

On the other hand, regularly occurring short duratioinput transients can easily overheat and burn out thinput resistors or the in-amps input stage. A 1 k resitor, in series with an in-amp input terminal drawin20 mA, will dissipate 0.4 W, which can easily be handleby a standard 0.5 W or greater surface -mount resistoIf the input current is doubled, power consumptioquadruples as it increases as the square of the inpcurrent (or as the square of the applied voltage).

Although it is a simple matter to use a higher powprotection resistor, this is a dangerous practice, as th

power dissipation will also increase in the in-amp’s inpstage. This can easily lead to device failure (see the preceing section on input protection basics for input currelimitations of ADI in-amps). Except for ESD events, is always best to adopt a conservative approach and treall transient input signals as full duration inputs.

Designs that are expected to survive such events over lonperiods of time must use resistors with enough resistanto protect the in-amp’s input circuitry from failure anenough power to prevent resistor burnout.



DESIGN ISSUES AFFECTING DC ACCURACY

The modern in-amp is continually being improved,providing the user with ever-increasing accuracy andversatility at a lower price. Despite these improvementsin product performance, there remain some fundamentalapplications issues that seriously affect device accuracy.Now that low cost, high resolution ADCs are commonly

used, system designers need to ensure that if an in-ampis used as a preamplier ahead of the converter, the in-amp’s accuracy matches that of the ADC.

Designing for the Lowest Possible Offset

Voltage Drift

Offset drift errors include not just those associated withthe active device being used (IC in-amp or discrete in-ampdesign using op amps), but also thermocouple effects inthe circuit’s components or wiring. The in-amp’s inputbias and input offset currents owing through unbalancedsource impedances also create additional offset errors. In

discrete op amp in-amp designs, these errors can increasewith temperature unless precision op amps are used.

Designing for the Lowest Possible Gain Drift

When planning for gain errors, the effects of board layout,the circuit’s thermal gradients, and the characteristics of any external gain setting resistors are often overlooked. Again resistor’s absolute tolerance, its thermal temperaturecoefcient, its physical position relative to other resis-tors in the same gain network, and even its physicalorientation (vertical or horizontal) are all-importantdesign considerations if high dc accuracy is needed.

In many ADC preamp circuits, an external user-selected resistor sets the gain of the in-amp, so theabsolute tolerance of this resistor and its variationover temperature, compared to that of the IC’s on-chip resistors, will affect the circuit’s gain accuracy.Resistors commonly used include through-hole 1%1/4 W metal lm types and 1% 1/8 W chip resistors.Both types typically have a 100 ppm/°C temperaturecoefcient. However, some chip resistors can have TCsof 200 ppm/ C or even 250 ppm/ C.

Even when a 1% 100 ppm/C resistor is used, the gainaccuracy of the in-amp will be degraded. The resistor’sinitial room temperature accuracy is only 1%, andthe resistor will drift another 0.01% (100 ppm/C) forevery C change in temperature. The initial gain errorcan easily be subtracted out in software, but to correctfor the error vs. temperature, frequent recalibrations (anda temperature sensor) would be required.

If the circuit is calibrated initially, the overall gain accuracyis reduced to approximately 10 bits (0.1%) accuracy fora 10C change. An in-amp with a standard 1% metal lm

gain resistor should never be used ahead of even a 12-bitconverter: it would destroy the accuracy of a 14-bit or16-bit converter.

Additional error sources associated with external resistorsalso affect gain accuracy. The rst are variations in resistorheating caused by input signal level. Figure 5-10, a simple

op amp voltage amplier, provides a practical example.

Figure 5-10. An Example of How Differences in

Input Signal Level Can Introduce Gain Errors

Under zero signal conditions, there is no output signaland no resistor heating. When an input signal is ap-plied, however, an amplied voltage appears at the opamp output. When the amplier is operating with gain,Resistor R1 will be greater than R2. This means thatthere will be more voltage across R1 than across R2.The power dissipated in each resistor equals the squareof the voltage across it divided by its resistance in ohms.The power dissipated and, therefore, the internal heatingof the resistor will increase in proportion to the value of the resistor.

In the example, R1 is 9.9 kand R2 is 1 k. Consequently,R1 will dissipate 9.9 times more power than R2. Thisleads to a gain error that will vary with input level. Theuse of resistors with different temperature coefcientscan also introduce gain errors.

Figure 5-11. A Typical Discrete 3-Op Amp In-Amp

Using Large Value, Low TC Feedback Resistors

Even when resistors with matched temperature coef-cients (TC) are used, gain errors that vary with inputsignal level can still occur. The use of larger (i.e., higherpower) resistors will reduce these effects, but accurate,low TC power resistors are expensive and hard to nd.



When a discrete 3-op amp in-amp is used, as shownin Figure 5-11, these errors will be reduced. In a 3-opamp in-amp, there are two feedback resistors, R1 andR2, and one gain resistor, R G. Since the in-amp uses twofeedback resistors while the op amp uses only one, eachof the in-amp’s resistors only needs to dissipate half thepower (for the same gain). Monolithic in-amps, such asthe AD620, offer a further advantage by using relativelylarge value (25 k) feedback resistors. For a given gainand output voltage, large feedback resistors will dissipateless power (i.e., P = V2/R F). Of course, a discrete in-ampcan be designed to use large value, low TC resistors aswell, but with added cost and complexity.

Another less serious but still signicant error source isthe so-called thermocouple effect, sometimes referredto as thermal EMF. This occurs when two differentconductors, such as copper and metal lm, are tied to-gether. When this bimetallic junction is heated, a simple

thermocouple is created. When using similar metals suchas a copper-to-copper junction, a thermoelectric errorvoltage of up to 0.2 mV/C may be produced. An exampleof these effects is shown in Figure 5-12.

A nal error source occurs when there is a thermal gradi-ent across the external gain resistor. Something as simpleas mounting a resistor on end to conserve board spacewill invariably produce a temperature gradient acrossthe resistor. Placing the resistor at down against the PCboard will cure this problem unless there is air owingalong the axis of the resistor (where the air ow cools one

side of the resistor more than the other side). Orientingthe resistor so that its axis is perpendicular to the airowwill minimize this effect.

Figure 5-12. Thermocouple Effects Inside

Discrete Resistors

Practical Solutions

As outlined, a number of dc offset and gain errors aintroduced when external resistors are used with a monlithic in-amp. Discrete designs tend to have even largerrors. There are three practical solutions to this problemuse higher quality resistors, use software correction, obetter still, use an in-amp that has all of its gain resisto

on-chip, such as the AD621.

Option 1: Use a Better Quality Gain Resistor

As a general rule, only 12-bit or 13-bit gain performanis possible using commonly available 1% resistorwhich assumes that some type of initial calibratiois performed.

A practical solution to this problem is to simply usebetter quality resistor. A signicant improvement can bmade using a 0.1% 1/10 W surface-mount resistor. Asifrom having a 10 better initial accuracy, it typically ha TC of only 25 ppm/C, which will provide better tha13-bit accuracy over a 10C temperature range.

If even better gain accuracy is needed, there are specialhouses that sell resistors with lower TCs, but these ausually expensive military varieties.

Option 2: Use a Fixed-Gain In-Amp

By far, the best overall dc performance is provideby using a monolithic in-amp, such as the AD621AD8225, in which all the resistors are contained withthe IC. Now all resistors have identical TCs, all aat virtually the same temperature, and any thermgradients across the chip are very small, and gain error dris guaranteed and specied to very high standards.

At a gain of 10, the AD621 has a guaranteed maximudc offset shift of less than 2.5 µV/C and a maximum gadrift of 5 ppm/°C, which is only 0.0005 %/C.

The AD8225 is an in-amp with a xed gain of 5. It ha maximum offset shift of 2 V/C and a maximum drof 0.3 V/C.

RTI AND RTO ERRORS

Another important design consideration is how circugain affects many in-amp error sources such as dc offs

and noise. An in-amp should be regarded as a two staamplier with both an input and an output section. Easection has its own error sources.

Because the errors of the output section are multiplieby a xed gain (usually 2), this section is often thprincipal error source at low circuit gains. When thin-amp is operating at higher gains, the gain of thinput stage is increased. As the gain is raised, errocontributed by the input section are multiplied, whioutput errors are not. So, at high gains, the input staerrors dominate.



Since device specications on different data sheets oftenrefer to different types of errors, it is very easy for theunwary designer to make an inaccurate comparisonbetween products. Any (or several) of four basic errorcategories may be listed: input errors, output errors, totalerror RTI, and total error RTO. Here follows an attemptto list, and hopefully simplify, an otherwise complicated

set of denitions.

Input errors are those contributed by the amplier’s inputstage alone; output errors are those due to the outputsection. Input related specications are often combinedand classied together as a referred to input (RTI) error,while all output related specications are consideredreferred to output (RTO) errors.

For a given gain, an in-amp’s input and output errorscan be calculated using the following formulas:

Total Error, RTI = Input Error + (Output Error/Gain)

Total Error, RTO = (Gain Input Error ) + Output Error

Sometimes the spec page will list an error term as RTIor RTO for a specied gain. In other cases, it is up to theuser to calculate the error for the desired gain.

Offset Error

Using the AD620A as an example, the total voltageoffset error of this in-amp when operating at a gain of 10 can be calculated using the individual errors listed onits specications page. The (typical) input offset of theAD620 (VOSI) is listed as 30 V. Its output offset (VOSO)is listed as 400 V. Thus, the total voltage offset referredto input, RTI, is equal to

Total RTI Error = V OSI + (V OSO/G ) = 30 V + (400 V/ 10) = 30 V + 40 V = 70 V

The total voltage offset referred to the output, RTO, isequal to

Total Offset Error RTO = (G (V OSI )) + V OSO = (10 (30V))+ 400 V = 700 V

Note that the two error numbers (RTI vs. RTO) are 10 in value and logically they should be, as at a gain of 10,the error at the output of the in-amp should be 10 timesthe error at its input.

Noise Errors

In-amp noise errors also need to be considered in asimilar way. Since the output section of a typical 3-opamp in-amp operates at unity gain, the noise contributionfrom the output stage is usually very small. But thereare 3-op amp in-amps that operate the output stage athigher gains and 2-op amp in-amps regularly operate thesecond amplier at gain. When either section is operatedat gain, its noise is amplied along with the input signal.

Both RTI and RTO noise errors are calculated the sameway as offset errors, except that the noise of two sectionsadds as the root mean square. That is

Input Noise eni Output Noise eno

Total Noise RTI eni eno Gain

Total Noise RTO Gain eni eno

= =

= ( ) + ( )

= ( )( ) + ( )

,

2 2

2 2

For example, the (typical) noise of the AD620Ais specified as 9 nV/÷ Hz eni and 72 nV/÷ Hz eno.Therefore, the total RTI noise of the AD620A operatingat a gain of 10 is equal to

Total Noise RTI eni eno Gain= ( ) + ( ) =

( ) + ( ) =

2 2

2 29 72 10 11 5. nV Hz

REDUCING RFI RECTIFICATION ERRORS ININ-AMP CIRCUITS

Real world applications must deal with an everincreasing amount of radio frequency interference(RFI). Of particular concern are situations in whichsignal transmission lines are long and signal strength islow. This is the classic application for an in-amp sinceits inherent common-mode rejection allows the deviceto extract weak differential signals riding on strongcommon-mode noise and interference.

One potential problem that is frequently overlooked,

however, is that of radio frequency rectication insidethe in-amp. When strong RF interference is present, itmay become rectied by the IC and then appear as a dcoutput offset error. Common-mode signals present atan in-amp’s input are normally greatly reduced by theamplier’s common-mode rejection.

Unfortunately, RF rectication occurs because even thebest in-amps have virtually no common-mode rejec-tion at frequencies above 20 kHz. A strong RF signalmay become rectied by the amplier’s input stageand then appear as a dc offset error. Once rectied,

no amount of low-pass ltering at the in-amp outputwill remove the error. If the RF interference is of anintermittent nature, this can lead to measurementerrors that go undetected.

Designing Practical RFI Filters

The best practical solution is to provide RF attenuationahead of the in-amp by using a differential low-passlter. The lter needs to do three things: remove as muchRF energy from the input lines as possible, preservethe ac signal balance between each line and ground



(common), and maintain a high enough input imped-ance over the measurement bandwidth to avoid loadingthe signal source.

Figure 5-13 provides a basic building block for a widenumber of differential RFI lters. Component valuesshown were selected for the AD8221, which has a typical

–3 dB bandwidth of 1 MHz and a typical voltage noiselevel of 7 nV/÷ Hz . In addition to RFI suppression, thelter provides additional input overload protection, asresistors R1a and R1b help isolate the in-amp’s inputcircuitry from the external signal source.

Figure 5-14 is a simplied version of the RFI circuit. Itreveals that the lter forms a bridge circuit whose outputappears across the in-amp’s input pins. Because of this,any mismatch between the time constants of C1a/R1aand C1b/R1b will unbalance the bridge and reduce highfrequency common-mode rejection. Therefore, resistors

R1a and R1b and capacitors C1a and C1b should alwaysbe equal.

As shown, C2 is connected across the bridge output so thC2 is effectively in parallel with the series combination C1a and C1b. Thus connected, C2 very effectively reducany ac CMR errors due to mismatching. For example,C2 is made 10 times larger than C1, this provides a 20reduction in CMR errors due to C1a/C1b mismatcNote that the lter does not affect dc CMR.

The RFI lter has two different bandwidths: differentiand common mode. The differential bandwidth denthe frequency response of the lter with a differential inpsignal applied between the circuit’s two inputs, +IN an –IN. This RC time constant is established by the sum the two equal-value input resistors (R1a, R1b), togethwith the differential capacitance, which is C2 in paralwith the series combination of C1a and C1b.

The –3 dB differential bandwidth of this filter equal to

BW R C C DIFF = +( )

1

2 2π 2 1

+

–

+IN

RFI FILTER

–IN

C1a1000pF

C20.01F

C1b1000pF

1

2

RG

3

4 5

6

7

8

REF

VOUTAD8221

G = 1+49.4k

RG

–VS

0.01F 0.33F

0.01F 0.33F

+VS

R1a4.02k

R1b4.02k

Figure 5-13. LP Filter Circuit Used to Prevent RFI Rectication Errors

C1a

C1b

C2

R1a

R1b

+IN

–IN

VOUTIN-AMP

Figure 5-14. Capacitor C2 Shunts C1a/C1b and Very Effectively Reduces AC CMR Errors Due to

Component Mismatching



The common-mode bandwidth denes what a com-mon-mode RF signal sees between the two inputs tiedtogether and ground. It’s important to realize that C2does not affect the bandwidth of the common-modeRF signal, as this capacitor is connected between thetwo inputs (helping to keep them at the same RF signallevel). Therefore, common-mode bandwidth is set by theparallel impedance of the two RC networks (R1a/C1aand R1b/C1b) to ground.

The –3 dB common-mode bandwidth is equal to

BW R C

CM =1

2π 1 1

Using the circuit of Figure 5-13, with a C2 value of 0.01F as shown, the –3 dB differential signal bandwidthis approximately 1,900 Hz. When operating at a gain of 5, the circuit’s measured dc offset shift over a frequency

range of 10 Hz to 20 MHz was less than 6 V RTI. Atunity gain, there was no measurable dc offset shift.

The RFI lter should be built using a PC board withground planes on both sides. All component leads shouldbe made as short as possible. The input lter commonshould be connected to the amplier common using themost direct path. Avoid building the lter and the in-ampcircuits on separate boards or in separate enclosures, asthis extra lead length can create a loop antenna. Instead,physically locate the lter right at the in-amp’s inputterminals. A further precaution is to use good quality

resistors that are both noninductive and nonthermal (lowTC). Resistors R1 and R2 can be common 1% metal lmunits. However, all three capacitors need to be reasonablyhigh Q, low loss components. Capacitors C1a and C1bneed to be 5% tolerance devices to avoid degrading

the circuit’s common-mode rejection. The traditional 5%silver micas, miniature size micas, or the new Panasonic2% PPS lm capacitors (Digi-key part # PS1H102G-ND) are recommended.

Selecting RFI Input Filter Component Values Using

a Cookbook Approach

The following general rules will greatly ease the designof an RC input lter.

1. First, decide on the value of the two series resis-tors while ensuring that the previous circuitry canadequately drive this impedance. With typical valuesbetween 2 k and 10 k, these resistors should notcontribute more noise than that of the in-amp itself.Using a pair of 2 k resistors will add a Johnson noiseof 8 nV/÷ Hz ; this increases to 11 nV/÷ Hz with 4 k resistors and to 18 nV/÷ Hz with 10 k resistors.

2. Next, select an appropriate value for capacitor C2,

which sets the lter’s differential (signal) bandwidth.It’s always best to set this as low as possible withoutattenuating the input signal. A differential bandwidthof 10 times the highest signal frequency is usuallyadequate.

3. Then select values for capacitors C1a and C1b, whichset the common-mode bandwidth. For decent acCMR, these should be 10% the value of C2 or less.The common-mode bandwidth should always be lessthan 10% of the in-amp’s bandwidth at unity gain.

Specic Design Examples

An RFI Circuit for AD620 Series In-Amps

Figure 5-15 is a circuit for general-purpose in-amps suchas the AD620 series, which have higher noise levels(12 nV/÷ Hz ) and lower bandwidths than the AD8221.

+

–

+IN

RFI FILTER

–IN

C1a1000pF

C20.047F

C1b1000pF

3

1

RG

8

2 4

5

6

7

REF

VOUTAD620

–VS

0.01F 0.33F

0.01F 0.33F

+VS

R1a4.02k

R1b4.02k

Figure 5-15. RFI Circuit for AD620 Series In-Amp



An RFI Filter for the AD623 In-Amp

Figure 5-17 shows the recommended RFI circuit foruse with the AD623 in-amp. Because this device is lessprone to RFI than the AD627, the input resistors canbe reduced in value from 20 k to 10 k; this increasesthe circuit’s signal bandwidth and lowers the resistors’noise contribution. Moreover, the 10 k resistors still

provide very effective input protection. With the valuesshown, the bandwidth of this lter is approximately400 Hz. Operating at a gain of 100, the maximum dcoffset shift with a 1 V p-p input is less than 1 V RTI.At the same gain, the circuit’s RF signal rejection isbetter than 74 dB.

AD8225 RFI Filter Circuit

Figure 5-18 shows the recommended RFI lter for thisin-amp. The AD8225 in-amp has a xed gain of 5 and abit more susceptibility to RFI than the AD8221. Withoutthe RFI lter, with a 2 V p-p, 10 Hz to 19 MHz sine waveapplied, this in-amp measures about 16 mV RTI of dcoffset. The lter used provides a heavier RF attenuation

than that of the AD8221 circuit by using larger resistorvalues: 10 k instead of 4 k. This is permissible becauseof the AD8225’s higher noise level. Using the lter, therewas no measurable dc offset error.

+

–

+IN

RFI FILTER

–IN

C1a1000pF

C20.022F

C1b1000pF

3

1

RG

8

2 4

5

6

7

REF

VOUTAD623

–VS

0.01F 0.33F

0.01F 0.33F

+VS

10k

10k

Figure 5-17. AD623 RFI Suppression Circuit

+

–

+IN

RFI FILTER

–IN

C1a1000pF

C20.01F

C1b1000pF

2

3 4

5

6

7

REF

VOUTAD8225

–VS

0.01F 0.33F

0.01F 0.33F

+VS

10k

10k

Figure 5-18. AD8225 RFI Filter Circuit



Common-Mode Filters Using X2Y® Capacitors*

Figure 5-19 shows the connection diagram for an X2Ycapacitor. These are very small, three terminal deviceswith four external connections—A, B, G1, and G2. TheG1 and G2 terminals connect internally within the device.The internal plate structure of the X2Y capacitor formsan integrated circuit with very interesting properties. Elec-

trostatically, the three electrical nodes form two capacitorsthat share the G1 and G2 terminals. The manufactur-ing process automatically matches both capacitors veryclosely. In addition, the X2Y structure includes an effec-tive autotransformer/common-mode choke. As a result,when these devices are used for common-mode lters,they provide greater attenuation of common-mode signalsabove the lter’s corner frequency than a comparable RClter. This usually allows the omission of capacitor C2,with subsequent savings in cost and board space.

Figure 5-19. X2Y Electrostatic Model

Figure 5-20a illustrates a conventional RC commonmode lter, while Figure 5-20b shows a common-molter circuit using an X2Y device. Figure 5-21 isgraph contrasting the RF attenuation provided bthese two lters.

Figure 5-21. RFI Attenuation, X2Y vs.

Conventional RC Common-Mode Filter

Figure 5-20a. Conventional RC Common-Mode Filter

Figure 5-20b. Common-Mode Filter Using X2Y Capacitor

*C1 is part number 500X14W103KV4. X2Y components may be purchased from Johanson Dielectrics, Sylmar, CA 91750, (818) 364-9800. For a flisting of X2Y manufacturers visit: http://www.x2y.com/manufacturers.



Using Common-Mode RF Chokes for In-Amp

RFI Filters

As an alternative to using an RC input lter, a commercialcommon-mode RF choke may be connected in front of an in-amp, as shown in Figure 5-22. A common-modechoke is a two-winding RF choke using a common core.Any RF signals that are common to both inputs will

be attenuated by the choke. The common-mode chokeprovides a simple means for reducing RFI with a mini-mum of components and provides a greater signal passband, but the effectiveness of this method depends onthe quality of the particular common-mode choke beingused. A choke with good internal matching is preferred.Another potential problem with using the choke is thatthere is no increase in input protection as is provided bythe RC RFI lters.

Using an AD620 in-amp with the RF choke specied,at a gain of 1,000, and a 1 V p-p common-mode sinewave applied to the input, the circuit of Figure 5-22reduces the dc offset shift to less than 4.5 V RTI. Thehigh frequency common-mode rejection ratio was alsogreatly improved, as shown in Table 5-3.

Table 5-3. AC CMR vs. Frequency

Using the Circuit of Figure 5-22

Frequency CMRR (dB)

100 kHz 100333 kHz 83350 kHz 79500 kHz 881 MHz 96

+

–

+IN

PULSEENGINEERING#B4001 COMMON-MODERF CHOKE

–IN

RG

REF

VOUT

–VS

0.01F 0.33F

0.01F 0.33F

+VS

IN-AMP

Figure 5-22. Using a Commercial Common-Mode RF Choke for RFI Suppression



Because some in-amps are more susceptible to RFI thanothers, the use of a common-mode choke may sometimesprove inadequate. In these cases, an RC input lter isa better choice.

RFI TESTING

Figure 5-23 shows a typical setup for measuring RFI

rejection. To test these circuits for RFI suppression,connect the two input terminals together using very shortleads. Connect a good quality sine wave generator to thisinput via a 50 V terminated cable.

Using an oscilloscope, adjust the generator for a 1 Vpeak-to-peak output at the generator end of the cable.Set the in-amp to operate at high gain (such as a gainof 100). DC offset shift is simply read directly at thein-amp’s output using a DVM. For measuring highfrequency CMR, use an oscilloscope connected to thein-amp output by a compensated scope probe and measure

the peak-to-peak output voltage (i.e., feedthrough) vs.

input frequency. When calculating CMRR vs. frequencremember to take into account the input terminatio(VIN/2) and the gain of the in-amp.

CMRR

V

V Gain

IN

OUT

=

202

log

USING LOW-PASS FILTERING TO IMPROVE

SIGNAL-TO-NOISE RATIO

To extract data from a noisy measurement, low-pass tering can be used to greatly improve the signal-to-noiratio of the measurement by removing all signals that anot within the signal bandwidth. In some cases, band-paltering (reducing response both below and above thsignal frequency) can be employed for an even great

improvement in measurement resolution.

+

–TERMINATIONRESISTOR(50 OR 75 TYPICAL)

RFSIGNAL

GENERATOR

RG

REF

VOUT TOSCOPE OR DVM

IN-AMP

–VS

0.01F 0.33F

0.01F 0.33F

+VS

RFIINPUTFILTER

Figure 5-23. Typical Test Setup for Measuring an In-Amp’s RFI Rejection



The 1 Hz, 4-pole active lter of Figure 5-24 is an exampleof a very effective low-pass lter that normally would beadded after the signal has been amplied by the in-amp.This lter provides high dc precision at low cost whilerequiring a minimum number of components.

Note that component values can simply be scaled

to provide corner frequencies other than 1 Hz (seeTable 5-4). If a 2-pole filter is preferred, simply takethe output from the rst op amp.

Table 5-4. Recommended Component Values for a 1 Hz, 4-Pole Low-Pass Filter

Section 1 Section 2

Desired Low- Frequency Frequency C1 C2 C3 C4Pass Response (Hz) Q (Hz) (Q) (F) (F) (F) (F)

Bessel 1.43 0.522 1.60 0.806 0.116 0.107 0.160 0.0616Butterworth 1.00 0.541 1.00 1.31 0.172 0.147 0.416 0.06090.1 dB Chebychev 0.648 0.619 0.948 2.18 0.304 0.198 0.733 0.03850.2 dB Chebychev 0.603 0.646 0.941 2.44 0.341 0.204 0.823 0.03470.5 dB Chebychev 0.540 0.705 0.932 2.94 0.416 0.209 1.00 0.02901.0 dB Chebychev 0.492 0.785 0.925 3.56 0.508 0.206 1.23 0.0242

The low levels of current noise, input offset, and inputbias currents in the quad op amp (either an AD704 orOP497) allow the use of 1 Mresistors without sacricingthe 1 µV/C drift of the op amp. Thus, lower capacitorvalues may be used, reducing cost and space.

Furthermore, since the input bias current of these op

amps is as low as their input offset currents over mostof the MIL temperature range, there is rarely a need touse the normal balancing resistor (along with its noise-reducing bypass capacitor). Note, however, that addingthe optional balancing resistor will enhance performanceat temperatures above 100C.

1/2 AD7061/2 OP297 1/2 AD706

1/2 OP297

2MR10

0.01F

OUTPUT

2M

0.01F

C3

1M 1M

R6 R7

C41M 1M

R8 R9

CAPACITORS C2 – C4 ARESOUTHERN ELECTRONICSMPCC, POLYCARBONATE,±5%, 50V

OPTIONAL BALANCERESISTOR NETWORKSCAN BE REPLACEDWITH A SHORT

R6 = R7

Q1 = C1

4C2

W =1

R6 C1C2

R10

C1

C2

C5

A1, A2 ARE AD706 OR OP297

R8 = R9

Q2 = C3

4C4

W =1

R8 C3C4

C5

INPUT

Figure 5-24. A 4-Pole Low-Pass Filter for Data Acquisition



Figure 5-25. External DC and AC CMRR Trim Circuit for a Discrete 3-Op Amp In-Amp

Specied values are for a –3 dB point of 1.0 Hz. For otherfrequencies, simply scale capacitors C1 through C4 di-rectly; i.e., for 3 Hz Bessel response, C1 = 0.0387F, C2= 0.0357 F, C3 = 0.0533 F, and C4 = 0.0205 F.

EXTERNAL CMR AND SETTLING TIME

ADJUSTMENTS

When a very high speed, wide bandwidth in-amp isneeded, one common approach is to use several opamps or a combination of op amps and a high band-width subtractor amplier. These discrete designs may bereadily tuned-up for best CMR performance by externaltrimming. A typical circuit is shown in Figure 5-25. Thedc CMR should always be trimmed rst, since it affectsCMRR at all frequencies.

The +VIN and –VIN terminals should be tied togetherand a dc input voltage applied between the two inputsand ground. The voltage should be adjusted to provide

a 10 V dc input. A dc CMR trimming potentiometwould then be adjusted so that the outputs are equal anas low as possible, with both a positive and a negativdc voltage applied.

AC CMR trimming is accomplished in a similmanner, except that an ac input signal is applie

The input frequency used should be somewhat lowthan the –3 dB bandwidth of the circuit.

The input amplitude should be set at 20 V p-p withe inputs tied together. The ac CMR trimmer is thenulled-set to provide the lowest output possible. If the bepossible settling time is needed, the ac CMR trimmmay be used, while observing the output wave foron an oscilloscope. Note that, in some cases, there wbe a compromise between the best CMR and the fastesettling time.



Composite In-Amp Circuit Has Excellent High

Frequency CMR The primary benefit of an in-amp circuit is that itprovides common-mode rejection. While the AD8221and AD8225 both have an extended CMR frequencyrange, most in-amps fail to provide decent CMR atfrequencies above the audio range.

The circuit in Figure 6-1 is a composite instrumentationamplier with a high common-mode rejection ratio. Itfeatures an extended frequency range over which theinstrumentation amplier has good common-moderejection (Figure 6-2). The circuit consists of three in-

strumentation ampliers. Two of these, U1 and U2, arecorrelated to one another and connected in antiphase. Itis not necessary to match these devices because they arecorrelated by design. Their outputs, OUT1 and OUT2,drive a third instrumentation amplier that rejects com-mon-mode signals and ampliers’ differential signals.The overall gain of the system can be determined byadding external resistors. Without any external resistors,the system gain is 2 (Figure 6-3). The performance of thecircuit with a gain of 100 is shown in Figure 6-4.

Figure 6-1. A Composite Instrumentation Amplier

Chapter VI

IN-AMP AND DIFF AMP APPLICATIONS CIRCUITS

VCMCOMMON-MODE

SIGNAL,3.5V p-p @ 20kHz

(1V/DIV)

UNCORRECTEDCMRR ERROR

(10mV/DIV)

OUTPUT SIGNAL(1mV/DIV)

OUT1

OUT3

Figure 6-2. CMR of the Circuit in Figure 6-1 at 20 kHz

FREQUENCY (Hz)

C M R R ( d B )

90

80

100 1k 10k 100k

70

60

50

40

OUT3

OUT1

Figure 6-3. CMRR vs. Frequency at a Gain of 2



+15V

+15V

–15V

–15V

10F0.1F

10F0.1F

AD8221

REF

+IN

–IN

49.9

350

350 350

350

CHB–

SEL B

CHA–

SEL A

RA

RFRINA

RINB

–VS

+15V

VOUT

+VS

COMP

AD630AR OP1177

12

13

1 8

RB

1410

17

16

15

19

20

9 11

–15V

4.99k 4.99k 4.99k

2F 2F 2F

Figure 6-6. Using an AC Signal to Excite the Bridge

FREQUENCY (Hz)

C M R R

( d B )

115

105

95

85

100 1k 10k 100k75

OUT3

OUT1

Figure 6-4. CMR of the System at a Gain of 100

Since U1 and U2 are correlated, their common-modeerrors are the same. Therefore, these errors appear ascommon-mode input signal to U3, which rejectsthem. In fact, if it is necessary, OUT1 and OUT2 candirectly drive an analog-to-digital converter (ADC).The differential-input stage of the ADC will reject thecommon-mode signal, as seen in Figure 6-5.

U1AD623

+

–

+VS

–VS

REF

U2AD623

+

–

+VS

–VS

REF

+IN

–IN

+VS

–VS

OUT1

GNDVREF

AD7825

OUT2

+VDM

+VCM

DIGITALDATA

OUTPUT

Figure 6-5. The OUT1 and OUT2 signals of

the rst stage can directly drive an analog-

to-digital converter, allowing the ADC to

reject the common-mode signal.

STRAIN GAGE MEASUREMENT USING AN

AC EXCITATION

Strain gage measurements are often plagued by offsdrift, 1/f noise, and line noise. One solution is to use aac signal to excite the bridge, as shown in Figure 6-6. ThAD8221gains the signal and an AD630AR synchronousdemodulates the waveform. What results is a dc outpproportional to the strain on the bridge. The outpusignal is devoid of all dc errors associated with the in-amand the detector, including offset and offset drift.



C1

IN

IN

–VS

A2

VOUT

TO ADCA1VIN

VCM

100k

10k

10k

–15V

0.1F

100k

VREF

RG

RG

RF

CFILTER

10k

AD628

8

1

2 3 6

4 7

5+

–

IN

IN

–

+

+15V

0.1F

+VS

DIFFERENTIALINPUT SIGNAL

Figure 6-7. Basic Differential Input Connection with Single-Pole LP Filter

In Figure 6-6, a 400 Hz signal excites the bridge. Thesignal at the AD8221’s input is an ac voltage. Similarly,the signal at the input of the AD630 is ac; the signal is dcat the end of the low-pass lter following the AD630.

The 400 Hz ac signal is rectied and then averaged; dcerrors are converted in an ac signal and removed by the

AD630. Ultimately, a precision dc signal is obtained.The AD8221 is well suited for this application becauseits high CMRR over frequency ensures that the signalof interest, which appears as a small difference voltageriding on a large sinusoidal common-mode voltage, isgained and the common-mode signal is rejected. Intypical instrumentation ampliers, CMRR falls off atabout 200 Hz. In contrast, the AD8221 continues toreject common-mode signals beyond 10 kHz.

If an ac source is not available, a commutating voltagemay be constructed using switches. The AD8221’s high

CMRR over frequency rejects high frequency harmonicsfrom a commutating voltage source.

APPLICATIONS OF THE AD628 PRECISION

GAIN BLOCK

TheAD628can be operated as either a differential/scalingamplier or as a pin-strapped precision gain block.Specically designed for use ahead of an analog-to-digitalconverter, the AD628 is extremely useful as an inputscaling and buffering amplier. As a differential amplier,it can extract small differential voltages riding on large

common-mode voltages up to

120 V. As a prepack-aged precision gain block, the pins of the AD628 can

be strapped to provide a wide range of precision gains,allowing for high accuracy data acquisition with verylittle gain or offset drift.

The AD628 uses an absolute minimum of external com-ponents. Its tiny MSOP provides these functions in thesmallest size package available on the market. Besides

high gain accuracy and low drift, the AD628 provides avery high common-mode rejection, typically more than90 dB at 1 kHz while still maintaining a 60 dB CMRR at 100 kHz.

The AD628 includes a VREF pin to allow a dc (midscale)offset for driving single-supply ADCs. In this case, theVREF pin may simply be tied to the ADC’s reference pin,which also allows easy ratiometric operation.

Why Use a Gain Block IC?

Real-world measurement requires extracting weak signalsfrom noisy sources. Even when a differential measurement

is made, high common-mode voltages are often present.The usual solution is to use an op amp or, better still, anin-amp, and then perform some type of low-pass lteringto reduce the background noise level.

The problem with this traditional approach is that adiscrete op amp circuit will have poor common-moderejection and its input voltage range will always be less thanthe power supply voltage. When used with a differentialsignal source, an in-amp circuit using a monolithic ICwill improve common-mode rejection. However, signalsources greater than the power supply voltage, or signals

riding on high common-mode voltages, cannot handle



IN

IN

–VS

A2

VOUTTO ADCA1VIN

VCM

100k

10k

10k

–15V

0.1F

100k

VREF RG

CFILTER

10k

AD628

8

1

2 3 6

4 7

5+

–

IN

IN

–

+

+15V

0.1F

+VS

RG

DIFFERENTIALINPUT SIGNAL

Figure 6-8. AD628 Connection for Gains Less Than 0.1

standard in-amps. In addition, in-amps using a singleexternal gain resistor suffer from gain drift. Finally, low-pass ltering usually requires the addition of a separateop amp, along with several external components. Thisdrains valuable board space.

The AD628 eliminates these common problems by

functioning as a scaling amplier between the sensor,the shunt resistor, or another point of data acquisition,as well as the ADC. Its 120 V max input range permitsthe direct measurement of large signals or small signalsriding on large common-mode voltages.

Standard Differential Input ADC Buffer Circuit

with Single-Pole LP Filter

Figure 6-7 shows the AD628 connected to accept adifferential input signal riding on a very high com-mon-mode voltage. The AD628 gain block has twointernal ampliers: A1 and A2. Pin 3 is grounded, thus

operating amplier A1 at a gain of 0.1. The 100 k input resistors and other aspects of its design allowthe AD628 to process small input signals riding oncommon-mode voltages up to 120 V.

The output of A1 connects to the plus input of amplierA2 through a 10 k resistor. Pin 4 allows connecting anexternal capacitor to this point, providing single-polelow-pass ltering.

Changing the Output Scale Factor

Figure 6-7 reveals that the output scale factor of theAD628 may be set by changing the gain of amplier

A2. This uncommitted op amp may be operated at any

convenient gain higher than unity. When congured, thAD628 may be set to provide circuit gains between 0and 1,000.

Since the gain of A1 is 0.1, the combined gain of Aand A2 equals

V

V G R ROUT

IN

F G= = + ( )( )0 1 1.

Therefore

10 1GR

R

F

G

−( ) =

For ADC buffering applications, the gain of A2 shoube chosen so that the voltage driving the ADC is cloto its full-scale input range. The use of external resistorR F and R G to set the output scale factor (i.e., gain of A

will degrade gain accuracy and drift essentially to thresistors themselves.

A separate VREF pin is available for offsetting the AD62output signal, so it is centered in the middle of the ADCinput range. Although Figure 6-7 indicates 15 V, thcircuit may be operated from 2.25 V to 18 V dusupplies. This VREF pin may also be used to allow singlsupply operation; VREF may simply be biased at VS/2.

Using an External Resistor to Operate the AD628 a

Gains Below 0.1

The AD628 gain block may be modied to provide an

desired gain from 0.01 to 0.1, as shown in Figure 6-8



C2

IN

IN

–VS

A2

VOUTTO ADCA1VIN

VCM

100k

10k

10k

–15V

0.1F

100k

VREF

RG

RG

RF

CFILTER

10k

AD628

8

1

2 3 6

4 7

5+

–

IN

IN

–

+

+15V

0.1FC1

0.1F

+VS

DIFFERENTIAL

INPUT SIGNAL

Figure 6-9. Differential Input Circuit with Two-Pole Low-Pass Filtering

This connection is the same as the basic wide input rangecircuit of Figure 6-7, but with Pins 5 and 6 strapped,and with an external resistor, R G, connection betweenPin 4 and ground. The pin strapping operates amplierA2 at unity gain. Acting with the on-chip 10 k resistorat the output of A1, R GAIN forms a voltage divider thatattenuates the signal between the output of A1 and theinput of A2. The gain for this connection equals 0.1 VIN

((10 k + R G)/R G).

Differential Input Circuit with Two-Pole

Low-Pass Filtering

The circuit in Figure 6-9 is a modication of the basicADC interface circuit. Here, two-pole low-pass lteringis added for the price of one additional capacitor (C2).

As before, the rst pole of the low-pass lter is set bythe internal 10 k resistor at the output of A1 and theexternal capacitor C1. The second pole is created by anexternal RC time constant in the feedback path of A2,

consisting of capacitor C2 across resistor R F. Note thatthis second pole provides a more rapid roll-off of fre-quencies above its RC corner frequency (1/(2RC)) thana single-pole LP lter. However, as the input frequencyis increased, the gain of amplier A2 eventually dropsto unity and will not be further reduced. So, amplierA2 will have a voltage gain set by the ratio of R F/R G atfrequencies below its –3 dB corner and have unity gainat higher frequencies.

Figure 6-10. Frequency Response of the

Two-Pole LP Filter

Figure 6-10 shows the lter’s output vs. frequency using

components chosen to provide a 200 Hz –3 dB cornerfrequency. There is a sharp roll-off between the cornerfrequency and approximately 10 the corner frequency.Above this point, the second pole starts to become lesseffective and the rate of attenuation is close to that of asingle-pole response.



IN

IN

–VS

A2VOUT

A1

100k

10k

10k

–15V

0.1F

100k

VREF

VIN

RG

CFILTER

AD628

8

1

2 3 6

4 7

5+

–

IN

IN

–

+

+15V

0.1F

+VS

10k

Figure 6-11. Circuit with a Gain of +10 Using No External Components

Table 6-1.

Two-Pole LP FilterInput Range: 10 V p-p F.S. for a 5 V p-p OutputR F = 49.9 k, R G = 12.4 k

–3 dB Corner Frequency

200 Hz 1 kHz 5 kHz 10 kHz

Capacitor C2 0.01 F 0.002 F 390 pF 220 pFCapacitor C1 0.047 F 0.01 F 0.002 F 0.001 F

Table 6-2.

Two-Pole LP FilterInput Range: 20 V p-p F.S. for a 5 V p-p OutputR F = 24.3 k, R G = 16.2 k

–3 dB Corner Frequency

200 Hz 1 kHz 5 kHz 10 kHz

Capacitor C2 0.02 F 0.0039 F 820 pF 390 pFCapacitor C1 0.047 F 0.01 F 0.002 F 0.001 F

Tables 6-1 and 6-2 provide typical lter componentvalues for various –3 dB corner frequencies and twodifferent full-scale input ranges. Values have beenrounded off to match standard resistor and capacitorvalues. Capacitors C1 and C2 need to be high Q, lowdrif t devices; low grade disc ceramics should be avoided.High quality NPO ceramic, Mylar, or polyester lmcapacitors are recommended for the lowest drift andbest settling time.

Using the AD628 to Create Precision Gain BlocksReal-world data acquisition systems require amplifying weaksignals enough to apply them to an ADC. Unfortunately,

when congured as gain blocks, most common ampliehave both gain errors and offset drift.

In op amp circuits, the usual two resistor gain settinarrangement has accuracy and drift limitations. Usinstandard 1% resistors, amplier gain can be off by 2%The gain will also vary with temperature because eac

resistor will drift differently. Monolithic resistor networcan be used for precise gain setting, but these componenincrease cost, complexity, and board space.

The gain block circuits of Figures 6-11 to 6-15 overcomall of these performance limitations, are very inexpensivand offer a single MSOP solution. The AD628 providthis complete function using the smallest IC packagavailable. Since all resistors are internal to the AD62gain block, both accuracy and drift are excellent.

All of these pin-strapped circuits (using no externcomponents) have a gain accuracy better than 0.2%

with a gain TC better than 50 ppm/°C.Operating the AD628 as a +10 or –10 Precision

Gain Block

Figure 6-11 shows an AD628 precision gain block Iconnected to provide a voltage gain of +10. The gablock may be congured to provide different gains bstrapping or grounding the appropriate pin. The gablock itself consists of two internal ampliers: a gain 0.1 difference amplier (A1) followed by an uncommittebuffer amplier (A2).

The input signal is applied between the VREF pin (Pin

and ground. With the input tied to Pin 3, the voltage the positive input of A1 equals VIN (100 k/110 kwhich is VIN (10/11). With Pin 6 grounded, the minu



IN

IN

–VS

A2

VOUTA1

100k

10k

10k

–15V

0.1F

100k

VREF

VIN

RG

CFILTER

AD6288

1

2 3 6

4 7

5+

–

IN

IN

–

+

+15V

0.1F

+VS

10k

Figure 6-14. AD628 Precision Gain of +1

IN

IN

–VS

A2VOUT

A1

100k

10k

10k

100k

VREF

VIN

RG

CFILTER

AD6288

1

2 3 6

4 7

5+

–

IN

IN

–

+

+VS

10k

Figure 6-15. Precision –10 Gain Block with Feedforward

connects the two internal resistors (100 k and 10 k)that are tied in parallel to the plus input of A1. So, thisnow removes the 10 k/110 k voltage divider betweenVIN and the positive input of A1. Thus modied, VIN drivesthe positive input through approximately a 9 k resistor.Note that this series resistance is negligible compared tothe very high input impedance of amplier A1. The gainfrom Pin 8 to the output of A1 is 0.1. Therefore, feedbackwill force the output of A2 to equal 10 VIN. The –3 dBbandwidth of this circuit is approximately 105 kHz for10 mV and 95 kHz for 100 mV input signals.

Operating the AD628 at a Precision Gain of +1

Figure 6-14 shows the AD628 connected to provide aprecision gain of +1. As before, this connection usesthe gain block’s internal resistor networks for high gainaccuracy and stability.

The input signal is applied between the VREF pand ground. Because Pins 1 and 8 are grounded, thinput signal runs through a 100 k/110 k input atenuator to the plus input of A1. The voltage equals V(10/11) = 0.909 VIN. The gain from this point to thoutput of A1 will equal 1 + (10 k/100 k) = 1.1Therefore, the voltage at the output of A1 will equVIN (1.10) (0.909) = 1.00. Amplier A2 is operateas a unity gain buffer (as Pins 5 and 6 tied togetherproviding an overall circuit gain of +1.

Increased BW Gain Block of –9.91 Using Feedforward

The circuit of Figure 6-12 can be modified slightby applying a small amount of positive feedback increase its bandwidth, as shown in Figure 6-1The output of amplifier A1 feeds back its positivinput by connecting Pin 4 and Pin 1 together. NowGain = –(10 – 1/11) = –9.91.



380k

380k

20k 21.1k

6

5 1

2

3VIN

VCM +15V

–15V

GND1

AD629

R29k

OP27

R11k

R30.1k

R11k

GND2

VOUT

GROUND INTERFERENCE

IOUT

Figure 6-16. Current Transmitter

The resulting circuit is still stable because of the largeamount of negative feedback applied around the entirecircuit (from the output of A2 back to the negativeinput of A1). This connection actually results in a smallsignal –3 dB bandwidth of approximately 140 kHz. Thisis a 27% increase in bandwidth over the unmodiedcircuit in Figure 6-9. However, gain accuracy is reducedto 2%.

CURRENT TRANSMITTER REJECTS

GROUND NOISE

Many systems use current ow to control remote instru-mentations. The advantage of such a system is its abilityto operate with two remotely connected power supplies,even if their grounds are not the same. In such cases, it isnecessary for the output to be linear with respect to theinput signal, and any interference between the groundsmust be rejected. Figure 6-16 shows such a circuit.

For this circuit

I V

OUT

IN =( )10

1k Ω

I V

OUT IN =

( )V

k 1 Ω

The AD629, a difference amplier with very highcommon-mode range, is driven by an input signal Pin 3.Its transfer function is

V V OUT IN =

Where:

VOUT is measured between Pin 6 and its reference(Pin 1 and Pin 5), and the input V IN is measuredbetween Pin 3 and Pin 2. The common- mode signal,VCM, will be rejected.

In order to reduce the voltage at Pin 6, an inverterwith a gain of 9 is connected between Pin 6 and itsreference. The inverter sets the gain of the transmittersuch that for a 10 V input, the voltage at Pin 6 onlychanges by 1 V; yet, the difference between Pin 6 andits reference is 10 V.



A1

A2

R310k

R4100k

R2100k R1

10k

10k

13.3k

3.32k

3.32k

V1

AD7450

REFERENCE

5V

2.5V VR

VB

VA

PRECISIONREFERENCE

AD780

5V

8

3 6

6

–IN

1 5+IN OUT

A1A2

R310k

R2100k

R4100k

10k

R110k

V2

1+IN

8 –IN

5OUT

3

AD628

AD628

4

4

2

2

RGCFLIT –VSVREF

RGCFLIT –VSVREF

CVR

7

5V

VS

7

5V

VS

Figure 6-19. This ADC Interface Circuit Attenuates and Level Shifts a 10 V Differential

Signal While Operating from a Single 5 V Supply

Since the gain between the noninverting terminal of theOP27 and the output of the AD629 is 1, no modulationof the output current will take place as a function of theoutput voltage VOUT. The scaling resistor R3 is 100 tomake 1 mA/V of input signal.

OP27 was chosen because, at a noise gain of 10, its

bandwidth does not compromise the transmitter. Figure6-17 is the transfer function of the output voltage VOUT vs. the input voltage VIN. Figure 6-18 is a demonstrationof how well the transmitter rejects ground noise.

5V 5V

HORIZONTAL: INPUT 5V/DIVVERTICAL: OUTPUT 5mA/DIV

Figure 6-17. Transfer Function

2V 5ms1mV

TOP: GROUND NOISE 2V/DIVBOTTOM: VOUT ERROR AT FULL-SCALE 1A/DIV

Figure 6-18. Interference Rejection

HIGH LEVEL ADC INTERFACE

The circuit of Figure 6-19 provides an interface betwee

large level analog inputs as high as 10 V operating odual supplies and a low level, differential input ADoperating on a single supply.

As shown, two AD628 difference amplifiers aconnected in ant iphase . The differential output, V1 –Vis an attenuated version of the input signal

V V V V A B

1 25

− =−( )



VO

R1

I1V1

R2

I2V2

R3

I3V3

X

RF

IF

Figure 6-23. A Traditional Summing Amplier

This indicates that the output is a weighted sum of theinputs with the weights being determined by the resis-tance ratio. If all resistances are equal, the circuit yieldsthe inverted sum of its inputs.

V V V V O

= − + +( )1 2 3

Note that if we want the result VO = (V1 + V2 + V3), weneed an additional inverter with Gain = –1. Further-more, this circuit has many disadvantages, such as lowinput impedance, different input impedance for positiveand negative inputs, low bandwidth and highly matchedresistors are needed.

Figure 6-24 is the schematic of a high speed summingamplier, which can sum up as many as four input volt-ages without the need for an inverter to change the signof the output. This could prove very useful in audio and

video applications. The circuit contains three low cohigh speed instrumentation ampliers. The rst twinterface with input signals and their total sum is takeat the third amplier’s output with respect to grounThe inputs are very high impedance and the signal thappears at the network output is noninverting.

Figure 6-25 is the performance photo at 1 MHz. The totrace is the input signal for all four inputs. The middtrace is the sum of inputs V1 and V2. The bottom tracis the output of the system, which is the total sum of afour inputs.

1

2

3

M 400ns 125MS/sA CH1 40.0mV

CH1CH3

1.0V CH2 1.0V1.0V

8.0ns/pt

T

Figure 6-25. Performance Photo of the

Circuit in Figure 6-24

1

8

4

5

AD8130

VO1

V1

V2

6

1

8

4

5

AD8130

VO2

V3

V4

6

1

8

4

5

AD8130

VO6

Figure 6-24. A Summing Circuit with High Input Impedance



Figure 6-26 demonstrates the high bandwidth of thesystem in Figure 6-24. As we can see, the –3 dB pointis about 220 MHz.

FREQUENCY (MHz)

G A I N ( d B )

4

–6

–5

–4

–3

–2

–1

0

1

2

3

1 10 100 1k

PS = 5V

Figure 6-26. Frequency Response of

Summing Circuit in Figure 6-24

HIGH VOLTAGE MONITOR

A high accuracy, high voltage monitor is shown inFigure 6-27.

AD629

380k

380k6

380k

2

1

3

21.11k

VIN

GND

20kR1100k5

4

–5V

7

+5V

OP177

C1200pF

–15V

+15V

VOUT

2

37

4

6

Figure 6-27. High Voltage Monitor

An integrator (OP177) supplies negative feedback arounda difference amplier (AD629), forcing its output to stayat 0 V. The voltage divider on the inverting input setsthe common-mode voltage of the difference amplierto VIN/20. VOUT, the integrator output and the measure-ment output, sources the required current to maintainthe common-mode voltage. R1 and C1 compensate thesystem to a bandwidth of 200 kHz.

The transfer function is VOUT = VIN/19. For example, a400 V p-p input signal will produce a 21 V p-p output.

Figure 6-28 shows that the measured system nonlinearityis less than 20 ppm over the entire 400 V p-p input range.System noise is about 550 nV/÷ Hz referred to the input,or around 2 mV peak noise voltage (10 ppm of full scale)over a 300 kHz bandwidth.

VIN (V)

N O N L I N E A R I T Y E R R O R ( p p m )

0

–10

–20

10

20

–200 –150 –100 –50 0 50 100 150 200

Figure 6-28. Nonlinearity vs. V IN

HIGH COMMON-MODE REJECTION SINGLE-

SUPPLY CIRCUIT

The circuit of Figure 6-29 can extract tiny signals ridingon very large common-mode voltages and its singlesupply. Also, unless the converter is driven differentially,the noise on the analog-to-digital converter (ADC)reference pin is indistinguishable from a real signal.

The circuit of Figure 6-29 solves both of these problems.It provides a gain of 2, along with differential inputs anda differential output. The ADC reference sets the outputcommon-mode level. The amplier is constructed withtwo subtractors, each compliant to high common-modevoltage. These subtractors are set up so that the positiveinput of one connects to the negative input of the other,and vice versa. Their reference pins are tied together andconnected to the ADC’s reference pin.



380k

380k6

21.1k

5

2

3

1AD629 #1

380k

20k

OUTP

380k

380k

6

21.1k

5

2

3

1

AD629 #2

380k

20k

OUTN

DGND

GND

AIN

REF

AIN

ADC

VIN

VCM

+IN

–IN

Figure 6-29. A High CMV Single-Supply Circuit

As the input signal increases, one output, OUTP,increases, while the other output, OUTN, decreases. Bothoutputs remain centered with respect to the common-mode level set by the ADC’s reference.

Figure 6-30 illustrates the circuit’s performance with asingle 5 V power supply. At the top is a 1 kHz, 3 V p-pinput signal. At the bottom are the two outputs inantiphase to produce a 3 V p-p signal centered aroundthe 2.5 V reference.

CH 1 1 .0 0V CH2 1.00V

CH4 1.00V

M 200s

INPUT SIGNAL 1V p-p/DIV

5V POWER SUPPLY

Figure 6-30. Top Trace is the Input Signal; Bottom

Trace Is Antiphase Output, 40 V p-p on +2.5 dc

Figure 6-31 demonstrates the system’s ability to rejea 1 kHz, 60 V p-p common-mode signal. The uppwaveform shows the common-mode input, while thlower waveform shows the output.

CH3MATH1

20.0V20.0mV 200s

M 200s

Figure 6-31. With a 5 V Supply and a 1 kHz, 60 V p-p

Common-Mode Signal (Upper Trace), the Circuit

Output (Lower Trace) Illustrates the High Common

Mode Rejection

Bigger power supplies, such as 15 V, can be used flarger common-mode signals. Figure 6-32 shows ththe system can reject a 400 V p-p common-mode sign(upper waveform), with the residual error of less tha100 mV p-p shown in the lower waveform.

CH3

MATH1

100V

5.00mV 1.00mV

M1.00ms CH3 204V

Figure 6-32. Using a 15 V Supply, the Circuit

Reduces a 400 V p-p Common-Mode Signal

(Upper Trace) to Under 10 mV p-p (Lower Trace)



–REF1

–IN2

+IN3

–VS4

NC

NC = NO CONNECT

8

+VS7

OUT 6

+REF 5

21.11k 380k

380k

380k

AD629

20k

10k

3

6

COMPENSATIONPOLE AMPLIFIER

OP972

0.1F7

4

VBUS19

DATAOUT

AD7476

GND SCLK

VDD CS

VINSDATA

CHIPSELECT

CLOCKIN

VBUS –39V TO –79V

15V

VBUS = +14.1V VBUS = +5V

VBUS = +5V

10k

2N2222 OREQUIV.

ADR4255V REF

0.1F

0.1F

1nF

Figure 6-33. Precision Remote Voltage Measurement of –48 V Power Distribution Bus

PRECISION 48 V BUS MONITOR

Telephone equipment power supplies normally consistof a 48 V dc power source and an array of batteries. Thebatteries provide backup power during ac power lineoutages and help regulate the 48 V dc supply voltage.

Although nominally –48 V, the dc voltage on thetelephone lines can vary anywhere from –40 V to –80 V andis subject to surges and uctuations. Supply regulation

at the source has little effect on remote voltage levels andequipment failures resulting from surges, brownouts, orother line faults, may not always be detected.

Capturing power supply information from remote com-munications equipment requires precise measurementof the voltages, sometimes under outdoor temperatureconditions. High common-mode voltage differenceampliers have been used to monitor current. However,these versatile components can also be used as voltagedividers, enabling remote monitoring of voltage levelsas well.

Figure 6-33 shows a precision monitor using justtwo integrated circuits, which derives its power fromthe –48 V supply. A low cost transistor and Zenerdiode combination provide 15 V supply voltage forthe ampliers.

The AD629IC is a self-contained high common-modevoltage difference amplier. Connected as shown, itreduces the differential input voltage by approximately

19 V, thus acting as a precision voltage divider. Anadditional amplier is required for loop stability.

The output from the OP-07 drives an AD7476 ADC.

The circuit features several advantages over alternativesolutions. The AD629’s laser trimmed divider resis-tors exhibit essentially perfect matching and trackingover temperature. Linearity errors from –40 V to –80 V are nearly immeasurable. Figures 6-34 and6-35 are linearity and temperature drift curves forthis circuit.



4.5

4.0

3.5

3.0

2.5

–30 –40 –50 –60 –70 –80 –902.0

INPUT VOLTAGE (V)

O U T P U T V O L T A G E ( V )

Figure 6-34. Output vs. Input Linearity for

the Circuit of the 48 V Bus Monitor

2.1064

–50 0 50 1002.1050

2.1052

2.1054

2.1056

2.1058

2.1060

2.1062

TEMPERATURE (C)

O U T P U T V O L T A G E ( V )

Figure 6-35. Temperature Drift of the

48 V Bus Monitor

HIGH-SIDE CURRENT SENSE WITH A

LOW-SIDE SWITCH

A typical application for the AD8205 is high-sidmeasurement of a current through a solenoid for PWMcontrol of the solenoid opening. Typical applicationinclude hydraulic transmission control and diesel injetion control.

Two typical circuit congurations are used for this typof application.

In this case, the PWM control switch is ground referenceAn inductive load (solenoid) is tied to a power supply.resistive shunt is placed between the switch and the loa(see Figure 6-36). An advantage of placing the shuon the high side is that the entire current, including threcirculation current, can be measured since the shuremains in the loop when the switch is off. In additiodiagnostics can be enhanced because shorts to groun

can be detected with the shunt on the high side.In this circuit conguration, when the switch is closethe common-mode voltage moves down to near thnegative rail. When the switch is opened, the voltagreversal across the inductive load causes the commomode voltage to be held one diode drop above the batteby the clamp diode.

+IN VREF1 +VS OUT

–IN GND VREF2 NC

INDUCTIVELOAD

AD8205

CLAMPDIODE

42V

BATTERYSHUNT

SWITCH

NC = NO CONNECT

5V

Figure 6-36. Low-Side Switch



REF pin to midway between the supplies, especial ly if the input signal will be bipolar. However, the voltageon the REF pin can be varied to suit the application.A good example of this is when the REF pin is tied tothe VREF pin of an analog-to-digital converter (ADC)whose input range is (VREF VIN). With an availableoutput swing on the AD627 of (–VS + 100 mV) to(+VS – 150 mV), the maximum programmable gain issimply this output range divided by the input range.

A Single-Supply Data Acquisition System

The bridge circuit of Figure 6-40 is excited by a +5 Vsupply. The full-scale output voltage from the bridge(10 mV), therefore, has a common-mode level of 2.5 V. The AD623 removes the common-mode voltagecomponent and amplies the input signal by a factorof 100 (R GAIN = 1.02 k). This results in an outputsignal of 1 V.

In order to prevent this signal from running into theAD623’s ground rail, the voltage on the REF pin hasto be raised to at least 1 V. In this example, the 2 V

reference voltage from the AD7776 ADC is used bias the AD623’s output voltage to 2 V ± 1 V. Thcorresponds to the input range of the ADC.

A Low Dropout Bipolar Bridge Driver

The AD822 can be used for driving a 350 Wheastone bridge. Figure 6-41 shows one-half of the AD82

being used to buffer the AD589, a 1.235 V low powreference. The output of +4.5 V can be used to drive aA/D converter front end. The other half of the AD82is congured as a unity-gain inverter and generates thother bridge input of –4.5 V.

Resistors R1 and R2 provide a constant current fbridge excitation. The AD620 low power instrumentation amplier is used to condition the differentioutput voltage of the bridge. The gain of the AD62is programmed using an external resistor, R G, andetermined by

G RG

= +49 4

1. k Ω

10mV

+5V

0.1F

AD623

REF

RG

1.02k

+5V

REFOUT

REFIN

AIN

AD7776

+5V

0.1F

Figure 6-40. A Single-Supply Data Acquisition System

AD620

+

–

1/2AD822

+VS

49.9k

+1.235V

AD589

10k

1%

26.4k, 1%

R1

20+

–

RG

TO A/D CONVERTERREFERENCE INPUT

+VS

VREF

–VS

350

350 350

350

1 2AD822

+

–

10k

1%10k

1%

R220

–VS

–4.5V + +

+ +

0.1F

0.1F

1F

1F

+5V+VS

–5V –VS

GND

Figure 6-41. Low Dropout Bipolar Bridge Driver



TRANSDUCER INTERFACE APPLICATIONS

Instrumentation amplifiers have long been used aspreamplifiers in transducer applications. High qualitytransducers typically provide a highly linear output,but at a very low level, and a characteristically highoutput impedance. This requires the use of a highgain buffer/preamplifier that will not contr ibute any

discernible noise of its own to that of the signal.Furthermore, the high output impedance of the typicaltransducer may require that the in-amp have a lowinput bias current.

Table 6-3 gives typical characteristics for some commontransducer types.

Since most transducers are slow, bandwidth require-ments of the in-amp are modest: a 1 MHz smallsignal bandwidth at unity gain is adequate for mostapplications.

MEDICAL EKG APPLICATIONS

An EKG is a challenging real-world application, as asmall 5 mV signal must be extracted in the presenceof much larger 60 Hz noise and large dc common-mode offset variations. Figure 6-42 shows a blockdiagram of a typical EKG monitor circuit. The valueof capacitor CX is chosen to maintain stability of the

right leg drive loop.

Three outputs from the patient are shown here, althoughseveral more may be used. The output buffer ampli-ers should be low noise, low input bias current FETop amps, since the patient sensors are typically veryhigh impedance and signal levels may be quite low. Athree resistor summing network is used to establish acommon sense point to drive the force amplier. Theoutput from the force amplier servos current throughthe patient until the net sum output from the threebuffer ampliers is zero.

A

B

C

BUFFERAMPLIFIERS

IN-AMP#1

IN-AMP#2

C-B

A-B

IN-AMP#3

A-C

0.03HzHIGH-PASS

FILTER

0.03HzHIGH-PASS

FILTER

0.03HzHIGH-PASS

FILTER

A

B

C

PATIENT/CIRCUITPROTECTION/ISOLATION

A

B

C

F CX

Figure 6-42. A Medical EKG Monitor Circuit



Three in -amps are used to provide three separate out-puts for monitoring the patient’s condition. SuitableADI products include AD8221, AD627, and AD623in-amps and AD820, AD822 (dual), and AD824

(quad) op amps for use as the buffer. Each in-amp isfollowed by a high-pass lter that removes the dc com-ponent from the signal. It is common practice to omitone of the in-amps and determine the third output bysoftware (or hardware) calculation.

Proper safeguards, such as isolation, must be added tothis circuit to protect the patient from possible harm.

REMOTE LOAD-SENSING TECHNIQUE

The circuit of Figure 6-43 is a unity gain instrumentationamplier that uses its sense and reference pins to mini-mize any errors due to parasitic voltage drops within thecircuit. If heavy output currents are expected, and thereis a need to sense a load that is some distance away from

the circuit, voltage drops due to trace or wire resistancecan cause errors. These voltage drops are particularlytroublesome with low resistance loads, such as 50 .

The sense terminal completes the feedback path for theinstrumentation amplier output stage and is normallyconnected directly to the in-amp output. Similarly, thereference terminal sets the reference voltage about whichthe in-amp’s output will swing. This connection putsthe IR drops inside the feedback loop of the in-ampand virtually eliminates any IR errors.

This circuit wil l provide a 3 dB bandwidth better than3 MHz. Note that any net capacitance between thetwisted pairs is isolated from the in-amp’s output by25 k resistors, but any net capacitance between thetwisted pairs and ground needs to be minimized tomaintain stability. So, unshielded twisted-pair cable isrecommended for this circuit. For low speed applicationsthat require driving long lengths of shielded cable, theAMP01 should be substituted for the AMP03 device.The AMP01 can drive capacitance loads up to 1F, whilethe AMP03 is limited to driving a few hundred pF.

*

*

OUTPUTGROUND

TWISTEDPAIRS

REMOTELOAD

–IN

+IN

SENSE

+VCC

OUTPUT

–VEE

REFERENCE

25k 25k

25k 25k

6

7

1

2

3

4

5

AMP03

TWISTEDPAIRS+VIN

–VIN

*1N4148 DIODES ARE OPTIONAL. DIODES LIMIT THE OUTPUTVOLTAGE EXCURSION IF SENSE AND/OR REFERENCE LINES

BECOME DISCONNECTED FROM THE LOAD.

Figure 6-43. A Remote Load Sensing Connection



A PRECISION VOLTAGE-TO-CURRENT

CONVERTER

Figure 6-44 is a precision voltage-to-current converterwhose scale factor is easily programmed for exact de-cade ratios using standard 1% metal lm resistor values.The AD620 operates with full accuracy on standard5 V power supply voltages. Note that although the

quiescent current of the AD620 is only 900 A, theaddition of the AD705 will add an additional 380 Acurrent consumption.

A CURRENT SENSOR INTERFACE

Figure 6-45 shows a novel circuit for sensing low-levcurrents. It makes use of the large common-mode range theAD626. The current being measured is sensed acroresistor R S. The value of R S should be less than 1 kand should be selected so that the average differentivoltage across this resistor is typically 100 mV.

To produce a full-scale output of +4 V, a gain of 40 used, adjustable by +20% to absorb the tolerance in thsense resistor. Note that there is sufcient headroom allow at least a 10% overrange (to +4.4 V).

AD620RG

–VS

VIN+

VIN–

LOAD

R1

IL

VxI =L

R1=

IN+[(V ) – (V )] GIN–

R1

WHERE G = 1 +49,400

RG

6

5

+ V – X

42

1

8

3 7

+VS

AD705

0.1F

0.1F

+VS0.1F

0.1F

–VS

67

4

2

3

Figure 6-44. A Precision Voltage-to-Current Converter that Operates on 5 V Supplies

RS

CFOPTIONAL

LOW-PASSFILTER

OUTPUT

+VS

CURRENT IN

CURRENT OUT

0.1F

1

2

3

4

8

7

6

5

–IN +IN

G = 100

OUT

AD626

200k 200k

100k

G= 2

ANALOGGND

–VS

FILTER

1/6

G=30

+VS

0.1F

–VS

RSCURRENT

SENSOR

Figure 6-45. Current Sensor Interface



OUTPUT BUFFERING LOW POWER IN-AMPS

The AD627 low power in-amp is designed to drive loadimpedances of 20 k or higher, but can deliver up to20 mA to heavier loads with low output voltage swings.If more than 20 mA of output current is required, theAD627’s output should be buffered with a precisionlow power op amp, such as the AD820, as shown in

Figure 6-46. This op amp can swing from 0 V to 4 Von its output while driving a load as small as 600 .The addition of the AD820 isolates the in-amp fromthe load, thus greatly reducing any thermal effects.

0.1F

+VS

–VS

RG

REF

0.1F

0.1F

–VS

0.1F

VOUT

AD627

AD820

3

1

8

2 4

5

6

7

3

2

7

4

6

Figure 6-46. Output Buffer for Low

Power In-Amps

A 4 mA TO 20 mA SINGLE-SUPPLY RECEIVER

Figure 6-47 shows how a signal from a 4 mA to 20 mAtransducer can be interfaced to the ADuC812, a 12-bitADC with an embedded microcontroller. The signal froma 4 mA to 20 mA transducer is single-ended. This initiallysuggests the need for a simple shunt resistor to convertthe current to a voltage at the high impedance analog

input of the converter. However, any line resistance inthe return path (to the transducer) will add a current-dependent offset error. So, the current must be senseddifferentially. In this example, a 24.9 shunt resistorgenerates a maximum differential input voltage to theAD627 of between 100 mV (for 4 mA in) and 500 mV(for 20 mA in). With no gain resistor present, the AD627amplies the 500 mV input voltage by a factor of 5 to2.5 V, the full-scale input voltage of the ADC. The zerocurrent of 4 mA corresponds to a code of 819 and theLSB size is 4.9 mV.

AD627

0.1F

24.9 RG

REF

4mA–20mA4mA–20mA

TRANSDUCER

AGND DGND

AIN 0–7

VREF

+5V

AVDD

+5V

DVDD

ADuC812

MICROCONVERTER™

+5V

LINEIMPEDANCE

0.1F 0.1F

3

1

8

2 4

5

6

7

G = 5

Figure 6-47. A 4 mA to 20 mA Receiver Circuit



A SINGLE-SUPPLY THERMOCOUPLE

AMPLIFIER

Because the common-mode input range of the AD627extends 0.1 V below ground, it is possible to measuresmall differential signals with little or no common-mode component. Figure 6-48 shows a thermocoupleapplication where one side of the J-type thermocouple

is grounded. Over a temperature range from –200Cto +200C, the J-type thermocouple delivers a voltageranging from –7.890 mV to +10.777 mV.

A programmed gain on the AD627 of 100 (R G = 2.1 kand a voltage on the AD627 REF pin of 2 V results the AD627’s output voltage ranging from 1.110 V 3.077 V relative to ground.

SPECIALTY PRODUCTS

Analog Devices sells a number of specialty product

many of which were designed for the audio market thare useful for some in-amp applications. Table 6-4 lissome of these products.

RG AD627

0.1F

VOUT

+5V

J-TYPETHERMOCOUPLE

+2VREF

COPPERWIRES

THERMOCOUPLEWIRES

COLD JUNCTIONCOMPENSATION

1

8

3

24

5

6

7

Figure 6-48. A Thermocouple Amplier Using a Low Power, Single-Supply In-Amp

Table 6-4. Specialty Products Available from Analog Devices

Model CMR Number Description BW (DC) Supply Features

SSM2141 Diff Line Receiver 3 MHz 100 dB 18 V High CMR, Audio SubtractorSSM2143 Diff Line Receiver 7 MHz (G = 0.5) 90 dB 6 V to 18 V Low Distortion, Audio SubtractorSSM2019 Audio Preamp 2 MHz (G = 1) 74 dB 5 V to 18 V Low Noise, Low Distortion, Audio I



Chapter VII

MATCHING IN-AMP CIRCUITS TO MODERN ADCs

Calculating ADC Requirements

The resolution of commercial ADCs is specied in bits.In an ADC, the available resolution equals (2n)–1, wheren is the number of bits. For example, an 8-bit converterprovides a resolution of (28)–1, which equals 255. In thiscase, the full-scale input range of the converter dividedby 255 will equal the smallest signal it can resolve. Forexample, an 8-bit ADC with a 5 V full-scale input rangewill have a limiting resolution of 19.6 mV.

In selecting an appropriate ADC to use, we need tond a device that has a resolution better than themeasurement resolution but, for economy’s sake, not

a great deal better.

Table 7-1 provides input resolution and full-scaleinput range using an ADC with or without an in-amppreamplier. Note that the system resolution speciedin the gure refers to that provided by the convertertogether with the in-amp preamp (if used). Also, notethat for any low level measurement, not only are low

ful attention to component layout, grounding, powersupply bypassing, and often, the use of balanced,shielded inputs.

For many applications, an 8- or 10-bit converter isappropriate. The decision to use a high resolutionconverter alone, or to use a gain stage ahead of alower resolution converter, depends on which is moreimportant: component cost, or parts count and easeof assembly.

Adding amplication before the ADC will also reduce

the circuit’s full-scale input range, but it will lower theresolution requirements (and, therefore, the cost) of the ADC.

For example, using an in-amp with a gain of 10 ahead of an 8-bit, 5 V ADC will increase circuit resolution from19.5 mV (5 V/256) to 1.95 mV. At the same time, thefull-scale input range of the circuit will be reduced to500 mV (5 V/10).

Table 7-1. Typical System Resolutions vs. Converter Resolution

and Preamp (IA) Gain

ConverterResolution FS System

Converter mV/Bit In-Amp Range ResolutionType (2n)–1 (5 V/((2n)–1)) Gain (V p-p) (mV p-p)

10-Bit 1,023 4.9 mV 1 5 4.910-Bit 1,023 4.9 mV 2 2.5 2.4510-Bit 1,023 4.9 mV 5 1 0.9810-Bit 1,023 4.9 mV 10 0.5 0.49

12-Bit 4,096 1.2 mV 1 5 1.212-Bit 4,096 1.2 mV 2 2.5 0.612-Bit 4,096 1.2 mV 5 1 0.24

12-Bit 4,096 1.2 mV 10 0.5 0.1214-Bit 16,383 0.305 mV 1 5 0.30514-Bit 16,383 0.305 mV 2 2.5 0.15314-Bit 16,383 0.305 mV 5 1 0.06114-Bit 16,383 0.305 mV 10 0.5 0.031

16-Bit 65,535 0.076 mV 1 5 0.07616-Bit 65,535 0.076 mV 2 2.5 0.03816-Bit 65,535 0.076 mV 5 1 0.01516-Bit 65,535 0.076 mV 10 0.5 0.008



ADI In-Amp AD8221AR

Small Signal BW: 562 kHzNoise (eNI): 8 nV/÷ Hz

VOS: 60 V MaxIn-Amp Gain: 10Maximum Output

Voltage Swing: 3.9 VCMRR: 90 dB (DC-60 Hz)Nonlinearity: 10 ppm MaxResolution: 0.0003% (18 Bits)Supply Voltage: 5 VSupply Current: 1 mA Max

0.01% Settling Timefor 5 V Step: 5 s0.001% Settling Time

for 5 V Step: 6 s

Recommended

ADI ADC#1 AD7685

Resolution: 16 BitsInput Range: 0 V to 5 VSampling Rate: Up to 250 kSPSS/D Supply: 3 V or 5 VPower: 1.7 mW @ 2.5 V and

6 mW typ @ 5 VComments: Same package, the AD7685can be driven through asimple RC from the AD8221directly. The REF pin can bedriven to t the ADC range.

Recommended

ADI ADC#2 AD7453/AD7457

Resolution: 12 BitsInput Range: 0 V to VDDSampling Rate: 555 kSPS/100 kSPS

S/D Supply: 3 V or 5 VPower: 0.3 mA @ 100 kSPSComments: Single channel, pseudo

differential inputs in aSOT-23 package

Matching ADI In-Amps with Some Popular ADCs

Table 7-2 shows recommended ADCs for use with the latest generation of ADI in-amps.

Table 7-2. Recommended ADCs for Use with ADI In-Amps

ADI In-Amp AD620AR



Voltage Swing: 3.9 VCMRR: 73 dB (DC-60 Hz)Nonlinearity: 40 ppm MaxResolution: 0.0013% (16 Bits)Supply Voltage: 5 VSupply Current: 1.3 mA Max

0.01% Settling Timefor 5 V Step: 7 s

Recommended

ADI ADC#1 AD7663

Resolution: 16 BitsInput Range: Multiple such as 10 V,

5 V, ...Sampling Rate: Up to 250 kSPSS/D Supply: 5 VPower: 2.7 mA @ 100 kSPSComments: Allow more and larger

input rangesRecommended

ADI ADC#2 AD7895

Resolution: 12 BitsInput Range: Multiple such as 10 V,

2.5 V, 0 V to 2.5 VSampling Rate: 200 kSPSS/D Supply: 5 VPower: 2.2 mA @ 100 kSPSComments: Allows a bipolar or unipolar

input with a single supply



Table 7-2. Recommended ADCs for Use with ADI

In-Amps (continued)

ADI In-Amp AD8225 Fixed Gain of 5



Voltage Swing: 4 VCMRR: 90 dB (DC-60 Hz)Nonlinearity: 10 ppm MaxResolution: 0.0013% (16 Bits)Supply Voltage: 5VSupply Current: 1.2 mA Max0.01% Settling Time

for 5 V Step: 3.2 s0.001% Settling Time

for 5 V Step: 4 sRecommended

ADI ADC#1 AD7661

Resolution: 16 BitsInput Range: 0 V to 2.5 VSampling Rate: Up to 100 kSPSS/D Supply: 5 VPower: 8 mA @ 100 kSPS with

referenceComments: Provide a reference voltage

Recommended

ADI ADC#2 AD7940

Resolution: 14 BitsInput Range: 0 V to VDDSampling Rate: 100 kSPSS/D Supply: 3 V or 5 VPower: 0.83 mA @ 100 kSPSComments: Single channel in a SOT-23

ADI In-Amp AD623AR



Voltage Swing: 4.5 VCMRR: 90 dB (DC-60 Hz)Nonlinearity: 50 ppm TypResolution: 0.02% (12 Bits)Supply Voltage: 5 VSupply Current: 0.55 mA Max0.01% Settling Time

for 5 V Step: 20 s

Recommended

ADI ADC#1 AD7688

Resolution: 12 BitsInput Range: 0 V to VREF V or 0 V to

2VREF VSampling Rate: 1 MSPS for both ADCsS/D Supply: Single 2.7 V to 5.25 VPower: 24 mW Max at 1 MSPS with

5 V supply 11.4 mV Max at1 MSPS with 3 V supply

Comments: Dual, 2-channel simultaneoussampling ADC with aserial interface

Recommended


Resolution: 12 BitsInput Range: 0 V to +2.5 V, 0 V to +5 V,

2.5 V,5 V,10 VSampling Rate: 600 kSPS for one channelS/D Supply: Single 5 VPower: 90 mW typComments: 4-channel simultaneous

sampling ADC with aparallel interface

Recommended


Resolution: 14 Bits

Input Range: 0 V to +2.5 V, 0 V to +5 V,2.5 V,5 V,10 V

Sampling Rate: 175 kSPS for both channels/360 kSPS for one channel,respectively

S/D Supply: Single 5 VPower: 70 mW typ/115 mV typ ,

respectivelyComments: 2-/4-channel (respectively)

simultaneous sampling ADCwith a parallel interface

Recommended

ADI ADC#4 AD7890/AD7891/AD7892Resolution: 12 BitsInput Range: 0 V to +2.5 V, 0 V to

+4.096 V, 0 V to +5 V,2.5 V,5 V10 V

Sampling Rate: 117/500/600 kSPS, respectivelyS/D Supply: Single 5 V supplyPower: 30/85/60 mW typ, respectivelyComments: 8/8/1 channels, respectively



High Speed Data Acquisition

As the speed and accuracy of modern data acquistion systems have increased, a growing need for higbandwidth instrumentation ampliers has developed—particularly in the eld of CCD imaging equipmewhere offset correction and input buffering are requireHere, double- correlated sampling techniques are ofte

used for offset correction of the CCD imager. As showin Figure 7-1, two sample-and-hold ampliers montor the pixel and reference levels, and a dc-correcteoutput is provided by feeding their signals into ainstrumentation amplier.

Table 7-2. Recommended ADCs for Use with ADI

In-Amps (continued)

ADI In-Amp AD627AR



Voltage Swing: 4.9 VCMRR: 77 dB (DC-60 Hz)Nonlinearity: 100 ppm MaxResolution: 0.02% (12 Bits)Supply Voltage: 5 VSupply Current: 85 A Max0.01% Settling Time

for 5 V Step: 135 s

RecommendedADI ADC#1 AD7923/AD7927

Resolution: 12 BitsInput Range: 0 V to VREF or 0 V to 2VREF

Sampling Rate: 200 kSPSS/D Supply: Single, 2.7 V to 5.25 VPower: 3.6 mW Max @ 200 kSPS

with a 3 V supplyComments: 8-/4-channel ADCs, respec-

tively, with a serial interfaceand channel sequencer

RecommendedADI ADC#2 AD7920

Resolution: 12 BitsInput Range: 0 to VDD

Sampling Rate: 250 kSPSS/D Supply: 2.35 V or 5.25 VPower: 3 mW typ @ 250 kSPS with

3 V supplyComments: Single channel, serial ADC in

6 lead SC-70



INSTRUMENTATIONAMPLIFIER

NEED 12-BITACCURACY@1MHz

DCCORRECTEDOUTPUT

SAMPLE-AND-HOLD

TOTAL SETTLING TIME FOR SAMPLE-AND-HOLDAND IN-AMP MUST BE LESS THAN 500ns

PIXEL LEVELINPUT

REFERENCELEVEL INPUT

2MHz500nsADC

AD671

PIXEL LEVEL

REFERENCELEVEL

PIXEL#1

PIXEL#2

Figure 7-1. In-Amp Buffers ADC and Provides DC Correction

Figure 7-2 shows how a single multiplexed highbandwidth in-amp can replace several slow speednonmultiplexed buffers. The system benets fromthe common-mode noise reduction and subsequentincrease in dynamic range provided by the in-amp.

ADC

AD671

HIGH SPEED IA

MUXSIGNALINPUTS

MUXSIGNALINPUTS

Figure 7-2. Single High Speed In-Amp and

Mux Replace Several Slow Speed Buffers

Previously, the low bandwidths of commonly availableinstrumentation ampliers, plus their inability todrive 50 loads, restricted their use to low frequencyapplications—generally below 1 MHz. Some higherbandwidth ampliers have been available, but thesehave been xed-gain types with internal resistors. Withthese ampliers, there was no access to the inverting and

noninverting terminals of the amplier. Using modernop amps and employing the complementary bipolar(CB) process video bandwidth instrumentation ampli-ers that offer both high bandwidths and impressive dcspecications may now be constructed. Common-moderejection may be optimized by trimming or by usinglow cost resistor arrays.

The bandwidth and settling time requirements de-manded of an in-amp buffering an ADC, and for thesample-and-hold function preceding it, can be quitesevere. The input buffer must pass the signal along fastenough so that the signal is fully settled before the ADCtakes its next sample. At least two samples per cycle arerequired for an ADC to unambiguously process an inputsignal (FS/2)—this is referred to as the Nyquist criter ia.Therefore, a 2 MHz ADC, such as the AD671, requiresthat the input buffer/sample hold sections precedingit provide 12-bit accuracy at a 1 MHz bandwidth.

Settling time is equally important: the sampling rateof an ADC is the inverse of its sampling frequency—forthe 2 MHz ADC, the sampling rate is 500 ns. Thismeans that for a total throughput rate of less than1 s, these same input buffer/sample hold sectionsmust have a total settling time of less than 500 ns.



–IN

+IN

SENSE

+VS

OUTPUT

–VS

REF

25k 25k

25k 25k

6

7

1

2

3

4

5

AMP03

+VIN

–VIN

+VS

VOUT

0.01F

–VS

0.01F

+VS

0.01F

–VS

0.01F

AD825

1k

1k

222k

RF

RG

RF

AD825

ADC

Figure 7-3. A High Performance, High Speed In-Amp Circuit

A High Speed In-Amp Circuit for Data Acquisition

Figure 7-3 shows a discrete in-amp circuit using twoAD825op amps and anAMP03differential (subtractor)amplier. This design provides both high performanceand high speed at moderate gains. Circuit gain is setby resistor R G where Gain = 1 + 2 R F/R G. Resistors R Fshould be kept at around 1 k to ensure maximum band-

width. Operating at a gain of 10 (using a 222 resistorfor R G) the –3 dB bandwidth of t his ci rcuit is approxi -mately 3.4 MHz. The ac common- mode rejectionratio (gain of 10, 1 V p-p common-mode signalapplied to the inputs) is 60 dB from 1 Hz to 200 kHzand 43 dB at 2 MHz. And it provides better than

46 dB CMRR from 4 MHz to 7 MHz. The RFI rejectiocharacteristics of this amplier are also excellent—thchange in dc offset voltage vs. common-mode frquency is better than 80 dB from 1 Hz up to 15 MHQuiescent supply current for this circuit is 15 mA.

For lower speed applications requiring a low inp

current device, the AD823 FET input op amp can bsubstituted for the AD825.

This circuit can be used to drive a modern, high speeADC such as the AD871 or AD9240, and to providvery high speed data acquisition. The AD830 can albe used for many high speed applications.


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To successfully apply any electronic component, a full

understanding of its specications is required. That is tosay, the numbers contained in a data sheet are of littlevalue if the user does not have a clear picture of whateach specication means.

In this section, a typical monolithic instrumentationamplier data sheet is reviewed. Some of the more

Appendix A

INSTRUMENTATION AMPLIFIER SPECIFICATIONS

important specications are discussed in terms of how

they are measured and what errors they might contributeto the overall performance of the circuit.

Table A-1 shows a portion of the data sheet for the AnalogDevices AD8221 instrumentation amplier.

Table A-1. AD8221 Specications1

AR Grade BR Grade ARM GradeParameter Conditions Min Typ Max Min Typ Max Min Typ Max Unit

COMMON-MODEREJECTION RATIO (CMRR)CMRR DC to 60 Hz with1 k Source Imbalance VCM = –10 V to +10 VG = 1 80 90 80 dBG = 10 100 110 100 dBG = 100 120 130 120 dBG = 1,000 130 140 130 dB

CMRR at 10 kHz VCM = –10 V to +10 VG = 1 80 80 80 dBG = 10 90 100 90 dBG = 100 100 110 100 dBG = 1,000 100 110 100 dB

NOISE RTI noise = ÷e NI 2 + (e NO/G )2

Voltage Noise, 1 kHzInput Voltage Noise, eNI VIN+, VIN– , VREF = 0 8 8 8 nV/÷ Hz Output Voltage Noise, eNO 75 75 75 nV/÷ Hz

RTI f = 0.1 Hz to 10 HzG = 1 2 2 2 µV p-pG = 10 0.5 0.5 0.5 µV p-pG = 100 to 1,000 0.25 0.25 0.25 µV p-p

Current Noise f = 1 kHz 40 40 40 fA/÷ Hz f = 0.1 Hz to 10 Hz 6 6 6 pA p-p

VOLTAGE OFFSET2 Input Offset, VOSI VS = 5 V to 15 V 60 25 70 µVOver Temperature T = –40C to +85C 86 45 135 µVAverage TC 0.4 0.3 0.9 µV/C

Output Offset, VOSO VS = 5 V to 15 V 300 200 600 µVOver Temperature T = –40C to +85C 0.66 0.45 1.00 mVAverage TC 6 5 9 µV/C

Offset RTI vs. Supply (PSR) VS = 2.3 V to 18 VG = 1 90 110 94 110 90 100 dBG = 10 110 120 114 130 100 120 dBG = 100 124 130 130 140 120 140 dBG = 1,000 130 140 140 150 120 140 dB

INPUT CURRENTInput Bias Current 0.5 1.5 0.2 0.4 0.5 2 nAOver Temperature T = –40C to +85C 2.0 1 3 nAAverage TC 1 1 3 pA/C

Input Offset Current 0.2 0.6 0.1 0.4 0.3 1 nAOver Temperature T = –40C to +85C 0.8 0.6 1.5 nAAverage TC 1 1 3 pA/C

B

C

D

E

A



AR Grade BR Grade ARM GradeParameter Min Typ Max Min Typ Max Min Typ Max Unit

R IN 20 20 20 kIIN IN+, VIN– , VREF = 0 50 60 50 60 50 60 AVoltage Range –VS +VS –VS +VS –VS +VS VGain to Output 1 0.0001 1 0.0001 1 0.0001 V/V

POWER SUPPLYOperating Range VS = 2.3 V to 18 V 2.3 18 2.3 18 2.3 18 V

Quiescent Current 0.9 1 0.9 1 0.9 1 mAOver Temperature T = –40C to +85C 1 1.2 1 1.2 1 1.2 mA

DYNAMIC RESPONSESmall Signal –3 dBBandwidthG = 1 825 825 825 kHzG = 10 562 562 562 kHzG = 100 100 100 100 kHzG = 1,000 14.7 14.7 14.7 kHz

Settling Time 0.01% 10 V StepG = 1 to 100 10 10 10 sG = 1,000 80 80 80 s

Settling Time 0.001% 10 V StepG = 1 to 100 13 13 13 sG = 1,000 110 110 110 s

Slew Rate G = 1 1.5 1.7 1.5 1.7 1.5 1.7 V/sG = 5 to 100 2 2.5 2 2.5 2 2.5 V/s

GAIN G = 1 + (49.4 k/R G)Gain Range 1 1,000 1 1,000 1 1,000 V/VGain Error VOUT 10 VG = 1 0.03 0.02 0.1 %G = 10 0.3 0.15 0.3 %G = 100 0.3 0.15 0.3 %G = 1,000 0.3 0.15 0.3 %

Gain Nonlinearity VOUT = –10 V to +10 VG = 1 to 10 R L = 10 k 3 10 3 10 5 15 ppmG = 100 R L = 10 k 5 15 5 15 7 20 ppmG = 1,000 R L = 10 k 10 40 10 40 10 50 ppmG = 1 to 100 R L = 2 k 10 95 10 95 15 100 ppm

Gain vs. TemperatureG = 1 3 10 2 5 3 10 ppm/CG > 13 –50 –50 –50 ppm/C

INPUTInput Impedance

Differential 100 ||2 100 ||2 100 ||2 G||pCommon Mode 100 ||2 100 ||2 100 ||2 G||pInput OperatingVoltage Range4 VS = 2.3 V to 5 V –VS + 1.9 +VS – 1.1 –VS + 1.9 +VS – 1.1 –VS + 1.9 +VS – 1.1 V

Over Temperature T = –40C to +85C –VS + 2.0 +VS – 1.2 –VS + 2.0 +VS – 1.2 –VS + 2.0 +VS – 1.2 VInput OperatingVoltage Range VS = 5 V to 18 V –VS + 1.9 +VS – 1.2 –VS + 1.9 +VS – 1.2 –VS + 1.9 +VS – 1.2 V

Over Temperature T = –40C to +85C –VS + 2.0 +VS – 1.2 –VS + 2.0 +VS – 1.2 –VS + 2.0 +VS – 1.2 V

OUTPUT R L = 10 k Output Swing VS = 2.3 V to 5 V –VS + 1.1 +VS – 1.2 –VS + 1.1 +VS – 1.2 –VS + 1.1 +VS – 1.2 VOver Temperature T = –40C to +85C –VS + 1.4 +VS – 1.3 –VS + 1.4 +VS – 1.3 –VS + 1.4 +VS – 1.3 V

Output Swing VS = 5 V to 18 V –VS + 1.2 +VS – 1.4 –VS + 1.2 +VS – 1.4 –VS + 1.2 +VS – 1.4 VOver Temperature T = –40C to +85C –VS + 1.6 +VS – 1.5 –VS + 1.6 +VS – 1.5 –VS + 1.6 +VS – 1.5 V

Short-Circuit Current 18 18 18 mA

TEMPERATURE RANGESpecied Performance –40 +85 –40 +85 –40 +85 °COperational4 –40 +125 –40 +125 –40 +125 °C

NOTES1VS = 15 V, VREF = 0 V, TA = +25C, G = 1, R L = 2 k, unless otherwise noted.2Total RTI VOS = (VOSI) + (VOSO/G).3Does not include the effects of external resistor R G.4One input grounded. G = 1.

F

G

H

H

I JK

L

M

N



(A) Specications (Conditions)

A statement at the top of the data sheet explains thatthe listed specifications are typically @ TA = 25C,VS = 15 V, and R L = 10 k, unless otherwise noted.This tells the user that these are the normal operatingconditions under which the device is tested. Deviationsfrom these conditions might degrade (or improve) perfor-

mance. For situations where deviations from the normalconditions (such as a change in temperature) are likely,the signicant effects are usually indicated within thespecs. The statement at the top of the specications tablealso tells us what all numbers are unless noted; typicalis used to state that the manufacturer’s characterizationprocess has shown a number to be average, however,individual devices may vary.

Instrumentation ampliers designed for true rail-to-railoperation have a few critical specications that need tobe considered. Their input voltage range should allow the

in-amp to accept input signal levels that are close to thepower supply or ground. Their output swing should bewithin 0.1 V of the supply line or ground. In contrast, atypical dual-supply in-amp can swing only within 2 V ormore of the supply or ground. In 5 V single-supply dataacquisition systems, an extended output swing is vitalbecause it allows the full input range of the ADC to beused, providing high resolution.

(B) Common-Mode Rejection

Common-mode rejection is a measure of the change inoutput voltage when the same voltage is applied to both

inputs. CMR is normally specied as input, which allowsfor in-amp gain. As the gain is increased, there will be ahigher output voltage for the same common-mode inputvoltage. These specications may be given for either afull range input voltage change or for a specied sourceimbalance in ohms.

Common-mode rejection ratio is a ratio expression,while common-mode rejection is the logarithm of that ratio. Both specications are normally referred tooutput (RTO).

That is

CMRRChangeinOutput Voltage

ChangeinCommon Mode Input Voltage=

–

While

CMR = 20 Log 10 CMRR

For example, a CMRR of 10,000 corresponds to a CMR of 80 dB. For most in-amps, the CMR increases withgain because most designs have a front end congura-tion that rejects common-mode signals while amplifyingdifferential (i.e., signal) voltages.

Common-mode rejection is usually specied for a full

range common-mode voltage change at a given frequency,and a specied imbalance of source impedance (e.g., l k source unbalance, at 60 Hz).

(C) AC Common-Mode Rejection

As might be expected, an in-amp’s common-mode rejec-tion does vary with frequency. Usually, CMR is speciedat dc or at very low input frequencies. At higher gains, anin-amp’s bandwidth does decrease, lowering its gain andintroducing additional phase shift in its input stage.

Since any imbalance in phase shift in the differential inputstage will show up as a common-mode error, ac CMRR

will usually decrease with frequency. Figure A-1 showsthe CMR vs. frequency of the AD8221.

Figure A-1. AD8221 CMR vs. Frequency

(D) Voltage Offset

Voltage offset specications are often considered agure of merit for instrumentation ampliers. While

any initial offset may be adjusted to zero through theuse of hardware or software, shifts in offset voltage dueto temperature variations are more difcult to correct.Intelligent systems using a microprocessor can use atemperature reference and calibration data to correctfor this, but there are many small signal, high gain ap-plications that do not have this capability.



Voltage offset and drift comprise four separate errordenitions: room temperature (25C), input and output,offset, and offset drift over temperature referred to bothinput and output.

An in-amp should be regarded as a 2-stage amplier withboth an input and an output section. Each section has

its own error sources. Because the errors of the outputsection are multiplied by a xed gain (usually 2), thissection is often the principal error source at low circuitgains. When the in-amp is operating at higher gains, thegain of the input stage is increased. As the gain is raised,errors contributed by the input section are multiplied,while output errors are reduced. Thus, at high gains, theinput stage errors dominate.

Input errors are those contributed by the input stagealone; output errors are those due to the output section.Input related specications are often combined and

classied together as referred to input (RTI) errors whileall output related specications are considered referred tooutput (RTO) errors. It is important to understand thatalthough these two specications often provide numbersthat are not the same, either error term is correct becauseeach denes the total error in a different way.

For a given gain, an in-amp’s input and output errorscan be calculated using the following formulas

Total Error, RTI = Input Error + (Output Error/Gain)

Total Error, RTO = (Gain Input Error ) + Output Error

Sometimes the specication page will list an error term asRTI or RTO for a specied gain. In other cases, it is upto the user to calculate the error for the desired gain.

As an example, the total voltage offset error of theAD620A in-amp when it is operating at a gain of 10can be calculated using the individual errors listed onits specications page. The (typical) input offset of theAD620 (VOSI) is listed as 30 µV. Its output offset (VOSO)is listed as 400 µV. The total voltage offset referred toinput, RTI, is equal to

Total RTI Error = V OSI + (V OSO/G ) = 30V + (400 V/ 10)

= 30 V + 40 V = 70 VThe total voltage offset referred to the output, RTO, isequal to

Total Offset Error RTO = (G (V OSI )) +V OSO = (10 (30V)) + 400 V = 700 V.

Note that RTO error is 10 times greater in value thanthe RTI error. Logically, it should be, because at a gainof 10, the error at the output of the in-amp should be10 times the error at the input.

(E) Input Bias and Offset Currents

Input bias currents are those currents owing into out of the input terminals of the in-amp. In-amps usinFET input stages have lower room temperature bias curents than their bipolar cousins, but FET input currendouble approximately every 11C. Input bias currencan be considered a source of voltage offset error (i.e

input current owing through a source resistance causa voltage offset). Any change in bias current is usually more concern than the magnitude of the bias current

Input offset current is the difference between the two inpbias currents. It leads to offset errors in in-amps when sourresistances in the two input terminals are unequal.

Although instrumentation ampliers have differentiinputs, there must be a return path for their bias curents to ow to common (ground).

If this return path is not provided, the bases (or gate

of the input devices are left oating (unconnected) anthe in-amp’s output will rapidly drift either to commoor to the supply.

Therefore, when amplifying oating input sources, sucas transformers (those without a center tap grounconnection), or ungrounded thermocouples, or any acoupled input sources, there must still be a dc path froeach input to ground. A high value resistor of 1 M10 M connected between each input and ground wnormally be all that is needed to correct this condition

(F) Operating Voltage Range

A single-supply in-amp should have the same overoperating voltage range whether it is using single dual supplies. That is, a single-supply in-amp, which specied to operate with dual-supply voltages from1to 18 V, should also operate over a 2 V to 36 V ranwith a single supply, but this may not always be the casIn fact, some in-amps, such as the AD623, will operato even lower equivalent voltage levels in single-suppmode than with a dual-supply mode. For this reason,is always best to check the data sheet specications.

(G) Quiescent Supply Current

This specifies the quiescent or nonsignal power suppcurrent consumed by an in-amp within a specifieoperating voltage range.

With the increasing number of battery-powered appcations, device power consumption becomes a criticdesign factor. Products such as the AD627 have a velow quiescent current consumption of only 60A, whiat 5 V is only 0.3 mW. Compare this power level to thof an older, vintage dual-supply product, such as thAD526. That device draws 14 mA with a 15 V supp



If the data eventually is digitized and fed to an intelligentsystem (such as a microprocessor), it may be possible tocorrect for gain errors by measuring a known referencevoltage and then multiplying by a constant.

(L) Nonlinearity

Nonlinearity is dened as the deviation from a straight

line on the plot of an in-amp’s output voltage vs. inputvoltage. Figure A-2 shows the transfer function of a devicewith exaggerated nonlinearity.

The magnitude of this error is equal to

NonlinearityActualOutput Calculated Output

Rated Full ScaleOutput Range=

–

–

This deviation can be specied relative to any straightline or to a specic straight line. There are two commonlyused methods of specifying this ideal straight line relativeto the performance of the device.

Figure A-2. Transfer Function Illustrating

Exaggerated Nonlinearity

Thebest straight line method of dening nonlinearity con-sists of measuring the peak positive and the peak negativedeviation and then adjusting the gain and offset of thein-amp so that these maximum positive and negativeerrors are equal. For monolithic in-amps this is usuallyaccomplished by laser trimming thin lm resistors orby other means. The best straight line method providesimpressive specications, but it is much more difcultto perform. The entire output signal range needs to beexamined before trimming to determine the maximumpositive and negative deviations.

The endpoint method of specifying nonlinearity requiresthat any offset and/or gain calibrations are performed atthe minimum and maximum extremes of the output range.Usually offset is trimmed at a very low output level whilescale factor is trimmed near the maximum output level.

This makes trimming much easier to implement but mresult in nonlinearity errors of up to twice those attainusing the best straight line technique. This worst-caerror will occur when the transfer function is bowed one direction only.

Most linear devices, such as instrumentation amplier

are specied for best straight line linearity. This neeto be considered when evaluating the error budget forparticular application.

Regardless of the method used to specify nonlinearitthe errors thus created are irreducible. That is to sathese errors are neither xed nor proportional to inpor output voltage and, therefore, cannot be reduced bexternal adjustment.

(M) Gain vs. Temperature

These numbers provide both maximum and typicdeviations from the gain equation as a function of tem

perature. As stated in the Gain Error section (K), the Tof an external gain resistor will never exactly match thof other resistors within the IC package. Therefore, thbest performance over temperature is usually achieved bin-amps using all internal gain resistors. Gain drift errcan be subtracted out in software by using a temperatureference and calibration data.

(N) Key Specications for Single-Supply In-Amps

There are some specications that apply to single-supp(i.e., rail-to-rail) in-amp products, which are of greimportance to designers powering in-amps from lo

voltage, single-supply voltages.Input and Output Voltage Swing

A single-supply in-amp needs to be able to handinput voltages that are very close to the supply anground. In a typical dual-supply in-amp, the inp(and output) voltage range is within about 2 V of thsupply or ground. This becomes a real problem whethe device is powered from a 5 V supply, or can bespecially difcult when using the new 3.3 V standarA standard in-amp operating from a 5 V single-suppline has only about 1 V of headroom remaining; wi

a 3.3 V supply, it has virtually none.Fortunately, a decent single-supply in-amp, such as thAD627, will allow an output swing within 100 mV the supply and ground. The input level is somewhat leswithin 100 mV of ground and 1 V of the supply rail. Icritical applications, the reference terminal of the in-amcan be moved off center to allow a symmetrical inpvoltage range.


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A

AC CMR vs. frequency table, 5-14AC input coupling, 5-2AD620:

dual-supply in-amp, 3-9in-amp:

closed-loop gain vs. frequency, 3-4CMR vs. frequency, 3-4gain nonlinearity, 3-4industry standard, 3-2, 3-3input circuit, 5-4RFI circuit, 5-10, 5-11simplied schematic, 3-3small signal pulse response, 3-4

low power in-amp, 6-18

monolithic in-amp, 5-7precision voltage-to-current converter, 6-22

AD621:in-amp:

closed-loop gain vs. frequency, 3-6CMR vs. frequency, 3-6gain nonlinearity, 3-6greater accuracy, 3-5simplied schematic, 3-5small signal pulse response, 3-6

monolithic in-amp, 5-7AD622:

low-cost in-amp:closed-loop gain vs. frequency, 3-8CMR vs. frequency, 3-8gain nonlinearity, 3-8

AD623:in-amp:

3-op amp circuit basis, 3-8closed-loop gain vs. frequency, 3-9CMR vs. frequency, 3-10gain nonlinearity, 3-10input circuit, 5-4

RFI lter, 5-12RFI suppression circuit, 5-12simplied schematic, 3-9small signal pulse response, 3-10

single-supply data circuit, 6-18AD627:

classic bridge circuit, 6-17CMR vs. frequency, 2-6in-amp:

closed-loop gain vs. frequency, 3-12CMR vs. frequency, 3-12

feedback loops, 3-11gain, equation, 3-11gain nonlinearity, 3-12input circuit, 5-4RFI suppression circuit, 5-11simplied schematic, 3-11small signal pulse response, 3-12

low power in-amp, 6-23, 6-24monolithic 2-op amp in-amp, 2-5, 2-6

AD628:block diagram, 1-5difference amplier, 6-10, 6-11differential scaling amplier, 6-4low gain, circuit, 6-4precision gain block:

circuit, 6-3gain of +1 circuit, 6-8gain of +10 circuit, 6-6gain of +11 circuit, 6-7gain of –10 circuit, 6-7, 6-8high CMRR, 6-3no external components, 6-6

AD629:difference amplier, 1-8, 6-13

high common-mode range, 6-9, 6-10high common-mode voltage, 6-15

monolithic difference amplier, 2-1AD671, ADC, multiplexer, 7-5AD822, unity-gain inverter, 6-18AD8205:

motor control application, 6-17switch applications, 6-16, 6-17

AD8221:bridge circuit, 1-1CMR vs. frequency, A-3gain equation, A-5in lter, circuits, 5-13in-amp:

characteristics, 3-2, 3-3closed-loop gain vs. frequency, 3-3CMR vs. frequency, 3-3input circuit, 5-3pinout, 3-3simplied schematic, 3-2transfer function, 3-2

low noise device, 5-4AD8225:

in-amp, RFI lter circuit, 5-12CMR vs. frequency, 3-7

Index



gain nonlinearity, 3-7monolithic in-amp, 3-7, 5-7simplied schematic, 3-7

AD8230:in-amp:

auto-zeroing, 2-7, 2-8circuits, 2-7gain, circuit, 2-8preamp phase, circuits, 2-8 to 2-10

AD8555, single-supply sensor amplier, 2-9ADC:

high level interface, 6-10interface circuit:

single-supply, 6-10common-mode input, 6-11SNR, 6-11

recommended for in-amp tables, 7-2 to 7-4requirements, calculation, 7-1

system resolution vs. converter resolution andpreamp gain table, 7-1

ADuC812, 12-bit ADC, embedded microcontroller, 6-23AMP03, differential amplier, 7-6Audio applications, in-amp, 1-6

B

Bandwidth, in-amp, 1-8, 1-9Bessel lter values, 5-16Bipolar bridge, low dropout, driver, 6-18Bridge:

applications, 6-17 to 6-24using AC excitation, 6-2

Butterworth lter values, 5-16

C

Cable, shielding, 6-21Cable termination, 5-3CCD imaging, 7-4CCD imaging equipment, in-amp, 1-6Chebychev lter values, 5-16Circuit:

bridge, 3-op amp in-amp, CMR, 1-4

bridge preamp, 1-1CMR, 1-1 to 1-5

AC, in-amp, A-3common-mode voltage, 1-2dc values, 1-3equation, 1-2in-amp, 1-7, A-3op amp vs. in-amp, 1-3 to 1-5signal amplication, 1-1 to 1-3

CMR trimming, 5-17

CMRR:calculation, 5-15in-amp, A-3

Cold junction compensation, 6-24Common-mode lter:

conventional, 5-13with X2Y capacitor, 5-13

Common-mode gain, 1-2Common-mode rejection, see CMR Common-mode rejection ratio, see CMRR Common-mode RF choke for in-amp RFI lter, 5-14Common-mode voltage, 1-1, 1-2

in op amp circuit, 1-3Composite in-amp:

circuit, 6-1CMR, 6-1CMR at gain of 100, 6-2CMRR vs. frequency, 6-1

Controlling, in-amp, 1-6

Conversion, differential to single-ended, in-amp, 1-9Current sense characteristics, table, 6-20Current sensor interface, 6-22Current transmitter, circuit, 6-9

DData acquisition, in-amp, 1-5DC return path, 5-2Decoupling, 5-1Difference amplier, 6-13

block diagram, 1-5circuit, 1-5IC, 1-5nonlinearity vs. voltage, 6-13selection table, B-1use, 1-5 to 1-6

Differential input circuit:single-pole low-pass lter, 6-3two-pole low-pass lter, 6-5

Differential signal voltage, 1-1Digi-key part no. PS1H102GND, 5-10Diode, leakage, 5-5

EEKG monitor characteristics, table, 6-20Electrostatic discharge, see ESDError, calculations, 5-8ESD:

input protection, 5-3overload protection, 5-5

External CMR, performance, 5-17External gain resistor, thermal gradient, error source, 5-7External protection diodes, 5-5



F

Fast Schottky barrier rectier, 5-5Filter:

common-mode, using X2Y capacitors, 5-13common-mode bandwidth, 5-10component values, corner frequencies, tables, 6-6differential:

bandwidths, 5-9basic circuit, 5-9

low-pass, to improve SNR, 5-15, 5-16RFI, 5-9, 5-12 to 5-15two-pole low-pass, frequency response, 6-5

Float sensor characteristics, table, 6-20

G

Gain:buffered subtractor circuit, 2-2in-amp, 1-8

Gain error, in-amp, A-5, A-6Gain range, in-amp, A-5Gain resistor:

error source, 5-7required value, table, 3-10

Gain vs. temperature, in-amp, A-6Grid leak resistance, 5-2Ground plane, in lter construction, 5-10

H

Hall effect magnetic characteristics, table, 6-20High speed data acquisition, 7-4 to 7-6High speed signal conditioning, in-amp, 1-6High voltage monitor circuit, 6-13High-side current sense, 6-17

I

Impedance, high input, in-amp, 1-8In-amp:

2-op amp, 2-4 to 2-103-op amp, 2-2, 2-3

CMRR trim circuit, 5-17feedback resistors, design, 5-6

3-op amp bridge circuit, CMR, 1-4AC input coupling recommended component

values table, 5-3application, 5-1 to 5-17applications circuit, 6-1 to 6-24auto-zeroing, 2-6 to 2-10bipolar input stages, higher CMR, 2-3buffers ADC, DC correction, 7-5characteristics, 1-7 to 1-9

circuit:CMR, 6-1, 6-2matched to ADCs, 7-1 to 7-6

CMR, 1-7composite, circuit, 6-1, 6-2DC accuracy, design issues, 5-6, 5-7denition, 1-1differential vs. common-mode input signals,

circuit, 1-6dual-supply operation, 5-1external protection diodes, 5-5external resistor, 1-7xed gain, DC performance, 5-7functional block diagram, 1-6high CMR, 1-2high quality, denition, 1-7 to 1-9high speed, high performance, 7-6input ground return, 5-1, 5-2

input protection basics, 5-3 to 5-5internal characteristics, 2-1 to 2-10low cost, 3-8 to 3-10low noise, 1-8low power, single-supply, 3-11, 3-12low power output buffering, 6-23micropower, RFI circuit, 5-11monolithic, 3-1 to 3-12

advantages, 3-1for single-supply operation, 3-8 to 3-10

multiplexed, 7-5operating gains table, 2-4output, 1-7power supply bypassing, 5-1RFI rejection measurement, circuit, 5-15selection table, B-1single-supply, key specications, A-6single-supply operation, 5-1specications, A-1 to A-6stability, 5-1summary table, 3-1transducer interface application, 6-19uses, 1-5 to 1-6

vs. op amp, 3-1characteristics, 1-1, 1-2

Wheatstone bridge, 6-17In-amp circuit, input buffers, CMR, 1-4Input bias:

in-amp, 1-8, A-4Input noise, 5-8Input and output voltage swing, in-amp, A-6Input transient, 5-5International rectier SD101 series, 5-5



J

J-type thermocouple, 6-24 Johanson Dielectrics, X2Y capacitor, 5-13 Johnson noise, 5-3

L

Level sensor characteristics, table, 6-20Linearity, best straight line method, A-6Load cell characteristics, table, 6-20Low-pass lter:

4-pole, 5-16recommended component values table, 5-16

M

Medical EKG monitor circuit, 6-19Medical instrumentation, in-amp, 1-6Micropower in-amp, RFI circuit, 5-11Monitoring, in-amp, 1-6

N

Noise:ground, 6-9, 6-10in-amp, 1-9low, in-amp, 1-8

Noise error, 5-8Nonlinearity:

in-amp, A-6low, in-amp, 1-8

O

Offset current, in-amp, A-4Offset current error, in-amp, 1-8Offset error, 5-8Op amp:

CMR, 1-3in-amp difference amplier circuit,

block diagram, 2-1subtractor, as in-amp, 2-1vs. in-amp, 1-1 to 1-5

OP27, transfer function, 6-10OP177, integrator, 6-13

Operating voltage range, in-amp, A-4Output buffer, for low power in-amp, 6-23Output swing, in-amp, 1-9Overload:

steady state, 5-3transient, 5-3

P

Photodiode sensor characteristics, table, 6-20Power, in-amp, 1-9Power controlling, in-amp, 1-6

Power distribution bus:output vs. input linearity, 6-16precision remote voltage measurement, 6-15temperature drift, 6-16

Power supply bypassing, 5-1Pulse Engineering, common-mode choke, 5-14

QQuiescent supply current, in-amp, A-4, A-5

R

Rail-to-rail input, in-amp, 1-9RC component matching, 5-2Receiver circuit, 6-23Referred-to-input, see RTIReferred-to-output, see RTORemote load sensing circuit, 6-21Resistance temperature detector characteristics, table, 6-20

Resistor, error source, 5-6Resistor thermocouple EMF values table, 5-7Resistor values for in-amps, table, 5-5RFI:

circuit, 5-9lter, design, 5-8 to 5-10input lter component values, selecting, 5-10rectication error, reducing, 5-8 to 5-17

RFI attenuation, X2Y vs. conventional RCcommon-mode lter, 5-13

RFI lter, 5-9, 5-12 to 5-16RFI suppression, using common-mode RF choke, 5-14RFI testing, 5-15RTI, in-amp, A-4RTI error, 5-7, 5-8RTO, in-amp, A-4RTO error, 5-7, 5-8

S

Schottky diode, 5-5Settling time, 5-17Signal voltage, in op amp circuit, 1-3Signal-to-noise ratio, see SNR

Silicon diode, 5-5Single-supply bridge conguration, characteristicstable, 6-20Single-supply circuit:

high CMR, 6-13 to 6-17high common-mode rejection, 6-14performance, 6-14

Slew rate, in-amp, 1-9SNR, 3-1, 5-15Software programming, in-amp, 1-6Specications, in-amp, A-3



SSM2019, audio preamplier, 6-24SSM2141, diff line receiver, 6-24SSM2143, diff line receiver, 6-24Strain gage, measurement, with AC excitation, 6-2, 6-3Strain gage bridge characteristics, table, 6-20Subtractor amplier, circuit, 1-5Subtractor circuit:

buffered, 2-2input buffering, 2-1

Summing amplier:circuit, 6-12high input impedance, 6-12frequency response, 6-13high speed noninverting, 6-11, 6-12

Switches:high-side, 6-17low-side, 6-16

T2-op amp in-amp:

architecture, 2-5circuit, 2-4common-mode design, 2-5, 2-6limitations

CMR, 2-6output swing, 2-5

3-op amp in-amp, 2-2, 2-3circuit, 2-2

CMRR trim circuit, 5-17design considerations, 2-3, 2-4feedback resistors, design, 5-6reduced CMV range, circuit, 2-3

Thermal gradient, error source, 5-7Thermal sensor characteristics, table, 6-20Thermistor characteristics, table, 6-20Thermocouple amplier:

single-supply in-amp, 6-24Thermocouple characteristics, table, 6-20Total error, in-amp, A-4Total noise, 5-8Total offset error, in-amp, A-4Transducer characteristics table, 6-20Transfer function, nonlinearity, A-6Transformer-coupled input, DC return path, 5-2Transient, overload protection, 5-5

V

Video applications, in-amp, 1-6Voltage:

common-mode, 1-1

differential signal, 1-1offset, in-amp, 1-7

Voltage drift, lowest, design, 5-6, 5-7Voltage offset, in-amp, A-3, A-4Voltage-to-current converter, 6-22

W

Weight measurement characteristics, table, 6-20

X

X2Y capacitor, 5-13electrostatic model, 5-13


http://slidepdf.com/reader/full/a-designer-guide-to-instrumentation-amplifiers-2nd-edition 105/106D-1

Device Index

Product Page

AD524 3-3AD526 A-4

AD589 6-18AD620 3-1, 3-2, 3-9, 5-4, 5-5, 5-7, 5-8, 5-10,

5-14, 6-18, 6-20, 6-22, B-1AD620AR 7-2AD621 1-8, 3-1, 3-5, 3-6, 5-4, 5-5,

5-7, 6-20, A-5, B-1AD622 3-1, 3-8, 5-4, 5-5, 6-20, B-1AD623 3-1, 3-8 to 3-10, 5-4, 5-5, 5-12,

6-1, 6-2, 6-18, 6-20, 6-21, A-4, B-1AD623AR 7-3AD626 6-20, 6-22, B-1AD627 2-5, 2-6, 3-1, 3-11, 3-12,

5-4, 5-5, 5-11, 5-12, 6-17, 6-18,6-20, 6-21, 6-23, 6-24, A-4 to A-6, B-1

AD627AR 7-4AD628 1-5, 6-3 to 6-8, 6-10, 6-11, 6-20, B-1AD629 1-5, 1-8, 2-1, 6-9, 6-10, 6-13 to 6-15, 6-20, B-1AD630 6-3AD630AR 6-2AD671 7-5AD704 5-16AD705 6-22AD706 5-16

AD780 6-10, 6-11AD820 6-21, 6-23AD822 6-18, 6-21AD823 7-6AD824 6-21AD825 7-6AD830 7-6AD871 7-6AD7450 6-10, 6-11AD7453/AD7457 7-2AD7476 6-15

AD7661 7-3AD7663 7-2AD7685 7-2

Product Page

AD7688 7-3AD7776 6-18

AD7825 6-2AD7862/AD7684 7-3AD7863/AD7865 7-3AD7890/AD7891/AD7892 7-3AD7895 7-2AD7920 7-4AD7923/AD7927 7-4AD7940 7-3AD8130 6-12AD8202 6-20, B-1AD8205 6-16, 6-17, 6-20AD8221 1-1, 3-1 to 3-3, 5-3 to 5-5, 5-9, 5-10,

5-12, 5-13, 6-1 to 6-3, 6-20, 6-21,A-1 to A-3, A-5

AD8221AR 7-2, B-1AD8221ARM B-1AD8221BR B-1AD8225 3-1, 3-7, 5-5, 5-7, 5-12, 6-1, 6-20, 7-3, B-1AD8230 2-7, 2-8, A-5AD8555 2-9AD8698 2-1, 2-2, 2-4AD9240 7-6AD22057 B-1

ADR425 6-15ADuC812 6-23AMP01 6-21AMP03 6-21, 7-6, B-1OP27 6-9, 6-10OP97 6-15OP177 6-13OP297 5-16OP497 5-16OP1177 2-1, 2-2, 6-2OP2177 2-1, 2-2, 2-4

SSM2019 6-24SSM2141 6-24SSM2143 6-24



WorldwideHeadquarters

One Technology Way

P.O. Box 9106

Norwood, MA

02062-9106 U.S.A.

Tel: 781.329.4700

(1.800.262.5643,U.S.A. only)

Fax: 781.326.8703

Analog Devices, Inc.Europe

c/o Analog Devices SA

17 –19 , ru eG e o rg e s B e s s e

Parc de Haute

Technologie d’Antony

F-92182

Antony Cedex, France

Tel: 33.1.46.74.45.00

Fax: 33.1.46.74.45.01

Analog Devices, Inc.Japan Headquarters

New Pier Takeshiba

South Tower Building

1-16-1 Kaigan,

Minato-ku, Tokyo

105-6891, Japan

Tel: 813.5402.8210

Fax: 813.5402.1063

Analog Devices, Inc.Southeast Asia

Headquarters39/F One Pacific Place

88 Queensway

Admiralty,

Hong Kong, PRC

Tel: 852.2506.9336

Fax: 852 2506 4755

a designer guide to instrumentation amplifiers 2nd edition

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